Quantum circuit simulation method based on AVX instruction set and SSE instruction set

Abstract

The present application discloses a quantum circuit simulation method based on the AVX instruction set and the SSE instruction set. The method includes: determining an initial amplitude vector based on the acquired target quantum circuit. Then, determining the quantum gate type of the target quantum circuit based on the target quantum circuit. Then, based on a preset instruction set, determining the target amplitude vector according to the quantum gate type and the initial amplitude vector, the preset instruction set includes the AVX instruction set and the SSE instruction set. Finally, determining the simulation calculation result based on the target amplitude vector. In this way, the preset instruction set is used to achieve instruction-level parallelism of the underlying operations, significantly accelerating the processing speed of processes such as vector storage, matrix operations, and result processing. In addition, according to the determined quantum gate type, different processing methods are used for the obtained initial amplitude vector, thereby improving the parallel capability of the preset instruction set, reducing the computational complexity and memory requirements of the quantum circuit simulation, and thus improving the user experience.

Description

Technical Field

[0001] The present application relates to the field of quantum circuit simulation, and more specifically, to a quantum circuit simulation method based on the AVX instruction set and the SSE instruction set. Background Art

[0002] Based on the unique physical properties of qubits, such as quantum superposition and quantum entanglement, quantum computing demonstrates significant theoretical advantages over classical computing paradigms when addressing specific complex problems. Relying on classical computing resources, quantum circuit simulation can model and simulate the quantum computing process, simulating the evolution of quantum states under quantum gate operations. The core goal is to accurately calculate quantum state vectors. However, when dealing with medium-scale and larger quantum circuits, quantum circuit simulation suffers from high computational complexity, large memory requirements, and low efficiency, which impacts the user experience. Summary of the Invention

[0003] The present application provides a quantum circuit simulation method based on the AVX instruction set and the SSE instruction set.

[0004] The present application provides a quantum circuit simulation method based on the AVX instruction set and the SSE instruction set, the method comprising:

[0005] Determine the initial amplitude vector according to the acquired target quantum circuit;

[0006] Determining a quantum gate type of the target quantum circuit according to the target quantum circuit;

[0007] Determining a target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector, wherein the preset instruction set includes an AVX instruction set and an SSE instruction set;

[0008] A simulation calculation result is determined according to the target amplitude vector.

[0009] In this way, the computer device determines the initial amplitude vector based on the acquired target quantum circuit. Next, the computer device determines the quantum gate type of the target quantum circuit based on the target quantum circuit. Then, based on a preset instruction set, the computer device determines the target amplitude vector based on the quantum gate type and the initial amplitude vector. The preset instruction set includes both the AVX and SSE instruction sets. Finally, the computer device determines the simulation result based on the target amplitude vector. In this way, the preset instruction set enables instruction-level parallelism of underlying operations, significantly accelerating processes such as vector storage, matrix operations, and result processing. Furthermore, based on the determined quantum gate type, different processing methods are applied to the obtained initial amplitude vector, enhancing the parallel capabilities of the preset instruction set and reducing the computational complexity and memory requirements of the quantum circuit simulation. This results in comprehensive improvements in computational efficiency, memory management, and scenario adaptability for quantum circuit simulation, thereby enhancing the user experience.

[0010] In some embodiments, determining the initial amplitude vector according to the acquired target quantum circuit includes:

[0011] The initial amplitude vector is determined according to the number of quantum bits and simulation accuracy of the target quantum circuit, wherein the data format of the initial amplitude vector is a predetermined data format.

[0012] In this way, the computer determines the initial amplitude vector based on the number of qubits and simulation accuracy of the target quantum circuit. The data format of the initial amplitude vector is a predetermined data format. This exponential mapping between the number of qubits and the vector length of the initial amplitude vector ensures that the initial amplitude vector strictly conforms to the quantum mechanical model. Furthermore, by dynamically binding simulation accuracy to the predetermined data format, the same algorithm can be adapted to meet the needs of multiple scenarios, from rapid verification to high-precision research.

[0013] In some embodiments, determining the quantum gate type of the target quantum circuit according to the target quantum circuit includes:

[0014] Identifying a current quantum gate in the target quantum circuit based on a first preset criterion to determine whether the current quantum gate is of a first type, where the first type is used to characterize a quantum gate that does not need to perform calculations;

[0015] If the type of the current quantum gate is not the first type, identifying the current quantum gate based on a second preset standard to determine whether the current quantum gate is a second type, where the second type is used to characterize a quantum gate whose quantum gate matrix is ​​a diagonal unitary matrix;

[0016] When the type of the current quantum gate is neither the first type nor the second type, the current quantum gate is identified based on a third preset standard to determine whether the current quantum gate is of a third type, where the third type is used to characterize a quantum gate used for performing a quantum measurement operation.

[0017] In this way, based on the first preset standard, the computer device identifies the current quantum gate in the target quantum circuit and determines whether the current quantum gate is of the first type. The first type is used to characterize quantum gates that do not require computation. Next, if the current quantum gate type is not the first type, the computer device identifies the current quantum gate based on the second preset standard and determines whether the current quantum gate is of the second type. The second type is used to characterize quantum gates whose quantum gate matrix is ​​a diagonal unitary matrix. Finally, if the current quantum gate type is neither the first type nor the second type, the computer device identifies the current quantum gate based on the third preset standard and determines whether the current quantum gate is of the third type. The third type is used to characterize quantum gates used for quantum measurement operations. In this way, through different preset standards, quantum gates are filtered into the first type quantum gates that require no computation, the second type quantum gates that require little computation, and the third type quantum gates that are specially processed, thereby achieving on-demand resource allocation.

[0018] In some embodiments, determining the target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector includes:

[0019] When the type of the current quantum gate is the first type, the initial amplitude vector is determined as the target amplitude vector.

[0020] In this way, when the current quantum gate type is the first type, the initial amplitude vector is determined as the target amplitude vector. In this way, by determining the initial amplitude vector as the target amplitude vector, the inefficient use of the operation unit, cache, and memory bus is reduced, freeing up more resources for other types of quantum gate operations, and indirectly improving the overall simulation performance.

[0021] In some embodiments, determining the target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector includes:

[0022] When the type of the current quantum gate is the second type, if the active bits of the current quantum gate are continuous, performing extraction processing on the current quantum gate to determine a diagonal element array;

[0023] Reordering the initial amplitude vectors to determine a first amplitude vector;

[0024] Based on the preset instruction set, performing parallel multiplication processing on the diagonal element array to determine a second amplitude vector;

[0025] The target amplitude vector is determined according to the second amplitude vector.

[0026] In this way, if the current quantum gate type is the second type and the active bits of the current quantum gate are continuous, the computer device extracts the current quantum gate and determines the diagonal element array. Next, the computer device reorders the initial amplitude vector to determine the first amplitude vector. Then, based on a preset instruction set, the computer device performs parallel multiplication on the diagonal element array to determine the second amplitude vector. Finally, the computer device determines the target amplitude vector based on the second amplitude vector. In this way, if the current quantum gate type is the second type, by dually utilizing the diagonal matrix characteristics and the continuity of the active bits, the computational complexity of the quantum gate operation is reduced. Combined with the parallel acceleration of the preset instruction set, the efficiency of quantum circuit simulation is improved, thereby enhancing the user experience.

[0027] In certain embodiments, the method further comprises:

[0028] In a case where the active bits are discontinuous, performing index calculation on the initial amplitude vector to determine the first amplitude vector;

[0029] Performing bit-by-bit multiplication on the diagonal element array to determine the second amplitude vector;

[0030] The reorganized index is calculated bit by bit according to the second amplitude vector to determine the target amplitude vector.

[0031] In this way, when the active bits are discontinuous, the computer device performs index calculation on the initial amplitude vector to determine the first amplitude vector. Next, the computer device performs bit-by-bit multiplication on the diagonal element array to determine the second amplitude vector. Finally, based on the second amplitude vector, the computer device calculates the reorganized index bit by bit to determine the target amplitude vector. In this way, through the index calculation and bit-by-bit processing mechanism, the performance loss of quantum circuit simulation in scenarios with discontinuous active bits is reduced while ensuring computational accuracy. Furthermore, through the index calculation and bit-by-bit processing mechanism, the quantum circuit simulation can be correctly executed under all active bit configurations, avoiding functional blind spots caused by hardware or algorithm limitations and meeting the flexibility requirements of quantum circuit design.

[0032] In some embodiments, determining the target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector includes:

[0033] When the type of the current quantum gate is the third type, determining a target probability vector according to the initial amplitude vector;

[0034] Perform random sampling according to the target probability vector to determine the simulation calculation result;

[0035] The initial amplitude vector is collapsed to determine the target amplitude vector.

[0036] In this way, when the current quantum gate type is Type III, the computer device determines the target probability vector based on the initial amplitude vector. Next, the computer device performs random sampling based on the target probability vector to determine the simulation result. Finally, the computer device collapses the initial amplitude vector to determine the target amplitude vector. In this way, when the current quantum gate type is Type III, the probability sampling mechanism and state vector collapse ensure that the measurement process is consistent with quantum mechanics theory, thereby ensuring the accuracy of the target amplitude vector.

[0037] In some embodiments, determining the target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector includes:

[0038] When the type of the current quantum gate is not the first type, not the second type, and not the third type, reordering the initial amplitude vector to determine a reordered amplitude vector;

[0039] Performing parallel multiplication processing on the current quantum gate and the reordered amplitude vector to determine a temporary amplitude vector;

[0040] The target amplitude vector is determined according to the temporary amplitude vector.

[0041] In this way, if the current quantum gate type is neither the first, nor the second, nor the third type, the computer device reorders the initial amplitude vector to determine a reordered amplitude vector. Next, the computer device performs parallel multiplication on the current quantum gate and the reordered amplitude vector to determine a temporary amplitude vector. Finally, the computer device determines the target amplitude vector based on the temporary amplitude vector. In this way, through reordering and parallel multiplication, an efficient computational path is established for quantum gates with non-special structures, ensuring the efficiency of quantum circuit simulation.

[0042] In some embodiments, determining a simulation calculation result based on the target amplitude vector includes:

[0043] When the current quantum gate is the last quantum gate, determining a second probability vector according to the target amplitude vector;

[0044] The target amplitude vector is sampled according to the acquired sampling times and the second probability vector to determine the simulation calculation result.

[0045] In this way, if the current quantum gate is the final quantum gate, the computer device determines a second probability vector based on the target amplitude vector. Next, the computer device samples the target amplitude vector based on the acquired sampling count and the second probability vector to determine the simulation result. In this way, if the current quantum gate is the final gate in the circuit, the probability calculation and sampling of the final state vector are triggered, simulating the measurement collapse process of the quantum system.

[0046] In some embodiments, determining a simulation calculation result based on the target amplitude vector includes:

[0047] When the current quantum gate is not the last quantum gate, the target amplitude vector is determined as the initial amplitude vector.

[0048] In this way, if the current quantum gate is not the final quantum gate, the computer device determines the target amplitude vector as the initial amplitude vector. In this way, through the continuous transmission mechanism of quantum state vectors, the timing correctness and computational efficiency of the gate operation sequence in quantum circuit simulation are guaranteed.

[0049] Additional aspects and advantages of the embodiments of the present application will be given in part in the description below, and in part will become obvious from the description below, or will be learned through practice of the embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0051] Figure 1 This is one of the flow charts of the quantum circuit simulation method according to the embodiment of the present application;

[0052] Figure 2 This is the second flow chart of the quantum circuit simulation method according to the embodiment of the present application;

[0053] Figure 3 This is the third flow chart of the quantum circuit simulation method according to the embodiment of the present application;

[0054] Figure 4 This is the fourth flow chart of the quantum circuit simulation method according to the embodiment of the present application;

[0055] Figure 5 This is the fifth flow chart of the quantum circuit simulation method according to the embodiment of the present application;

[0056] Figure 6 This is the sixth flow chart of the quantum circuit simulation method according to the embodiment of the present application;

[0057] Figure 7This is the seventh flow chart of the quantum circuit simulation method according to the embodiment of the present application;

[0058] Figure 8 This is the eighth flow chart of the quantum circuit simulation method according to the embodiment of the present application;

[0059] Figure 9 This is the ninth flowchart of the quantum circuit simulation method according to the embodiment of the present application;

[0060] Figure 10 This is the tenth flowchart of the quantum circuit simulation method according to the embodiment of the present application;

[0061] Figure 11 It is a schematic diagram of the quantum circuit simulation process of the embodiment of the present application. DETAILED DESCRIPTION

[0062] The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the embodiments of the present application, and should not be understood as limiting the embodiments of the present application.

[0063] Based on the unique physical properties of quantum bits - quantum superposition and quantum entanglement, quantum computing has shown significant theoretical advantages over classical computing paradigms in dealing with specific complex problems. Unlike classical bits that can only represent two discrete states, 0 or 1, a single quantum bit can be in and The entanglement between multiple qubits can form high-dimensional correlated states, giving quantum computing a natural parallel information processing capability. For example, the Shor algorithm uses quantum Fourier transform and superposition to complete the decomposition of large integers in polynomial time, which requires exponential time for classical algorithms, directly threatening the existing RSA encryption system; the Grover algorithm uses quantum search amplitude amplification technology to improve the search efficiency of unsorted databases to 100% of that of classical algorithms. times (N is the database size). These characteristics make quantum computing show great potential in fields such as cryptography, combinatorial optimization, and quantum chemistry simulation.

[0064] Among related technologies, quantum circuit simulation, relying on classical computing resources, is a key approach for validating quantum algorithms, testing hardware designs, and exploring the behavior of quantum systems. Quantum circuits are composed of a cascade of quantum gates (such as Hadamard gates, CNOT gates, and unitary transformations like phase gates). Their simulation essentially models the evolution of quantum state vectors in Hilbert space.

[0065] However, when it comes to quantum circuits of medium size or larger, the high computational complexity of the simulation process becomes a significant constraint. As the number of qubits increases, the quantum state space expands exponentially, and the dimensionality of matrix operations increases dramatically, leading to an exponential increase in the amount of computation required. This high complexity makes quantum circuit simulation extremely inefficient, not only consuming significant computing time and resources but also potentially delaying the output of simulation results. In real-world applications, this inefficient simulation process severely impacts the user experience.

[0066] Based on the above questions, please refer to Figure 1 , the embodiment of the present application provides a quantum circuit simulation method based on the AVX instruction set and the SSE instruction set, the method comprising:

[0067] 01: Determine the initial amplitude vector based on the acquired target quantum circuit;

[0068] 02: Determine the quantum gate type of the target quantum circuit based on the target quantum circuit;

[0069] 03: Based on the preset instruction set, the target amplitude vector is determined according to the quantum gate type and the initial amplitude vector;

[0070] 04: Determine the simulation calculation results based on the target amplitude vector.

[0071] The present application also provides a computer device comprising a memory and a processor. The quantum circuit optimization method of the present application can be implemented by the computer device of the present application. Specifically, the memory stores a computer program, and the processor is configured to determine an initial amplitude vector based on an acquired target quantum circuit. Furthermore, based on the target quantum circuit, determine the quantum gate type of the target quantum circuit. Furthermore, based on a preset instruction set, determine a target amplitude vector based on the quantum gate type and the initial amplitude vector, and determine a simulation result based on the target amplitude vector.

[0072] Embodiments of the present application also provide a quantum circuit simulation device. The quantum circuit simulation method based on the AVX instruction set and the SSE instruction set of the embodiments of the present application can be implemented by the quantum circuit simulation device of the embodiments of the present application. Specifically, the quantum circuit simulation device includes a determination module. The determination module is configured to determine an initial amplitude vector based on an acquired target quantum circuit. Furthermore, the determination module is configured to determine the quantum gate type of the target quantum circuit based on the target quantum circuit. Furthermore, based on a preset instruction set, the target amplitude vector is determined based on the quantum gate type and the initial amplitude vector, and a simulation calculation result is determined based on the target amplitude vector.

[0073] Specifically, quantum circuit simulation (QCS) involves modeling the execution of quantum algorithms using classical computers or specialized simulators to predict the behavior and output of quantum systems. The core goal of quantum circuit simulation is to replicate or approximate the operation of a quantum computer on a classical computer, thereby validating quantum algorithms, testing hardware designs, optimizing quantum programs, and studying the characteristics of quantum systems.

[0074] A quantum system refers to a physical object or set governed by the rules of quantum mechanics, such as the spin or polarization of an electron, the spin or polarization of a photon, etc.

[0075] Mathematically, the complex vector that describes the state of all quantum bits in a quantum system is called the quantum state vector, which is usually written as The length of the quantum state vector is (n is the number of quantum bits), each element represents the amplitude (complex number) of the corresponding quantum ground state (hereinafter referred to as the ground state), and its squared modulus is the measurement probability of the ground state. The mathematical expression of the quantum state vector is: , , ,in, is the i-th element of the quantum state vector, corresponding to the ground state Amplitude of the ground state is a subset of the quantum state vector, that is, the ground state is a specific quantum state with the lowest energy, and the quantum state vector covers all possible states. For example, assuming that the number of quantum bits in the quantum system D is 2, then the ground state includes 、 、 and , and set 、 、 and The corresponding amplitude Both , the quantum state vector is .

[0076] Quantum measurement is a fundamental operation in quantum mechanics, used to extract classical information from a quantum state. Its core characteristic is that it causes the quantum state to collapse to the ground state corresponding to the measurement result. Quantum measurement has the following characteristics: 1. After measurement, the quantum state vector irreversibly collapses to a certain ground state, i.e. After collapse, it will only become 、 、 and 2. The probability of different ground states appearing is determined by the amplitude corresponding to the ground state. 3. After collapsing to a certain ground state, the ground state is the result of quantum measurement.

[0077] Quantum sampling refers to the process of generating a series of classical results that conform to the probability distribution of a quantum measurement, typically achieved through multiple independent measurements. Quantum sampling is essentially a collection of the results of multiple quantum measurements, relying on the probabilistic rules of a single measurement. The difference is that quantum measurements are single results, while quantum sampling is a statistical distribution.

[0078] Sampling algorithms (SA) refer to techniques for generating random samples from probability distributions or data sets, which are used to estimate expected values, optimize models, or perform statistical inference. Their core goal is to use partial data to infer overall characteristics, reduce computational costs, and improve efficiency.

[0079] A quantum circuit is a sequence of operations consisting of quantum gates that are used to perform controlled transformations of quantum states to achieve computational goals.

[0080] Quantum gates refer to the basic operating units in quantum computing. They are mathematical operations that perform specific transformations on the state of quantum bits. In essence, they are unitary transformations acting on quantum states, satisfying reversibility and probability conservation. They are used to construct quantum circuits to implement the logical functions of quantum algorithms.

[0081] A qubit is the basic unit of information used to encode data in quantum computing. It can be understood as the quantum equivalent of the classical bit used by traditional computers to encode information in binary form.

[0082] The overall process of quantum circuit simulation is that after the initial quantum state vector is input into the quantum circuit, the quantum gates in the quantum circuit gradually perform unitary transformations on the initial quantum state vector to process the quantum state vector and obtain the final quantum state vector. Subsequently, a quantum measurement is performed on the final quantum state vector, and the final quantum state vector is collapsed to a certain ground state to determine the classical result. After multiple quantum measurements, a set of classical results is obtained. The quantum circuit simulation method based on the AVX instruction set and the SSE instruction set provided in the embodiment of the present application is aimed at the process of gradually performing unitary transformations on the initial quantum state vector by the quantum gates in the quantum circuit. By presetting the instruction set and distinguishing different quantum gate types, the efficiency of quantum circuit simulation is optimized.

[0083] The target quantum circuit refers to the specific representation of the quantum computing task to be simulated, including quantum bits and quantum gates. The number of quantum bits n determines the dimension of the quantum state vector (dimension is The target quantum circuit is the blueprint for the hardware implementation of the quantum algorithm. The essence of quantum circuit simulation is to reproduce the operation process of the quantum circuit on a quantum computer.

[0084] The initial amplitude vector is a vector with a length of The complex vector , where each element V1[i] represents the target quantum circuit in the i-th ground state The probability amplitude.

[0085] Quantum gate type refers to the classification of quantum gates based on their mathematical properties (such as matrix structure and effect), which is used to dynamically select the optimal simulation algorithm.

[0086] The pre-set instruction set refers to a pre-selected set of vectorized instructions for the Central Processing Unit (CPU) that are tailored to the characteristics of quantum state computing. These include the Advanced Vector Extensions (AVX) and Stream SIMD Extensions (SSE). The AVX and SSE instruction sets are CPU vector computing extensions that process multiple data in parallel using a single instruction, multiple data (SIMD) architecture, significantly accelerating matrix operations on quantum state vectors. The AVX instruction set supports wider data processing capabilities, enabling the CPU to process more data in a single grid operation, improving data parallel processing capabilities and representing a significant improvement in the CPU's vector data manipulation capabilities. The SSE instruction set includes 128-bit registers capable of simultaneously processing four single-precision floating-point numbers or two double-precision floating-point numbers. This enhances the processor's performance in vector and floating-point operations while also improving memory efficiency and making memory faster.

[0087] The target amplitude vector refers to the initial amplitude vector The state after the current quantum gate operation , that is, the new state of the quantum system after the gate acts.

[0088] The simulation calculation result refers to the final output after the quantum circuit runs, which is usually the probability distribution of the quantum state or the statistical result of multiple measurements.

[0089] The computer first determines the initial amplitude vector based on the acquired target quantum circuit. It then analyzes the target quantum circuit to determine the type of each quantum gate in the circuit.

[0090] Subsequently, based on a preset instruction set, the computer device performs a series of mathematical operations according to the determined quantum gate type and initial amplitude vector to determine the target amplitude vector.

[0091] Finally, the computer device determines the simulation result based on the calculated target amplitude vector. The above process is the process of a quantum circuit transforming from its initial state to its final state. By simulating the quantum gate operations in the quantum circuit, the computer device can predict the behavior and output of the quantum system.

[0092] The following describes the quantum circuit simulation method based on the AVX instruction set and the SSE instruction set provided by the embodiment of the present application, taking a 3-qubit quantum circuit C as an example. The quantum circuit C includes the following instructions acting on the qubits: I gate, acting on the quantum bit The Z gate acts on the quantum bit The H gate and the quantum bit Measuring gate.

[0093] First, according to the initial state of the quantum circuit C , determine the initial amplitude vector = , where index i corresponds to the ground state , It's a quantum bit The position, It's a quantum bit The position, It's a quantum bit position.

[0094] Next, the computer device analyzes the target quantum circuit and determines the quantum gate type of each quantum gate, determining that the I gate is a quantum gate of the first type, the Z gate is a quantum gate of the second type, the measurement gate is a quantum gate of the third type, and the H gate is a quantum gate of other types.

[0095] Then, based on the preset instruction set, the computer device performs a series of mathematical operations according to the determined quantum gate type and initial amplitude vector to determine the target amplitude vector = .

[0096] Finally, according to the target amplitude vector = , determine the quantum simulation results.

[0097] In summary, in the quantum circuit simulation method based on the AVX instruction set and the SSE instruction set provided in the embodiments of the present application, the computer device determines the initial amplitude vector based on the acquired target quantum circuit. Next, the computer device determines the quantum gate type of the target quantum circuit based on the target quantum circuit. Then, based on the preset instruction set, the computer device determines the target amplitude vector based on the quantum gate type and the initial amplitude vector. Finally, the computer device determines the simulation calculation result based on the target amplitude vector. In this way, through the preset instruction set, the instruction-level parallelism of the underlying operations is achieved, significantly accelerating the processing speed of processes such as vector storage, matrix operations, and result processing. In addition, according to the determined quantum gate type, different processing methods are used for the obtained initial amplitude vector, thereby improving the parallel capability of the preset instruction set and reducing the computational complexity and memory requirements of the quantum circuit simulation, thereby achieving a comprehensive improvement in the computational efficiency, memory management, and scenario adaptability of the quantum circuit simulation, thereby improving the user experience.

[0098] See also Figure 2 In some embodiments, step 01 (determining an initial amplitude vector based on the acquired target quantum circuit) includes:

[0099] 011: Determine the initial amplitude vector based on the number of quantum bits and simulation accuracy of the target quantum circuit.

[0100] In some embodiments, the determination module is further configured to determine an initial amplitude vector based on the number of quantum bits and simulation accuracy of the target quantum circuit.

[0101] In some embodiments, the processor is further configured to determine an initial amplitude vector based on the number of quantum bits of the target quantum circuit and simulation accuracy.

[0102] Specifically, simulation accuracy refers to the numerical representation accuracy of each element in the initial amplitude vector, which is usually achieved by the number of bits of floating-point numbers (such as single precision and double precision, etc.) or a custom numerical format (such as fixed-point numbers, etc.). It should be noted that amplitude is a complex number. , the simulation accuracy needs to control the accuracy of both the real part a and the imaginary part b. Among them, single precision (32-bit floating point number) means that the real part and the imaginary part are represented by 32 bits each (total 64 bits), and the accuracy is about Double precision (64-bit floating point number) means that the real part and imaginary part are represented by 64 bits each (total 128 bits), with an accuracy of approximately Simulation accuracy is primarily used to control computational errors. High precision (such as double precision) can reduce the accumulated errors in quantum gate operations, but this results in higher memory usage and computation time, making it suitable for scenarios requiring high accuracy. Low precision (such as single precision) can reduce memory usage and computation time, but this results in higher errors, making it suitable for resource-constrained scenarios or those with a high tolerance for errors.

[0103] The predetermined data format is a structured representation of the initial amplitude vector in the computer, which must be compatible with the computing framework of subsequent quantum gate operations (such as matrix multiplication and tensor product).

[0104] It should be noted that in the actual technical solution, parameters need to be comprehensively selected based on the number of quantum bits n of the target quantum circuit, computing resources and accuracy requirements to ensure the efficiency and accuracy of quantum circuit simulation.

[0105] Continuing with the above example, assume that the simulation scenario requires higher accuracy, so double-precision complex numbers are selected as the numerical format of the amplitude. In addition, the predetermined data format is selected as NumPy complex array. According to the initial state of quantum circuit C, , determine the initial amplitude vector = .

[0106] In this way, the computer determines the initial amplitude vector based on the number of qubits and simulation accuracy of the target quantum circuit. The data format of the initial amplitude vector is a predetermined data format. This exponential mapping between the number of qubits and the vector length of the initial amplitude vector ensures that the initial amplitude vector strictly conforms to the quantum mechanical model. Furthermore, by dynamically binding simulation accuracy to the predetermined data format, the same algorithm can be adapted to meet the needs of multiple scenarios, from rapid verification to high-precision research.

[0107] See also Figure 3 In some embodiments, step 02 (determining the quantum gate type of the target quantum circuit according to the target quantum circuit) includes:

[0108] 021: Based on the first preset standard, identify the current quantum gate in the target quantum circuit to determine whether the current quantum gate is of the first type;

[0109] 022: When the type of the current quantum gate is not the first type, identify the current quantum gate based on a second preset standard to determine whether the current quantum gate is the second type;

[0110] 023: When the type of the current quantum gate is neither the first type nor the second type, identify the current quantum gate based on a third preset standard to determine whether the current quantum gate is of the third type.

[0111] In some embodiments, the determination module is further configured to identify the current quantum gate in the target quantum circuit based on a first preset criterion to determine whether the current quantum gate is of a first type. If the current quantum gate is not of the first type, the determination module is further configured to identify the current quantum gate based on a second preset criterion to determine whether the current quantum gate is of a second type. Furthermore, if the current quantum gate is neither of the first type nor of the second type, the determination module is further configured to identify the current quantum gate based on a third preset criterion to determine whether the current quantum gate is of a third type.

[0112] In some embodiments, the processor is further configured to identify the current quantum gate in the target quantum circuit based on a first preset criterion to determine whether the current quantum gate is of a first type. If the current quantum gate is not of the first type, the processor is further configured to identify the current quantum gate based on a second preset criterion to determine whether the current quantum gate is of a second type. If the current quantum gate is neither of the first type nor of the second type, the processor is further configured to identify the current quantum gate based on a third preset criterion to determine whether the current quantum gate is of a third type.

[0113] Specifically, the first type is used to characterize "quantum gates that do not require calculations", that is, quantum gates that have no actual effect on the quantum state vector and can skip calculations during simulation.

[0114] The first preset criterion refers to whether the quantum gate is an identity gate (I gate), whose matrix is ​​the identity matrix I (all 1s on the diagonal and 0s on the rest). Since the matrix of the identity gate satisfies (For any quantum state Therefore, even if the I gate is included in the simulation, the amplitude vector will not be changed, and the calculation can be skipped to save resources.

[0115] The second type is used to characterize "quantum gates whose quantum gate matrix is ​​a diagonal unitary matrix", that is, the matrix of the quantum gate is a diagonal matrix and satisfies the unitary property. ,in, is the conjugate transposed matrix of U.

[0116] The second preset criterion includes that the quantum gate matrix is ​​a diagonal matrix (only the diagonal has non-zero elements) or the quantum gate matrix satisfies the unitary property (the modulus of the diagonal elements is 1, that is, The second type of quantum gates includes: [S,S_dagger,Z, U1,Rz,T,T_dagger,Phase,Rzz,CZ,CRz,CU1].

[0117] The third type is used to characterize "quantum gates that perform quantum measurement operations," that is, operations that collapse a quantum state into a classical bit result through measurement.

[0118] The third preset criterion refers to whether the operation of the quantum gate is a measurement operation, such as the measure instruction in the quantum circuit.

[0119] Continuing with the above example, the I gate in quantum circuit C meets the first preset criterion and is a first-type quantum gate. The Z gate in quantum circuit C meets the second preset criterion and is a second-type quantum gate. The H gate in quantum circuit C does not meet the first, second, and third preset criteria and is a quantum gate of another type. The measurement gate in quantum circuit C meets the third preset criterion and is a third-type quantum gate.

[0120] In this way, based on the first preset standard, the computer device identifies the current quantum gate in the target quantum circuit and determines whether the current quantum gate is of the first type. The first type is used to characterize quantum gates that do not require computation. Next, if the current quantum gate type is not the first type, the computer device identifies the current quantum gate based on the second preset standard and determines whether the current quantum gate is of the second type. The second type is used to characterize quantum gates whose quantum gate matrix is ​​a diagonal unitary matrix. Finally, if the current quantum gate type is neither the first type nor the second type, the computer device identifies the current quantum gate based on the third preset standard and determines whether the current quantum gate is of the third type. The third type is used to characterize quantum gates used for quantum measurement operations. In this way, through different preset standards, quantum gates are filtered into the first type quantum gates that require no computation, the second type quantum gates that require little computation, and the third type quantum gates that are specially processed, thereby achieving on-demand resource allocation.

[0121] See also Figure 4 In some embodiments, step 03 (determining the target amplitude vector based on the preset instruction set, the quantum gate type and the initial amplitude vector) includes:

[0122] 031: When the type of the current quantum gate is the first type, the initial amplitude vector is determined as the target amplitude vector.

[0123] In some embodiments, the determination module is configured to determine the initial amplitude vector as the target amplitude vector when the type of the current quantum gate is the first type.

[0124] In some embodiments, the processor is further configured to, when the type of the current quantum gate is the first type, determine the initial amplitude vector as the target amplitude vector.

[0125] Specifically, since the first type of gate does not change the amplitude vector of the quantum state, there is no need to perform any matrix multiplication or calculation operations during simulation, and the initial amplitude vector can be directly used as the target amplitude vector.

[0126] Continuing with the above example, the quantum gate currently processed by quantum circuit C is for quantum bit The I gate is the first type of quantum gate and does not change the amplitude vector of the quantum state, so V1= = .

[0127] In this way, when the current quantum gate type is the first type, the initial amplitude vector is determined as the target amplitude vector. In this way, by determining the initial amplitude vector as the target amplitude vector, the inefficient use of the operation unit, cache, and memory bus is reduced, freeing up more resources for other types of quantum gate operations, and indirectly improving the overall simulation performance.

[0128] See also Figure 5 In some embodiments, step 03 (determining the target amplitude vector based on the preset instruction set, the quantum gate type and the initial amplitude vector) includes:

[0129] 032: When the type of the current quantum gate is the second type, if the active bits of the current quantum gate are continuous, extract the current quantum gate and determine the diagonal element array;

[0130] 033: reorder the initial amplitude vector to determine the first amplitude vector;

[0131] 034: Based on a preset instruction set, perform parallel multiplication processing on the diagonal element array to determine the second amplitude vector;

[0132] 035: Determine a target amplitude vector based on the second amplitude vector.

[0133] In certain embodiments, the determination module is further configured to, when the type of the current quantum gate is the second type and the active bits of the current quantum gate are continuous, perform extraction processing on the current quantum gate to determine a diagonal element array, and reorder the initial amplitude vector to determine a first amplitude vector. The determination module is further configured to perform parallel multiplication processing on the diagonal element array based on a preset instruction set to determine a second amplitude vector, and determine a target amplitude vector based on the second amplitude vector.

[0134] In certain embodiments, the processor is further configured to, when the type of the current quantum gate is the second type and the active bits of the current quantum gate are continuous, perform extraction processing on the current quantum gate to determine a diagonal element array, and reorder the initial amplitude vector to determine a first amplitude vector. The processor is further configured to, based on a preset instruction set, perform parallel multiplication processing on the diagonal element array to determine a second amplitude vector, and determine a target amplitude vector based on the second amplitude vector.

[0135] Specifically, the second type of quantum gate refers to a gate whose quantum gate matrix is ​​a diagonal unitary matrix. The characteristics of this type of gate are: it only phase modulates the ground state amplitude corresponding to the active bit in the quantum state (multiplying by the diagonal elements) without changing the superposition relationship of the ground state.

[0136] The active bit is the target qubit of the quantum gate. For example, the quantum circuit C includes the qubits I gate, acting on the quantum bit The Z gate acts on the quantum bit The H gate and the quantum bit The measurement gate, where the Z gate acts on the quantum bit , then the quantum bit It should be noted that the diagonal unitary matrix only scales or transforms the amplitude corresponding to the state of the active bit.

[0137] Continuous action bits refer to the fact that the action bits are adjacent in the quantum bit sequence (e.g., the action bit is a quantum bit and quantum bits ), rather than being dispersed (e.g., the active bit is a quantum bit and quantum bits ). For example, in a 4-qubit system, the action on the qubit and quantum bits If the target qubits of the quantum gate are continuous, it is easier to group the amplitude vector into blocks according to the states of the continuous bits, which can simplify reordering and parallel computing.

[0138] The extraction process refers to extracting non-zero diagonal elements from a diagonal unitary matrix (because a diagonal matrix only has values ​​on the diagonal).

[0139] The diagonal element array refers to the list of diagonal elements arranged in the order of the ground state of the bit being acted on. For example, if the Z gate acts on a single quantum bit , then the diagonal element array is [1, -1]. If the Z gate acts on the quantum bit and quantum bits , then the diagonal matrix is , the diagonal element array D is [1, -1, -1, 1].

[0140] Reordering processing refers to grouping the amplitude vectors according to the states of the active bits so that each group only contains the state changes of the inactive bits, thereby simplifying the multiplication operation of the diagonal matrix.

[0141] The first amplitude vector is the result of the reordering of the initial amplitude vector, and its structure is the state of the active bit. A set of grouped sub-vectors. Each sub-vector contains the amplitudes of all combinations of inactive bit states when the active bit state is fixed. For example, the initial amplitude vector is , in a 4-qubit system, if the Z gate acts on the qubit and quantum bits , after reordering, the initial amplitude vector is adjusted according to the state of the active bit ( ) groups, each group contains a fixed state of the active bit. The processing logic is as follows: the state of the active bit ( )common = 4 states, namely 00, 01, 10 and 11. Inactive bit ( )common = 4 states, namely 00, 01, 10 and 11. The index of the quantum state vector is ( ) are arranged, so =00, It can be one of 00, 01, 10 and 11. Therefore =01, It can be one of 00, 01, 10 and 11. Therefore =10, It can be one of 00, 01, 10 and 11. Therefore =11 o'clock, It can be one of 00, 01, 10 and 11.

[0142] The structure of the first amplitude vector is as follows: = ,in, = = ( =00), = = ( =01), = = ( =10), = = ( =11).

[0143] Parallel multiplication processing refers to multiplying the diagonal element array by each sub-vector of the first amplitude vector element by element to obtain the second amplitude vector. The processing logic is as follows: the diagonal element array D [1, -1, -1, 1] is multiplied by Multiply the subvectors of ×D[0]= ×[1]= ; ×D[1]= ×[-1]= [0,0,0,0]; ×D[2]= ×[-1]= ; ×D[3]= ×[1]= .

[0144] The second amplitude vector has the following structure: = .

[0145] According to the second amplitude vector, the target amplitude vector is determined, which can be understood as: the second amplitude vector is arranged in the order of the original quantum state ( ) to restore the complete amplitude vector. The processing logic is as follows: [0] fills the original vector with index (0-3); [1] Fill in the index of the original vector (4-7); [2] Fill in the index of the original vector (8-11); [3] is filled to the index (12-15) of the original vector. Then the target amplitude vector = Thus, if the traditional full matrix multiplication is used, 16×16=256 multiplications are required (the complexity is O( )), and by reordering and parallel multiplication, only 4×4=16 multiplications are required (the complexity is O( )), the amount of calculation is greatly reduced.

[0146] In this way, if the current quantum gate type is the second type and the active bits of the current quantum gate are continuous, the computer device extracts the current quantum gate and determines the diagonal element array. Next, the computer device reorders the initial amplitude vector to determine the first amplitude vector. Then, based on a preset instruction set, the computer device performs parallel multiplication on the diagonal element array to determine the second amplitude vector. Finally, the computer device determines the target amplitude vector based on the second amplitude vector. In this way, if the current quantum gate type is the second type, by dually utilizing the diagonal matrix characteristics and the continuity of the active bits, the computational complexity of the quantum gate operation is reduced. Combined with the parallel acceleration of the preset instruction set, the efficiency of quantum circuit simulation is improved, thereby enhancing the user experience.

[0147] See also Figure 6 In certain embodiments, the method further comprises:

[0148] 036: When the active bits are discontinuous, perform index calculation on the initial amplitude vector to determine the first amplitude vector;

[0149] 037: Perform bit-by-bit multiplication on the diagonal element array to determine the second amplitude vector;

[0150] 038: According to the second amplitude vector, calculate the reorganized index bit by bit to determine the target amplitude vector.

[0151] In certain embodiments, the determination module is further configured to, if the active bits are discontinuous, perform index calculation on the initial amplitude vector to determine a first amplitude vector, perform bit-by-bit multiplication on the diagonal element array to determine a second amplitude vector, and calculate a reorganized index bit-by-bit based on the second amplitude vector to determine a target amplitude vector.

[0152] In certain embodiments, the processor is further configured to, when the active bits are discontinuous, perform index calculation on the initial amplitude vector to determine a first amplitude vector, perform bit-by-bit multiplication on the diagonal element array to determine a second amplitude vector, and calculate a reorganized index bit-by-bit based on the second amplitude vector to determine a target amplitude vector.

[0153] Specifically, index calculation refers to analyzing the position of the active bit, calculating the active bit state index corresponding to each element in the original amplitude vector, and rearranging the amplitude according to the index to obtain the first amplitude vector.

[0154] The bit-by-bit multiplication process involves extracting an array of diagonal elements from the diagonal unitary matrix (ordered by active bit state) and multiplying them element-by-element with the first amplitude vector to obtain a second amplitude vector (with the amplitudes corresponding to the active bit states adjusted).

[0155] Calculating the reorganized index bit by bit refers to putting the elements in the second amplitude vector back in the original index order according to the mapping relationship between the active bit state and the original vector index to obtain the final target amplitude vector.

[0156] In this way, when the active bits are discontinuous, the scattered amplitudes are reorganized into continuous active bit state groups through index mapping, which solves the problem that the diagonal matrix cannot be directly applied.

[0157] In this way, when the active bits are discontinuous, the computer device performs index calculation on the initial amplitude vector to determine the first amplitude vector. Next, the computer device performs bit-by-bit multiplication on the diagonal element array to determine the second amplitude vector. Finally, based on the second amplitude vector, the computer device calculates the reorganized index bit by bit to determine the target amplitude vector. In this way, through the index calculation and bit-by-bit processing mechanism, the performance loss of quantum circuit simulation in scenarios with discontinuous active bits is reduced while ensuring computational accuracy. Furthermore, through the index calculation and bit-by-bit processing mechanism, the quantum circuit simulation can be correctly executed under all active bit configurations, avoiding functional blind spots caused by hardware or algorithm limitations and meeting the flexibility requirements of quantum circuit design.

[0158] See also Figure 7 In some embodiments, step 03 (determining the target amplitude vector based on the preset instruction set, the quantum gate type and the initial amplitude vector) includes:

[0159] 039: When the current quantum gate type is the third type, determine the target probability vector according to the initial amplitude vector;

[0160] 050: Perform random sampling based on the target probability vector to determine the simulation calculation results;

[0161] 051: Collapse the initial amplitude vector to determine the target amplitude vector.

[0162] In certain embodiments, the determination module is further configured to, when the current quantum gate type is the third type, determine a target probability vector based on the initial amplitude vector, perform random sampling based on the target probability vector to determine a simulation result, and perform collapse processing on the initial amplitude vector to determine a target amplitude vector.

[0163] In certain embodiments, the processor is further configured to, when the current quantum gate is of the third type, determine a target probability vector based on the initial amplitude vector, perform random sampling based on the target probability vector to determine a simulation calculation result, and collapse the initial amplitude vector to determine a target amplitude vector.

[0164] Specifically, the third type of quantum gate usually refers to a measurement operation (such as "acting on a qubit" in the example). Measurement is the key operation for transforming a quantum state from a superposition state to a classical state. Its core is to simulate the physical process of quantum measurement through three steps: probability calculation, random sampling, and state collapse.

[0165] For example, a quantum circuit C includes a quantum bit I gate, acting on the quantum bit The Z gate acts on the quantum bit The H gate and the quantum bit The measurement gate, after the operation of I gate, Z gate and H gate, the amplitude vector obtained is .

[0166] In this way, the computer device determines the target probability vector as [0.5, 0, 0, 0.5, 0, 0, 0] based on the initial amplitude vector. Then, if the sampling times are 1000, the target probability vector [0.5, 0, 0, 0.5, 0, 0, 0] is sampled by Monte Carlo to count the quantum bits. Finally, suppose a certain sampling result is = 0, then the state vector collapses to (correspond ).

[0167] In this way, when the current quantum gate type is Type III, the computer device determines the target probability vector based on the initial amplitude vector. Next, the computer device performs random sampling based on the target probability vector to determine the simulation result. Finally, the computer device collapses the initial amplitude vector to determine the target amplitude vector. In this way, when the current quantum gate type is Type III, the probability sampling mechanism and state vector collapse ensure that the measurement process is consistent with quantum mechanics theory, thereby ensuring the accuracy of the target amplitude vector.

[0168] See also Figure 8 In some embodiments, step 03 (determining the target amplitude vector based on the preset instruction set, the quantum gate type and the initial amplitude vector) includes:

[0169] 052: When the type of the current quantum gate is not the first type, nor the second type, nor the third type, reordering the initial amplitude vector to determine a reordered amplitude vector;

[0170] 053: Perform parallel multiplication processing based on the current quantum gate and the reordered amplitude vector to determine the temporary amplitude vector;

[0171] 054: Determine the target amplitude vector based on the temporary amplitude vector.

[0172] In certain embodiments, the determination module is further configured to, when the type of the current quantum gate is not the first type, the second type, or the third type, reorder the initial amplitude vector to determine a reordered amplitude vector; perform parallel multiplication processing on the current quantum gate and the reordered amplitude vector to determine a temporary amplitude vector; and determine a target amplitude vector based on the temporary amplitude vector.

[0173] In some embodiments, the processor is further configured to, when the type of the current quantum gate is not the first type, the second type, or the third type, reorder the initial amplitude vector to determine a reordered amplitude vector; perform parallel multiplication processing on the current quantum gate and the reordered amplitude vector to determine a temporary amplitude vector; and determine a target amplitude vector based on the temporary amplitude vector.

[0174] Specifically, when the quantum gate is neither the first type (such as the unit gate), the second type (diagonal unitary gate), nor the third type (measurement gate), the evolution calculation of the quantum state must be completed through three steps: reordering, parallel multiplication, and order restoration. Usually, it is a non-diagonal fully unitary matrix, and the sparsity optimization of the diagonal gate cannot be utilized. Therefore, it is necessary to concentrate the state of the active bit through reordering, and then realize the state transformation through matrix multiplication. For example, the matrix of the universal unitary gate (such as the CNOT gate) is a full-rank non-diagonal matrix, and its action will change the amplitude of multiple basis states at the same time (for example, the CNOT gate will flip the state of the target bit, depending on the state of the control bit). Since it is impossible to modify only part of the amplitude like the diagonal gate (second type), its action must be simulated through full matrix multiplication, but the direct calculation complexity is (O( ) (n is the number of qubits). Reordering optimization centralizes the states of active bits, reducing the complexity of index calculations and improving multiplication efficiency. Quantum gates that are neither type I, type II, nor type III include: "X, H, Y, SX, SX_dagger, SY, SY_dagger, SW, U2, U3, Rx, Ry, Rxy, XY2P, XY2M, XY, FSim, , Rxx, Ryy, Rzx, Swap, CX, CY, CH, CRy, CU3."

[0175] For example, a quantum circuit C includes a quantum bit I gate, acting on the quantum bit The Z gate acts on the quantum bit The H gate and the quantum bit The measurement gate, after the processing of I gate and Z gate, the amplitude vector is .

[0176] H-gate qubit , the amplitude vector is The bits are divided into (Action bit, )and (Inactive bit, , ).

[0177] Next, for each Corresponding Sub-vector (length 2), perform H gate matrix multiplication. Finally, the calculated The sub-vectors are reassembled into the target amplitude vector in the original order.

[0178] In this way, if the current quantum gate type is neither the first, nor the second, nor the third type, the computer device reorders the initial amplitude vector to determine a reordered amplitude vector. Next, the computer device performs parallel multiplication on the current quantum gate and the reordered amplitude vector to determine a temporary amplitude vector. Finally, the computer device determines the target amplitude vector based on the temporary amplitude vector. In this way, through reordering and parallel multiplication, an efficient computational path is established for quantum gates with non-special structures, ensuring the efficiency of quantum circuit simulation.

[0179] See also Figure 9 In some embodiments, step 04 (determining simulation calculation results based on the target amplitude vector) includes:

[0180] 041: When the current quantum gate is the last quantum gate, determine the second probability vector according to the target amplitude vector;

[0181] 042: Based on the acquired sampling times and the second probability vector, the target amplitude vector is sampled and processed to determine the simulation calculation result.

[0182] In certain embodiments, the confirmation module is further configured to determine a second probability vector based on the target amplitude vector when the current quantum gate is the final quantum gate, and to perform sampling processing on the target amplitude vector based on the acquired sampling count and the second probability vector to determine a simulation calculation result.

[0183] In certain embodiments, the processor is further configured to, when the current quantum gate is the final quantum gate, determine a second probability vector based on the target amplitude vector, and perform sampling processing on the target amplitude vector based on the acquired number of sampling times and the second probability vector to determine a simulation calculation result.

[0184] Specifically, when the current quantum gate is the final gate in the circuit (i.e., when the quantum circuit has completed execution), the mathematical representation of the quantum state (the target amplitude vector) must be converted into an observable classical result. This process is accomplished by calculating the probability distribution (the second probability vector) and performing multiple sampling statistics, simulating the multiple measurements of the quantum state in actual quantum experiments.

[0185] The second probability vector represents the theoretical probability distribution of the quantum state measurement outcome. It is directly determined by the squared modulus of the target amplitude vector and is a mathematical manifestation of the statistical laws of quantum mechanics. The number of samples, N, simulates the "repeated measurement" process in actual quantum experiments. When N is sufficiently large, the frequency distribution F(i) approaches the theoretical probability P(i), enabling verification of the correctness of the quantum state (e.g., the output of a quantum algorithm must be statistically verified).

[0186] Simulation results (such as frequency distribution) provide key insights for the design and verification of quantum algorithms. For example, quantum error correction algorithms rely on statistically analyzing the frequency of error states to assess their effectiveness, while quantum search algorithms rely on statistically analyzing the frequency of target states to verify their search efficiency.

[0187] In this way, if the current quantum gate is the final quantum gate, the computer device determines a second probability vector based on the target amplitude vector. Next, the computer device samples the target amplitude vector based on the acquired sampling count and the second probability vector to determine the simulation result. In this way, if the current quantum gate is the final gate in the circuit, the probability calculation and sampling of the final state vector are triggered, simulating the measurement collapse process of the quantum system.

[0188] See also Figure 10 In some embodiments, step 04 (determining simulation calculation results based on the target amplitude vector) includes:

[0189] 043: When the current quantum gate is not the last quantum gate, the target amplitude vector is determined as the initial amplitude vector.

[0190] In some embodiments, the determination module is further configured to determine the target amplitude vector as the initial amplitude vector when the current quantum gate is not the final quantum gate.

[0191] In some embodiments, the processor is further configured to, when the current quantum gate is not the final quantum gate, determine the target amplitude vector as the initial amplitude vector.

[0192] Specifically, in quantum computing simulations, a quantum circuit consists of multiple quantum gates arranged in sequence, each of which acts on the quantum state in turn, forming a continuous chain of state evolution. When a non-final quantum gate is processed, the resulting quantum state (target amplitude vector) needs to serve as the input (initial amplitude vector) for the next quantum gate, ensuring the continuous evolution of the quantum state in the circuit, consistent with the physical processes of actual quantum circuits.

[0193] In this way, if the current quantum gate is not the final quantum gate, the computer device determines the target amplitude vector as the initial amplitude vector. In this way, through the continuous transmission mechanism of quantum state vectors, the timing correctness and computational efficiency of the gate operation sequence in quantum circuit simulation are guaranteed.

[0194] The following is an explanation of the quantum circuit simulation method based on the AVX instruction set and the SSE instruction set. Figure 11 , Figure 11 This is a schematic diagram of the complete process of quantum circuit simulation, describing the entire process. The specific steps are as follows: First, input the target quantum circuit C, the number of samples T, and the precision D to provide basic data for the simulation. Next, based on the number of quantum bits Q and the precision D in quantum circuit C, an initial amplitude vector is constructed. The first bit of the vector is 1, and the rest are 0. If the precision D is double precision, the vector data type is complex128; if it is single precision, it is complex64. Then, a judgment is made for each quantum gate G in the circuit:

[0195] If it is a unit matrix quantum gate or the quantum gate matrix is ​​a unit matrix, the complex operation is skipped. If it is not a unit matrix, further judgment is made: if it is a diagonal matrix quantum gate, the quantum circuit simulation algorithm for the diagonal matrix is ​​executed (S302).

[0196] If it is not a diagonal matrix, determine whether it is a measurement quantum gate: if it is a measurement quantum gate, execute the measurement quantum gate simulation algorithm (S303).

[0197] If it is neither a diagonal matrix nor a measurement gate, a quantum circuit simulation algorithm for a general matrix is ​​executed ( S304 ).

[0198] Next, after processing all quantum gates in the quantum circuit, the final quantum state vector V is obtained. The final quantum state vector V is then sampled based on the sampling number T and the number of qubits. The probability of each quantum state is calculated (by performing absolute value and square operations on V), and samples are taken according to the probabilities, with each sampling result S recorded (S501).

[0199] Finally, the final quantum state vector V and the sampling result S are output to complete the quantum circuit simulation (S601).

[0200] The present application also provides a computer-readable storage medium containing a computer program. When the computer program is executed by one or more processors, the one or more processors execute the method of the present application.

[0201] It is understood that a computer program includes computer program code. The computer program code may be in source code form, object code form, executable file, or some intermediate form. Computer-readable storage media may include any entity or device capable of carrying computer program code, recording media, USB flash drives, removable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), and software distribution media.

[0202] In the description of this specification, the descriptions with reference to the terms "particularly", "further", "particularly", "understandably", etc. are intended to mean that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic expressions of the above terms are not intended to refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0203] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present application belong.

[0204] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A quantum circuit simulation method based on the AVX instruction set and the SSE instruction set, characterized in that: The method comprises: Determine the initial amplitude vector according to the acquired target quantum circuit; Determining a quantum gate type of the target quantum circuit according to the target quantum circuit; Determining a target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector, wherein the preset instruction set includes an AVX instruction set and an SSE instruction set; Determining a simulation calculation result according to the target amplitude vector; The step of determining the initial amplitude vector according to the acquired target quantum circuit includes: The initial amplitude vector is determined according to the number of quantum bits and simulation accuracy of the target quantum circuit, wherein the data format of the initial amplitude vector is a predetermined data format.

2. The method according to claim 1, characterized in that The step of determining the quantum gate type of the target quantum circuit according to the target quantum circuit includes: Identifying a current quantum gate in the target quantum circuit based on a first preset criterion to determine whether the current quantum gate is of a first type, where the first type is used to characterize a quantum gate that does not need to perform calculations; If the type of the current quantum gate is not the first type, identifying the current quantum gate based on a second preset standard to determine whether the current quantum gate is a second type, where the second type is used to characterize a quantum gate whose quantum gate matrix is ​​a diagonal unitary matrix; When the type of the current quantum gate is neither the first type nor the second type, the current quantum gate is identified based on a third preset standard to determine whether the current quantum gate is of a third type, where the third type is used to characterize a quantum gate used for performing a quantum measurement operation.

3. The method according to claim 2, characterized in that The step of determining a target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector includes: When the type of the current quantum gate is the first type, the initial amplitude vector is determined as the target amplitude vector.

4. The method according to claim 2, characterized in that The step of determining a target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector includes: When the type of the current quantum gate is the second type, if the active bits of the current quantum gate are continuous, performing extraction processing on the current quantum gate to determine a diagonal element array; Reordering the initial amplitude vectors to determine a first amplitude vector; Based on the preset instruction set, performing parallel multiplication processing on the diagonal element array to determine a second amplitude vector; The target amplitude vector is determined according to the second amplitude vector.

5. The method according to claim 4, characterized in that The method further comprises: In a case where the active bits are discontinuous, performing index calculation on the initial amplitude vector to determine the first amplitude vector; Performing bit-by-bit multiplication on the diagonal element array to determine the second amplitude vector; The reorganized index is calculated bit by bit according to the second amplitude vector to determine the target amplitude vector.

6. The method according to claim 2, characterized in that The step of determining a target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector includes: When the type of the current quantum gate is the third type, determining a target probability vector according to the initial amplitude vector; Perform random sampling according to the target probability vector to determine the simulation calculation result; The initial amplitude vector is collapsed to determine the target amplitude vector.

7. The method according to claim 2, characterized in that The step of determining a target amplitude vector based on a preset instruction set and according to the quantum gate type and the initial amplitude vector includes: When the type of the current quantum gate is not the first type, not the second type, and not the third type, reordering the initial amplitude vector to determine a reordered amplitude vector; Performing parallel multiplication processing on the current quantum gate and the reordered amplitude vector to determine a temporary amplitude vector; The target amplitude vector is determined according to the temporary amplitude vector.

8. The method according to claim 2, characterized in that Determining the simulation calculation result according to the target amplitude vector includes: When the current quantum gate is the last quantum gate, determining a second probability vector according to the target amplitude vector; The target amplitude vector is sampled according to the acquired sampling times and the second probability vector to determine the simulation calculation result.

9. The method according to claim 2, characterized in that Determining the simulation calculation result according to the target amplitude vector includes: When the current quantum gate is not the last quantum gate, the target amplitude vector is determined as the initial amplitude vector.

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