Circuit system for testing photovoltaic output characteristics of satellite solar cell

Abstract

The invention discloses a circuit system for testing photovoltaic output characteristics of a satellite solar cell, belongs to the field of spaceflight, and particularly relates to a circuit system for testing the photovoltaic output characteristics of a satellite on-orbit solar cell. The problem that the collection area of the on-orbit photovoltaic output characteristics of the solar cell cannot completely cover the photovoltaic characteristic curve of the whole solar cell due to the fact that the circuit of the solar cell is limited by the upper limit and the lower limit of the voltage of a primary bus or a storage battery of the whole satellite in a traditional test system for the on-orbit photovoltaic output characteristics of the solar cell is solved. The circuit system comprises a power resistor RF, a power dissipation circuit, a signal conversion circuit, an analog quantity acquisition circuit, a loop control circuit and a driving circuit; and the loop control circuit is used for providing dynamically adjusted reference voltage Ref. The circuit system for testing the photovoltaic output characteristics of the satellite solar cell is suitable for collecting the on-orbit photovoltaic output characteristics of the solar cell.

Description

Technical Field

[0001] The present invention relates to the field of aerospace, and particularly to the test of the on-orbit photovoltaic output characteristics of satellite solar cells. Background Art

[0002] The energy supply of satellites mainly adopts triple-junction gallium arsenide solar cells, which results in a relatively high cost for satellite development. In order to reduce the cost of satellite development, those skilled in the art have begun to seek new types of solar cells to replace the original triple-junction gallium arsenide solar cells.

[0003] For the newly developed new type of solar cell (referred to as new type of solar cell SAS), those skilled in the art do not understand its on-orbit (photovoltaic) output characteristics, do not know whether it meets the requirements of satellite energy supply, and cannot directly replace the original triple-junction gallium arsenide solar cell with it. Therefore, before using the new type of solar cell to replace the original triple-junction gallium arsenide solar cell, those skilled in the art need to first comprehensively collect, test and analyze the on-orbit photovoltaic output characteristics of the new type of solar cell.

[0004] The traditional acquisition and test system for the on-orbit photovoltaic output characteristics of solar cells mainly relies on the in-satellite power controller to execute the acquisition of the on-orbit photovoltaic output characteristics of solar cells. Since the circuit of the solar cell is limited by the upper and lower limits of the primary bus or battery voltage of the entire satellite, the acquisition area of the on-orbit photovoltaic output characteristics of the solar cell cannot completely cover the entire photovoltaic characteristic curve of the solar cell. Taking DET (Direct Energy Transfer) in traditional aerospace as an example, the working range of the solar cell is clamped due to the bus voltage, and the collectable (testable) area of the on-orbit photovoltaic output characteristics cannot fully cover the I-V curve of the solar cell. Summary of the Invention

[0005] The present invention provides a circuit system for testing the photovoltaic output characteristics of satellite solar cells, which solves the problem that the acquisition area of the on-orbit photovoltaic output characteristics of the traditional solar cell test system cannot completely cover the entire photovoltaic characteristic curve of the solar cell because the circuit of the solar cell is limited by the upper and lower limits of the primary bus or battery voltage of the entire satellite.

[0006] The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to the present invention includes a power resistor RF, a power dissipation circuit, a signal conversion circuit, an analog quantity acquisition circuit, a loop control circuit, and a drive circuit.

[0007] The power dissipation circuit includes a power MOS transistor, which is used to realize the load adjustment and power dissipation of the new solar cell SAS. The drain of the power MOS transistor is connected to the positive voltage terminal of the new solar cell SAS, and its source is connected to the negative voltage terminal of the new solar cell SAS through a power resistor RF and grounded.

[0008] The signal conversion circuit includes a temperature conversion unit, a voltage conversion unit, and a current conversion unit.

[0009] The temperature conversion unit is used to remotely collect the temperature of the new solar cell SAS, convert it into an analog parameter that is linearly proportional to the temperature of the new solar cell SAS, and send it to the temperature acquisition channel of the analog acquisition circuit.

[0010] The voltage conversion unit is used to remotely collect the voltage across the new solar cell SAS, convert it into an analog parameter that is linearly proportional to the voltage across the new solar cell SAS, and send it to the voltage acquisition channel of the analog acquisition circuit.

[0011] The current conversion unit is used to collect the output current of the new solar cell SAS and convert it into an analog parameter that is linearly proportional to the output current of the new solar cell SAS. The current conversion unit includes a differential amplifier. The input terminals of the differential amplifier of the current conversion unit are connected across both ends of the power resistor RF, and the output terminal is connected to the current acquisition channel of the analog acquisition circuit.

[0012] The analog acquisition circuit is used to convert the analog parameters collected by the signal conversion circuit into digital quantities, including the temperature data, voltage data, and current data of the new solar cell SAS.

[0013] The loop control circuit is used to provide a dynamically adjustable reference voltage Ref, calculate the difference between the reference voltage Ref and the analog parameter that is linearly proportional to the output current of the new solar cell SAS output by the current conversion unit, and perform proportional-integral operation on the calculated difference to obtain a control signal.

[0014] The drive circuit includes a totem pole circuit, which is used to perform push-pull amplification on the control signal output by the loop control circuit to obtain a bidirectional drive current as a drive signal, and drive the power MOS transistor of the power dissipation circuit to work in a variable load range.

[0015] Further, a preferred embodiment is provided. The temperature conversion unit includes a voltage-dividing resistor R7, an NTC thermistor R8, and a differential amplifier.

[0016] The NTC thermistor R8 is attached to the surface of the new solar cell SAS, and its resistance value decreases as the surface temperature of the new solar cell SAS increases.

[0017] The NTC thermistor R8 and the voltage-dividing resistor R7 are connected in series to form a voltage-dividing circuit. The voltage-dividing circuit generates a voltage-dividing signal, which is converted into a linear voltage inversely proportional to the surface temperature of the new solar cell SAS by a differential amplifier. The output end of the differential amplifier is connected to the temperature acquisition channel of the analog quantity acquisition circuit.

[0018] Further, a preferred embodiment is provided. The loop control circuit includes a controllable reference Ref module and a second-order compensated PI controller. The second-order compensated PI controller includes an operational amplifier U1, a non-inverting input resistor R4, an inverting input resistor R5, a series compensation network, and a high-frequency filtering capacitor C2.

[0019] The controllable reference Ref module is for D / A conversion and is used to provide a reference voltage Ref to be input into the non-inverting input end of the operational amplifier U1. The reference voltage Ref corresponds to the desired current value of the new solar cell SAS.

[0020] The non-inverting input resistor R4 is connected in series between the output end of the D / A conversion and the non-inverting input end of the operational amplifier U1.

[0021] The inverting input resistor R5 is connected in series between the output end of the current conversion unit and the inverting input end of the operational amplifier U1.

[0022] The non-inverting input resistor R4 and the inverting input resistor R5 are used to optimize the DC operating point of the operational amplifier U1, reduce the bias current of the operational amplifier U1, and provide protection current limiting for the input of the operational amplifier U1 at the same time.

[0023] The series compensation network is composed of a resistor R6 and a capacitor C1 connected in series. The series compensation network is connected in parallel between the inverting input end and the output end of the operational amplifier U1 to form a lead-lag compensation network. Among them, the resistor R6 is used to provide zero-point compensation to improve the phase margin, and the capacitor C1 is used to introduce pole compensation to suppress high-frequency oscillation.

[0024] The high-frequency filtering capacitor C2 is connected in parallel between the inverting input end and the output end of the operational amplifier U1 and is used to filter out high-frequency noise and enhance the anti-interference ability of the loop.

[0025] The operational amplifier U1 is used to realize error amplification and dynamic regulation, calculate the difference between the reference voltage Ref and the analog quantity parameter that is linearly proportional to the output current of the new solar cell SAS output by the current conversion unit, and perform proportional-integral operation on the calculated difference to obtain a control signal.

[0026] Further, a preferred embodiment is provided. The drive circuit includes an NPN transistor Q1, a PNP transistor Q2, a pull-up resistor R1, a gate series resistor R2, and a power supply VYK ;

[0027] The NPN transistor Q1 and the PNP transistor Q2 form a complementary push-pull structure for realizing bidirectional drive current;

[0028] The NPN transistor Q1 serves as the upper-arm drive transistor and is used to conduct when the control signal output by the loop control circuit is at a high level, and provide a forward drive current to the power dissipation circuit;

[0029] The PNP transistor Q2 serves as the lower-arm drive transistor and is used to conduct when the control signal output by the loop control circuit is at a low level, and quickly release the gate charge to achieve turn-off;

[0030] The pull-up resistor R1 is connected between the collector of the NPN transistor Q1 and the power supply V YK to limit the maximum drive current when the NPN transistor Q1 conducts, and prevent overshoot from damaging the power MOS transistor;

[0031] The gate series resistor R2 is located between the output end of the drive circuit and the power dissipation circuit, and is used to suppress high-frequency oscillation in the gate loop of the power MOS transistor and adjust the switching speed.

[0032] Further, a preferred embodiment is provided. The power dissipation circuit includes a power MOS transistor Q3 and a gate pull-down resistor R3;

[0033] The gate pull-down resistor R3 is connected in parallel between the gate and the source of the power MOS transistor Q3, and is used to ensure reliable turn-off of the power MOS transistor Q3 when the drive signal disappears and prevent mis-triggering;

[0034] The power MOS transistor Q3 is used to change the load characteristics of the new solar cell SAS by adjusting its conduction impedance, and realize I-V curve traversal.

[0035] The present invention also proposes a method for testing the photovoltaic output characteristics of satellite solar cells. The testing method is implemented by using the circuit system for testing the photovoltaic output characteristics of satellite solar cells described in any one of the above;

[0036] The testing method includes the following steps:

[0037] Step S1: According to a given I-V scanning strategy, generate a corresponding reference voltage Ref; the corresponding reference voltage Ref is used to input into the circuit system for testing the photovoltaic output characteristics of satellite solar cells, change the load of the new solar cell SAS, and realize closed-loop control and I-V curve traversal;

[0038] Step S2: Obtain the temperature data, voltage data, and current data of the new solar cell SAS corresponding to each reference voltage Ref, and generate a complete I-V curve.

[0039] The present invention also provides a test device for the photovoltaic output characteristics of satellite solar cells, and the test device is implemented by using the circuit system for testing the photovoltaic output characteristics of satellite solar cells described in any one of the above.

[0040] The test device includes the following modules:

[0041] Module S1: Generate a corresponding reference voltage Ref according to a given I-V scanning strategy; the corresponding reference voltage Ref is used to input the circuit system for testing the photovoltaic output characteristics of satellite solar cells, change the load of the new solar cell SAS, and realize closed-loop control and I-V curve traversal.

[0042] Module S2: Obtain the temperature data, voltage data, and current data of the new solar cell SAS corresponding to each reference voltage Ref, and generate a complete I-V curve.

[0043] The present invention also provides a computer device, including: a processor and a memory, where the memory is used to store the executable instructions of the processor, and the processor is configured to execute the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells by executing the executable instructions.

[0044] The present invention also provides a computer storage medium, in which a computer program is stored, and when the computer program runs, it executes the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells.

[0045] The present invention also provides a computer program product, including a computer program / instructions, and when the computer program / instructions are executed by a processor, the steps of the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells are implemented.

[0046] The present invention has the following beneficial effects:

[0047] The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to the present invention can independently traverse the entire I-V curve of the solar cell in the acquisition area of the on-orbit photovoltaic output characteristics independent of the in-satellite power controller, which is of great significance for mastering and analyzing the on-orbit data of new solar cells.

[0048] The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to the present invention is applicable to the acquisition of the on-orbit photovoltaic output characteristics of solar cells. Description of the Drawings

[0049] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0050] Figure 1 In an embodiment of the present invention, it is a schematic structural diagram of a circuit system for testing the photovoltaic output characteristics of satellite solar cells;

[0051] Figure 2 In an embodiment of the present invention, it is a schematic structural diagram of a collection system for the on-orbit photovoltaic output characteristics of traditional solar cells;

[0052] Figure 3 In an embodiment of the present invention, it is a schematic diagram of the position of the collectable area of the on-orbit photovoltaic output characteristics of a collection system for the on-orbit photovoltaic output characteristics of traditional solar cells in the I-V curve of the solar cell; among them, the shaded area represents the collectable area of the on-orbit photovoltaic output characteristics of the collection system for the on-orbit photovoltaic output characteristics of traditional solar cells. It can be seen from this that the collectable area cannot completely cover the entire photovoltaic characteristic curve (i.e., the I-V curve) of the solar cell. Detailed Embodiments

[0053] To make the technical solutions and advantages of the present invention more clearly expressed, the following will further describe in detail and completely the specific embodiments of the present invention in conjunction with the drawings. The following described embodiments are only some preferred embodiments of the present invention, rather than all implementation manners; the following described embodiments are intended to explain the present invention and should not be construed as a limitation to the present invention; the reasonable combination of the technical features defined in each embodiment of the present invention, and all other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments of the present invention, fall within the scope of protection of the present invention.

[0054] In one embodiment, a circuit system for testing the photovoltaic output characteristics of satellite solar cells is provided:

[0055] The circuit system includes a power resistor RF, a power dissipation circuit, a signal conversion circuit, an analog quantity acquisition circuit, a loop control circuit, and a drive circuit;

[0056] The power dissipation circuit includes a power MOS transistor, which is used to realize the load adjustment and power dissipation of the new solar cell SAS; the drain of the power MOS transistor is connected to the positive voltage terminal of the new solar cell SAS, and its source is connected to the negative voltage terminal of the new solar cell SAS through the power resistor RF and grounded;

[0057] The signal conversion circuit includes a temperature conversion unit, a voltage conversion unit, and a current conversion unit;

[0058] The temperature conversion unit is used to collect the temperature of the new type of solar cell SAS remotely, convert it into an analog parameter that has a linear proportional relationship with the temperature of the new type of solar cell SAS, and send it to the temperature acquisition channel of the analog acquisition circuit;

[0059] The voltage conversion unit is used to collect the voltage across the two ends of the new type of solar cell SAS remotely, convert it into an analog parameter that has a linear proportional relationship with the voltage across the two ends of the new type of solar cell SAS, and send it to the voltage acquisition channel of the analog acquisition circuit;

[0060] The current conversion unit is used to collect the output current of the new type of solar cell SAS and convert it into an analog parameter that has a linear proportional relationship with the output current of the new type of solar cell SAS; the current conversion unit includes a differential amplifier; the input terminals of the differential amplifier of the current conversion unit are connected across both ends of the power resistor RF, and the output terminal is connected to the current acquisition channel of the analog acquisition circuit;

[0061] The analog acquisition circuit is used to convert the analog parameters collected by the signal conversion circuit into digital quantities, including the temperature data, voltage data, and current data of the new type of solar cell SAS;

[0062] The loop control circuit is used to provide a dynamically adjustable reference voltage Ref, calculate the difference between the reference voltage Ref and the analog parameter that has a linear proportional relationship with the output current of the new type of solar cell SAS output by the current conversion unit, and perform proportional-integral operation on the calculated difference to obtain a control signal;

[0063] The drive circuit includes a totem pole circuit, which is used to perform push-pull amplification on the control signal output by the loop control circuit to obtain a bidirectional drive current as a drive signal to drive the power MOS transistor of the power dissipation circuit to work in a variable load range.

[0064] In this embodiment, the circuit system is used to test the photovoltaic output characteristics of the new type of solar cell SAS in orbit of a satellite.

[0065] It should be noted that currently, the acquisition of the photovoltaic output characteristics of solar cells in orbit is executed by the in-satellite power controller. Since the solar cell circuit is limited by the upper and lower limits of the primary bus or battery voltage of the entire satellite, it cannot fully cover the entire photovoltaic characteristic curve of the solar cell. The circuit system can independently of the power controller achieve a comprehensive traversal of the I-V curve of the solar cell. Specifically:

[0066] The circuit system, through a loop control circuit, based on a closed-loop feedback system of an operational amplifier comparator, compares in real time the voltage value converted from the SAS output current with the difference from the reference voltage, and dynamically adjusts the conduction degree of the power MOSFET; at the same time, through a drive circuit, using a MOSFET gate drive chip, it converts the control signal into a high-current drive capability; at the same time, through a power dissipation circuit, using a combination of a single high-power MOSFET and a heat sink as a variable load resistor; it can achieve active load modulation, by adjusting the on-resistance of the MOSFET, making the SAS operating point continuously change from the short-circuit current (Isc, MOSFET fully on) to the open-circuit voltage (Voc, MOSFET off), covering the entire I-V curve; by changing the on-resistance, continuous scanning of the SAS voltage and current is achieved; the loop control circuit directly adjusts the load impedance, rather than relying on the bus voltage; the voltage at the SAS output terminal is determined by its own characteristics and the load, and is not affected by the clamping of the satellite primary bus or battery voltage; the circuit system has the ability to cover extreme points. When the MOSFET is off, the load impedance tends to infinity, and the voltage at the SAS output terminal naturally rises to the open-circuit voltage Voc; when the MOSFET is fully on, the load impedance is the lowest, forcing the SAS output current to reach the short-circuit current Isc.

[0067] The circuit system is essentially different from traditional power controllers:

[0068] There is no voltage following limit: Satellite power controllers usually perform MPPT tracking based on the bus voltage (such as locking the SAS voltage near the bus voltage), while the circuit system can freely cross the bus voltage range by actively changing the load impedance.

[0069] Full-range scanning ability: Traditional controllers only optimize the power point within the operating voltage range (such as ±10% of the bus voltage), while this solution forces a complete traversal of the full range from 0V (short circuit) to Voc.

[0070] In this embodiment, the input terminals of the differential amplifier of the current conversion unit are connected across both ends of the power resistor RF, and are used to convert the output current of the new type of solar cell SAS into a voltage signal as a current control signal.

[0071] In this embodiment, the voltage difference across both ends of the power resistor RF of the current conversion unit is amplified by the differential amplifier to achieve current-voltage conversion, and then can be converted into a digital quantity through an analog acquisition circuit.

[0072] In this embodiment, the analog acquisition circuit includes a multi-channel serial interface analog-to-digital converter and a voltage reference; the multi-channel serial interface analog-to-digital converter includes at least a temperature acquisition channel, a voltage acquisition channel, and a current acquisition channel; the analog acquisition circuit is used to convert analog parameters of voltage, current, and temperature into hexadecimal digital quantities.

[0073] In this embodiment, the analog acquisition circuit is used to convert the analog parameters acquired by the signal conversion circuit into digital quantities, including the temperature data, voltage data, and current data of the new type of solar cell SAS, for forming the I-V curve of the new type of solar cell SAS.

[0074] In this embodiment, in the loop control circuit, by setting the desired operating point of the SAS, the magnitude of the reference voltage Ref is controlled to achieve the control of the output current of the SAS. By varying Ref, a comprehensive traversal of the on-orbit output characteristics of the SAS is realized.

[0075] In this embodiment, by dynamically adjusting the reference voltage Ref and comparing it with the analog parameter that is linearly proportional to the output current of the new type of solar cell SAS output by the current conversion unit to obtain a control signal, the conduction degree of the power MOS transistor is controlled by the subsequent drive circuit to form a closed-loop regulation of the load of the new type of solar cell SAS, realizing the traversal of the I-V curve (operating point);

[0076] Combining the analog parameter that is linearly proportional to the temperature of the new type of solar cell SAS, the analog parameter that is linearly proportional to the voltage across the two ends of the new type of solar cell SAS, and the analog parameter that is linearly proportional to the output current of the new type of solar cell SAS acquired, a complete I-V curve is obtained.

[0077] In addition, in one embodiment, the temperature conversion unit includes a voltage-dividing resistor R7, an NTC thermistor R8, and a differential amplifier;

[0078] The NTC thermistor R8 is attached to the surface of the new type of solar cell SAS, and its resistance value decreases as the surface temperature of the new type of solar cell SAS increases;

[0079] The NTC thermistor R8 and the voltage-dividing resistor R7 are connected in series to form a voltage-dividing circuit. The voltage-dividing circuit generates a voltage-dividing signal that is converted into a linear voltage inversely proportional to the surface temperature of the new type of solar cell SAS by the (temperature conversion) differential amplifier; the output terminal of the differential amplifier is connected to the temperature acquisition channel of the analog acquisition circuit.

[0080] In addition, in one embodiment, the voltage conversion unit includes a voltage-dividing resistor and a differential amplifier (for voltage conversion). A voltage-dividing resistor network is connected in parallel across both ends of the novel solar cell SAS, and the voltage-dividing point is led to the differential amplifier; the output end of the differential amplifier is connected to the voltage acquisition channel of the analog quantity acquisition circuit.

[0081] Through the cascade connection of the voltage-dividing network and the differential amplifier, the synchronous elimination of high-voltage isolation and cable voltage drop error is achieved.

[0082] In addition, in one embodiment, the loop control circuit includes a controllable reference Ref module and a second-order compensated PI controller; the second-order compensated PI controller includes an operational amplifier U1, a non-inverting input resistor R4, an inverting input resistor R5, a series compensation network, and a high-frequency filtering capacitor C2;

[0083] The controllable reference Ref module performs D / A conversion to provide a reference voltage Ref that is input to the non-inverting input terminal of the operational amplifier U1; the reference voltage Ref corresponds to the desired current value of the novel solar cell SAS;

[0084] The non-inverting input resistor R4 is connected in series between the D / A conversion output terminal and the non-inverting input terminal of the operational amplifier U1;

[0085] The inverting input resistor R5 is connected in series between the output terminal of the current conversion unit and the inverting input terminal of the operational amplifier U1;

[0086] The non-inverting input resistor R4 and the inverting input resistor R5 are used to optimize the DC operating point of the operational amplifier U1, reduce the bias current of the operational amplifier U1, and at the same time provide protection current limiting for the input of the operational amplifier U1;

[0087] The series compensation network is composed of a resistor R6 and a capacitor C1 connected in series; the series compensation network is connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U1 to form a lead-lag compensation network; among them, the resistor R6 is used to provide zero-point compensation to improve the phase margin, and the capacitor C1 is used to introduce pole compensation to suppress high-frequency oscillation;

[0088] The high-frequency filtering capacitor C2 is connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U1, and is used to filter out high-frequency noise and enhance the anti-interference ability of the loop;

[0089] The operational amplifier U1 is used to achieve error amplification and dynamic regulation, calculate the difference between the reference voltage Ref and the analog quantity parameter that is linearly proportional to the output current of the novel solar cell SAS output by the current conversion unit, and perform proportional-integral operation on the calculated difference to obtain a control signal.

[0090] In this embodiment, the signal transmission path of the loop control circuit:

[0091] Reference signal (reference voltage Ref) path: D / A conversion output → non-inverting input resistor R4 → non-inverting input terminal (+) of operational amplifier U1 → output terminal of operational amplifier U1 → drive circuit;

[0092] Feedback signal path: current conversion unit → inverting input resistor R5 → inverting input terminal (-) of operational amplifier U1 → comparison with reference signal (reference voltage Ref) → error amplification;

[0093] Dynamic regulation: The output terminal of operational amplifier U1 adjusts the compensation parameters in real time through a series compensation network (including resistor R6 and capacitor C1) and high-frequency filter capacitor C2 to ensure the stability of the closed-loop system within a wide frequency band.

[0094] In this embodiment, the series compensation network and C2 are connected in parallel to form a second-order frequency response characteristic.

[0095] In addition, in one embodiment, the drive circuit includes an NPN transistor Q1, a PNP transistor Q2, a pull-up resistor R1, a gate series resistor R2, and a power supply V YK ;

[0096] The NPN transistor Q1 and the PNP transistor Q2 form a complementary push-pull structure for realizing bidirectional drive current;

[0097] The NPN transistor Q1 serves as the upper-arm drive transistor and is used to conduct when the control signal output by the loop control circuit is high, providing a positive drive current to the power dissipation circuit;

[0098] The PNP transistor Q2 serves as the lower-arm drive transistor and is used to conduct when the control signal output by the loop control circuit is low, quickly releasing the gate charge to achieve turn-off;

[0099] The pull-up resistor R1 is connected between the collector of the NPN transistor Q1 and the power supply V YK to limit the maximum drive current when the NPN transistor Q1 conducts and prevent overshoot from damaging the power MOS transistor;

[0100] The gate series resistor R2 is located between the output terminal of the drive circuit and the power dissipation circuit, used to suppress high-frequency oscillation in the gate circuit of the power MOS transistor and adjust the switching speed.

[0101] In this embodiment, the signal transmission path of the drive circuit:

[0102] Positive drive: The loop control circuit outputs a high level → the NPN transistor Q1 conducts → current path: power supply V YK→Pull-up resistor R1 → NPN transistor Q1 → Gate series resistor R2 → Gate of Q3 in the power dissipation circuit (charging);

[0103] Reverse turn-off: The loop control circuit outputs a low level → PNP transistor Q2 conducts → Current path: Gate of Q3 in the power dissipation circuit → Gate series resistor R2 → PNP transistor Q2 → GND (discharging).

[0104] Overall: The loop control circuit U1 outputs a control signal → Base of NPN transistor Q1 / PNP transistor Q2 → Push-pull amplification → Gate series resistor R2 → Gate of Q3 in the power dissipation circuit.

[0105] In this embodiment, the totem pole structure (Q1 - Q2 complementary push-pull) realizes high-speed and low-impedance driving ability, ensuring fast switching of the power MOS transistor.

[0106] In this embodiment, the bases of the NPN transistor Q1 and the PNP transistor Q2 are respectively connected to the control signals output by the loop control circuit.

[0107] In this embodiment, the NPN transistor Q1 constitutes the upper arm of the totem pole (driving transistor), the base receives the positive component of the loop control signal, and the collector is connected to the power supply V through the pull-up resistor R1 YK , and the emitter is directly coupled to the emitter of the PNP transistor Q2 and outputs simultaneously (to the gate of Q3 in the power dissipation circuit), providing fast conduction ability.

[0108] In this embodiment, the PNP transistor Q2 constitutes the lower arm of the totem pole (driving transistor), the base receives the reverse component of the loop control signal, the collector is grounded, and it forms a complementary push-pull structure with the NPN transistor Q1 to realize bidirectional drive current.

[0109] In addition, in one embodiment, the power dissipation circuit includes a power MOS transistor Q3 and a gate pull-down resistor R3;

[0110] The gate pull-down resistor R3 is connected in parallel between the gate and the source of the power MOS transistor Q3, and is used to ensure reliable turn-off of the power MOS transistor Q3 when the drive signal disappears, preventing mis-triggering;

[0111] The power MOS transistor Q3 is the core execution device of the variable load, and is used to change the load characteristics of the new solar cell SAS by adjusting its conduction impedance, realizing I-V curve traversal.

[0112] In this embodiment, the drain of the power MOS transistor Q3 is connected to the positive voltage pole of the new solar cell SAS. A power resistor RF is connected in series between the source of the power MOS transistor Q3 and the ground, and the power resistor RF is used to convert the output current of the new solar cell SAS into a voltage drop signal for sampling by the analog acquisition circuit.

[0113] In this embodiment, the signal transmission path of the power dissipation circuit is as follows:

[0114] Load regulation: drive signal → gate of power MOS transistor Q3 → change the conduction degree of power MOS transistor Q3 → regulate the load current of the new solar cell SAS;

[0115] Power dissipation: output power of the new solar cell SAS → drain-source of power MOS transistor Q3 → converted into heat energy dissipation through the on-resistance of power MOS transistor Q3 and RF resistor.

[0116] Dynamic load characteristics: when the D / A conversion - Ref signal becomes larger → the operational amplifier U1 adjusts its output signal through the compensation network → adjust the equivalent resistance of power MOS transistor Q3 to decrease → the SAS load becomes heavier → the operating point moves along the I-V curve to the high-current region, realizing traversal of the characteristic curve.

[0117] In this embodiment, the protection mechanism of the power dissipation circuit is as follows:

[0118] The gate pull-down resistor R3 limits the sudden change of the gate voltage;

[0119] The power resistor RF provides an overcurrent protection reference signal.

[0120] In addition, in one embodiment, the overall system-level signal flow of the circuit system for testing the photovoltaic output characteristics of satellite solar cells is described as follows:

[0121] Forward control chain:

[0122] D / A sets the Ref reference → loop control circuit → drive circuit → adjust the conduction degree of Q3 → change the SAS load current → RF sampling → current conversion → feedback to U1 (forming a closed-loop traversal control);

[0123] Data acquisition chain:

[0124] SAS voltage / current / temperature → signal conversion circuit → analog acquisition circuit (16-bit ADC) → digital control system (not included in the circuit system) → I-V curve reconstruction.

[0125] Each adjustment of the Ref value corresponds to a working point on the I-V curve, and full characteristic coverage is achieved through continuous scanning of Ref.

[0126] In the above embodiment, the circuit system for testing the photovoltaic output characteristics of satellite solar cells has the following innovative points:

[0127] Second-order compensation PI controller topology: through the unique structure of the series network of R6 - C1 in parallel with C2, second-order compensation is achieved in a single-stage operational amplifier, taking into account both dynamic response and stability.

[0128] High-voltage isolation drive design: The combination of remote differential sampling (voltage conversion unit) and totem pole drive (Q1 - Q2) is adopted to solve the common-mode interference problem between the satellite high-voltage bus (>100V) and the low-voltage control circuit.

[0129] In addition, in one embodiment, the reference voltage Ref is described as follows:

[0130] (1) Setting method of Ref:

[0131] Ref (reference voltage) is an independently set value generated by an external D / A converter, and its value is pre-programmed and set by the host computer (or embedded controller) of the satellite test system.

[0132] Ref defines the expected working current value of the solar cell SAS and serves as the reference input for closed-loop control.

[0133] The digital instruction (such as 16-bit encoding) is converted into an analog voltage signal (Ref) through a D / A converter and input to the non-inverting terminal (R4 terminal) of U1 in the loop control circuit.

[0134] The voltage reference of Ref is usually provided by a high-precision voltage regulator chip (such as AD558) to ensure the absolute accuracy of the D / A output.

[0135] The generation circuit of Ref and the acquisition circuit of SAS (voltage / current / temperature) are physically isolated on the power supply and signal paths to avoid interference from the high-voltage bus (SAS side) to the control loop.

[0136] (2) Correlation between Ref and SAS signals:

[0137] Although Ref itself is independently set, the real-time signal of SAS will indirectly affect the system's response to Ref through a feedback mechanism:

[0138] Closed-loop control logic:

[0139] Setting goal: Ref represents the expected SAS output current value (such as I_set).

[0140] Feedback signal: The current conversion unit measures the actual current of SAS (I_actual) through a power resistor RF (or sampling resistor) and inputs it to the inverting terminal of U1 through R5.

[0141] Error adjustment: The PI controller (U1, R4 - R6, C1 - C2) compares the difference between Ref and I_actual and dynamically adjusts the conduction degree of the power MOS transistor Q3 to force the actual current I_actual to approach the reference voltage Ref.

[0142] Potential impact of SAS signal on Ref setting:

[0143] Non-real-time adjustment: In the test task, the host computer may update the Ref value in stages according to the historical data of SAS (such as the efficiency decline caused by temperature change), but this process belongs to offline programming and is not a real-time closed-loop.

[0144] (3) Application scenarios of Ref setting:

[0145] Implementation of I-V curve traversal:

[0146] Scanning mode: The host computer gradually sets the Ref value from 0 to the open-circuit voltage (Voc) of SAS at a fixed step (such as 0.1V), forcing SAS to work in all states from short-circuit (Isc) to open-circuit (Voc).

[0147] Data acquisition: At each Ref setting point, the analog acquisition circuit synchronously records the voltage, current, and temperature of SAS, and finally synthesizes a complete I-V curve.

[0148] Dynamic load simulation:

[0149] Step response test: By suddenly changing the Ref value (such as jumping from 50% Isc to 80% Isc), evaluate the recovery characteristics of SAS under load transients.

[0150] MPPT verification: Simulate the maximum power point tracking (MPPT) algorithm through the gradient change of Ref to verify the system efficiency.

[0151] (4) Synergistic relationship between acquisition signal and SAS signal:

[0152] Voltage signal (Vm, that is, the voltage data of the new solar cell SAS): Only used for I-V curve data acquisition, does not participate in Ref setting, but indirectly affects the voltage value through load adjustment in the closed-loop.

[0153] Current signal (I_actual, that is, the analog parameter linearly proportional to the output current of the new solar cell SAS): Directly compared with Ref to generate an error signal, driving the PI controller to adjust the power MOS transistor Q3 to achieve current closed-loop control.

[0154] Temperature signal (R7 - R8, that is, the temperature data of the new solar cell SAS): Can be used to correct the theoretical characteristic curve of SAS (such as temperature-voltage coefficient), and may adjust the scanning range of Ref in the host computer.

[0155] In summary, through the precise step-by-step setting of Ref and the high-speed closed-loop response, the full characteristic scanning of the solar cell in orbit is realized, avoiding the defect of the traditional power controller being limited by the bus voltage.

[0156] In addition, in one embodiment, the SAS voltage / current / temperature collected is described as follows:

[0157] (1) Voltage (Vm) data:

[0158] It reflects the real-time output voltage characteristics of the solar cell and is used to calculate key parameters such as the open-circuit voltage (Voc) and maximum power point voltage (Vmp) of the SAS.

[0159] In closed-loop control, the voltage signal eliminates the cable voltage drop error through remote differential sampling to ensure the voltage measurement accuracy of the high-voltage bus (such as the satellite primary bus).

[0160] Application scenarios:

[0161] When the conduction degree of the power MOS transistor (Q3) is adjusted, the SAS load changes, resulting in voltage fluctuations. The voltage data is used to verify the accuracy of the load adjustment.

[0162] In the I-V curve traversal, it is combined with the current data to plot the voltage-current relationship curve.

[0163] (2) Current (I_actual) data

[0164] It characterizes the output current capacity of the solar cell and is used to calculate the short-circuit current (Isc) and maximum power point current (Imp).

[0165] As a direct feedback signal for closed-loop control, it is compared with the Ref value (desired current) set by the D / A to drive the PI controller to adjust the conduction degree of Q3.

[0166] Implementation method:

[0167] The current is converted into a voltage drop signal through the power resistor RF and input into the ADC after being amplified by a high-precision differential amplifier.

[0168] The resolution of the current signal is guaranteed by a 16-bit ADC (for example, a full-scale of 100A corresponds to about 1.5mA / LSB).

[0169] (3) Temperature (R7 - R8) data

[0170] It monitors the operating temperature of the solar cell and is used to correct the influence of temperature on the photovoltaic characteristics.

[0171] In the extreme space temperature difference environment (-150°C to +120°C), it ensures the temperature adaptability of the I-V curve test.

[0172] Implementation method:

[0173] A voltage dividing circuit is formed by an NTC thermistor R8 (attached to the surface of the SAS) and a voltage dividing resistor R7. The change in temperature causes a change in the voltage division ratio, which is linearly processed by a differential amplifier.

[0174] The calibrated temperature signal is used to compensate the theoretical values of Voc and Isc, improving the test accuracy.

[0175] In addition, in one embodiment, a method for testing the photovoltaic output characteristics of satellite solar cells is provided:

[0176] The test method is implemented using the above circuit system for testing the photovoltaic output characteristics of satellite solar cells;

[0177] The test method includes the following steps:

[0178] Step S1: According to the given I-V scanning strategy, generate the corresponding reference voltage Ref; the corresponding reference voltage Ref is input into the circuit system for testing the photovoltaic output characteristics of satellite solar cells to change the load of the new solar cell SAS, realizing closed-loop control and traversing the I-V curve;

[0179] Step S2: Obtain the temperature data, voltage data, and current data of the new solar cell SAS corresponding to each reference voltage Ref, and generate a complete I-V curve.

[0180] In this embodiment, the given I-V scanning strategy is, for example, a step-by-step scan from 0 to Voc (the open-circuit voltage of the new solar cell SAS).

[0181] In addition, in one embodiment, in the test method, the following steps are further included:

[0182] Temperature compensation and characteristic correction:

[0183] According to the temperature data, dynamically correct the theoretical value of the open-circuit voltage of the new solar cell SAS;

[0184] During the I-V scan, combine the open-circuit voltage and short-circuit current of the new solar cell SAS after temperature compensation to calculate the theoretical maximum power point and verify the deviation between the actual output and the theory.

[0185] In addition, in one embodiment, a device for testing the photovoltaic output characteristics of satellite solar cells is provided. The test device is implemented using the above circuit system for testing the photovoltaic output characteristics of satellite solar cells;

[0186] The test device includes the following modules:

[0187] Module S1: Generate a corresponding reference voltage Ref according to a given I-V scanning strategy; the corresponding reference voltage Ref is used to be input into a circuit system for testing the photovoltaic output characteristics of satellite solar cells, change the load of the new solar cell SAS, and achieve closed-loop control and I-V curve traversal.

[0188] Module S2: Obtain the temperature data, voltage data, and current data of the new solar cell SAS corresponding to each reference voltage Ref, and generate a complete I-V curve.

[0189] In addition, in one embodiment, a computer device is provided, including: a processor and a memory, the memory is used to store executable instructions of the processor, and the processor is configured to execute the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells by executing the executable instructions.

[0190] In addition, in one embodiment, a computer storage medium is provided, in which a computer program is stored, and when the computer program runs, it executes the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells.

[0191] In addition, in one embodiment, a computer program product is provided, including a computer program / instructions, and when the computer program / instructions are executed by a processor, the steps of the above-mentioned method for testing the photovoltaic output characteristics of satellite solar cells are implemented.

[0192] For the computer device or system provided in this embodiment, the hardware device in this part is a general model and is not shown in the form of a diagram. The system includes a processor and a memory, where the processor and the memory can be connected through a bus or other means. The memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, as well as corresponding program instructions / modules. The processor runs the non-transitory software programs, instructions, and modules stored in the memory, thereby executing various functional applications and data processing of the processor to implement the data space entity parsing data quality enhancement method in the above method embodiment.

[0193] The memory can include a program storage area and a data storage area. Among them, the program storage area can store an operating system and application programs required for at least one function; the data storage area can store data created by the processor, etc. In addition, the memory can include high-speed random access memory, and can also include non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory may optionally include a memory remotely set relative to the processor, and these remote memories can be connected to the processor through a network. Examples of the above network include but are not limited to the Internet, enterprise intranets, enterprise internal networks, mobile communication networks, and combinations thereof.

[0194] One or more modules are stored in a memory. When executed by a processor, the method steps in the embodiments are performed. Thus, through the method, device, and process of the present invention, the invention objectives of the present invention can be achieved. The specific details of the above computer device can be understood by referring to the corresponding relevant descriptions and effects in the embodiments, and will not be elaborated here.

[0195] Those skilled in the art can understand that to implement all or part of the processes in the above method embodiments, it can be completed by instructing relevant hardware through a computer program. The program can be stored in a computer-readable storage medium. When executed, the program can include the processes of the above method embodiments. Among them, the storage medium can be a magnetic disk, an optical disc, a read-only memory (ROM), a random access memory (RAM), a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD), etc.; the storage medium can also include a combination of the above types of memories.

[0196] The technical solutions provided by the present invention are further described in detail through several specific embodiments to highlight the advantages and beneficial effects of the technical solutions provided by the present invention. However, the above several specific embodiments are not used as limitations to the present invention. Any reasonable modifications and improvements to the present invention, reasonable combinations of implementation manners, and equivalent replacements within the spirit and principle of the present invention should be included within the protection scope of the present invention.

Claims

1. A circuit system for testing the photovoltaic output characteristics of satellite solar cells, characterized in that: The circuit system includes a power resistor RF, a power dissipation circuit, a signal conversion circuit, an analog quantity acquisition circuit, a loop control circuit and a drive circuit; The power dissipation circuit includes a power MOS tube, which is used to realize load adjustment and power dissipation of the new solar cell SAS; the drain of the power MOS tube is connected to the positive voltage electrode of the new solar cell SAS, and the source is connected to the negative voltage electrode of the new solar cell SAS through the power resistor RF and grounded; The signal conversion circuit includes a temperature conversion unit, a voltage conversion unit and a current conversion unit; The temperature conversion unit is used to remotely collect the temperature of the new solar cell SAS, convert it into an analog parameter that is linearly proportional to the temperature of the new solar cell SAS, and send it to the temperature collection channel of the analog collection circuit; The voltage conversion unit is used to remotely collect the voltage at both ends of the new solar cell SAS, convert it into an analog parameter that is linearly proportional to the voltage at both ends of the new solar cell SAS, and send it to the voltage collection channel of the analog collection circuit; The current conversion unit is used to collect the output current of the new solar cell SAS and convert it into an analog parameter that is linearly proportional to the output current of the new solar cell SAS; the current conversion unit includes a differential amplifier; the input terminal of the differential amplifier of the current conversion unit is connected across the power resistor RF, and the output terminal is connected to the current collection channel of the analog collection circuit; The analog quantity acquisition circuit is used to convert the analog quantity parameters acquired by the signal conversion circuit into digital quantities, including temperature data, voltage data and current data of the new solar cell SAS; The loop control circuit is used to provide a dynamically adjusted reference voltage Ref, calculate the difference between the reference voltage Ref and an analog parameter output by the current conversion unit that is in linear proportion to the output current of the novel solar cell SAS, and perform proportional integral operation on the calculated difference to obtain a control signal; The driving circuit includes a totem pole circuit for push-pull amplification of the control signal output by the loop control circuit to obtain a bidirectional driving current as a driving signal to drive the power MOS tube of the power dissipation circuit to work in a variable load range.

2. The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to claim 1, characterized in that: The temperature conversion unit includes a voltage-dividing resistor R7, an NTC thermistor R8 and a differential amplifier; The NTC thermistor R8 is attached to the surface of the new solar cell SAS, and its resistance value decreases as the surface temperature of the new solar cell SAS increases; The NTC thermistor R8 and the voltage-dividing resistor R7 are connected in series to form a voltage-dividing circuit. The voltage-dividing circuit generates a voltage-dividing signal which is converted into a linear voltage inversely proportional to the surface temperature of the new solar cell SAS through a differential amplifier; the output end of the differential amplifier is connected to the temperature acquisition channel of the analog quantity acquisition circuit.

3. The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to claim 1, characterized in that: The loop control circuit includes a controllable reference Ref module and a second-order compensation PI controller; the second-order compensation PI controller includes an operational amplifier U1, a non-inverting input resistor R4, an inverting input resistor R5, a series compensation network and a high-frequency filter capacitor C2; The controllable reference Ref module is a D / A converter, which is used to provide a reference voltage Ref input to the non-inverting input terminal of the operational amplifier U1; the reference voltage Ref corresponds to the expected current value of the new solar cell SAS; The non-inverting input resistor R4 is connected in series between the D / A conversion output terminal and the non-inverting input terminal of the operational amplifier U1; The inverting input resistor R5 is connected in series between the output end of the current conversion unit and the inverting input end of the operational amplifier U1; The non-inverting input resistor R4 and the inverting input resistor R5 are used to optimize the DC operating point of the operational amplifier U1, reduce the bias current of the operational amplifier U1 and provide protection and current limiting for the input of the operational amplifier U1; The series compensation network is composed of a resistor R6 and a capacitor C1 connected in series; the series compensation network is connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U1 to form a lead-lag compensation network; wherein the resistor R6 is used to provide zero point compensation to improve the phase margin, and the capacitor C1 is used to introduce pole compensation to suppress high-frequency oscillation; The high-frequency filter capacitor C2 is connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U1 to filter out high-frequency noise and enhance the anti-interference ability of the loop; The operational amplifier U1 is used to realize error amplification and dynamic regulation, calculate the difference between the reference voltage Ref and the analog parameter output by the current conversion unit which is in linear proportion to the output current of the new solar cell SAS, and perform proportional integral operation on the calculated difference to obtain a control signal.

4. The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to claim 1, characterized in that: The driving circuit includes an NPN transistor Q1, a PNP transistor Q2, a pull-up resistor R1, a gate series resistor R2, and a power supply V YK ; The NPN transistor Q1 and the PNP transistor Q2 form a complementary push-pull structure for realizing a bidirectional driving current; The NPN transistor Q1 is used as an upper arm driving tube, and is used to be turned on when the control signal output by the loop control circuit is at a high level, and provide a positive driving current to the power dissipation circuit; The PNP transistor Q2 is used as a lower arm driving tube, and is used to turn on when the control signal output by the loop control circuit is at a low level, and quickly release the gate charge to achieve shutdown; The pull-up resistor R1 is connected to the collector of the NPN transistor Q1 and the power supply V YK It is used to limit the maximum driving current when the NPN transistor Q1 is turned on to prevent overshoot from damaging the power MOS tube; The gate series resistor R2 is located between the output end of the driving circuit and the power dissipation circuit, and is used to suppress the high-frequency oscillation of the gate loop of the power MOS tube and adjust the switching speed.

5. The circuit system for testing the photovoltaic output characteristics of satellite solar cells according to claim 1, characterized in that: The power dissipation circuit includes a power MOS tube Q3 and a gate pull-down resistor R3; The gate pull-down resistor R3 is connected in parallel between the gate and source of the power MOS tube Q3 to ensure that the power MOS tube Q3 is reliably turned off when the driving signal disappears to prevent false triggering; The power MOS tube Q3 is used to change the load characteristics of the novel solar cell SAS by adjusting its on-resistance to achieve IV curve traversal.

6. A method for testing the photovoltaic output characteristics of satellite solar cells, characterized in that: The test method is implemented by using the circuit system for testing the photovoltaic output characteristics of satellite solar cells as described in any one of claims 1 to 5; The test method comprises the following steps: Step S1: Generate a corresponding reference voltage Ref according to a given IV scanning strategy; the corresponding reference voltage Ref is used to input a circuit system for testing the photovoltaic output characteristics of a satellite solar cell, change the load of the new solar cell SAS, and realize closed-loop control and IV curve traversal; Step S2: Acquire the temperature data, voltage data and current data of the new solar cell SAS corresponding to each reference voltage Ref, and generate a complete IV curve.

7. Satellite solar cell photovoltaic output characteristics test device, characterized in that: The test device is implemented by the circuit system for testing the photovoltaic output characteristics of satellite solar cells as described in any one of claims 1 to 5; The test device comprises the following modules: Module S1: Generate a corresponding reference voltage Ref according to a given IV scanning strategy; the corresponding reference voltage Ref is used to input a circuit system for testing the photovoltaic output characteristics of a satellite solar cell, change the load of the new solar cell SAS, and realize closed-loop control and IV curve traversal; Module S2: obtains temperature data, voltage data and current data of the new solar cell SAS corresponding to each reference voltage Ref, and generates a complete IV curve.

8. A computer device comprising: A processor and a memory, characterized in that the memory is used to store executable instructions of the processor, and the processor is configured to execute the satellite solar cell photovoltaic output characteristics testing method of claim 6 by executing the executable instructions.

9. A computer storage medium, characterized in that The storage medium stores a computer program, and when the computer program is run, the method for testing the photovoltaic output characteristics of a satellite solar cell as claimed in claim 6 is executed.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method for testing the photovoltaic output characteristics of satellite solar cells described in claim 6 are implemented.

Images