GaN rectification chip with graphene mixed anode and preparation method thereof
By introducing a graphene hybrid anode structure into the GaN rectifier chip, using the work function difference between graphene and GaN barrier layer to form Schottky contact, the problem of high conduction voltage drop of traditional AlGaN/GaN rectifier chips is solved, and lower system power consumption and higher operating efficiency are achieved.
Patent Information
- Application Number
- CN202510383622.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-28
- Publication Date
- 2025-07-01
AI Technical Summary
Traditional rectifier chips based on AlGaN/GaN structures have the problem of high conduction voltage drop, which leads to increased system power consumption and reduced overall operating efficiency, limiting their application in the field of high-efficiency power conversion.
Using a graphene hybrid anode structure, a first metal layer with ohmic contact is formed on the AlGaN barrier layer, and a Schottky contact is formed with the graphene electrode layer and the exposed GaN barrier layer is used to form a Schottky barrier, and the work function difference between graphene and GaN barrier layer is used to reduce the Schottky barrier, thereby reducing the conduction voltage drop.
It effectively reduces the on-voltage drop of the rectifier chip, reduces system power consumption, improves overall operating efficiency, and improves the performance and stability of the device.
Smart Images
Figure CN120239288A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of diode devices, and more particularly, to a GaN rectifier chip with a graphene hybrid anode and a method for preparing the same. Background Art
[0002] As a typical representative of the third-generation wide-bandgap semiconductors, gallium nitride (GaN) has attracted much attention due to its excellent properties. GaN has a high critical breakdown electric field (about 3.5×106 V / cm), a high electron mobility (about 2000 cm² / V·s), and a high two-dimensional electron gas (2DEG) concentration (about 1013 cm⁻²), and also has excellent high-temperature working ability. Its bandgap width is as high as 3.4 eV, which is three times that of silicon (Si) and 2.5 times that of gallium arsenide (GaAs). Since the intrinsic carrier concentration increases exponentially with the bandgap width and temperature, GaN devices exhibit extremely low leakage current within a specific temperature range. In addition, the GaN material has stable chemical properties, high temperature resistance, and corrosion resistance, giving it inherent advantages in the fields of high frequency, high power, and radiation resistance. High electron mobility transistors (HEMTs, also known as HFETs or MODFETs) based on AlGaN / GaN heterojunctions have been widely used in the semiconductor field, and their high reverse blocking voltage, low forward conduction resistance, and high operating frequency meet the requirements of the system for high power, high frequency, and small size.
[0003] In the field of rectifier chips, significant progress has also been made in the development of GaN heterojunction materials. The on-state voltage drop is one of the key parameters for measuring the power conversion efficiency. However, traditional rectifier chips based on the AlGaN / GaN structure generally have the drawback of a relatively high on-state voltage drop due to the influence of the interface barrier and the characteristics of the heterojunction itself. This shortcoming directly leads to an increase in system power consumption and a decrease in the overall operating efficiency, severely restricting its application in the field of high-efficiency power conversion.
[0004] In view of the above problems, there is currently no effective technical solution. Summary of the Invention
[0005] The purpose of the present application is to provide a GaN rectifier chip with a graphene hybrid anode and a method for preparing the same, so as to reduce the on-state voltage drop of the device.
[0006] In a first aspect, the present application provides a GaN rectifier chip with a graphene hybrid anode, including a substrate, an AlN buffer layer, a GaN barrier layer, and an AlGaN barrier layer stacked in sequence from bottom to top. The top surface of the AlGaN barrier layer is provided with a cathode structure and a hybrid anode structure located on both sides respectively, and a passivation layer located between the cathode structure and the hybrid anode structure. The AlGaN barrier layer and the GaN barrier layer form a heterojunction. The hybrid anode structure includes a first metal layer and a graphene electrode layer. The first metal layer is disposed on the AlGaN barrier layer to form an ohmic contact. A first groove is provided on one side of the first metal layer. The first groove is recessed in the first metal layer, the AlGaN barrier layer, and the GaN barrier layer to expose the GaN barrier layer. The two ends of the graphene electrode layer are respectively connected to the top of the first metal layer and the exposed portion of the GaN barrier layer to form a Schottky contact; The cathode structure includes a second metal layer that makes an ohmic contact with the AlGaN barrier layer.
[0007] For the GaN rectifier chip with a graphene hybrid anode of the present application, the ohmic contact between the first metal layer and the AlGaN barrier layer ensures that current can be smoothly injected from the metal layer into the semiconductor layer. The graphene electrode layer forms a Schottky contact with the exposed GaN barrier layer. The existence of the Schottky barrier endows the device with rectifying characteristics. The graphene electrode layer utilizes the work function difference between graphene and the GaN barrier layer to form a lower Schottky barrier, thereby reducing the on-state voltage drop of the device, enabling the GaN rectifier chip with a graphene hybrid anode of the present application to reduce the system power consumption and improve the overall operating efficiency.
[0008] For the GaN rectifier chip with a graphene hybrid anode, wherein the thickness of the AlN buffer layer is 2 - 4 μm, the thickness of the GaN barrier layer is 800 - 900 nm, and the thickness of the AlGaN barrier layer is 20 - 25 nm.
[0009] In this example, the thickness of the AlN buffer layer is designed to be 2 - 4 μm, which can ensure the crystal quality and release stress, avoiding crystal defects or increasing additional fabrication costs. The thickness of the GaN barrier layer is designed to be 800 - 900 nm, which can balance the on-state resistance and breakdown voltage, thereby optimizing the device performance. The thickness of the AlGaN barrier layer is designed to be 20 - 25 nm, which can optimize the two-dimensional electron gas concentration and Schottky contact characteristics to ensure the normal operation of the device.
[0010] For the GaN rectifier chip with a graphene hybrid anode, wherein the first metal layer is composed of one or more of Cr, Ti, Al, Au, Ag, Pt, and Ni laminated together.
[0011] For the GaN rectifier chip with a graphene hybrid anode, wherein the first groove penetrates through the GaN barrier layer to expose the AlN buffer layer.
[0012] For the GaN rectifier chip with a graphene hybrid anode, wherein the first groove separates the first metal layer and the passivation layer.
[0013] The GaN rectifier chip with a graphene hybrid anode, wherein the length of the first metal layer is 8 - 10 μm and its thickness is 30 - 35 nm, and the length of the second metal layer is 8 - 10 μm and its thickness is 30 - 35 nm.
[0014] The GaN rectifier chip with a graphene hybrid anode, wherein the graphene electrode layer is a single-layer graphene with a thickness of 0.34 nm.
[0015] The GaN rectifier chip with a graphene hybrid anode, wherein the minimum distance between the graphene electrode layer and the second metal layer in the horizontal direction is 10 - 15 μm.
[0016] The GaN rectifier chip with a graphene hybrid anode, wherein the material of the passivation layer is SiN.
[0017] In a second aspect, the present application also provides a method for manufacturing a GaN rectifier chip with a graphene hybrid anode, the method comprising the following steps: S1. Prepare a substrate, and sequentially grow an AlN buffer layer, a GaN barrier layer, and an AlGaN barrier layer upward on the substrate, and form a heterojunction between the AlGaN barrier layer and the GaN barrier layer; S2. Deposit a first metal layer and a cathode structure on both sides of the AlGaN barrier layer, the cathode structure includes a second metal layer, and both the first metal layer and the second metal layer are in ohmic contact with the AlGaN barrier layer; S3. Deposit a passivation layer on the AlGaN barrier layer and located between the first metal layer and the second metal layer; S4. Punch holes on one side of the first metal layer to form a first groove, and the first groove is recessed in the first metal layer, the AlGaN barrier layer, and the GaN barrier layer to expose the GaN barrier layer; S5. Transfer the pre-prepared graphene electrode layer onto the first groove, and connect both ends of the graphene electrode layer to the top of the first metal layer and the exposed part of the GaN barrier layer respectively to form a Schottky contact, so as to form a hybrid anode structure with the first metal layer.
[0018] The preparation method of the GaN rectifier chip with a graphene hybrid anode of the present application can prepare the GaN rectifier chip with a graphene hybrid anode provided in the first aspect. In the hybrid anode structure of the GaN rectifier chip with a graphene hybrid anode, the ohmic contact between the first metal layer and the AlGaN barrier layer ensures that current can be smoothly injected from the metal layer into the semiconductor layer. The graphene electrode layer forms a Schottky contact with the exposed GaN barrier layer. The existence of the Schottky barrier endows the device with rectifying characteristics. The graphene electrode layer utilizes the work function difference between graphene and the GaN barrier layer to form a lower Schottky barrier, thereby reducing the on-state voltage drop of the device, enabling the GaN rectifier chip with a graphene hybrid anode to reduce system power consumption and improve the overall operating efficiency.
[0019] As can be seen from the above, the present application provides a GaN rectifier chip with a graphene hybrid anode and its preparation method. Among them, when the GaN rectifier chip with a graphene hybrid anode is working, current mainly transmits between the hybrid anode structure and the cathode structure. In the hybrid anode structure, the ohmic contact between the first metal layer and the AlGaN barrier layer ensures that current can be smoothly injected from the metal layer into the semiconductor layer. The graphene electrode layer forms a Schottky contact with the exposed GaN barrier layer. The existence of the Schottky barrier endows the device with rectifying characteristics. The graphene electrode layer utilizes the work function difference between graphene and the GaN barrier layer to form a lower Schottky barrier, thereby reducing the on-state voltage drop of the device, enabling the GaN rectifier chip with a graphene hybrid anode of the present application to reduce system power consumption and improve the overall operating efficiency. Brief Description of the Drawings
[0020] Figure 1 It is a schematic structural diagram of the GaN rectifier chip with a graphene hybrid anode provided by an embodiment of the present application.
[0021] Figure 2 It is a flowchart of the preparation method of the GaN rectifier chip with a graphene hybrid anode provided by an embodiment of the present application.
[0022] Figure 3 It is a flow effect diagram of the preparation method of the GaN rectifier chip with a graphene hybrid anode provided by an embodiment of the present application.
[0023] Reference Numerals: 1, substrate; 2, AlN buffer layer; 3, GaN barrier layer; 4, AlGaN barrier layer; 5, first metal layer; 6, second metal layer; 7, passivation layer; 8, graphene electrode layer. Detailed Description of the Embodiments
[0024] Embodiments of the present invention will be described in detail below. Examples of the embodiments are shown in the accompanying drawings, where like or similar reference numerals denote like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for explaining the present invention and should not be construed as limiting the present invention.
[0025] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality of" means two or more unless otherwise specifically defined.
[0026] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "mounted", "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection or an integral connection; it may be a mechanical connection, an electrical connection or a connection capable of mutual communication; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0027] In the present invention, unless otherwise clearly defined and limited, the first feature being "on" or "under" the second feature may include the direct contact between the first and second features, or may include the situation where the first and second features are not in direct contact but in contact through other features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes that the first feature is directly above and obliquely above the second feature, or merely means that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "beneath" and "underneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or merely means that the horizontal height of the first feature is lower than that of the second feature.
[0028] The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the present invention. In addition, the present invention may repeat reference numerals and / or reference letters in different examples. Such repetition is for the purpose of simplification and clarity and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.
[0029] In a first aspect, please refer to Figure 1 , some embodiments of the present application provide a GaN rectifier chip with a graphene hybrid anode, including a substrate 1, an AlN buffer layer 2, a GaN barrier layer 3, and an AlGaN barrier layer 4 stacked in sequence from bottom to top. On the top surface of the AlGaN barrier layer 4, there are a cathode structure and a hybrid anode structure located on both sides respectively, and a passivation layer 7 located between the cathode structure and the hybrid anode structure. The AlGaN barrier layer 4 and the GaN barrier layer 3 form a heterojunction. The hybrid anode structure includes a first metal layer 5 and a graphene electrode layer 8. The first metal layer 5 is disposed on the AlGaN barrier layer 4 and forms an ohmic contact. A first groove is provided on one side of the first metal layer 5. The first groove is recessed in the first metal layer 5, the AlGaN barrier layer 4, and the GaN barrier layer 3 so that the GaN barrier layer 3 is exposed. Two ends of the graphene electrode layer 8 are respectively connected to the top of the first metal layer 5 and the exposed part of the GaN barrier layer 3 to form a Schottky contact. The cathode structure includes a second metal layer 6 that makes an ohmic contact with the AlGaN barrier layer 4.
[0030] Specifically, in the above embodiment, the top of the first metal layer 5 is electrically connected to the graphene electrode layer 8, which can make the two maintain the same potential.
[0031] More specifically, the stacked structure composed of the substrate 1, the AlN buffer layer 2, the GaN barrier layer 3, and the AlGaN barrier layer 4 is the structural basis of the GaN rectifier chip. Among them, the AlGaN barrier layer 4 and the GaN barrier layer 3 form a heterojunction, and this heterojunction generates a two-dimensional electron gas, which can improve the device performance.
[0032] More specifically, the hybrid anode structure includes a first metal layer 5 and a graphene electrode layer 8. The first metal layer 5 forms an ohmic contact with the AlGaN barrier layer 4 to ensure effective current injection. The graphene electrode layer 8 spans the first groove, connects the first metal layer 5 and the exposed GaN barrier layer 3, and forms a Schottky contact on the exposed portion of the GaN barrier layer 3. By forming a Schottky contact on the heterojunction through the graphene electrode layer 8, the barrier height can be regulated to achieve the purpose of reducing the on-state voltage drop. Secondly, the first metal layer 5 and the graphene electrode layer 8 are electrically connected and maintain the same potential to achieve uniform current distribution.
[0033] More specifically, the cathode structure includes a second metal layer 6. The second metal layer 6 forms an ohmic contact with the AlGaN barrier layer 4 and can be used as an electrode for current extraction.
[0034] More specifically, the passivation layer 7 is located between the cathode structure and the hybrid anode structure, which can reduce the influence of device surface states and improve the stability of the device.
[0035] When the GaN rectifier chip with a graphene hybrid anode according to the embodiment of the present application is in operation, the current mainly flows between the hybrid anode structure and the cathode structure. In the hybrid anode structure, the ohmic contact between the first metal layer 5 and the AlGaN barrier layer 4 ensures that the current can be smoothly injected from the metal layer into the semiconductor layer. The graphene electrode layer 8 forms a Schottky contact with the exposed GaN barrier layer 3. The existence of the Schottky barrier endows the device with rectifying characteristics. The graphene electrode layer 8 utilizes the work function difference between graphene and the GaN barrier layer 3 to form a lower Schottky barrier, thereby reducing the on-state voltage drop of the device, so that the GaN rectifier chip with a graphene hybrid anode according to the embodiment of the present application can reduce the system power consumption and improve the overall operation efficiency.
[0036] In some preferred embodiments, the material of the substrate 1 is one of silicon, sapphire, silicon carbide, and gallium nitride.
[0037] In some preferred embodiments, the thickness of the AlN buffer layer 2 is 2 - 4 μm, the thickness of the GaN barrier layer 3 is 800 - 900 nm, and the thickness of the AlGaN barrier layer 4 is 20 - 25 nm.
[0038] Specifically, the thickness of the AlN buffer layer 2 is designed to be 2 - 4 μm, which can ensure crystal quality and release stress, avoiding crystal defects or increasing additional manufacturing costs.
[0039] More specifically, the thickness of the GaN barrier layer 3 is designed to be 800 - 900 nm, which can balance the on-state resistance and the breakdown voltage, thereby optimizing the device performance.
[0040] More specifically, the thickness of the AlGaN barrier layer 4 is designed to be 20 - 25 nm, which can optimize the two-dimensional electron gas concentration and Schottky contact characteristics to ensure the normal operation of the device.
[0041] More specifically, through the coordinated cooperation of the thicknesses of the above-mentioned layers, the performance of the GaN rectifier chip can be improved.
[0042] In some preferred embodiments, the first metal layer 5 is formed by laminating one or more of Cr, Ti, Al, Au, Ag, Pt, and Ni.
[0043] Specifically, these metal materials are all metal materials commonly used to form ohmic contacts. Selecting these metals or their laminated structures can ensure a stable and reliable ohmic contact between the first metal layer 5 and the AlGaN barrier layer 4, reduce the contact resistance, and improve the device performance.
[0044] In some preferred embodiments, the second metal layer 6 is formed by laminating one or more of Cr, Ti, Al, Au, Ag, Pt, and Ni.
[0045] In some preferred embodiments, the metal compositions of the first metal layer 5 and the second metal layer 6 are the same.
[0046] In some preferred embodiments, both the first metal layer 5 and the second metal layer 6 are formed by direct deposition.
[0047] In some preferred embodiments, the first groove penetrates the GaN barrier layer 3 to expose the AlN buffer layer 2.
[0048] Specifically, the first groove can be formed based on a punching process. During the manufacturing process, when punching the side of the first metal layer 5 to form the first groove, the etching process is controlled to penetrate the GaN barrier layer 3 and reach the AlN buffer layer 2.
[0049] More specifically, in this embodiment, as Figure 1 shown, the bottom of the graphene electrode layer 8 contacts the AlN buffer layer 2, and the right end contacts the GaN barrier layer 3 on the side close to the second metal layer 6 in the first groove to form a Schottky contact, which can ensure the stable installation of the graphene hybrid anode and define the contact position with the GaN barrier layer 3 to maintain the expected electrical characteristics of the hybrid anode structure, thereby improving the performance stability and controllability of the rectifier chip.
[0050] More specifically, in addition, the graphene hybrid anode can also form a Schottky contact with the AlN buffer layer 2. The AlN buffer layer 2 usually has a lower defect density than the GaN barrier layer 3, which helps to improve the interface quality of the Schottky contact and reduce the reverse leakage current to further improve the overall performance of the rectifier chip.
[0051] In some preferred embodiments, the first groove separates the first metal layer 5 and the passivation layer 7.
[0052] Specifically, the first groove separating the first metal layer 5 and the passivation layer 7 can solve the problem of uncertain interface effects that may be introduced when the first metal layer 5 and the passivation layer 7 overlap or are adjacent in space; the physical distance between the edge of the first metal layer 5 and the passivation layer 7 separates them, significantly weakening the potential interface interaction, which can reduce parasitic capacitance, suppress unnecessary leakage current paths, reduce the impact of the deposition of the passivation layer 7 on the edge of the first metal layer 5, and thus reduce the risk of performance instability caused by interlayer interaction.
[0053] In some preferred embodiments, the length of the first metal layer 5 is 8 - 10 μm, its thickness is 30 - 35 nm, the length of the second metal layer 6 is 8 - 10 μm, and its thickness is 30 - 35 nm.
[0054] Specifically, as Figure 1 shown, this length direction refers to the horizontal arrangement direction of the first metal layer 5, the first groove, the passivation layer 7, and the second metal layer 6.
[0055] More specifically, the above - mentioned length limitations for the first metal layer 5 and the second metal layer 6 can optimize the current distribution in the metal layer, ensure current uniformity, and avoid local overheating and device failure caused by current concentration; the above - mentioned thickness limitations for the first metal layer 5 and the second metal layer 6 can ensure that the metal layer has good electrical conductivity, reduce the contact resistance, and at the same time avoid stress problems and material waste caused by an overly thick metal layer.
[0056] In some preferred embodiments, the graphene electrode layer 8 is a single - layer graphene with a thickness of 0.34 nm.
[0057] Specifically, as Figure 1 shown, the single - layer graphene is preferably a thin - film structure with a Z - shaped cross - section.
[0058] More specifically, single - layer graphene refers to a graphene material composed of a single atomic layer, which has excellent electrical properties. The thickness limitation of 0.34 nm is consistent with the theoretical thickness of single - layer graphene, thereby further clarifying that the graphene electrode layer 8 adopts a single - layer structure.
[0059] More specifically, the GaN rectifier chip with a graphene hybrid anode in the embodiment of the present application uses single - layer graphene as the graphene electrode layer 8, ensuring that the graphene electrode layer 8 has good electrical conductivity and uniformity, which helps to form a high - quality Schottky contact. The formation of a high - quality Schottky contact reduces the on - state voltage drop of the rectifier chip, improves the rectification efficiency and device performance.
[0060] In some preferred embodiments, the minimum distance between the graphene electrode layer 8 and the second metal layer 6 in the horizontal direction is 10 - 15 μm.
[0061] Specifically, the minimum distance in the horizontal direction refers to the shortest distance between the edge of the graphene electrode layer 8 and the edge of the second metal layer 6 on the chip plane.
[0062] More specifically, in order to avoid the adverse effects caused by the too-close distance between the graphene electrode layer 8 and the second metal layer 6, it is necessary to limit the minimum distance between them. Since the graphene electrode layer 8 and the second metal layer 6 belong to the hybrid anode structure and the cathode structure respectively, there is a voltage difference between them. If the distance is too close, the electric field lines will be highly concentrated in the area between them. Therefore, limiting the minimum distance between the graphene electrode layer 8 and the second metal layer 6 in the horizontal direction to 10 - 15 μm can balance the key parameters such as the breakdown voltage, reverse leakage current, on-resistance, and size of the device while ensuring the reliability and performance of the device, so as to obtain the optimal rectifier chip performance.
[0063] In some preferred embodiments, the material of the passivation layer 7 is SiN (silicon nitride).
[0064] Specifically, as a commonly used passivation material, silicon nitride has good insulation performance and chemical stability, mainly manifested as having a high dielectric constant and a low interface state density. It can effectively passivate the surface of the GaN material, reduce the carrier scattering and trap effect caused by surface states, and improve the electrical performance of the device. In the GaN rectifier chip, the passivation layer 7 is disposed between the cathode structure and the hybrid anode structure, and its main function is to reduce the surface leakage current of the device, improve the reliability and stability of the device. Using SiN material can effectively suppress the leakage current on the device surface, reduce the noise of the device, and improve the breakdown voltage and stability of the device.
[0065] More specifically, in addition, SiN also has good ability to block the diffusion of water vapor and impurities, protecting the device from the influence of the environment and further improving the long-term reliability of the device.
[0066] Second, please refer to Figure 2 and Figure 3 , some embodiments of the present application also provide a method for manufacturing a GaN rectifier chip with a graphene hybrid anode, and the method includes the following steps: S1. Prepare the substrate 1, and sequentially grow an AlN buffer layer 2, a GaN barrier layer 3, and an AlGaN barrier layer 4 upward on the substrate 1, and form a heterojunction between the AlGaN barrier layer 4 and the GaN barrier layer 3; S2. Deposit a first metal layer 5 and a cathode structure on both sides of the AlGaN barrier layer 4 respectively. The cathode structure includes a second metal layer 6. Both the first metal layer 5 and the second metal layer 6 are in ohmic contact with the AlGaN barrier layer 4. S3. Deposit a passivation layer 7 on the AlGaN barrier layer 4 and form it between the first metal layer 5 and the second metal layer 6. S4. Punch holes on one side of the first metal layer 5 to form a first groove. The first groove is recessed in the first metal layer 5, the AlGaN barrier layer 4 and the GaN barrier layer 3 to expose the GaN barrier layer 3. S5. Transfer the pre-prepared graphene electrode layer 8 onto the first groove, and make both ends of the graphene electrode layer 8 be connected to the top of the first metal layer 5 and the exposed part of the GaN barrier layer 3 respectively to form a Schottky contact, so as to form a hybrid anode structure with the first metal layer 5.
[0067] Specifically, in step S5, the graphene electrode layer 8 can be pre-prepared on a specific mold (such as a copper foil) by chemical vapor deposition method, and then the graphene electrode layer 8 is transferred to the designated position of the first groove by wet transfer or dry transfer method, and it is ensured that the graphene electrode layer 8 forms good contact with the top of the first metal layer 5 and the exposed part of the GaN barrier layer 3.
[0068] The preparation method of the GaN rectifier chip with a graphene hybrid anode in the embodiment of the present application can prepare the GaN rectifier chip with a graphene hybrid anode provided in the first aspect. In the hybrid anode structure of the GaN rectifier chip with a graphene hybrid anode, the ohmic contact between the first metal layer 5 and the AlGaN barrier layer 4 ensures that current can smoothly inject from the metal layer into the semiconductor layer. The graphene electrode layer 8 forms a Schottky contact with the exposed GaN barrier layer 3. The existence of the Schottky barrier enables the device to have rectifying characteristics. The graphene electrode layer 8 utilizes the work function difference between graphene and the GaN barrier layer 3 to form a lower Schottky barrier, thereby reducing the on-state voltage drop of the device, so that the GaN rectifier chip with a graphene hybrid anode can reduce the system power consumption and improve the overall operation efficiency.
[0069] In some preferred embodiments, in step S1, the AlN buffer layer 2, the GaN barrier layer 3 and the AlGaN barrier layer 4 are deposited and grown based on an MOCVD device.
[0070] In some preferred embodiments, in step S2, the first metal layer 5 and the second metal layer 6 are deposited by electron beam evaporation and are made by annealing for 30 seconds under the conditions of N2 atmosphere and 850 °C.
[0071] In some preferred embodiments, in step S3, the passivation layer 7 is deposited and grown based on a PECVD device.
[0072] In some preferred embodiments, in step S4, the first groove is formed by lithography and drilling.
[0073] In some preferred embodiments, the method for preparing a GaN rectifier chip with a graphene hybrid anode according to the embodiments of the present application is used to fabricate the GaN rectifier chip with a graphene hybrid anode provided in the first aspect.
[0074] To more clearly describe the step process of the method for preparing a high breakdown voltage rectifier chip according to the embodiments of the present application, the following is described in conjunction with some specific embodiments.
[0075] Example 1 The method for preparing a GaN rectifier chip with a graphene hybrid anode provided in this example includes the following steps: (1) Take an epitaxial high-resistance silicon substrate with a thickness of 500 μm, and use MOCVD equipment to sequentially grow an AlN buffer layer 2, a GaN barrier layer 3, and an AlGaN barrier layer 4 on the epitaxial high-resistance substrate 1. The thickness of the AlN buffer layer 2 is 2 μm, the thickness of the GaN layer is 800 nm, and the thickness of the AlGaN barrier layer 4 is 20 nm; (2) Deposit a first metal layer 5 and a second metal layer 6 for ohmic contact on both sides of the top surface of the AlGaN barrier layer 4 by electron beam evaporation. The structures of both are multi-metal layers composed of 3 nm Ti, 8 nm Al, 8 nm Ni, and 15 nm Au stacked in sequence from bottom to top. Then, anneal for 30 seconds in an N2 atmosphere at 850 °C; (3) Deposit a 30 nm thick passivation layer 7 made of SiN on the surface of the AlGaN barrier layer 4 by PECVD equipment.
[0076] (4) Form a first groove penetrating to the top surface of the AlN buffer layer 2 by lithography and drilling on one side of the first metal layer 5 close to the passivation layer 7. Transfer the pre-prepared graphene electrode layer 8 with a Z-shaped cross-section and a thickness of 0.34 nm onto the first groove, and make both ends of the graphene electrode layer 8 respectively contact the top of the first metal layer 5 and the exposed part of the GaN barrier layer 3 to form a Schottky contact, so as to form a hybrid anode structure with the first metal layer 5.
[0077] Example 2 The method for preparing a GaN rectifier chip with a graphene hybrid anode provided in this example includes the following steps: (1) Take an epitaxial high-resistance silicon substrate with a thickness of 500 μm, and use MOCVD equipment to sequentially grow an AlN buffer layer 2, a GaN barrier layer 3, and an AlGaN barrier layer 4 on the epitaxial high-resistance substrate 1. The thickness of the AlN buffer layer 2 is 2 μm, the thickness of the GaN layer is 800 nm, and the thickness of the AlGaN barrier layer 4 is 20 nm; (2) On both sides of the top surface of the AlGaN barrier layer 4, the first metal layer 5 and the second metal layer 6 for ohmic contact are deposited by electron beam evaporation. The structures of both are multi-metal layers composed of 3 nm Ti, 6 nm Al, 6 nm Ni, and 15 nm Au stacked in sequence from bottom to top. Then, annealing is performed at 850 °C for 30 seconds in an N2 atmosphere; (3) A passivation layer 7 made of SiN with a thickness of 30 nm is deposited on the surface of the AlGaN barrier layer 4 by using a PECVD device.
[0078] (4) A first groove penetrating to the top surface of the AlN buffer layer 2 is formed by photolithography and punching on one side of the first metal layer 5 close to the passivation layer 7. The pre-prepared graphene electrode layer 8 with a Z-shaped cross-section and a thickness of 0.34 nm is transferred onto the first groove, and both ends of the graphene electrode layer 8 are respectively connected to the top of the first metal layer 5 and the exposed part of the GaN barrier layer 3 to form a Schottky contact, so as to form a hybrid anode structure with the first metal layer 5.
[0079] Example 3 The preparation method of the GaN rectifier chip with a graphene hybrid anode provided by this example includes the following steps: (1) Take an epitaxial high-resistance silicon substrate with a thickness of 500 μm, and use an MOCVD device to sequentially grow an AlN buffer layer 2, a GaN barrier layer 3, and an AlGaN barrier layer 4 on the epitaxial high-resistance substrate 1. The thickness of the AlN buffer layer 2 is 2 μm, the thickness of the GaN layer is 800 nm, and the thickness of the AlGaN barrier layer 4 is 20 nm; (2) On both sides of the top surface of the AlGaN barrier layer 4, the first metal layer 5 and the second metal layer 6 for ohmic contact are deposited by electron beam evaporation. The structures of both are multi-metal layers composed of 4 nm Ti, 6 nm Al, 6 nm Ni, and 16 nm Au stacked in sequence from bottom to top. Then, annealing is performed at 850 °C for 30 seconds in an N2 atmosphere; (3) A passivation layer 7 made of SiN with a thickness of 30 nm is deposited on the surface of the AlGaN barrier layer 4 by using a PECVD device.
[0080] (4) A first groove penetrating to the top surface of the AlN buffer layer 2 is formed by photolithography and punching on one side of the first metal layer 5 close to the passivation layer 7. The pre-prepared graphene electrode layer 8 with a Z-shaped cross-section and a thickness of 0.34 nm is transferred onto the first groove, and both ends of the graphene electrode layer 8 are respectively connected to the top of the first metal layer 5 and the exposed part of the GaN barrier layer 3 to form a Schottky contact, so as to form a hybrid anode structure with the first metal layer 5.
[0081] In the description of this specification, the descriptions referring to terms such as "one embodiment", "certain embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc., mean that the specific features, structures, materials, or characteristics described in connection with the said embodiments or examples are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.
[0082] The above are only some embodiments of the present invention. For those of ordinary skill in the art, without departing from the creative concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention.
Claims
1. A GaN rectifier chip with a graphene hybrid anode, characterized in that: It comprises a substrate, an AlN buffer layer, a GaN barrier layer and an AlGaN barrier layer which are stacked in sequence from bottom to top, wherein a cathode structure and a mixed anode structure are respectively arranged on both sides of the top surface of the AlGaN barrier layer, and a passivation layer is arranged between the cathode structure and the mixed anode structure, and the AlGaN barrier layer forms a heterojunction with the GaN barrier layer; The hybrid anode structure includes a first metal layer and a graphene electrode layer, wherein the first metal layer is disposed on the AlGaN barrier layer and forms an ohmic contact, a first groove is disposed on one side of the first metal layer, the first groove is sunken into the first metal layer, the AlGaN barrier layer and the GaN barrier layer so that the GaN barrier layer is exposed, and two ends of the graphene electrode layer are respectively connected to the top of the first metal layer and the exposed part of the GaN barrier layer to form a Schottky contact; The cathode structure includes a second metal layer in ohmic contact with the AlGaN barrier layer.
2. The GaN rectifier chip with graphene hybrid anode according to claim 1, characterized in that: The thickness of the AlN buffer layer is 2-4 μm, the thickness of the GaN barrier layer is 800-900 nm, and the thickness of the AlGaN barrier layer is 20-25 nm.
3. The GaN rectifier chip with graphene hybrid anode according to claim 1, characterized in that: The first metal layer is formed by stacking one or more of Cr, Ti, Al, Au, Ag, Pt, and Ni.
4. The GaN rectifier chip with graphene hybrid anode according to claim 1, characterized in that: The first groove passes through the GaN barrier layer to expose the AlN buffer layer.
5. The GaN rectifier chip with graphene hybrid anode according to claim 1, characterized in that: The first groove separates the first metal layer and the passivation layer.
6. The GaN rectifier chip with graphene hybrid anode according to claim 1, characterized in that: The length of the first metal layer is 8-10 μm, and the thickness thereof is 30-35 nm. The length of the second metal layer is 8-10 μm, and the thickness thereof is 30-35 nm.
7. The GaN rectifier chip with graphene hybrid anode according to claim 1, characterized in that: The graphene electrode layer is a single-layer graphene with a thickness of 0.34 nm.
8. The GaN rectifier chip with graphene hybrid anode according to claim 1, characterized in that: The minimum distance between the graphene electrode layer and the second metal layer in the horizontal direction is 10-15 μm.
9. The GaN rectifier chip with graphene hybrid anode according to claim 1, characterized in that: The material of the passivation layer is SiN.
10. A method for preparing a GaN rectifier chip with a graphene hybrid anode, characterized in that: The method comprises the following steps: S1, preparing a substrate, and sequentially growing an AlN buffer layer, a GaN barrier layer and an AlGaN barrier layer upward on the substrate, and forming a heterojunction between the AlGaN barrier layer and the GaN barrier layer; S2, depositing a first metal layer and a cathode structure on both sides of the AlGaN barrier layer, respectively, wherein the cathode structure includes a second metal layer, and both the first metal layer and the second metal layer are in ohmic contact with the AlGaN barrier layer; S3, depositing a passivation layer between the first metal layer and the second metal layer on the AlGaN barrier layer; S4, performing a punching process on one side of the first metal layer to form a first groove, wherein the first groove is recessed in the first metal layer, the AlGaN barrier layer and the GaN barrier layer so that the GaN barrier layer is exposed; S5. Transfer the pre-prepared graphene electrode layer to the first groove, so that two ends of the graphene electrode layer are respectively connected to the top of the first metal layer and the exposed portion of the GaN barrier layer to form a Schottky contact, so as to form a mixed anode structure with the first metal layer.