Laterally diffused metal oxide semiconductor device and preparation method thereof

Abstract

The invention relates to a laterally diffused metal oxide semiconductor device and a preparation method thereof. The laterally diffused metal oxide semiconductor device comprises a substrate structure, a first well region is arranged in the substrate structure, a second well region and a drain region which are arranged at an interval are arranged in the first well region, and a source region is arranged in the second well region; the first super junction structure is arranged in the first well region and is positioned between the second well region and the drain region; the at least one second super junction structure is arranged in the first well region and is positioned between the second well region and the drain region, and the second super junction structure is positioned on one side, close to the back surface of the substrate structure, of the first super junction structure; the at least one internal field plate is arranged in the first well region and located between the second well region and the drain region, and the internal field plate penetrates through the first super junction structure and the at least one second super junction structure; wherein the outer diameter of the internal field plate is gradually reduced in the direction from the front surface of the substrate structure to the back surface of the substrate structure. According to the invention, the contradictory relationship between the breakdown voltage and the on-resistance can be optimized.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and particularly to a laterally diffused metal oxide semiconductor device and a manufacturing method thereof. Background Art

[0002] With the continuous development of semiconductor technology, the application of laterally double-diffused MOS (LDMOS) devices has become increasingly widespread, and higher requirements are also put forward for the performance of laterally diffused metal oxide semiconductor devices. However, for laterally diffused metal oxide semiconductor devices, there is inevitably a technical contradiction between reducing the on-resistance and ensuring a higher breakdown voltage, making it difficult to further improve the device performance. Summary of the Invention

[0003] Based on this, it is necessary to provide a laterally diffused metal oxide semiconductor device and a manufacturing method thereof to solve the above problems.

[0004] In a first aspect, this application provides a laterally diffused metal oxide semiconductor device, including:

[0005] A substrate structure, in which a first well region is provided. In the first well region, a second well region and a drain region are arranged at intervals, and a source region is provided in the second well region;

[0006] A first superjunction structure, which is provided in the first well region and located between the second well region and the drain region;

[0007] At least one second superjunction structure, which is provided in the first well region and located between the second well region and the drain region, and the second superjunction structure is located on the side of the first superjunction structure close to the back surface of the substrate structure;

[0008] At least one body field plate, which is provided in the first well region and located between the second well region and the drain region, and the body field plate penetrates through the first superjunction structure and at least one of the second superjunction structures;

[0009] Wherein, along the direction from the front surface to the back surface of the substrate structure, the outer diameter of the body field plate gradually decreases.

[0010] In one embodiment, the body field plate includes a first part and a second part. The first part penetrates through the first superjunction structure, and the second part penetrates through at least one of the second superjunction structures;

[0011] The outer diameter of the second part is smaller than that of the first part.

[0012] In one embodiment, the laterally diffused metal oxide semiconductor device includes a plurality of the second superjunction structures, and the plurality of the second superjunction structures are arranged at intervals along the thickness direction of the substrate structure.

[0013] In one embodiment, the second portion penetrates through all of the second superjunction structures.

[0014] In one embodiment, the second portion includes a plurality of sub-portions, the plurality of sub-portions are arranged at intervals along the thickness direction of the substrate structure, and each sub-portion penetrates through one of the second superjunction structures;

[0015] Along the direction from the front surface to the back surface of the substrate structure, the outer diameters of the respective sub-portions gradually decrease.

[0016] In one embodiment, one side surface of the first superjunction structure close to the front surface of the substrate structure is adjacent to the front surface of the substrate structure.

[0017] In one embodiment, the first superjunction structure includes a first doped region and a second doped region, and the first doped region is located on a side of the second doped region close to the front surface of the substrate structure;

[0018] The second superjunction structure includes a third doped region and a fourth doped region, and the third doped region is located on a side of the fourth doped region close to the front surface of the substrate structure;

[0019] The doping types of the first doped region and the third doped region are the same, and the doping types of the second doped region and the fourth doped region are the same.

[0020] In one embodiment, the laterally diffused metal oxide semiconductor device includes a plurality of the body field plates, and the plurality of the body field plates are arranged at intervals in the first well region.

[0021] In one embodiment, the laterally diffused metal oxide semiconductor device further includes a first buried layer, the first buried layer is disposed in the substrate structure at the bottom of the first well region, and at least a part of the positive projection of the second well region on the substrate structure coincides with the positive projection of the first buried layer on the substrate structure;

[0022] And / or, the laterally diffused metal oxide semiconductor device further includes a second buried layer, the second buried layer is disposed in the substrate structure at the bottom of the first well region; at least a part of the positive projection of the drain region on the substrate structure coincides with the positive projection of the second buried layer on the substrate structure.

[0023] Second aspect, the present application further provides a method for manufacturing a laterally diffused metal oxide semiconductor device, including:

[0024] Provide a substrate structure;

[0025] Form a first well region within the substrate structure;

[0026] Form at least one in - body field plate within the first well region, and form a second well region within the first well region; along the direction from the front surface to the back surface of the substrate structure, the outer diameter of the in - body field plate gradually decreases;

[0027] Form a first super - junction structure and at least one second super - junction structure within the first well region; the second super - junction structure is located on the side of the first super - junction structure closer to the back surface of the substrate structure; the in - body field plate penetrates through the first super - junction structure and at least one of the second super - junction structures;

[0028] Form a drain region within the first well region, and form a source region within the second well region; wherein, the second well region and the drain region are arranged at intervals, and the first super - junction structure, the second super - junction structure and the in - body field plate are all located between the second well region and the drain region.

[0029] The lateral diffused metal - oxide semiconductor device and its manufacturing method provided by the present application, by arranging a first super - junction structure and at least one second super - junction structure from top to bottom within the first well region, enabling the in - body field plate to penetrate through the first super - junction structure and at least one second super - junction structure, and making the outer diameter of the in - body field plate gradually decrease from top to bottom. In this way, on the one hand, it is equivalent to setting a field plate structure with a wider width in the super - junction region with a higher doping concentration, making the depletion effect of the in - body field plate stronger in this region, thereby weakening the electric - field peak value and improving the device breakdown voltage; on the other hand, it is equivalent to adopting a field plate structure with a narrower width in the super - junction region with a lower doping concentration, increasing the current path while ensuring the breakdown voltage, thereby reducing the on - resistance and effectively optimizing the contradictory relationship between the breakdown voltage and the on - resistance. Description of the Drawings

[0030] In order to more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments or exemplary embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0031] Figure 1 It is a schematic diagram of a partial structure of a lateral diffused metal - oxide semiconductor device provided by an embodiment of the present application.

[0032] Figure 2 It is a schematic diagram of the arrangement of the in - body field plate of the lateral diffused metal - oxide semiconductor device provided by an embodiment of the present application from a top - down perspective.

[0033] Figure 3 This is a schematic flow chart of a method for manufacturing a laterally diffused metal oxide semiconductor device provided by an embodiment of the present application.

[0034] Description of reference numerals:

[0035] 1. Laterally diffused metal oxide semiconductor device; 11. Substrate structure; 11a. Substrate; 11b. Epitaxial layer; 1101. First well region; 1102. Source region; 1103. Drain region; 1104. First buried layer; 1105. Second buried layer; 1106. Second well region; 1107. Third well region; 1108. Body extraction region; 12. On-body field plate; 12a. First part; 12b. Second part; 12c. Third part; 121. First dielectric layer; 122. First conductive layer; 13. Gate; 14. Second dielectric layer; 15. First electrical connection structure; 16. First superjunction structure; 161. First doped region; 162. Second doped region; 17. Second superjunction structure; 171. Third doped region; 172. Fourth doped region. Detailed implementation manners

[0036] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. Embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present application is thorough and comprehensive.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in the description of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0038] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to", or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to", or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Thus, without departing from the teachings of this application, the first element, component, region, layer, doping type, or portion discussed below may be referred to as the second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types. For example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0039] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc., may be used herein to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "above" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. In addition, the device may also include additional orientations (such as, rotated 90 degrees or other orientations), and the spatial descriptors used herein are to be interpreted accordingly.

[0040] As used herein, the singular forms "a", "an", and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprises / comprising" or "has / having" or the like specify the presence of the stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the associated listed items.

[0041] The embodiments of the present application are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the present application, such that variations in the shown shapes due to, for example, manufacturing techniques and / or tolerances can be anticipated. Accordingly, the embodiments of the present application should not be limited to the specific shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing techniques. For example, an implantation region shown as rectangular typically has rounded or curved features and / or an implantation concentration gradient at its edges, rather than a binary change from the implantation region to the non-implantation region. Similarly, a buried region formed by implantation can result in some implantation in the region between the buried region and the surface through which the implantation occurs. Thus, the regions shown in the figures are substantially schematic, their shapes do not represent the actual shapes of the regions of the device, and do not limit the scope of the present application.

[0042] In a first aspect, with reference to Figure 1 as shown, an embodiment of the present application provides a laterally diffused metal oxide semiconductor device 1. Taking the N-type laterally diffused metal oxide semiconductor device 1 as an example, the first doping type is P-type and the second doping type is N-type. In other embodiments, the laterally diffused metal oxide semiconductor device 1 may also be a P-type laterally diffused metal oxide semiconductor device 1, with the first doping type being N-type and the second doping type being P-type.

[0043] Specifically, the laterally diffused metal oxide semiconductor device 1 includes a substrate structure 11, a first superjunction structure 16, at least one second superjunction structure 17, and at least one in-body field plate 12. A first well region 1101 is provided in the substrate structure 11. A second well region 1106 and a drain region 1103 are provided in the first well region 1101 and are arranged at intervals. A source region 1102 is provided in the second well region 1106. The first superjunction structure 16 is provided in the first well region 1101 and is located between the second well region 1106 and the drain region 1103. The second superjunction structure 17 is provided in the first well region 1101 and is located between the second well region 1106 and the drain region 1103. The second superjunction structure 17 is also located on a side of the first superjunction structure 16 closer to the back surface of the substrate structure 11. The in-body field plate 12 is provided in the first well region 1101 and is located between the second well region 1106 and the drain region 1103. The in-body field plate 12 penetrates through the first superjunction structure 16 and at least one second superjunction structure 17.

[0044] Wherein, along the direction from the front surface of the substrate structure 11 to the back surface of the substrate structure 11, the outer diameter of the in-body field plate 12 gradually decreases. Further, taking the Figure 1 orientation in... as an example, the outer diameter of the in-body field plate 12 gradually decreases from top to bottom.

[0045] Here, it should be noted that the outer diameter of the in-body field plate 12 can be the dimension of the in-body field plate 12 along the first direction X, and the first direction X is perpendicular to the thickness direction of the substrate structure 11. Further, the outer diameter of the in-body field plate 12 can also be understood as the width of the in-body field plate 12.

[0046] Here, as Figure 1 shown, the top surface of the substrate structure 11 is the front surface of the substrate structure 11, and the bottom surface of the substrate structure 11 is the back surface of the substrate structure 11.

[0047] In one embodiment, the substrate structure 11 may include a substrate 11a and an epitaxial layer 11b disposed on the substrate 11a, and both the substrate 11a and the epitaxial layer 11b are of the first doping type. Exemplarily, the material of the substrate 11a may be single-crystalline silicon, polycrystalline silicon, amorphous silicon, germanium-silicon compound, Silicon-On-Insulator (SOI), or Low Temperature Poly-Silicon (LTPS), etc., or other materials known to those skilled in the art.

[0048] In one embodiment, the in-body field plate 12 is a longitudinally floating field plate. Here, longitudinal refers to the thickness direction of the substrate structure 11.

[0049] In one embodiment, the first well region 1101, the source region 1102, and the drain region 1103 are of the second doping type, and the second well region 1106 is of the first doping type.

[0050] It should be noted that due to the influence of the manufacturing process, the doping concentration of the superjunction structure closer to the front surface of the substrate structure 11 is higher. On the one hand, the lateral diffused metal oxide semiconductor device 1 provided in the embodiment of the present application is equivalent to setting a field plate structure with a wider width in the superjunction region with a higher doping concentration, so that the depletion effect of the in-body field plate 12 in this region is stronger, thereby weakening the electric field peak and improving the device breakdown voltage; on the other hand, it is equivalent to using a field plate structure with a relatively narrow width in the superjunction region with a lower doping concentration, increasing the current path while ensuring the breakdown voltage, thereby reducing the on-resistance and effectively optimizing the contradictory relationship between the breakdown voltage and the on-resistance.

[0051] In one embodiment, the in - body field plate 12 includes a first part 12a and a second part 12b. The first part 12a penetrates through the first super - junction structure 16, and the second part 12b penetrates through at least one second super - junction structure 17; the outer diameter of the second part 12b is smaller than the outer diameter of the first part 12a. It should be noted that the outer diameter of the first part 12a can be the dimension of the first part 12a along the first direction X, and the outer diameter of the second part 12b can be the dimension of the second part 12b along the first direction X. Further, the outer diameter of the first part 12a can also be understood as the width of the first part 12a, and the outer diameter of the second part 12b can also be understood as the width of the second part 12b. The above - mentioned setting is equivalent to making the longitudinal cross - sectional shape of the in - body field plate 12 change step - by - step. In this way, it is beneficial to reduce the manufacturing difficulty of the in - body field plate 12.

[0052] Here, it should be noted that when there is one second super - junction structure 17 in the first well region 1101, the second part 12b penetrates through this one second super - junction structure 17. When there are multiple second super - junction structures 17 in the first well region 1101, the second part 12b penetrates through at least one second super - junction structure 17.

[0053] It can be understood that the longitudinal cross - sectional shape of the in - body field plate 12 can be trapezoidal, and the embodiments of the present application do not limit the cross - sectional shape of the in - body field plate 12.

[0054] In one embodiment, there are multiple in - body field plates 12 in the first well region 1101, and these multiple in - body field plates 12 are arranged at intervals. Referring to Figure 1 As shown, the distance between the first parts 12a of two adjacent in - body field plates 12 along the first direction X is the first distance, and the distance between the second parts 12b of two adjacent in - body field plates 12 along the first direction X is the second distance. The first distance is smaller than the second distance.

[0055] In this way, on the one hand, it is equivalent to setting a field - plate structure with a wider width and a denser arrangement in the super - junction region with a higher doping concentration, making the depletion effect of the in - body field plate 12 stronger in this region, thereby weakening the electric - field peak and improving the device breakdown voltage; on the other hand, it is equivalent to using a field - plate structure with a narrower width and a wider spacing in the super - junction region with a lower doping concentration, increasing the current path while ensuring the breakdown voltage, thereby reducing the on - resistance and effectively optimizing the contradictory relationship between the breakdown voltage and the on - resistance.

[0056] In one embodiment, the lateral - diffusion metal - oxide - semiconductor device 1 includes multiple second super - junction structures 17, and these multiple second super - junction structures 17 are arranged at intervals along the thickness direction of the substrate structure 11. In this way, it is beneficial to further modulate the drift - region electric field and provide a low - resistance current path, thereby further optimizing the contradictory relationship between the breakdown voltage and the on - resistance.

[0057] In one embodiment, the second part 12b penetrates through the entire second superjunction structure 17, that is, the second part 12b penetrates through all the second superjunction structures 17. In this way, it is beneficial to enhance the auxiliary depletion effect of the in-body field plate 12, thereby improving the performance of the device.

[0058] In one embodiment, the second part 12b includes a plurality of sub-parts, the plurality of sub-parts are arranged at intervals in the thickness direction of the substrate structure 11, and each sub-part penetrates through one second superjunction structure 17; along the direction from the front surface of the substrate structure 11 to the back surface of the substrate structure 11, the outer diameters of the respective sub-parts gradually decrease.

[0059] In this way, it is equivalent to embedding each sub-part of the second part 12b in one second superjunction structure 17 correspondingly, and the outer diameters of each sub-part are different, that is, the longitudinal cross-sectional shape of the second part 12b changes step by step. In this way, on the one hand, it is equivalent to arranging a field plate structure with a wider width and a relatively dense arrangement in the superjunction region with a higher doping concentration, making the depletion effect of the in-body field plate 12 stronger in this region, thereby weakening the electric field peak value and improving the device breakdown voltage; on the other hand, it is equivalent to adopting a field plate structure with a relatively narrow width and a relatively wide spacing in the superjunction region with a lower doping concentration, increasing the current path while ensuring the breakdown voltage, thereby reducing the on-resistance and effectively optimizing the contradictory relationship between the breakdown voltage and the on-resistance.

[0060] In one embodiment, the surface of the first superjunction structure 16 on the side close to the front surface of the substrate structure 11 is adjacent to the front surface of the substrate structure 11, that is, the first superjunction structure 16 is located on the surface of the first well region 1101. In this way, the implantation depth of the first superjunction structure 16 can be made shallower, which is beneficial to reducing the manufacturing difficulty of the first superjunction structure 16.

[0061] In one embodiment, the first superjunction structure 16 includes a first doping region 161 and a second doping region 162, and the first doping region 161 is located on the side of the second doping region 162 close to the front surface of the substrate structure 11; the second superjunction structure 17 includes a third doping region 171 and a fourth doping region 172, and the third doping region 171 is located on the side of the fourth doping region 172 close to the front surface of the substrate structure 11; the doping types of the first doping region 161 and the third doping region 171 are the same, and the doping types of the second doping region 162 and the fourth doping region 172 are the same.

[0062] In one embodiment, the first doping region 161 and the third doping region 171 are of the second doping type, and the second doping region 162 and the fourth doping region 172 are of the first doping type. That is, both the first superjunction structure 16 and the second superjunction structure 17 are "N-type on top and P-type on the bottom" superjunction structures.

[0063] In one embodiment, the first doping region 161 and the third doping region 171 are of a first doping type, and the second doping region 162 and the fourth doping region 172 are of a second doping type. That is, both the first superjunction structure 16 and the second superjunction structure 17 are "P-on-N" superjunction structures.

[0064] In one embodiment, in order to increase the arrangement density of the body field plates 12 in the superjunction region with a higher doping concentration, some short field plates with shorter lengths (not shown in the figure) may be provided in the substrate structure 11. These short field plates are only embedded in the first superjunction structure 16. In this way, there are both body field plates 12 and short field plates in the first superjunction structure 16, thereby improving the arrangement density of the field plates in the first superjunction structure 16 and enhancing depletion.

[0065] In one embodiment, the laterally diffused metal oxide semiconductor device 1 further includes a first buried layer 1104. The first buried layer 1104 is disposed in the substrate structure 11 at the bottom of the first well region 1101, and at least a part of the positive projection of the second well region 1106 on the substrate structure 11 coincides with the positive projection of the first buried layer 1104 on the substrate structure 11. Exemplarily, as Figure 1 shown, the first buried layer 1104 is disposed in the substrate structure 11 below the second well region 1106, and the first buried layer 1104 is a P-type buried layer. By providing the first buried layer 1104, the first well region 1101 can be assisted in depletion, thereby improving the performance of the device.

[0066] In one embodiment, the laterally diffused metal oxide semiconductor device 1 further includes a second buried layer 1105. The second buried layer 1105 is disposed in the substrate structure 11 at the bottom of the first well region 1101. At least a part of the positive projection of the drain region 1103 on the substrate structure 11 coincides with the positive projection of the second buried layer 1105 on the substrate structure 11. Exemplarily, the second buried layer 1105 is an N-type buried layer. By providing the second buried layer 1105, the breakdown voltage of the device can be improved.

[0067] In one embodiment, the laterally diffused metal oxide semiconductor device 1 further includes a third well region 1107. The third well region 1107 is disposed in the first well region 1101 and is spaced apart from the second well region 1106, and the drain region 1103 is disposed in the third well region 1107. By providing the third well region 1107, the on-state performance of the device can be improved. Further, the second buried layer 1105 is disposed in the substrate structure 11 below the third well region 1107.

[0068] In one embodiment, the first well region 1101 is a deep N-well, the second well region 1106 is a P-well, and the third well region 1107 is an N-well.

[0069] In one embodiment, the laterally diffused metal oxide semiconductor device 1 further includes a body extraction region 1108, a gate 13, a second dielectric layer 14, and a first electrical connection structure 15.

[0070] Among them, the first buried layer 1104 is disposed in the substrate structure 11 below the source region 1102, and the first buried layer 1104 is of a first doping type. The second buried layer 1105 is disposed in the substrate structure 11 below the drain region 1103, and the second buried layer 1105 is of a second doping type. The body extraction region 1108 is disposed in the second well region 1106. The third well region 1107 is of the second doping type, and the third well region 1107 is disposed in the first well region 1101, and the drain region 1103 is disposed in the third well region 1107. The gate 13 is disposed on the surface of the substrate structure 11 and covers at least a part of the second well region 1106, a part of the first well region 1101, and a part of the source region 1102. The second dielectric layer 14 is disposed on the surface of the substrate structure 11, and the first electrical connection structure 15 passes through the second dielectric layer 14 and is electrically connected to the body field plate 12. Exemplarily, the second dielectric layer 14 may be a field oxide layer.

[0071] In one embodiment, the gate 13 includes a gate conductive layer (not shown in the figure) and a gate dielectric layer (not shown in the figure). The gate dielectric layer is disposed on the front surface of the substrate structure 11, and the gate conductive layer is disposed on a surface of the gate dielectric layer away from the substrate structure 11.

[0072] In one embodiment, the body field plate 12 includes a first conductive layer 122 and a first dielectric layer 121. The first dielectric layer 121 is disposed on the side surface and the bottom surface of the first conductive layer 122. Exemplarily, the material of the first conductive layer 122 is polysilicon, and the material of the first dielectric layer 121 is silicon oxide.

[0073] In one embodiment, referring to Figure 2 As shown, the body field plates 12 in the laterally diffused metal oxide semiconductor device 1 can be arranged in the arrangement shown in the figure. Among them, all the body field plates 12 can be arranged in multiple columns along the first direction X, and the multiple columns of body field plates 12 are sequentially spaced apart along the second direction Y. The body field plates 12 in the odd columns and the body field plates 12 in the even columns are arranged in a staggered manner in the second direction Y.

[0074] It can be understood that the body field plates 12 can also be arranged in other arrangement forms, and the embodiments of the present application do not limit this.

[0075] Second aspect, referring to Figure 3 As shown, the embodiments of the present application further provide a method for manufacturing a laterally diffused metal oxide semiconductor device, which specifically includes the following steps:

[0076] S100: Provide a substrate structure. Exemplarily, the substrate structure may include a substrate and an epitaxial layer disposed on the substrate, and both the substrate and the epitaxial layer are of a first doping type.

[0077] S200: Form a first well region within the substrate structure. Exemplarily, the first well region may be formed within the substrate structure by an ion implantation process.

[0078] S300: Form at least one in-body field plate within the first well region, and form a second well region within the first well region. Along the direction from the front surface to the back surface of the substrate structure, the outer diameter of the in-body field plate gradually decreases. It should be noted that the in-body field plate is disposed in a trench, and before forming the in-body field plate, a trench needs to be etched on the substrate structure.

[0079] S400: Form a first superjunction structure and at least one second superjunction structure within the first well region. The second superjunction structure is located on the side of the first superjunction structure closer to the back surface of the substrate structure; the in-body field plate penetrates through the first superjunction structure and at least one second superjunction structure.

[0080] S500: Form a drain region within the first well region, and form a source region within the second well region. Among them, the second well region and the drain region are arranged at intervals, and the first superjunction structure, the second superjunction structure, and the in-body field plate are all located between the second well region and the drain region. Exemplarily, the second well region, the source region, and the drain region may be formed by an ion implantation process. It can be understood that in this step, a body lead region may be formed synchronously.

[0081] In the manufacturing method of the lateral diffusion metal oxide semiconductor device provided by the present application, by arranging a first superjunction structure and at least one second superjunction structure from top to bottom within the first well region, making the in-body field plate penetrate through the first superjunction structure and at least one second superjunction structure, and making the outer diameter of the in-body field plate gradually decrease from top to bottom. In this way, on the one hand, it is equivalent to setting a field plate structure with a wider width in the superjunction region with a higher doping concentration, making the depletion effect of the in-body field plate stronger in this region, thereby weakening the electric field peak and improving the device breakdown voltage; on the other hand, it is equivalent to using a field plate structure with a narrower width in the superjunction region with a lower doping concentration, increasing the current path while ensuring the breakdown voltage, thereby reducing the on-resistance and effectively optimizing the contradictory relationship between the breakdown voltage and the on-resistance.

[0082] In one embodiment, S100 is specifically the following steps:

[0083] S110: Provide a substrate.

[0084] S120: Form a first buried layer and a second buried layer on the substrate, and perform heat treatment on the substrate.

[0085] S130: Form an epitaxial layer on the substrate, and the epitaxial layer and the substrate together constitute the substrate structure.

[0086] In one embodiment, S300 specifically includes the following steps:

[0087] S310: Etch the substrate structure to form trenches.

[0088] S320: Form a first dielectric layer on the sidewalls of the trenches.

[0089] S330: Form a first conductive layer on the first dielectric layer to form a body field plate.

[0090] S340: Form a second well region in the first well region. It can be understood that in this step, a third well region can be formed synchronously.

[0091] In one embodiment, S400 specifically includes the following steps:

[0092] S410: Form a second superjunction structure in the first well region.

[0093] S420: Form a first superjunction structure in the first well region.

[0094] In one embodiment, before S500, the following steps are further included:

[0095] S430: Form a second dielectric layer on the substrate structure.

[0096] S440: Form a gate on the substrate structure.

[0097] In one embodiment, after S500, the following steps are further included:

[0098] S600: Form a first electrical connection structure, a second electrical connection structure, a third electrical connection structure, and a fourth electrical connection structure on the substrate structure. The first electrical connection structure is electrically connected to the body field plate, the second electrical connection structure is electrically connected to the gate, the third electrical connection structure is electrically connected to the drain region, and the fourth electrical connection structure is electrically connected to the source region and the body lead-out region.

[0099] It should be understood that in the embodiments of the present application, although the steps in the flowchart of the accompanying drawings are shown sequentially according to the indication of the arrows, these steps are not necessarily executed sequentially according to the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least a part of the steps in the accompanying drawings may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least a part of other steps or steps in other steps.

[0100] It should be understood that in the embodiments of the present application, although the steps in the flowcharts of the accompanying drawings are shown in sequence according to the indications of the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear indication in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the accompanying drawings may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or steps or stages in other steps.

[0101] In the description of this specification, the descriptions with reference to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials or features described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0102] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0103] The above-described embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A lateral diffused metal oxide semiconductor device, characterized in that, Comprising: A substrate structure, in which a first well region is provided, and in the first well region, a second well region and a drain region are arranged at intervals, and a source region is provided in the second well region; A first superjunction structure, provided in the first well region and located between the second well region and the drain region; At least one second superjunction structure, provided in the first well region and located between the second well region and the drain region, and the second superjunction structure is located on a side of the first superjunction structure close to the back surface of the substrate structure; At least one body field plate, provided in the first well region and located between the second well region and the drain region, and the body field plate penetrates through the first superjunction structure and at least one of the second superjunction structures; Wherein, along the direction from the front surface of the substrate structure to the back surface of the substrate structure, the outer diameter of the body field plate gradually decreases.

2. The lateral diffusion metal oxide semiconductor device according to claim 1, wherein The body field plate includes a first part and a second part, the first part penetrates through the first superjunction structure, and the second part penetrates through at least one of the second superjunction structures; The outer diameter of the second part is smaller than that of the first part.

3. The lateral diffusion metal oxide semiconductor device according to claim 2, wherein The laterally diffused metal oxide semiconductor device includes a plurality of the second superjunction structures, and the plurality of the second superjunction structures are arranged at intervals along the thickness direction of the substrate structure.

4. The lateral diffusion metal oxide semiconductor device according to claim 3, wherein, The second part penetrates through all of the second superjunction structures.

5. The lateral diffusion metal oxide semiconductor device according to claim 4, wherein The second part includes a plurality of sub-parts, the plurality of sub-parts are arranged at intervals along the thickness direction of the substrate structure, and each sub-part penetrates through one of the second superjunction structures; Along the direction from the front surface of the substrate structure to the back surface of the substrate structure, the outer diameter of each sub-part gradually decreases.

6. The lateral diffusion metal oxide semiconductor device according to claim 1, wherein The surface of the first superjunction structure on a side close to the front surface of the substrate structure is adjacent to the front surface of the substrate structure.

7. The lateral diffusion metal oxide semiconductor device according to claim 1, characterized in that, The first superjunction structure includes a first doping region and a second doping region, and the first doping region is located on a side of the second doping region close to the front surface of the substrate structure; The second superjunction structure includes a third doping region and a fourth doping region, and the third doping region is located on a side of the fourth doping region close to the front surface of the substrate structure; The doping types of the first doping region and the third doping region are the same, and the doping types of the second doping region and the fourth doping region are the same.

8. The lateral diffused metal oxide semiconductor device according to claim 1, wherein The laterally diffused metal oxide semiconductor device includes a plurality of the body field plates, and the plurality of the body field plates are arranged at intervals in the first well region.

9. The lateral diffusion metal oxide semiconductor device according to any one of claims 1-8, characterized in that, The laterally diffused metal oxide semiconductor device further includes a first buried layer, the first buried layer is provided in the substrate structure at the bottom of the first well region, and at least a part of the positive projection of the second well region on the substrate structure coincides with the positive projection of the first buried layer on the substrate structure; And / or, the laterally diffused metal oxide semiconductor device further includes a second buried layer, the second buried layer is provided in the substrate structure at the bottom of the first well region; at least a part of the positive projection of the drain region on the substrate structure coincides with the positive projection of the second buried layer on the substrate structure.

10. A method for fabricating a lateral diffused metal oxide semiconductor device, characterized in that, Comprising: Providing a substrate structure; Forming a first well region in the substrate structure; At least one in - body field plate is formed in the first well region, and a second well region is formed in the first well region; along the direction from the front surface to the back surface of the substrate structure, the outer diameter of the in - body field plate gradually decreases; A first super - junction structure and at least one second super - junction structure are formed in the first well region; the second super - junction structure is located on the side of the first super - junction structure close to the back surface of the substrate structure; the in - body field plate penetrates through the first super - junction structure and at least one of the second super - junction structures; A drain region is formed in the first well region, and a source region is formed in the second well region; wherein, the second well region and the drain region are arranged at intervals, and the first super - junction structure, the second super - junction structure and the in - body field plate are all located between the second well region and the drain region.

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