Light emitting diode display device and method of manufacturing same

By using the adhesive layer separation structure with uneven side surfaces in the light emitting diode display device, the problem of failure in transfer of light emitting elements is solved, stable transfer and process optimization are achieved, and production costs and energy consumption are reduced.

CN120239395APending Publication Date: 2025-07-01LG DISPLAY CO LTD
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Patent Information

Application Number
CN202411436424.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-12-28
Filing Date
2024-10-15
Publication Date
2025-07-01

AI Technical Summary

Technical Problem

In the light emitting diode display device, the transfer process of the light emitting element is easily impacted, resulting in the transfer failure, and the transfer step is complicated.

Method used

A first electrode is formed on the substrate, and a first dam layer is provided thereon to expose the opening, and then an adhesive layer is formed on the dam layer, the portion of the adhesive layer is in contact with the light emitting element, and stable transfer of the light emitting element is achieved by providing an uneven side surface to separate the portion of the adhesive layer.

Benefits of technology

By simplifying the transfer process, reducing manufacturing time and cost, and reducing impact of light emitting elements, preventing transfer failure, optimizing manufacturing processes, and reducing production energy consumption.

✦ Generated by Eureka AI based on patent content.

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Abstract

A light emitting diode display device and a method of manufacturing the same are provided. The light emitting diode display device includes: a substrate; a first electrode over the substrate; a first bank layer on the first electrode and having a first opening exposing the first electrode; an adhesive layer including a first portion on the first electrode exposed through the first opening; and a light emitting element disposed on a first portion of the adhesive layer, in which the first portion has a side surface provided with a plurality of uneven portions.
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Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2023 - 0194835, filed in Korea on December 28, 2023, the entire contents of which are hereby incorporated by reference into this application. Technical field

[0003] The present disclosure relates to a display device, and more particularly, to a light - emitting diode display device and a method of manufacturing the same. Background art

[0004] With the development of the information society, the demand for different types of display devices has increased, and flat - panel display devices (FPDs) such as liquid - crystal display devices (LCDs) and light - emitting diode (LED) display devices have been developed and applied in various fields.

[0005] In a flat - panel display device, a light - emitting diode display device emits light due to radiative recombination of excitons. Excitons are formed by electrons and holes by injecting charges into a light - emitting layer between a cathode for injecting electrons and an anode for injecting holes in a light - emitting diode.

[0006] A light - emitting diode display device has a wide viewing angle compared to a liquid - crystal display device because it is self - emissive and also has advantages such as a thin thickness, a light weight, and low power consumption because a backlight unit is not required.

[0007] A light - emitting diode display device may include an inorganic - based light - emitting element and an organic - based light - emitting element. The inorganic - based light - emitting element has relatively excellent stability, fast response characteristics, and high contrast, and a micro - light - emitting diode (micro - LED or uLED) is widely used as a high - resolution inorganic - based light - emitting element.

[0008] The inorganic - based light - emitting elements are separately provided on an element substrate and transferred to a substrate of the display device. Since the pitch of the light - emitting elements on the element substrate is different from the pitch of the light - emitting elements on the substrate of the display device, a complex transfer step is required to transfer the light - emitting elements of the element substrate to the substrate of the display device.

[0009] In addition, during the transfer process, the light - emitting elements may be damaged, tilted, or flipped due to impact, resulting in transfer failure. Summary of the invention

[0010] Accordingly, the present disclosure aims to provide a light - emitting diode display device that substantially eliminates one or more of the limitations and disadvantages described above and associated with the background art.

[0011] More specifically, an object of the present disclosure is to provide a light-emitting diode display device and a method of manufacturing the same that can prevent transfer failure of a light-emitting element.

[0012] Additional features and aspects will be set forth in the description below, and in part will be apparent from the description, or may be learned by practice of the present disclosure provided herein. Other features and aspects of the inventive concept may be realized and obtained by the structures particularly pointed out in the written description or structures derived therefrom, as well as the accompanying drawings.

[0013] To achieve these and other aspects of the present disclosure, as embodied and broadly described herein, a light-emitting diode display device includes: a substrate; a first electrode above the substrate; a first bank layer on the first electrode and having a first opening exposing the first electrode; an adhesive layer including a first portion on the first electrode exposed through the first opening; and a light-emitting element disposed on the first portion of the adhesive layer, wherein the first portion has a side surface provided with a plurality of uneven portions.

[0014] In another aspect, a method of manufacturing a light-emitting diode display device includes: forming a first electrode above a first substrate; forming a first bank layer on the first electrode and the first bank layer having a first opening exposing the first electrode; forming an adhesive layer on the first bank layer; and transferring a light-emitting element onto the adhesive layer corresponding to the first electrode, wherein the adhesive layer includes a first portion between the first electrode and the light-emitting element and a second portion on the first bank layer, and wherein the first portion is separated from the second portion and both the first portion and the second portion have side surfaces provided with a plurality of uneven portions.

[0015] It is to be understood that both the foregoing general description and the following detailed description are exemplary and are intended to provide further explanation of the claimed inventive concept. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application. The drawings illustrate aspects of the present disclosure and, together with the description, serve to explain the various principles of the present disclosure.

[0017] In the drawings:

[0018] Figure 1 is an equivalent circuit diagram of a sub-pixel of a light-emitting diode display device according to an embodiment of the present disclosure;

[0019] Figure 2 is a schematic plan view of a light-emitting diode display device according to an embodiment of the present disclosure;

[0020] Figure 3is a schematic cross-sectional view of a light-emitting diode display device according to a first embodiment of the present disclosure;

[0021] Figure 4 is a schematic cross-sectional view of a light-emitting diode display device according to a second embodiment of the present disclosure;

[0022] Figure 5 is a schematic cross-sectional view of a light-emitting diode display device according to a third embodiment of the present disclosure; and

[0023] Figures 6A to 6K is a schematic cross-sectional view of a light-emitting diode display device during a step of manufacturing a light-emitting diode display device according to a third embodiment of the present disclosure. Detailed Embodiments

[0024] Advantages and features of the present disclosure and methods for achieving them will become apparent according to embodiments described in detail below with reference to the accompanying drawings. However, the present disclosure may be implemented in many different forms and should not be construed as limited to the embodiments set forth herein, and the embodiments are provided so that the present disclosure will be thorough and complete and will fully convey the scope of the present disclosure to those skilled in the art to which the present disclosure pertains.

[0025] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings used to describe the embodiments of the present disclosure are illustrative, and thus the present disclosure is not limited to what is shown. Throughout the present disclosure, the same reference numerals refer to the same components.

[0026] In addition, in the following description of the present disclosure, when it is determined that a detailed description of known related technologies is not necessary to obscure the gist of the present disclosure, its detailed description will be omitted herein or briefly discussed.

[0027] When using terms such as "comprising", "having", "consisting of", etc. mentioned in the present disclosure, other parts may be added unless the term "only" is used herein.

[0028] In addition, when a component is expressed in the singular, it includes the plural unless otherwise stated.

[0029] When analyzing a component, even when there is no explicit description, the error range is construed as being included.

[0030] When describing a positional relationship, for example, when describing the positional relationship between two parts / layers as "above...", "on...", "above", "below", "beneath...", "next to...", etc., unless "immediately" or "directly" is used together with it, one or more other parts / layers may be disposed between these two parts / layers.

[0031] When describing a temporal relationship, for example, when describing a temporal precedence relationship as "after...", "subsequently", "next", "before...", etc., unless "immediately" or "directly" is used, discontinuous or non-sequential cases may also be included.

[0032] Although terms such as first, second, etc. are used to describe various components, these components are not substantially limited by these terms. These terms are only used to distinguish one component from another component, and may not define any order or sequence. Therefore, within the technical spirit of the present disclosure, the first component described below may actually be the second component.

[0033] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0034] Figure 1 is an equivalent circuit diagram of a sub-pixel of a light-emitting diode display device according to an embodiment of the present disclosure.

[0035] In Figure 1 , one sub-pixel of a light-emitting diode display device according to an embodiment of the present disclosure may include a driving transistor DT, a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, and a fifth transistor T5, a storage capacitor Cst, and a light-emitting diode LED.

[0036] For example, the driving transistor DT and the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 may be P-type transistors. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the driving transistor DT and the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 may be N-type transistors.

[0037] The driving transistor DT may be switched according to the voltage of the first capacitor electrode of the storage capacitor Cst, and may be connected to a high-potential voltage ELVDD. Specifically, the gate of the driving transistor DT may be connected to the first capacitor electrode of the storage capacitor Cst and the source of the second transistor T2. The source of the driving transistor DT may be connected to the high-potential voltage ELVDD. The drain of the driving transistor DT may be connected to the drain of the second transistor T2 and the source of the fourth transistor T4.

[0038] The first transistor T1 can be switched according to the gate signal SCAN and can be connected to the data signal Vdata. Specifically, the gate of the first transistor T1 can be connected to the gate signal SCAN. The source of the first transistor T1 can be connected to the data signal Vdata. The drain of the first transistor T1 can be connected to the second capacitor electrode of the storage capacitor Cst and the source of the third transistor T3.

[0039] The second transistor T2 can be switched according to the gate signal SCAN and can be connected to the driving transistor DT. Specifically, the gate of the second transistor T2 can be connected to the gate signal SCAN. The source of the second transistor T2 can be connected to the first capacitor electrode of the storage capacitor Cst and the gate of the driving transistor DT. The drain of the second transistor T2 can be connected to the drain of the driving transistor DT and the source of the fourth transistor T4.

[0040] The third transistor T3 can be switched according to the emission signal EM and can be connected to the reference voltage Vref. The gate of the third transistor T3 can be connected to the emission signal EM. The source of the third transistor T3 can be connected to the second capacitor electrode of the storage capacitor Cst and the drain of the first transistor T1. The drain of the third transistor T3 can be connected to the reference voltage Vref and the source of the fifth transistor T5.

[0041] The fourth transistor T4 can be switched according to the emission signal EM and can be connected to the driving transistor DT and the light-emitting diode LED. Specifically, the gate of the fourth transistor T4 can be connected to the emission signal EM. The source of the fourth transistor T4 can be connected to the drain of the driving transistor DT and the drain of the second transistor T2. The drain of the fourth transistor T4 can be connected to the drain of the fifth transistor T5 and the first electrode of the light-emitting diode LED.

[0042] The fifth transistor T5 can be switched according to the gate signal SCAN and can be connected to the reference voltage Vref and the fourth transistor T4. Specifically, the gate of the fifth transistor T5 can be connected to the gate signal SCAN. The source of the fifth transistor T5 can be connected to the reference voltage Vref and the drain of the third transistor T3. The drain of the fifth transistor T5 can be connected to the drain of the fourth transistor T4 and the first electrode of the light-emitting diode LED.

[0043] The storage capacitor Cst can store the data signal Vdata and the threshold voltage Vth of the driving transistor DT. The first capacitor electrode of the storage capacitor Cst can be connected to the gate of the driving transistor DT and the source of the second transistor T2. The second capacitor electrode of the storage capacitor Cst can be connected to the drain of the first transistor T1 and the source of the third transistor T3.

[0044] The light-emitting diode LED can be connected between the fourth transistor T4 and the fifth transistor T5 and the low-potential voltage ELVSS, and can emit light with a brightness proportional to the current of the driving transistor DT. The first electrode of the light-emitting diode LED is an anode, which can be connected to the drains of the fourth transistor T4 and the fifth transistor T5. The second electrode of the light-emitting diode LED is a cathode, which can be connected to the low-potential voltage ELVSS.

[0045] In Figure 1 In an embodiment of the present disclosure, by way of example, each sub-pixel has a 6T1C structure including six transistors and one capacitor, but in other embodiments, each sub-pixel can have one of 2T1C, 4T1C, 5T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T1C, 7T2C, 8T1C, and 8T2C structures.

[0046] Reference will be made to Figure 2 to describe the planar structure of a light-emitting diode display device according to an embodiment of the present disclosure having the above circuit configuration.

[0047] Figure 2 is a schematic plan view of a light-emitting diode display device according to an embodiment of the present disclosure, and shows one sub-pixel.

[0048] In Figure 2 In, one sub-pixel of a light-emitting diode display device according to an embodiment of the present disclosure may include a light-emitting element 160, a first electrode 132, and a second electrode 172. The light-emitting element 160 may overlap with the first electrode 132 and the second electrode 172, and may be electrically connected to the first electrode 132 and the second electrode 172.

[0049] Specifically, the first electrode 132 and the connection electrode 134 may be arranged to be spaced apart from each other in the first direction X.

[0050] Next, the adhesive layer 150 may be arranged to overlap with the first electrode 132 and the connection electrode 134. The adhesive layer 150 may include a first portion 152 and a second portion 154, and the first portion 152 may be disposed in the second portion 154.

[0051] In this case, the second portion 154 may have a hole corresponding to the opening 140a of the bank layer. The first portion 152 may be disposed in the hole of the second portion 154, and may be substantially spaced apart from the second portion 154 in the first direction X and the second direction Y.

[0052] A plurality of unevennesses may be provided at side surfaces of the first part 152 and the second part 154, and the plurality of unevennesses may be randomly provided without any rules.

[0053] The first electrode 132 may overlap with the first part 152 and the second part 154 of the adhesive layer 150. The connection electrode 134 may overlap with the second part 154 and may be spaced apart from the first part 152. Meanwhile, the contact hole 170a may be provided to overlap with the connection electrode 134.

[0054] Next, the light-emitting element 160 may be provided to overlap with the first part 152 of the adhesive layer 150. The light-emitting element 160 may be spaced apart from the second part 154 of the adhesive layer 150. The light-emitting element 160 may overlap with the first electrode 132 and may be electrically connected to the first electrode 132 through the first part 152 of the adhesive layer 150.

[0055] Meanwhile, the second electrode 172 may be provided to overlap with the light-emitting element 160 and the connection electrode 134. The second electrode 172 may overlap with the first electrode 132 and also overlap with the first part 152 and the second part 154 of the adhesive layer 150. The second electrode 172 may be electrically connected to the light-emitting element 160 and may be electrically connected to the connection electrode 134 through the contact hole 170a.

[0056] The cross-sectional structure of a light-emitting diode display device according to an embodiment of the present disclosure having the above planar structure will be described with reference to the accompanying drawings.

[0057] Figure 3 is a schematic cross-sectional view of a light-emitting diode display device according to a first embodiment of the present disclosure. Figure 3 Shows the cross-section corresponding to the line I-I' of Figure 2 and will be described with reference to Figure 1 and Figure 2 together.

[0058] In Figure 3 a light-emitting diode display device according to a first embodiment of the present disclosure may include a substrate (sometimes also referred to as "first substrate") 110, a thin-film transistor TR, and a light-emitting element 160.

[0059] Specifically, a light-blocking layer 121 may be provided on the substrate 110. The substrate 110 may be formed of an insulating material and may be a glass substrate or a plastic substrate. For example, polyimide (PI) may be used for the plastic substrate, but the embodiments of the present disclosure are not limited thereto.

[0060] The light-blocking layer 121 may be formed of a conductive material such as a metal. For example, the light-blocking layer 121 may be formed of at least one of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof. The light-blocking layer 121 may have a single-layer structure or a multi-layer structure.

[0061] Meanwhile, an insulating layer of an inorganic insulating material may be further provided between the substrate 110 and the light-blocking layer 121.

[0062] The buffer layer 112 as the first insulating layer may be provided on the light-blocking layer 121. The buffer layer 112 may be formed of a single-layer or multi-layer inorganic insulating material. The inorganic insulating material of the buffer layer 112 may include silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON).

[0063] The semiconductor layer 122 may be provided on the buffer layer 112. The semiconductor layer 122 may overlap with the light-blocking layer 121, and the light-blocking layer 121 may block light from incident on the semiconductor layer 122 and prevent or reduce the deterioration of the semiconductor layer 122 due to light.

[0064] The semiconductor layer 122 may include a channel region in its central portion and a source region and a drain region on both sides of the channel region.

[0065] The semiconductor layer 122 may be formed of an oxide semiconductor material. Alternatively, the semiconductor layer 122 may be formed of polysilicon, and in this case, two end portions of the semiconductor layer 122 may be doped with impurities.

[0066] The gate insulating layer 114 as the second insulating layer may be provided on the semiconductor layer 122. The gate insulating layer 114 may be formed of a single-layer or multi-layer inorganic insulating material. The inorganic insulating material of the gate insulating layer 114 may include silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON).

[0067] The gate electrode 123 and the auxiliary electrode 124 may be provided on the gate insulating layer 114.

[0068] The gate electrode 123 may overlap with the semiconductor layer 122 and may be provided to correspond to the central portion of the semiconductor layer 122. Therefore, the gate electrode 123 may also overlap with the light-blocking layer 121.

[0069] The auxiliary electrode 124 may be spaced apart from the semiconductor layer 122 and may overlap with the light-blocking layer 121. The auxiliary electrode 124 may contact the light-blocking layer 121 through a contact hole provided in the buffer layer 112 and the gate insulating layer 114.

[0070] The gate electrode 123 and the auxiliary electrode 124 can be formed of a conductive material such as a metal. For example, the gate electrode 123 and the auxiliary electrode 124 can be formed of at least one of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof. The gate electrode 123 and the auxiliary electrode 124 can have a single-layer structure or a multi-layer structure.

[0071] The first interlayer insulating layer 116 as the third insulating layer can be disposed on the gate electrode 123 and the auxiliary electrode 124. The first interlayer insulating layer 116 can be formed of a single-layer or multi-layer inorganic insulating material. The inorganic insulating material of the first interlayer insulating layer 116 can include silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON).

[0072] The signal line 125 can be disposed on the first interlayer insulating layer 116. The signal line 125 can overlap with the gate electrode 123. Accordingly, the signal line 125 can also overlap with the semiconductor layer 122 and the light blocking layer 121.

[0073] A DC voltage can be applied to the signal line 125. For example, a data voltage Vdata, a high potential voltage ELVDD, or a low potential voltage ELVSS can be applied to the signal line 125.

[0074] The signal line 125 can be formed of a conductive material such as a metal. For example, the signal line 125 can be formed of at least one of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof. The signal line 125 can have a single-layer structure or a multi-layer structure.

[0075] The second interlayer insulating layer 118 as the fourth insulating layer can be disposed on the signal line 125. The second interlayer insulating layer 118 can be formed of a single-layer or multi-layer inorganic insulating material. The inorganic insulating material of the second interlayer insulating layer 118 can include silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON).

[0076] The source electrode 126, the drain electrode 127, the auxiliary line 128, and the power line 129 can be disposed on the second interlayer insulating layer 118.

[0077] The source electrode 126 and the drain electrode 127 can be spaced apart from each other, with the gate electrode 123 positioned between the source electrode 126 and the drain electrode 127, and the source electrode 126 and the drain electrode 127 can be in contact with two end portions of the semiconductor layer 122 through contact holes provided in the first interlayer insulating layer 116 and the second interlayer insulating layer 118 and the gate insulating layer 114.

[0078] The semiconductor layer 122, the gate electrode 123, the source electrode 126, and the drain electrode 127 can form a thin film transistor TR.

[0079] The auxiliary line 128 can be spaced apart from the source electrode 126 and the drain electrode 127. The auxiliary line 128 can overlap with the signal line 125 and can be in contact with the signal line 125 through a contact hole provided in the second interlayer insulating layer 118. The auxiliary line 128 can also overlap with the gate electrode 123, the semiconductor layer 122, and the light blocking layer 121.

[0080] The power line 129 can be spaced apart from the thin film transistor TR and the auxiliary line 128. For example, the power line 129 can be a line for supplying a low potential voltage ELVSS.

[0081] The source electrode 126, the drain electrode 127, the auxiliary line 128, and the power line 129 can be formed of a conductive material such as a metal. For example, the source electrode 126, the drain electrode 127, the auxiliary line 128, and the power line 129 can be formed of at least one of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof. The source electrode 126, the drain electrode 127, the auxiliary line 128, and the power line 129 can have a single-layer structure or a multi-layer structure.

[0082] The passivation layer 120 as the fifth insulating layer can be provided on the source electrode 126, the drain electrode 127, the auxiliary line 128, and the power line 129. The passivation layer 120 can be a planarization layer for eliminating the step difference caused by the layer below it and can have a substantially flat top surface. The passivation layer 120 can be formed of an organic insulating material such as photosensitive acrylic polymer (photoacrylic).

[0083] Meanwhile, an insulating layer formed of an inorganic insulating material that is formed into a single layer or a multi-layer can be further provided below the passivation layer 120.

[0084] The first electrode 132 and the connection electrode 134 can be provided on the passivation layer 120. The first electrode 132 can overlap with the drain electrode 127 and can be in contact with the drain electrode 127 through a contact hole provided in the passivation layer 120. The first electrode 132 can overlap with the thin film transistor TR.

[0085] The connection electrode 134 can be spaced apart from the first electrode 132. The connection electrode 134 can overlap with the power line 129 and can be in contact with the power line 129 through a contact hole provided in the passivation layer 120.

[0086] The first electrode 132 and the connection electrode 134 may be formed of a transparent conductive material and / or a conductive material such as a metal. For example, the first electrode 132 and the connection electrode 134 may be formed of indium tin oxide (ITO) or indium zinc oxide (IZO), or may be formed of at least one of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof. The first electrode 132 and the connection electrode 134 may have a single-layer structure or a multi-layer structure.

[0087] The first bank layer 140 may be disposed on the first electrode 132 and the connection electrode 134. The first bank layer 140 may overlap and cover the edge of the first electrode 132, and may have a first opening 140a exposing the central portion of the top surface of the first electrode 132.

[0088] The side surface 142 of the first bank layer 140 corresponding to the first opening 140a may have a normal inclination. That is, the side surface 142 of the first bank layer 140 may have an inclination angle less than 90 degrees with respect to the substrate 110. Accordingly, the width of the first opening 140a may increase as the distance from the first electrode 132 increases, and the top width of the first opening 140a may be greater than the bottom width of the first opening 140a.

[0089] In addition, the first bank layer 140 may cover the connection electrode 134 and expose a part of the connection electrode 134.

[0090] The first bank layer 140 may be formed of a single-layer or multi-layer organic insulating material. For example, the first bank layer 140 may be formed of polyimide, photosensitive acrylic polymer (photoacrylic), or benzocyclobutene (BCB).

[0091] Alternatively, the first bank layer 140 may include black particles that absorb and / or reflect light, thereby improving the efficiency of the light emitted from the light-emitting element 160. For example, the black particles may include a black pigment and / or carbon black disposed in a resin. However, embodiments of the present disclosure are not limited thereto.

[0092] An adhesive layer 150 may be disposed on the first bank layer 140 and the first electrode 132. The adhesive layer 150 may be an anisotropic conductive film (ACF) including an insulating substrate member and a plurality of conductive balls dispersed in the insulating substrate member. When heat and / or pressure is applied to the adhesive layer 150, in the area where heat or pressure is applied, the conductive balls may be electrically connected, such that the adhesive layer 150 may have conductive properties, and in the area where no heat or pressure is applied, the adhesive layer 150 may have insulating properties.

[0093] The adhesive layer 150 may include a first portion 152 and a second portion 154. The first portion 152 may be disposed on the top surface of the first electrode 132 exposed through the first opening 140a, and the second portion 154 may be disposed on the top surface of the first bank layer 140.

[0094] The first portion 152 and the second portion 154 of the adhesive layer 150 may not be connected to each other and may be separated from each other. A plurality of uneven portions may be provided at the side surfaces of the first portion 152 and the second portion 154, and the plurality of uneven portions may be randomly provided without any rules.

[0095] In addition, a part of the second portion 154 of the adhesive layer 150 may be removed to expose a part of the connection electrode 134, and the first portion 152 of the adhesive layer 150 may be disposed on the top surface of the first electrode 132 to partially expose the first electrode 132.

[0096] A light-emitting element 160 may be disposed on the adhesive layer 150. The light-emitting element 160 may be disposed on the first portion 152 of the adhesive layer 150 and may be located in the first opening 140a. The light-emitting element 160 may overlap with the first electrode 132 and may be electrically connected to the first electrode 132 through the adhesive layer 150.

[0097] The light-emitting element 160 may include a first element electrode 162 and a second element electrode 164. Here, the first element electrode 162 may be a p electrode, and the second element electrode 164 may be an n electrode. The first element electrode 162 may be an anode, and the second element electrode 164 may be a cathode. However, the embodiments of the present disclosure are not limited thereto.

[0098] Alternatively, in other embodiments, the first element electrode 162 may be an n electrode, and the second element electrode 164 may be a p electrode. In this case, the first element electrode 162 may be a cathode, and the second element electrode 164 may be an anode.

[0099] The light-emitting element 160 may be provided in the form of a micro light-emitting diode chip (micro LED chip or uLED chip) including an n electrode, an n-type layer, an active layer, a p-type layer, and a p electrode. The light-emitting element 160 may have a vertical structure in which the n electrode and the p electrode are respectively provided on opposite sides (e.g., a first side facing the substrate 110 and a second side opposite to the first side).

[0100] However, embodiments of the present disclosure are not limited thereto. The light-emitting element 160 may have a flip-chip structure in which the n electrode and the p electrode are provided on the same side (e.g., a first side facing the substrate 110), and light is emitted through a second side opposite to the first side on which the n electrode and the p electrode are provided. Alternatively, the light-emitting element 160 may have a lateral structure in which the n electrode and the p electrode are provided on the same side, and light is emitted through the same side on which the n electrode and the p electrode are provided.

[0101] The first element electrode 162 of the light-emitting element 160 may be provided between the adhesive layer 150 and the second element electrode 164, and may be in contact with the adhesive layer 150. The first element electrode 162 may be electrically connected to the first electrode 132 through the adhesive layer 150.

[0102] In addition, a first protective layer 170 may be provided on the adhesive layer 150. The first protective layer 170 may be a planarization layer and may have a substantially flat top surface. The first protective layer 170 may eliminate a step difference caused by the light-emitting element 160, and the top surface of the first protective layer 170 may be substantially flush with the top surface of the light-emitting element 160. That is, the top surface of the first protective layer 170 may be substantially flush with the top surface of the second element electrode 164.

[0103] The first protective layer 170 may have a contact hole 170a corresponding to the connection electrode 134 and exposing a portion of the connection electrode 134. The contact hole 170a may be provided in the adhesive layer 150 and the first bank layer 140.

[0104] The first protective layer 170 may be formed of an organic insulating material such as a photosensitive acrylic polymer (photoacrylic).

[0105] The second electrode 172 may be provided on the first protective layer 170 and the light-emitting element 160. The second electrode 172 may be in contact with the second element electrode 164 of the light-emitting element 160 and may be electrically connected to the second element electrode 164. The second electrode 172 may overlap with the first electrode 132 and the thin-film transistor TR.

[0106] For example, the second electrode 172 may be formed of aluminum (Al), magnesium (Mg), silver (Ag), or an alloy thereof. In this case, the second electrode 172 has a relatively thin thickness such that light from the light-emitting element 160 can be transmitted therethrough. Alternatively, in other embodiments, the second electrode 172 may be formed of a transparent conductive material such as indium gallium oxide (IGO) or IZO.

[0107] In addition, the second electrode 172 may overlap with the connection electrode 134 and may be in contact with the connection electrode 134 through the contact hole 170a. The second electrode 172 may be electrically connected to the power line 129 through the connection electrode 134.

[0108] For each sub-pixel, the second electrode 172 may be separate. However, embodiments of the present disclosure are not limited thereto. In other embodiments, the second electrodes 172 of adjacent sub-pixels may be connected to each other and provided as one body.

[0109] The second bank layer 180 may be provided on the second electrode 172 and the first protective layer 170. The second bank layer 180 may have a second opening 180a corresponding to the first opening 140a and exposing the second electrode 172.

[0110] The second bank layer 180 may be formed of a single-layer or multi-layer organic insulating material. For example, the second bank layer 180 may be formed of polyimide, photosensitive acrylic polymer (photoacrylic), or benzocyclobutene (BCB).

[0111] Alternatively, the second bank layer 180 may include black particles that absorb and / or reflect light. For example, the black particles may include a black pigment and / or carbon black disposed in a resin. However, embodiments of the present disclosure are not limited thereto.

[0112] The second protective layer 182 may be provided on the second bank layer 180. The second protective layer 182 may be a planarization layer for eliminating a step difference caused by the second opening 180a of the second bank layer 180 and may have a substantially flat top surface.

[0113] The second protective layer 182 may be formed of an organic insulating material such as a photosensitive acrylic polymer (photoacrylic).

[0114] In the light-emitting diode display device according to the first embodiment of the present disclosure, the first bank layer 140 may be disposed between the first electrode 132 and the adhesive layer 150, thereby forming a gap between the first electrode 132 and the adhesive layer 150. And by directly transferring the light-emitting element 160 on the element substrate onto the adhesive layer 150, the first portion 152 of the adhesive layer 150 may be separated from the second portion 154 and may be disposed on the first electrode 132 together with the light-emitting element 160. Accordingly, the impact on the light-emitting element 160 can be minimized and transfer failure can be prevented.

[0115] At this time, in order to easily separate the first portion 152 of the adhesive layer 150 from the second portion 154, the side surface 142 of the first bank layer 140 may have an inverse inclination. Reference will be made to Figure 4 describe the light-emitting diode display device according to the second embodiment of the present disclosure having such a structure.

[0116] Figure 4 is a schematic cross-sectional view of the light-emitting diode display device according to the second embodiment of the present disclosure, and shows a cross-section corresponding to the line I-I’ of Figure 2 The light-emitting diode display device according to the second embodiment of the present disclosure has a structure substantially the same as that of the first embodiment, except for the first bank layer. The same parts as those in the first embodiment are denoted by the same reference numerals, and the description of the same parts may be shortened or omitted.

[0117] In Figure 4 the first electrode 132 may be disposed on the substrate 110 and may be connected to the thin-film transistor TR. The first bank layer 140 may be disposed on the first electrode 132 and may have a first opening 240a exposing the first electrode 132.

[0118] The side surface 242 of the first bank layer 140 corresponding to the first opening 240a may have an inverse inclination. That is, the side surface 242 of the first bank layer 140 may have an inclination angle greater than 90 degrees with respect to the substrate 110.

[0119] Accordingly, the width of the first opening 240a may decrease as the distance from the first electrode 132 increases, and the top width of the first opening 240a may be smaller than the bottom width of the first opening 240a.

[0120] Therefore, in the light-emitting diode display device according to the second embodiment of the present disclosure, the side surface 242 of the first bank layer 140 may be configured to have an inverted inclination, and the thickness of the first bank layer 140 corresponding to the top of the first opening 240a may be made thin so that the adhesive layer 150 provided on the first bank layer 140 can be easily separated into a first portion 152 and a second portion 154.

[0121] Meanwhile, in order to easily separate the first portion 152 of the adhesive layer 150 from the second portion 154, the first bank layer 140 may have a protrusion. A light-emitting diode display device according to a third embodiment of the present disclosure having such a structure will be described with reference to Figure 5 FIG.

[0122] Figure 5 is a schematic cross-sectional view of a light-emitting diode display device according to a third embodiment of the present disclosure, and shows a cross-section corresponding to the line I-I' of Figure 2 The light-emitting diode display device according to the third embodiment of the present disclosure has a structure substantially the same as that of the first embodiment, except for the first bank layer. The same parts as those in the first embodiment are denoted by the same reference numerals, and the description of the same parts may be shortened or omitted.

[0123] In Figure 5 FIG., a first electrode 132 may be provided on a substrate 110 and may be connected to a thin-film transistor TR. A first bank layer 140 may be provided on the first electrode 132 and may have a first opening 140a exposing the first electrode 132.

[0124] The side surface 142 of the first bank layer 140 corresponding to the first opening 140a may have a substantially normal inclination. That is, the side surface 142 of the first bank layer 140 may have an inclination angle less than 90 degrees with respect to the substrate 110.

[0125] In addition, the first bank layer 140 may have a protrusion 344 corresponding to the first opening 140a. The protrusion 344 may protrude upward from the top surface of the first bank layer 140 corresponding to the first opening 140a, and the width of the protrusion 344 may decrease as the distance from the top surface of the first bank layer 140 increases.

[0126] In this case, the distance between the facing portions of the protrusion 344 may decrease as the distance from the first electrode 132 increases.

[0127] Therefore, the width of the first opening 140a may increase as the distance from the first electrode 132 increases, and then, in the region corresponding to the protrusion 344, the width of the first opening 140a may decrease as the distance from the first electrode 132 increases.

[0128] Therefore, in the light-emitting diode display device according to the third embodiment of the present disclosure, by providing the protrusion 344 on the top surface of the first bank layer 140 corresponding to the first opening 140a, the adhesive layer 150 provided on the first bank layer 140 can be easily divided into a first part 152 and a second part 154.

[0129] Reference will be made to Figures 6A to 6K A method of manufacturing a light-emitting diode display device according to the third embodiment of the present disclosure will be described in detail.

[0130] Figures 6A to 6K is a schematic cross-sectional view of the light-emitting diode display device in the steps of manufacturing the light-emitting diode display device according to the third embodiment of the present disclosure, showing a cross-section corresponding to the line I-I' of Figure 2 and will be described together with reference to Figure 2

[0131] In Figure 6A , a light-blocking layer 121 may be formed on the substrate 110 by depositing a conductive material and patterning it by a photolithography process. A buffer layer 112 may be formed on the light-blocking layer 121 by depositing an inorganic insulating material over substantially the entire surface of the substrate 110. Then, a semiconductor layer 122 may be formed on the buffer layer 112 by depositing a semiconductor material and patterning it by a photolithography process. The semiconductor layer 122 may overlap the light-blocking layer 121.

[0132] Next, a gate insulating layer 114 may be formed on the semiconductor layer 122 by depositing an inorganic insulating material over substantially the entire surface of the substrate 110, and the gate insulating layer 114 and the buffer layer 112 may be selectively removed by a photolithography process to form a contact hole exposing the light-blocking layer 121.

[0133] Then, a gate electrode 123 and an auxiliary electrode 124 may be formed on the gate insulating layer 114 by depositing a conductive material and patterning it by a photolithography process. The gate electrode 123 may overlap the semiconductor layer 122, and the auxiliary electrode 124 may be in contact with the light-blocking layer 121 through the contact holes formed in the gate insulating layer 114 and the buffer layer 112.

[0134] ​Next, a first interlayer insulating layer 116 can be formed over the gate electrode 123, the auxiliary electrode 124, and the gate insulating layer 114 by depositing an inorganic insulating material. A signal line 125 can be formed over the first interlayer insulating layer 116 by depositing a conductive material and patterning it by a photolithography process. The signal line 125 can overlap with the gate electrode 123.

[0135] Then, a second interlayer insulating layer 118 can be formed over the signal line 125 and the first interlayer insulating layer 116 by depositing an inorganic insulating material, and the second interlayer insulating layer 118 can be patterned by a photolithography process to form a contact hole exposing the signal line 125. Additionally, the first interlayer insulating layer 116 and the gate insulating layer 114 can also be patterned together with the second interlayer insulating layer 118 to form a contact hole exposing the semiconductor layer 122.

[0136] Next, a source electrode 126, a drain electrode 127, an auxiliary line 128, and a power line 129 can be formed over the second interlayer insulating layer 118 by depositing a conductive material and patterning it by a photolithography process.

[0137] The source electrode 126 and the drain electrode 127 can be spaced apart from each other, with the gate electrode 125 positioned therebetween. The source electrode 126 and the drain electrode 127 can overlap with the semiconductor layer 122 and can be in contact with two end portions of the semiconductor layer 122 through contact holes provided in the first interlayer insulating layer 116, the second interlayer insulating layer 118, and the gate insulating layer 114.

[0138] The semiconductor layer 122, the gate electrode 123, the source electrode 126, and the drain electrode 127 can constitute a thin film transistor TR.

[0139] The auxiliary line 128 can be provided between the source electrode 126 and the drain electrode 127. The auxiliary line 128 can overlap with the signal line 125 and can be in contact with the signal line 125 through a contact hole provided in the second interlayer insulating layer 118.

[0140] The power line 129 can be spaced apart from the thin film transistor TR and the auxiliary line 128.

[0141] Next, in Figure 6B a passivation layer 120 can be formed over the source electrode 126, the drain electrode 127, the auxiliary line 128, the power line 129, and the second interlayer insulating layer 118 by applying an organic insulating material, and the passivation layer 120 can be patterned by a photolithography process to form a contact hole exposing the drain electrode 127 and the power line 129.

[0142] Then, a first electrode 132 and a connection electrode 134 can be formed on the passivation layer 120 by depositing a conductive material and patterning it through a photolithography process. The first electrode 132 can be in contact with the drain electrode 127 through a contact hole provided in the passivation layer 120, and the connection electrode 134 can be in contact with the power line 129 through a contact hole provided in the passivation layer 120.

[0143] Next, in Figure 6C a first bank layer 140 having a first opening 140a and a protrusion 344 can be formed on the first electrode 132 and the connection electrode 134 by applying an organic insulating material or resin including black particles and patterning it through a photolithography process. The first opening 140a can expose the first electrode 132, and the protrusion 344 can be provided on the top end of the first opening 140a. Here, a side surface 142 of the first bank layer 140 corresponding to the first opening 140a can have a substantially normal inclination and can have an inclination angle less than 90 degrees with respect to the substrate 110.

[0144] At the same time, a contact hole exposing the connection electrode 134 can also be formed together with the first opening 140a.

[0145] Next, in Figure 6D a bonding layer 150 can be formed on the first bank layer 140. For example, the bonding layer 150 can be formed by laminating an anisotropic conductive film (ACF) in which a plurality of conductive balls are dispersed in an insulating base member.

[0146] In this case, the bonding layer 150 can be spaced apart from the first electrode 132, thereby providing a gap between the bonding layer 150 and the first electrode 132. In addition, the bonding layer 150 can protrude convexly along the shape of the protrusion 344.

[0147] Next, in Figure 6E an element substrate 166 provided with a light-emitting element 160 can be disposed above the bonding layer 150 and spaced apart from the bonding layer 150. In this case, a surface of the element substrate 166 on which the light-emitting element 160 is provided can face the bonding layer 150. For example, the distance between the bonding layer 150 and the element substrate 166 can be 50 μm to 100 μm.

[0148] At the same time, the distance between the bonding layer 150 and the first electrode 132 can be less than the distance between the bonding layer 150 and the element substrate 166. For example, the distance between the bonding layer 150 and the first electrode 132 can be several μm.

[0149] Then, the light-emitting element 160 can be detached from the element substrate 166 by irradiating a laser beam 192 from an upper portion of the element substrate 166.

[0150] Next, in Figure 6F , the light-emitting element 160 separated from the element substrate 166 can contact the adhesive layer 150 on the first electrode 132, and the adhesive layer 150 can be divided into a first portion 152 on the first electrode 132 and a second portion 154 on the first bank layer 140 by the light-emitting element 160, so that the first portion 152 separated from the second portion 154 can be transferred together with the light-emitting element 160 onto the first electrode 132.

[0151] In this case, since the gap between the adhesive layer 150 and the first electrode 132 reduces the impact on the light-emitting element 160, the light-emitting element 160 can be placed on the first electrode 132 without being damaged.

[0152] Here, the first element electrode 162 of the light-emitting element 160 can contact the first portion 152 of the adhesive layer 150.

[0153] Next, in Figure 6G , the adhesive layer 150 can be partially removed corresponding to the connection electrode 134 by irradiating the substrate 110 on which the light-emitting element 160 is transferred with a laser beam 194.

[0154] Next, in Figure 6H , the mechanism 196 can be disposed above the light-emitting element 160, and heat and pressure can be applied to the light-emitting element 160. Therefore, the first element electrode 162 of the light-emitting element 160 can be electrically connected to the first electrode 132 through the first portion 152 of the adhesive layer 150.

[0155] Next, in Figure 6I , a first protective layer 170 can be formed on the light-emitting element 160 and the adhesive layer 150 by applying an organic insulating material, and then the first protective layer 170 can be patterned by a photolithography process to form a contact hole 170a exposing the connection electrode 134. The contact hole 170a can also be provided in the adhesive layer 150 and the first bank layer 140.

[0156] Here, the top surface of the first protective layer 170 can be substantially flush with the top surface of the light-emitting element 160.

[0157] Next, in Figure 6J , a second electrode 172 can be formed on the first protective layer 170 by depositing a conductive material and patterning it by a photolithography process. The second electrode 172 can contact the second element electrode 164 of the light-emitting element 160. The second electrode 172 can also contact the connection electrode 134 through the contact hole 170a of the first protective layer 170, and can be electrically connected to the power line 129 through the connection electrode 134.

[0158] Next, in Figure 6K a second bank layer 180 having a second opening 180a can be formed on the second electrode 172 by applying an organic insulating material or resin including black particles and patterning it by a photolithography process. The second opening 180a can expose the second electrode 172 corresponding to the first opening 140a.

[0159] Then, a second protective layer 182 can be formed on the second bank layer 180 by applying an organic insulating material.

[0160] Therefore, in the method of manufacturing a light-emitting diode display device according to the third embodiment of the present disclosure, the first bank layer 140 can be disposed between the first electrode 132 and the adhesive layer 150, thereby forming a gap between the first electrode 132 and the adhesive layer 150. The light-emitting element 160 disposed on the element substrate 166 can be directly transferred onto the substrate 110 on which the thin-film transistor TR is disposed through the adhesive layer 150. Therefore, the manufacturing time and cost can be reduced by simplifying the transfer process, and the transfer failure of the light-emitting element 160 can be prevented by reducing the impact on the light-emitting element 160.

[0161] In this case, by providing the protrusion 344 to the first bank layer 140, the first portion 152 of the adhesive layer 150 in contact with the light-emitting element 160 can be easily separated from the second portion 154 of the adhesive layer 150 on the first bank layer 140.

[0162] Meanwhile, the steps of manufacturing a light-emitting diode display device according to the third embodiment of the present disclosure can be similarly applied to the light-emitting diode display devices according to the first embodiment and the second embodiment.

[0163] In the light-emitting diode display device of the present disclosure, by directly transferring the light-emitting element from the element substrate to the substrate of the display device, the manufacturing process can be simplified, and thus the manufacturing time and cost can be reduced.

[0164] In addition, the impact on the light-emitting element can be reduced, and thus the transfer failure of the light-emitting element can be prevented.

[0165] Therefore, the manufacturing process of the light-emitting diode display device can be optimized, thereby reducing the production energy.

[0166] It will be apparent to those skilled in the art that various modifications and variations can be made to the display device of the present disclosure without departing from the technical idea or scope of the present disclosure. Therefore, the present disclosure is intended to cover the modifications and variations of the present disclosure.

Claims

1. A light emitting diode display device, comprising: substrate; a first electrode over the substrate; a first bank layer on the first electrode and having a first opening exposing the first electrode; an adhesive layer including a first portion on the first electrode exposed through the first opening; as well as a light emitting element disposed on the first portion of the adhesive layer, The first portion has a side surface provided with a plurality of uneven portions.

2. The light emitting diode display device according to claim 1, wherein: The adhesive layer further includes a second portion on the first bank layer, and The second portion is separated from the first portion and has a side surface provided with a plurality of uneven portions.

3. The light emitting diode display device according to claim 1, wherein: The first bank layer has a protrusion protruding upward from a top surface of the first bank layer corresponding to the first opening.

4. The light emitting diode display device according to claim 3, wherein: The width of the protrusion decreases as the distance from the top surface of the first bank layer increases.

5. The light emitting diode display device according to claim 1, wherein: A width of the first opening decreases as a distance from the first electrode increases.

6. The light emitting diode display device according to claim 1, wherein: The width of the first opening increases as the distance from the first electrode increases.

7. The light emitting diode display device according to claim 1, wherein: The first bank layer includes black particles.

8. The light emitting diode display device according to any one of claims 1 to 7, further comprising: an electric field line disposed between the substrate and the first bank layer; as well as A second electrode is on the light emitting element and is electrically connected to the electric force line.

9. The light emitting diode display device according to claim 8, wherein: The light emitting element includes a first element electrode electrically connected to the first electrode through the first portion and a second element electrode in contact with the second electrode.

10. The light emitting diode display device according to claim 9, further comprising: a first protective layer disposed between the adhesive layer and the second electrode; a second bank layer on the second electrode and having a second opening corresponding to the first opening; as well as A second protective layer is on the second bank layer.

11. A method for manufacturing a light emitting diode display device, the method comprising: forming a first electrode on the first substrate; forming a first bank layer on the first electrode and having a first opening exposing the first electrode; forming an adhesive layer on the first bank layer; as well as transferring a light emitting element onto the adhesive layer corresponding to the first electrode, wherein the adhesive layer includes a first portion between the first electrode and the light emitting element and a second portion on the first bank layer, and The first portion is separated from the second portion and each of the first portion and the second portion has a side surface provided with a plurality of uneven portions.

12. The method according to claim 11, wherein: Forming the first bank layer includes forming a protrusion protruding upward from a top surface of the first bank layer corresponding to the first opening.

13. The method according to claim 11 or 12, wherein: Transferring the light emitting element comprises: Disposing the element substrate provided with the light emitting element to be spaced apart from the adhesive layer; The light emitting element is separated from the element substrate by irradiating the element substrate with a laser beam; By attaching the light emitting element detached from the element substrate to the adhesive layer, the adhesive layer is divided into the first portion and the second portion, and The first portion separated from the second portion is placed on the first electrode.

14. The method according to claim 13, further comprising: forming electric lines of force between the first substrate and the first bank layer; as well as A second electrode is formed on the light emitting element, wherein the second electrode is electrically connected to the electric force line.

15. The method according to claim 14, further comprising: forming a first protective layer between the adhesive layer and the second electrode; forming a second bank layer on the second electrode, wherein the second bank layer has a second opening corresponding to the first opening; as well as A second protection layer is formed on the second bank layer.