Display screen, electrostatic protection circuit and display device

By setting the ground plane to connect to the circuit board in the non-display area of the display panel, the damage problem of the electrostatic discharge of the frameless display panel to the internal devices is solved, and the electrostatic protection is achieved and the service life of the display panel is extended.

CN120255195APending Publication Date: 2025-07-04CHONGQING HKC OPTOELECTRONICS TECH CO LTD +1
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Patent Information

Application Number
CN202510397510.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-31
Publication Date
2025-07-04

AI Technical Summary

Technical Problem

When the existing frameless display panel is released electrostatically, charge causes irreversible damage to the internal devices through the lines in the display panel, affecting the display effect and service life.

Method used

Set a grounding layer in the non-display area of the display panel to make it close to the outside of the panel and connect it to the ground end of the circuit board. Static electricity is guided to the ground through the grounding layer to avoid entering the inside of the panel.

Benefits of technology

Effectively prevent static damage, ensure display quality, and extend the service life of the display screen.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the field of display, and particularly discloses a display screen, an electrostatic protection circuit and a display device.The display screen comprises a display panel and a circuit board, the display panel comprises a first substrate and a second substrate, and the first substrate and the second substrate are arranged in a box-to-box mode; the first substrate is divided into a display area and a non-display area arranged around the display area, a common line is arranged on the non-display area, a signal line is connected between the first substrate and the circuit board, and the signal line is partially located on the side, close to the display area, of the common line; a grounding layer is arranged on the side, away from the signal line, of the common line, the grounding layer is connected with the grounding end of the circuit board, and the grounding layer is used for transmitting static electricity to the grounding end of the circuit board. In this way, the problem of electrostatic damage caused by the fact that charges are conducted from the outside to the inside of the display panel is solved.
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Description

Technical Field

[0001] The present application relates to the field of displays, and in particular, to a display screen, an electrostatic protection circuit, and a display device. Background Art

[0002] ESD (Electro-Static discharge) means "electrostatic discharge". When a charged object comes into contact with a conductor, the charge will suddenly find a path through the conductor for charge release.

[0003] Due to the increasing number of borderless products on the market currently, except for the bottom border, there are no borders on the other three sides. The advantage of this is that it can make the black border at the screen edge narrower and the display effect better. However, in the actual application of the product, the human body or other objects in contact with the display product often carry high-voltage static electricity. The high-voltage static electricity outside the display panel will cause irreversible damage to each device through the circuit inside the display panel during the instant of release, thus affecting the display effect and service life of the display panel.

[0004] Therefore, how to improve the electrostatic damage caused by the conduction of charge from the outside to the inside of the display panel has become an urgent problem to be solved in this field. Summary of the Invention

[0005] The present application discloses a display screen, an electrostatic protection circuit, and a display device, aiming to improve the problem of electrostatic damage caused by the conduction of charge from the outside to the inside of the display panel.

[0006] An embodiment of the present application discloses a display screen, including a display panel and a circuit board. The display panel includes a first substrate and a second substrate. The first substrate and the second substrate are arranged in a facing manner. A display area and a non-display area surrounding the display area are defined on the first substrate. A common line is arranged on the non-display area. A signal line is connected between the first substrate and the circuit board, and a part of the signal line is located on one side of the common line close to the display area. A grounding layer is arranged on the side of the common line away from the signal line, and the grounding layer is connected to the grounding end of the circuit board. The grounding layer is used to transfer static electricity to the grounding end of the circuit board.

[0007] Optionally, a protruding portion is formed by the edge of the first substrate protruding relative to the edge of the second substrate. A light-shielding layer is arranged on the protruding portion, and the grounding layer is located between the light-shielding layer and the common line.

[0008] Optionally, a protruding portion is formed by the edge of the first substrate protruding relative to the edge of the second substrate. A light-shielding layer is arranged on the protruding portion, and the grounding layer is arranged on the light-shielding layer.

[0009] Optionally, a protruding portion is formed by the edge of the first substrate protruding relative to the edge of the second substrate. The ground layer is made of a light-shielding and conductive material, and the ground layer covers the protruding portion.

[0010] Optionally, the width of the ground layer is less than or equal to 110 um.

[0011] Optionally, the display screen further includes a chip-on-film (COF). The COF is connected between the display panel and the circuit board. A part of the signal lines is disposed on the COF. A second ground layer is disposed on the signal lines of the COF. The second ground layer is connected to the ground terminal of the circuit board, and the second ground layer is used to transfer static electricity to the ground terminal of the circuit board.

[0012] An embodiment of the present application also discloses an electrostatic protection circuit applied to the above-mentioned display screen, including: an operational amplifier, a power clamp, a PMOS transistor, a first resistor, and a plurality of second resistors. The first resistor and the second resistors have the same resistance value. The output terminal of the operational amplifier is connected to the signal output terminal through the first resistor. The gate of the PMOS transistor is connected to the power clamp. The source of the PMOS transistor is connected to the plurality of second resistors connected in parallel. The drain of the PMOS transistor is connected to the signal output terminal. The PMOS transistor together with the plurality of second resistors is connected in parallel with the first resistor. When the display panel is in the first working state, the PMOS transistor is turned on, the plurality of second resistors are connected in parallel with the first resistor, and conduction is established between the operational amplifier and the signal output terminal. When the display panel is in the second working state, the power clamp is turned on, the PMOS transistor is turned off, and only the first resistor conducts between the operational amplifier and the signal output terminal.

[0013] Optionally, the number of the second resistors is 4, and the resistance value of each second resistor is 500 ohms.

[0014] Optionally, when the display panel is in the first working state, the power clamp applies a first voltage to the PMOS transistor, the PMOS transistor is in an open state, and current passes between the source and the drain of the PMOS transistor. When the display panel is in the second working state, the power clamp applies a second voltage to the PMOS transistor, the PMOS transistor is in a turned-off state, and no current passes between the source and the drain of the PMOS transistor.

[0015] An embodiment of the present application also discloses a display device, including a housing. The display device further includes the above-mentioned display screen, and the display screen is disposed in the housing.

[0016] In this application, a grounding layer is additionally provided on the side of the common line away from the signal line within the non-display area of the display panel, that is, the grounding layer is provided outside the non-display area of the display panel, so that the grounding layer is closer to the outside of the display panel, making it easier for the grounding layer to receive the charges generated outside the display panel. The grounding layer is connected to the grounding terminal of the circuit board. When a human body or other object touches the display panel and electrostatic discharge occurs on the surface of the display panel, the charges that would originally enter the common line through the edge of the display panel will directly be conducted to the grounding terminal of the circuit board through the grounding layer at the edge and finally to the ground. In this way, the generated static electricity will not enter the interior of the display panel, thus not causing electrostatic damage to the internal components of the display panel, which is beneficial to improving the electrostatic damage caused by the charges conducting from the outside to the inside of the display panel, ensuring the display quality of the display screen, and extending the service life of the display screen. Description of the Drawings

[0017] The accompanying drawings included are used to provide a further understanding of the embodiments of the present application, which form a part of the specification, are used to illustrate the implementation manners of the present application, and together with the written description are used to explain the principles of the present application. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings. In the drawings:

[0018] Figure 1 It is a schematic diagram of the first embodiment of the display screen of the present application;

[0019] Figure 2 It is a partial top view of the first substrate in the first embodiment of the display screen of the present application;

[0020] Figure 3 It is a schematic diagram of the second embodiment of the display screen of the present application;

[0021] Figure 4 It is a schematic diagram of the third embodiment of the display screen of the present application;

[0022] Figure 5 It is a partial top view of the flip chip film in the fourth embodiment of the display screen of the present application;

[0023] Figure 6 It is a schematic diagram of an embodiment of the electrostatic protection circuit of the present application;

[0024] Figure 7 It is a schematic diagram of an embodiment of the display device of the present application.

[0025] Among them, 10 is a display device; 100 is a display screen; 110 is a display panel; 111 is a first substrate; 112 is a protruding portion; 113 is a light-shielding layer; 120 is a second substrate; 130 is a common line; 140 is a display area; 150 is a non-display area; 160 is a signal line; 170 is a ground layer; 180 is a circuit board; 190 is a chip-on-film; 171 is a second ground layer; 200 is an electrostatic protection circuit; 210 is an operational amplifier; 220 is a power clamp; 230 is a PMOS transistor; 240 is a first resistor; 250 is a second resistor; 260 is a signal output terminal; 300 is a housing. Detailed implementation manners

[0026] The present application will be described in detail below with reference to the accompanying drawings and optional embodiments. It should be noted that, on the premise of no conflict, any combination of the following-described embodiments or technical features may form a new embodiment.

[0027] Figure 1 It is a schematic diagram of the first embodiment of the display screen of the present application. Figure 2 It is a partial top view of the first substrate in the first embodiment of the display screen of the present application; as Figure 1 and Figure 2 shown, the embodiment of the present application discloses a display screen 100, including a display panel 110 and a circuit board 180. The display panel 110 includes a first substrate 111 and a second substrate 120. The first substrate 111 and the second substrate 120 are arranged in a facing manner. A display area 140 and a non-display area 150 surrounding the display area 140 are defined on the first substrate 111. A common line 130 is arranged on the non-display area 150. A signal line 160 is connected between the first substrate 111 and the circuit board 180. A part of the signal line 160 is located on one side of the common line 130 close to the display area 140; a ground layer 170 is arranged on the side of the common line 130 away from the signal line 160. The ground layer 170 is connected to the ground terminal of the circuit board 180, and the ground layer 170 is used to transfer static electricity to the ground terminal of the circuit board 180.

[0028] In the present application, a ground layer 170 is additionally provided on the side of the common line 130 away from the signal line 160 within the non-display area 150 of the display panel 110, that is, the ground layer 170 is provided outside the non-display area 150 of the display panel 110, so that the ground layer 170 is closer to the outside of the display panel 110, facilitating the ground layer 170 to more easily receive the charges generated outside the display panel 110; and the ground layer 170 is connected to the ground terminal of the circuit board 180. When a human body or other object touches the display panel 110 and electrostatic discharge occurs on the surface of the display panel 110, the charges that would originally enter the common line 130 through the edge of the display panel 110 will directly be conducted to the ground terminal of the circuit board 180 through the ground layer 170 at the edge and finally to the ground. In this way, the generated static electricity will not enter the interior of the display panel 110, thus not causing electrostatic damage to the internal components of the display panel 110, which is beneficial to improving the electrostatic damage caused by the charges being conducted from the outside to the inside of the display panel 110, ensuring the display quality of the display screen 100, and extending the service life of the display screen 100.

[0029] It should be noted that the present application mainly aims to improve the problem of electrostatic shock damage to the internal components of the display panel caused by the charges generated outside the display panel entering the interior of the display panel and the electrostatic discharge caused by the internal wiring of the display panel. This problem mainly occurs in borderless display screens. Among them, borderless display screens are divided into two categories: with side coating glue and without side coating glue. Side coating glue means sealing three sides of the screen with insulating glue. However, some display screens do not have side coating glue according to user requirements and for specific design reasons; secondly, in order to avoid edge light leakage in such borderless display screens without side coating glue, usually in the two substrates arranged in a pair, one substrate forms an outward expansion relative to the other substrate, and the black matrix of the substrate is used to shield the edge. Because there is no side coating glue and the substrate expands outward, when performing an ESD (electrostatic discharge) test, the charges will be conducted to the common line through the expanded substrate, and then the common line will arc to the signal output end of the driving chip in the flip chip film bonding area, and finally enter the interior of the driving chip from the signal output end of the driving chip, resulting in irreversible electrostatic damage to the display screen.

[0030] Based on the above problems, the present application designs the position of the ground layer 170 in the display screen 100, and the specific improvements are as follows:

[0031] The edge of the first substrate 111 protrudes relative to the edge of the second substrate 120 to form a protruding portion 112, a light-shielding layer 113 is provided on the protruding portion 112, and the ground layer 170 is located between the light-shielding layer 113 and the common line 130.

[0032] This embodiment takes the display panel 110 with substrate expansion as an example. Among them, when the display panel 110 is a liquid crystal display panel 110, the first substrate 111 can be a color filter substrate, and the second substrate 120 can be an array substrate. By making the edge of the first substrate 111 protrude relative to the edge of the second substrate 120 to form a protruding portion 112, the first substrate 111 is expanded relative to the second substrate 120, and a light-shielding layer 113 is provided on the protruding portion 112 to improve the edge light leakage phenomenon that occurs in the display panel 110 without side glue application.

[0033] And between the light-shielding layer 113 of the first substrate 111 and the common line 130, a grounding layer 170 is arranged around the periphery of the first substrate 111. Among them, the light-shielding layer 113 can be made of the same material as the black matrix layer on the first substrate 111. The additionally provided grounding layer 170 can be an additional copper trace or copper layer around the periphery of the first substrate 111. This copper trace or copper layer is connected to the common ground inside the entire display panel 110 at the same layer position as the light-shielding layer 113 and the common line 130. Then, the common ground in the display panel 110 is connected to the common ground of the circuit board 180 through the common ground trace of the circuit board 180. In this way, a complete common ground is formed between the inside of the display panel 110 and the circuit board 180, and the grounding end of the circuit board 180 can be understood as the common ground of the driving chips and components on the circuit board 180.

[0034] And because the grounding layer 170 is closer to the edge of the first substrate 111, the position where it is located is more likely to receive charges generated outside the display screen 100; when electrostatic discharge occurs on the surface of the display screen 100, since the grounding layer 170 forms a barrier to charges between the light-shielding layer 113 and the common line 130, the charges that would originally enter the common line 130 through the edge of the expanded first substrate 111 will directly be conducted to the grounding end of the circuit board 180 through the edge grounding layer 170 and finally to the ground. In this way, the generated static electricity will not enter the inside of the display panel 110, thus not causing electrostatic damage to the internal devices of the display panel 110, which is beneficial to improving the electrostatic damage caused by charges being conducted from outside the display panel 110 to the inside, ensuring the display quality of the display screen 100, and prolonging the service life of the display screen 100. In addition, since the light-shielding layer 113, the grounding layer 170, and the common line 130 are on the same layer, it is easier to fabricate the grounding layer 170, which is beneficial to simplifying the manufacturing process and reducing the manufacturing cost.

[0035] Furthermore, in order to ensure that it does not affect the normal display of the display area 140 of the display panel 110 and to meet the assembly of the whole-machine mechanical components, the present application also designs the size of the grounding layer 170 as follows:

[0036] The width of the grounding layer 170 is less than or equal to 110 um. Since in the display panel 110 of this embodiment, the color filter substrate is slightly larger than the array substrate to ensure uniform light transmission. Generally, the color filter substrate extends outward by about 60 um, while the array substrate shrinks inward by about 50 um to avoid affecting the pixel arrangement and signal transmission in the display area 140. At this time, the total width is 110 um. Therefore, in the non-display area 150, the available extra space is approximately 110 um (60 um + 50 um); when the grounding layer 170 is less than or equal to 110 um, it can be better arranged within this space, so that the assembly of the whole machine product can be satisfied without affecting the display area 140 of the display panel 110.

[0037] Figure 3 Schematic diagram of the second embodiment of the display screen of the present application, as Figure 3 shown, the edge of the first substrate 111 protrudes relative to the edge of the second substrate 120 to form a protruding portion 112. A light-shielding layer 113 is provided on the protruding portion 112, and the grounding layer 170 is provided on the light-shielding layer 113.

[0038] The difference between this embodiment and the previous embodiment is that in this embodiment, the grounding layer 170 is provided on the light-shielding layer 113, so that the grounding layer 170 is directly located at the edge position outside the display panel 110, so that the grounding layer 170 can more easily receive the charges generated outside the display panel 110; and, since the grounding layer 170 is directly provided on the light-shielding layer 113, there is no need to additionally provide space for the grounding layer 170 inside the display panel 110, which is beneficial to improving the utilization rate of the internal space of the display panel 110.

[0039] When a human body or other object touches the display panel 110 and electrostatic discharge occurs on the surface of the display panel 110, the charges that would originally enter the common line 130 through the edge of the display panel 110 will be directly conducted to the grounding end of the circuit board 180 through the grounding layer 170 at the edge and finally to the ground, so that the generated static electricity will not enter the inside of the display panel 110, thus not causing electrostatic damage to the internal components of the display panel 110, which is beneficial to improving the electrostatic damage caused by the conduction of charges from the outside to the inside of the display panel 110, ensuring the display quality of the display screen 100, and extending the service life of the display screen 100.

[0040] Figure 4 Schematic diagram of the third embodiment of the display screen of the present application, as Figure 4 shown, the edge of the first substrate 111 protrudes relative to the edge of the second substrate 120 to form a protruding portion 112. The grounding layer 170 is made of a light-shielding and conductive material, and the grounding layer 170 covers the protruding portion 112.

[0041] The difference between this embodiment and the previous one is that, in this embodiment, the grounding layer 170 is made of a light-shielding and conductive material, and the grounding layer 170 directly replaces the light-shielding layer 113 provided on the protruding portion 112 of the first substrate 111. In this embodiment, the grounding layer 170 can not only block light and improve the light leakage phenomenon at the edge of the display panel 110, but also prevent the problem that the electrostatic discharge outside the display panel 110 damages the components inside the display panel 110.

[0042] When a human body or other object touches the display panel 110 and electrostatic discharge occurs on the surface of the display panel 110, the charge that would originally enter the common line 130 through the edge of the display panel 110 will directly be conducted to the grounding end of the circuit board 180 through the grounding layer 170 at the edge and finally to the ground. In this way, the generated static electricity will not enter the inside of the display panel 110, thus not causing electrostatic damage to the internal components of the display panel 110, which is beneficial to improving the electrostatic damage caused by the conduction of charge from the outside to the inside of the display panel 110, ensuring the display quality of the display screen 100, and prolonging the service life of the display screen 100.

[0043] Furthermore, during the product design process, it was found that generally, the flip-chip film with a heat sink sticker has stronger antistatic ability than the one without a heat sink sticker. By analyzing its principle: when the heat sink sticker is applied, a parasitic capacitance is formed between the heat sink sticker and the signal output terminal trace of the original driving chip. The existence of this capacitance can slow down the charge impact when the charge enters the driving chip through the signal output terminal, avoiding direct electrostatic damage to the driving chip due to the charge storage characteristic of the capacitance; however, the cost of the heat sink sticker itself is relatively high. Therefore, if it is only for improving the protection ability against electrostatic discharge and adding it to a product that does not require a heat sink sticker, it is an unnecessary waste. Based on the above problems, the present application also makes improvements to the display screen, and the specific improvements are as follows:

[0044] Figure 5 It is a partial top view schematic diagram of the flip-chip film in the fourth embodiment of the display screen of the present application. As Figure 5 shown, the display screen 100 further includes a flip-chip film 190. The flip-chip film 190 is connected between the display panel 110 and the circuit board 180. A part of the signal lines 160 are arranged on the flip-chip film 190. A second grounding layer 171 is arranged on the signal lines 160 of the flip-chip film 190. The second grounding layer 171 is connected to the grounding end of the circuit board 180. The second grounding layer 171 is used to transfer static electricity to the grounding end of the circuit board 180.

[0045] In this embodiment, by disposing a second ground layer 171 on the signal line 160 of the flip chip film 190, and arranging the second ground layer 171 perpendicular to the signal line 160 of the flip chip film 190, and the signal line 160 of the flip chip film 190 is connected to the signal output terminal 260 of the driving chip, a parasitic capacitance is formed between the signal line 160 of the flip chip film 190 and the second ground layer 171. The existence of this capacitance can slow down the charge impact when the charge enters the driving chip through the signal output terminal 260 due to the charge storage characteristic of the capacitance, avoiding the driving chip being directly damaged by static electricity. And through the cooperation of the second ground layer 171 and the first ground layer 170, two lines of defense for static electricity protection are formed. In this way, even if the charge enters the interior of the display panel 110, it is not easy to cause static electricity damage to the internal components of the display panel 110.

[0046] In addition, the present application also designs a circuit for static electricity protection for the above-mentioned display panel 110. The specific circuit improvement is as follows:

[0047] Figure 6 It is a schematic diagram of an embodiment of the static electricity protection circuit of the present application. As Figure 6 shown, the embodiment of the present application also discloses a static electricity protection circuit 200, which is applied to the above-mentioned display screen 100 and includes: an operational amplifier 210, a power clamp 220, a PMOS transistor 230, a first resistor 240, and a plurality of second resistors 250. The resistance values of the first resistor 240 and the second resistors 250 are the same; the output terminal of the operational amplifier 210 is connected to the signal output terminal 260 through the first resistor 240; the gate of the PMOS transistor 230 is connected to the power clamp 220, the source of the PMOS transistor 230 is connected to the plurality of second resistors 250 connected in parallel, and the drain of the PMOS transistor 230 is connected to the signal output terminal 260; the PMOS transistor 230 together with the plurality of second resistors 250 is connected in parallel with the first resistor 240; when the display panel 110 is in the first working state, the PMOS transistor 230 is turned on, the plurality of second resistors 250 are connected in parallel with the first resistor 240, and are turned on between the operational amplifier 210 and the signal output terminal 260; when the display panel 110 is in the second working state, the power clamp 220 is turned on, the PMOS transistor 230 is turned off, and only the first resistor 240 is turned on between the operational amplifier and the signal output terminal 260.

[0048] In this embodiment, by disposing the static electricity protection circuit 200 in the display panel 110, and realizing the switching of the static electricity protection circuit 200 by the display panel 110 in different states, the static electricity protection circuit 200 can protect the display panel 110 when static electricity is released in the display panel 110, thereby improving the anti-static release ability of the display panel 110 and extending the service life of the display panel 110.

[0049] Among them, the first working state of the display panel 110 can be understood as the state when there is no electrostatic discharge in the display panel 110, and the second working state can be understood as the state when there is an electrostatic discharge phenomenon in the display panel 110.

[0050] When the display panel 110 is in the first working state, it indicates that there is no electrostatic discharge phenomenon in the display panel 110 at this time, and the display panel 110 displays normally. At this time, the power clamp 220 is not turned on, the gate voltage of the PMOS transistor 230 is relatively low, so that the PMOS transistor 230 is turned on, and multiple second resistors 250 are connected in parallel with the first resistor 240 to form a low-resistance path, so that the normal display of the display panel 110 is not affected.

[0051] When the display panel 110 is in the second working state, it indicates that the display panel 110 is impacted by electrostatic discharge. At this time, the power clamp 220 will sense an increase in voltage and quickly turn on. After the power clamp 220 is turned on, it will pull up the gate voltage of the PMOS transistor 230 to turn off the PMOS transistor 230. In this way, only the first resistor 240 conducts between the operational amplifier 210 and the signal output terminal 260 to provide a relatively high-resistance path. Finally, the charge that wants to pass through the signal output terminal 260 is blocked by the first resistor 240, so that the impact of electrostatic discharge on the circuit can be effectively reduced, which is beneficial to extending the service life of the display panel 110.

[0052] Specifically, when the display panel 110 is in the first working state, the power clamp 220 applies a first voltage to the PMOS transistor 230, and the PMOS transistor 230 is in the open state, and there is current passing between the source and drain of the PMOS transistor 230; when the display panel 110 is in the second working state, the power clamp 220 applies a second voltage to the PMOS transistor 230, and the PMOS transistor 230 is in the off state, and there is no current passing between the source and drain of the PMOS transistor 230.

[0053] Among them, the voltage value of the first voltage is less than that of the second voltage. It can be understood that the first voltage is a low voltage and the second voltage is a high voltage. The power supply clamp 220 will monitor the voltage change in real time. Once it detects that the voltage exceeds the preset threshold, it will be immediately activated and control its switching state by changing the gate voltage of the PMOS transistor 230. Usually, there is a voltage comparator inside the power supply clamp 220. When the voltage exceeds the set value, the voltage comparator will output a high-level signal, increasing the gate voltage of the PMOS transistor 230, thereby turning off the PMOS transistor 230. By controlling the turn-off or turn-on of the PMOS transistor 230 through the power supply clamp 220, the entire circuit is controlled to switch between a low resistance and a high resistance, ensuring the normal display of the display panel 110 in the case of low resistance and enabling a quick response to electrostatic shock in the case of high resistance, thereby effectively protecting circuit components in different working states.

[0054] When the display panel 110 is in the first working state, that is, when the display panel 110 is in the normal display state, at this time, there is no electrostatic discharge in the display panel 110. At this time, the power supply clamp 220 applies a lower first voltage to the PMOS transistor 230, and the PMOS transistor 230 is in the on state. The current will flow through the source and drain of the PMOS transistor 230 through multiple parallel-connected second resistors 250. At this time, the multiple second resistors 250 together with the PMOS transistor 230 form a parallel connection with the first resistor 240, forming a low-resistance path, so that the normal display of the display panel 110 is not affected.

[0055] When the display panel 110 is in the second working state, that is, when there is electrostatic discharge in the display panel 110, at this time, the power supply clamp 220 applies a higher second voltage to the PMOS transistor 230, making the gate of the PMOS transistor 230 change from a low potential to a high potential. At this time, the PMOS transistor 230 is in the off state, and the current cannot pass between the source and drain of the PMOS transistor 230. In the entire electrostatic protection circuit 200, only the first resistor 240 forms a conduction path. Since the resistance value of the first resistor 240 is larger than the resistance value after the multiple second resistors 250 are connected in parallel with the first resistor 240, the charge generated by the electrostatic discharge in the circuit can be effectively blocked, thus effectively improving the electrostatic protection ability in the circuit, and further protecting the display panel 110 from being damaged by electrostatic shock, which is beneficial to improving the service life of the display panel 110.

[0056] In the original driving chip circuit design, the output voltage of the operational amplifier 210 passes through a current-limiting resistor to the signal output terminal 260 and is output to the in-plane of the display panel 110. However, since the output of the signal output terminal 260 determines whether the in-plane charging of the display panel 110 is full, which directly determines the display effect of the display panel 110. Therefore, within the same charging time, considering the need to make the charging full without causing the problem of electromagnetic interference due to overly concentrated charging energy, the resistor connected in series in the circuit is generally 100Ω. However, the series-connected 100Ω resistor is only the resistance value of the series resistor when the display panel 110 is normally displaying, far from meeting the requirements of electrostatic discharge protection. Therefore, in order to meet the electrostatic protection requirements in the circuit, the present application also designs the resistor in the circuit as follows:

[0057] The number of the second resistors 250 is 4, and the resistance value of each second resistor 250 is 500 ohms.

[0058] In this embodiment, after paralleling 4 second resistors 250 with a resistance of 500Ω each and connecting them to the PMOS transistor 230, then the 4 second resistors 250 with a resistance of 500Ω each together with the PMOS transistor 230 are paralleled with the first resistor 240; and then the original power clamp 220 inside the driving chip is used as a switch to control the PMOS transistor 230. During the normal display process of the display panel 110, 5 resistors with a resistance of 500Ω are connected through a PMOS transistor 230 to form a parallel circuit, and the parallel resistance is 100Ω, so that the normal display of the display panel 110 is not affected; but when electrostatic discharge occurs, first, the power clamp 220 will conduct, making the gate of the PMOS transistor 230 change from a low potential to a high potential. At this time, the PMOS transistor 230 is turned off, and the remaining 4 second resistors 250 cannot form a parallel connection. Finally, 1 first resistor 240 with a resistance of 500Ω blocks the charge generated by the electrostatic discharge that wants to pass through the signal output terminal 260, so that the influence of electrostatic discharge on the circuit can be effectively reduced, which is beneficial to extending the service life of the display panel 110.

[0059] Figure 7 It is a schematic diagram of an embodiment of the display device of the present application. As Figure 7 shown, the present application embodiment also discloses a display device 10, including a housing 300. The display device 10 further includes the above-mentioned display screen 100, and the display screen 100 is arranged inside the housing 300. The housing 300 is used to protect the display screen 100 from being easily damaged by external forces, and to prevent external moisture or dust from entering the inside of the display screen 100 to a certain extent, so as to prevent corrosion or damage to the electrical components inside the display screen 100, which is beneficial to extending the service life of the display device 10.

[0060] The display device 10 of the present application is mainly a borderless display device 10, which has a borderless display screen 100, such as a borderless monitor, a borderless TV, etc.

[0061] When a human body or other object touches the borderless display device 10, it is easy to directly contact the display screen 100. The static electricity generated by the human body or the contacting object on the display screen 100 of the display device 10 is likely to enter the interior of the display screen 100, thereby damaging the electrical components inside the display screen 100 and affecting the quality of the display device 10.

[0062] To address the above problems, the present application has improved the display screen 100 in the display device 10. The present application additionally provides a grounding layer 170 on the side of the common line 130 away from the signal line 160 within the non-display area 150 of the display panel 110, that is, a grounding layer 170 is provided outside the non-display area 150 of the display panel 110, making the grounding layer 170 closer to the outside of the display panel 110 so that the grounding layer 170 can more easily receive the charges generated outside the display panel 110; the grounding layer 170 is connected to the grounding terminal of the circuit board 180. When a human body or other object touches the display panel 110 and static electricity is released on the surface of the display panel 110, the charges that would originally enter the common line 130 through the edge of the display panel 110 will directly be conducted to the grounding terminal of the circuit board 180 through the edge grounding layer 170 and finally to the ground. In this way, the generated static electricity will not enter the interior of the display panel 110, thus not causing static damage to the internal components of the display panel 110, which is beneficial to improving the static damage caused by the conduction of charges from outside the display panel 110 to the inside, ensuring the display quality of the display screen 100, extending the service life of the display screen 100, and further improving the quality of the display device 10.

[0063] It should be noted that the inventive concept of the present application can form a very large number of embodiments. However, due to the limited space of the application documents, it is impossible to list them all. Therefore, on the premise of no conflict, the above-described embodiments or technical features can be arbitrarily combined to form new embodiments. After the combination of each embodiment or technical feature, the original technical effect will be enhanced.

[0064] The above content is a further detailed description of the present application in combination with specific optional implementation manners. It cannot be determined that the specific implementation of the present application is only limited to these descriptions. For those of ordinary skill in the technical field to which the present application belongs, without departing from the concept of the present application, several simple deductions or substitutions can still be made, which should all be regarded as belonging to the protection scope of the present application.

Claims

1. A display screen, comprising a display panel and a circuit board, the display panel comprising a first substrate and a second substrate, the first substrate and the second substrate being arranged in a facing manner, a display area being defined on the first substrate and a non-display area being arranged around the display area, characterized in that, A common line is provided on the non-display area, and a signal line is connected between the first substrate and the circuit board. A part of the signal line is located on a side of the common line close to the display area. A ground layer is provided on a side of the common line away from the signal line. The ground layer is connected to a ground terminal of the circuit board, and the ground layer is configured to transfer static electricity to the ground terminal of the circuit board.

2. The display screen according to claim 1, characterized in that, A protrusion is formed by the edge of the first substrate protruding relative to the edge of the second substrate. A light-shielding layer is provided on the protrusion, and the ground layer is located between the light-shielding layer and the common line.

3. The display screen according to claim 1, characterized in that, A protrusion is formed by the edge of the first substrate protruding relative to the edge of the second substrate. A light-shielding layer is provided on the protrusion, and the ground layer is provided on the light-shielding layer.

4. The display screen according to claim 1, wherein, A protrusion is formed by the edge of the first substrate protruding relative to the edge of the second substrate. The ground layer is made of a light-shielding and conductive material, and the ground layer covers the protrusion.

5. The display screen according to any one of claims 1 to 4, characterized in that, The width of the ground layer is less than or equal to 110 um.

6. The display screen according to claim 5, wherein The display screen further includes a chip-on-film. The chip-on-film is connected between the display panel and the circuit board. A part of the signal line is provided on the chip-on-film. A second ground layer is provided on the signal line of the chip-on-film. The second ground layer is connected to the ground terminal of the circuit board, and the second ground layer is configured to transfer static electricity to the ground terminal of the circuit board.

7. An electrostatic protection circuit is applied to the display screen according to any one of claims 1 to 6, and is characterized in that Comprising: An operational amplifier, a power clamp, a PMOS transistor, a first resistor, and a plurality of second resistors. The first resistor and the second resistors have the same resistance value. The output terminal of the operational amplifier is connected to the signal output terminal through the first resistor. The gate of the PMOS transistor is connected to the power clamp. The source of the PMOS transistor is connected to the plurality of second resistors connected in parallel. The drain of the PMOS transistor is connected to the signal output terminal. The PMOS transistor together with the plurality of second resistors is connected in parallel with the first resistor. When the display panel is in the first working state, the PMOS transistor is turned on, the plurality of second resistors are connected in parallel with the first resistor, and are turned on between the operational amplifier and the signal output terminal. When the display panel is in the second working state, the power clamp is turned on, the PMOS transistor is turned off, and only the first resistor is turned on between the operational amplifier and the signal output terminal.

8. The electrostatic protection circuit according to claim 7, wherein, The number of the second resistors is 4, and the resistance value of each second resistor is 500 ohms.

9. The electrostatic protection circuit according to claim 8, wherein When the display panel is in the first working state, the power clamp applies a first voltage to the PMOS transistor, the PMOS transistor is in an open state, and a current passes between the source and the drain of the PMOS transistor. When the display panel is in the second working state, the power clamp applies a second voltage to the PMOS transistor, the PMOS transistor is in a turned-off state, and no current passes between the source and the drain of the PMOS transistor.

10. A display device, comprising a housing, characterized in that, The display device further includes the display screen according to any one of claims 1 to 9. The display screen is disposed in a housing.