Array substrate, display panel and display device

Abstract

The invention discloses an array substrate, a display panel and a display device. The array substrate comprises a substrate; the plurality of grid lines and the plurality of data lines are arranged on the substrate in a different-layer crossing manner; the pixel electrodes are located in areas defined by the grid lines and the data lines, and the length of the pixel electrodes in the extending direction of the grid lines is larger than the length of the pixel electrodes in the extending direction of the data lines; the pixel electrode comprises a plurality of domain regions, and the plurality of domain regions form at least two groups arranged along the extension direction of the grid line and at least one group arranged along the extension direction of the data line; the first shading structures extend in the extending direction of the grid lines, and the first shading structures are arranged in gaps of adjacent groups arranged in the extending direction of the data lines and / or are arranged on the edge sides, arranged in the extending direction of the data lines, of the pixel electrodes.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to an array substrate, a display panel, and a display device. Background Art

[0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD) has the characteristics of small volume, low power consumption, high image quality, no radiation, and convenient carrying. In recent years, it has developed rapidly and has gradually replaced the traditional Cathode Ray Tube display (CRT), occupying a dominant position in the current flat panel display market. Currently, TFT-LCD has been widely used in various products of different sizes, covering almost all major electronic products in today's information society, such as liquid crystal TVs, high-definition digital TVs, computers (desktop and notebook), mobile phones, tablet computers, navigators, in-vehicle displays, projection displays, cameras, digital cameras, electronic watches, calculators, electronic instruments, meters, public displays, and virtual displays, etc. Summary of the Invention

[0003] Embodiments of the present disclosure provide an array substrate, a display panel, and a display device to improve the color deviation problem existing in the prior art.

[0004] Embodiments of the present disclosure provide an array substrate, a display panel, and a display device. The specific solutions are as follows:

[0005] In some embodiments, an array substrate provided by embodiments of the present disclosure includes:

[0006] A substrate;

[0007] A plurality of gate lines and a plurality of data lines, which are arranged in a cross-layer manner on the substrate;

[0008] A plurality of pixel electrodes, located in the regions defined by the plurality of gate lines and the plurality of data lines. The length of the pixel electrode in the extending direction of the gate line is greater than the length in the extending direction of the data line; the pixel electrode includes a plurality of domain regions, and the plurality of domain regions form at least two groups arranged in the extending direction of the gate line and at least one group arranged in the extending direction of the data line;

[0009] A plurality of first light-shielding structures, the first light-shielding structures extending in the extending direction of the gate line, and the first light-shielding structures are disposed at the gaps between adjacent groups arranged in the extending direction of the data line, and / or, disposed on the edge sides of the pixel electrode arranged in the extending direction of the data line.

[0010] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, the plurality of domain regions include a first domain region, a second domain region, a third domain region, and a fourth domain region that are sequentially arranged along the extending direction of the gate line.

[0011] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, it further includes a plurality of second light-shielding structures. The pixel electrode includes a connecting portion connecting the second domain region and the third domain region, and the orthographic projection of the second light-shielding structure on the substrate overlaps with the orthographic projection of the connecting portion on the substrate.

[0012] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, the pixel electrode includes a first slit located between the first domain region and the second domain region, and a second slit located between the third domain region and the fourth domain region.

[0013] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, the area of the first domain region is the same as the area of the second domain region, the area of the third domain region is the same as the area of the fourth domain region, and the ratio of the area of the first domain region to the area of the third domain region is 1:1.5 to 1:2.5.

[0014] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, the pretilt angle of the liquid crystal in the first domain region is opposite to the pretilt angle of the liquid crystal in the second domain region, the pretilt angle of the liquid crystal in the third domain region is opposite to the pretilt angle of the liquid crystal in the fourth domain region, and the absolute value of the pretilt angle of the liquid crystal in the first domain region is greater than the absolute value of the pretilt angle of the liquid crystal in the third domain region.

[0015] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, the absolute value of the pretilt angle of the liquid crystal in the first domain region is 40° to 50°, and the absolute value of the pretilt angle of the liquid crystal in the third domain region is 32° to 42°.

[0016] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, the pretilt angle of the liquid crystal in the first domain region is complementary to the pretilt angle of the liquid crystal in the second domain region, the pretilt angle of the liquid crystal in the third domain region is opposite to the pretilt angle of the liquid crystal in the first domain region, and the pretilt angle of the liquid crystal in the fourth domain region is opposite to the pretilt angle of the liquid crystal in the second domain region.

[0017] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, the pretilt angle of the liquid crystal in the first domain region is 40° to 50°.

[0018] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, the pixel electrode is connected to the gate line;

[0019] The multiple domain regions include a first domain region, a second domain region, a third domain region, and a fourth domain region. Among them, the first domain region and the second domain region are arranged along the extending direction of the gate line, the third domain region and the fourth domain region are arranged along the extending direction of the gate line, the first domain region and the third domain region are arranged along the extending direction of the data line, the second domain region and the fourth domain region are arranged along the extending direction of the data line, and the first domain region and the second domain region are located on the side of the gate line where the third domain region and the fourth domain region are close to the pixel electrode for electrical connection.

[0020] In some embodiments, in the above-mentioned array substrate provided by the embodiments of the present disclosure, the pretilt angle of the liquid crystal in the first domain region is opposite to the pretilt angle of the liquid crystal in the second domain region, the pretilt angle of the liquid crystal in the third domain region is opposite to the pretilt angle of the liquid crystal in the fourth domain region, and the absolute value of the pretilt angle of the liquid crystal in the first domain region is less than the absolute value of the pretilt angle of the liquid crystal in the third domain region.

[0021] In some embodiments, in the above-mentioned array substrate provided by the embodiments of the present disclosure, the absolute value of the pretilt angle of the liquid crystal in the first domain region is 32° - 42°, and the absolute value of the pretilt angle of the liquid crystal in the third domain region is 40° - 50°.

[0022] In some embodiments, in the above-mentioned array substrate provided by the embodiments of the present disclosure, it further includes a plurality of third light-shielding structures, and the third light-shielding structures overlap with the edges of the pixel electrodes arranged along the extending direction of the gate line in the direction perpendicular to the substrate.

[0023] In some embodiments, in the above-mentioned array substrate provided by the embodiments of the present disclosure, the pixel electrode includes a first pixel electrode, a second pixel electrode, and a third pixel electrode that are sequentially arranged in a cycle along the extending direction of the data line;

[0024] Among the pixel electrodes arranged in the same row along the extending direction of the data line:

[0025] The first pixel electrode and the third pixel electrode in the same cycle period are connected to the data line on one side of the row of pixel electrodes, and the second pixel electrode is connected to the data line on the other side of the row of pixel electrodes;

[0026] The two first pixel electrodes in two adjacent cycle periods are respectively connected to the data lines on both sides of the row of pixel electrodes, the two second pixel electrodes are respectively connected to the data lines on both sides of the row of pixel electrodes, and the two third pixel electrodes are respectively connected to the data lines on both sides of the row of pixel electrodes.

[0027] Based on the same inventive concept, embodiments of the present disclosure provide a display panel, including the above-mentioned array substrate provided by embodiments of the present disclosure, and a counter substrate disposed opposite to the array substrate.

[0028] In some embodiments, in the above-mentioned display panel provided by embodiments of the present disclosure, the counter substrate includes a common electrode.

[0029] Based on the same inventive concept, embodiments of the present disclosure provide a display device, including the above-mentioned display panel provided by embodiments of the present disclosure.

[0030] The beneficial effects of the present disclosure are as follows:

[0031] The array substrate, display panel, and display device provided by embodiments of the present disclosure include a substrate; a plurality of gate lines and a plurality of data lines, which are arranged in different layers and cross each other on the substrate; a plurality of pixel electrodes located in the area defined by the plurality of gate lines and the plurality of data lines, and the length of the pixel electrode in the extending direction of the gate line is greater than the length in the extending direction of the data line; the pixel electrode includes a plurality of domain regions, and the plurality of domain regions form at least two groups arranged in the extending direction of the gate line and at least one group arranged in the extending direction of the data line; a plurality of first light-shielding structures, the first light-shielding structures extend in the extending direction of the gate line, and the first light-shielding structures are disposed at the gaps between adjacent groups arranged in the extending direction of the data line, and / or are disposed at the edge sides of the pixel electrode arranged in the extending direction of the data line. At the gaps between adjacent groups of domain regions and at the edges of the pixel electrode, the liquid crystal orientation is disordered, resulting in brightness differences at different viewing angles, and there is a color shift phenomenon when the observer views from the side. By using the first light-shielding structures to block the gaps between adjacent groups of domain regions and the edges of the pixel electrode arranged in the extending direction of the data line, the observer can view the first light-shielding structures instead of the liquid crystal with disordered orientation when viewing from the side, thereby effectively improving the side-view color shift defect caused by brightness differences. Description of the Drawings

[0032] Figure 1 Shown is a schematic structural diagram of an array substrate provided by embodiments of the present disclosure;

[0033] Figure 2 Shown is a schematic structural diagram of a sub-pixel provided by embodiments of the present disclosure;

[0034] Figure 3 Shown is another schematic structural diagram of a sub-pixel provided by embodiments of the present disclosure;

[0035] Figure 4 Shown is another schematic structural diagram of a sub-pixel provided by embodiments of the present disclosure;

[0036] Figure 5 Shown is another schematic structural diagram of a sub-pixel provided by embodiments of the present disclosure;

[0037] Figure 6 Another structural schematic diagram of a sub-pixel provided by an embodiment of the present disclosure;

[0038] Figure 7 Another structural schematic diagram of a sub-pixel provided by an embodiment of the present disclosure;

[0039] Figure 8 Sub-pixel structural schematic diagram of a comparative example provided by an embodiment of the present disclosure;

[0040] Figure 9 Gamma curve graph provided by an embodiment of the present disclosure. Detailed implementation manners

[0041] To make the objectives, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It should be noted that in the drawings, the thicknesses of layers, films, panels, regions, etc. are enlarged for clarity. In the present disclosure, exemplary embodiments are described with reference to cross-sectional views which are schematic views of idealized embodiments. Thus, deviations from the shapes of the figures as a result of, for example, manufacturing techniques and / or tolerances are to be expected. Accordingly, the embodiments described in the present disclosure should not be construed as limited to the specific shapes of the regions shown in the present disclosure, but include deviations in shapes resulting from, for example, manufacturing. For example, regions illustrated or described as flat may typically have rough and / or non-linear features; sharp corners illustrated may be rounded, etc. Thus, the regions shown in the figures are schematic in nature, and their dimensions and shapes are not intended to illustrate the exact shape of the regions, do not reflect true proportions, and are only intended to schematically illustrate the content of the present disclosure. Also, the same or similar reference numerals throughout denote the same or similar elements or elements having the same or similar functions. To keep the following description of the embodiments of the present disclosure clear and concise, detailed descriptions of known functions and known components are omitted in the present disclosure.

[0042] Unless otherwise defined, technical terms or scientific terms used herein shall have the ordinary meanings as understood by those of ordinary skill in the art to which this disclosure pertains. The terms "first", "second" and similar terms used in the specification and claims of this disclosure do not denote any order, quantity or importance, but are only used to distinguish different components. Words such as "comprising" or "including" mean that the elements or items appearing before this word cover the elements or items listed after this word and their equivalents, without excluding other elements or items. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Terms such as "inner", "outer", "upper", "lower", etc. are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0043] In the following description, when an element or layer is referred to as being "on" or "connected to" another element or layer, the element or layer can be directly on the other element or layer, directly connected to the other element or layer, or there may be intermediate elements or intermediate layers. When an element or layer is referred to as being "disposed on one side of" another element or layer, the element or layer can be directly on one side of the other element or layer, directly connected to the other element or layer, or there may be intermediate elements or intermediate layers. However, when an element or layer is referred to as being "directly on" another element or layer or "directly connected to" another element or layer, there are no intermediate elements or intermediate layers. The term "and / or" includes any and all combinations of one or more of the related listed items.

[0044] Multi-domain display can divide different regions within a sub-pixel. The deflection degrees of liquid crystals in different regions are different. When viewing the liquid crystal display screen from different angles, the comprehensive effect of the deflection of liquid crystals in each region is seen. Thus, the contrast difference at different angles caused by the same deflection of all liquid crystals within the pixel is reduced, and further color shift is reduced and the viewing angle is increased.

[0045] However, the liquid crystal orientation is disordered (including vertical states, etc.) between domains and at the edges of pixel electrodes. When the observer views from the left and right side views, the angle formed by the line of sight and the long axis direction of the liquid crystal changes, the Δnd (i.e., the optical path difference between ordinary light and extraordinary light) value of the liquid crystal changes, and the brightness also changes accordingly. Therefore, there is a color shift phenomenon when the observer views from the side.

[0046] In order to improve the above-mentioned color shift defect existing in the related art, the embodiments of the present disclosure provide an array substrate, a display panel and a display device. Figure 1 The following shows a schematic structural diagram of the array substrate provided by the embodiments of the present disclosure. Figures 2 to 7Schematic diagrams of the structures of a subpixel provided by embodiments of the present disclosure respectively. It consists of Figures 1 to 7 As can be seen, the array substrate provided by embodiments of the present disclosure includes:

[0047] A substrate 101, which can be a substrate allowing visible light to pass through, such as made of glass, quartz, plastic, etc.

[0048] Multiple gate lines 102 and multiple data lines 103, which are arranged in different layers and cross each other on the substrate 101 to define multiple subpixel regions SPX (including but not limited to a red subpixel region R, a green subpixel region G, and a blue subpixel region B). Optionally, the subpixel region SPX includes an opening region O for transmitting backlight. Optionally, the material used for the gate line 102 may include metals such as molybdenum (Mo), aluminum (Al), titanium (Ti), chromium (Cr), nickel (Ni), etc. In some embodiments, the layer where the gate line 102 is located can be a single-layer structure or a stacked structure. Exemplarily, the layer where the gate line 102 is located is a single-layer structure composed of a molybdenum metal layer. The material used for the data line 103 may include metals such as molybdenum (Mo), aluminum (Al), titanium (Ti), chromium (Cr), nickel (Ni), etc. In some embodiments, the layer where the data line 103 is located can be a single-layer structure or a stacked structure. Exemplarily, the layer where the data line 103 is located is a stacked structure composed of a titanium metal layer / an aluminum metal layer / a titanium metal layer.

[0049] Multiple pixel electrodes 104, located in the region defined by the multiple gate lines 102 and the multiple data lines 103 (i.e., the subpixel region SPX). The pixel electrode 104 is connected to the gate line 102 and the data line 103 through a transistor TFT. The length of the pixel electrode 104 along the gate line extension direction X is greater than the length along the data line extension direction Y. In other words, the pixel electrode 104 is horizontally arranged. The material of the pixel electrode 104 includes at least one of indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), and gallium zinc oxide (GZO). Optionally, the pixel electrode 104 includes multiple domain regions (such as a first domain region D1 to a fourth domain region D4). The multiple domain regions (such as the first domain region D1 to the fourth domain region D4) form at least two groups arranged along the gate line extension direction X and at least one group arranged along the data line extension direction Y.

[0050] Exemplarily, Figure 2 and Figure 7 has two groups of domain regions along the gate line extension direction X. Among them, the first domain region D1 and the third domain region D3 are the first group of domain regions, and the second domain region D2 and the fourth domain region D4 are the second group of domain regions. Figure 2 has two groups of domain regions along the data line extension direction Y. Among them, the first domain region D1 and the second domain region D2 are the first group of domain regions, and the third domain region D3 and the fourth domain region D4 are the second group of domain regions.

[0051] In Figures 3 to 6 there are four sets of domain regions along the extending direction X of the gate lines. Specifically, the first domain region D1 to the fourth domain region D4 are each a set of domain regions; Figures 3 to 6 there is one set of domain regions along the extending direction Y of the data lines. Specifically, the first domain region D1 to the fourth domain region D4 are arranged side by side to form one set of domain regions;

[0052] A plurality of first light-shielding structures 105 can be provided on the same layer and made of the same material as the gate lines 102 and / or the data lines 103. In this disclosure, the case where the first light-shielding structure 105 is on the same layer and made of the same material as the gate lines 102 is taken as an example for illustration; in some embodiments, the first light-shielding structure 105 extends along the extending direction X of the gate lines, and the first light-shielding structure 105 is provided at the gap between adjacent sets arranged along the extending direction Y of the data lines (as shown in Figure 2 and Figure 7 ), and / or is provided at the edge side of the pixel electrodes 104 arranged along the extending direction Y of the data lines (as shown in Figures 3 to 6 ). For example, in Figure 3 and Figure 4 , the first light-shielding structure 105 is provided at the upper and lower edge sides of the pixel electrodes 104, and in Figure 5 and Figure 6 , the first light-shielding structure 105 is provided at the lower edge side of the pixel electrodes 104.

[0053] In the above-mentioned array substrate provided by the embodiments of the present disclosure, by using the first light-shielding structure 105 to block the gap between adjacent sets of the domain regions arranged along the extending direction Y of the data lines and the edge of the pixel electrodes 104 arranged along the extending direction Y of the data lines, it can be ensured that what the observer views from the side is the first light-shielding structure 105 rather than the liquid crystal with disordered alignment. Therefore, the side-view color shift defect caused by the brightness difference due to the disorder of the liquid crystal molecules can be effectively improved.

[0054] Figure 8 This is the sub-pixel structure of the comparative example provided by the embodiments of the present disclosure, and the alignment layer corresponding to this sub-pixel is fabricated by the UV2A process. Figure 9 This is the gamma curve provided by the embodiments of the present disclosure. Among them, REF_0° represents the 0° front-view gamma curve of the array substrate including the sub-pixels shown in Figure 8 , REF_60° represents the 60° side-view gamma curve of the array substrate including the sub-pixels shown in Figure 8 , Example 1_60° represents the 60° side-view gamma curve of the array substrate including the sub-pixels shown in Figure 2 , Example 2_60° represents the 60° side-view gamma curve of the array substrate including the sub-pixels shown in Figure 3 , and Example 3_60° represents the 60° side-view gamma curve of the array substrate including the sub-pixels shown in Figure 4The gamma curve of the 60° side view of the array substrate of the sub-pixels shown, Example 4_60° indicates including Figure 6 The gamma curve of the 60° side view of the array substrate of the sub-pixels shown.

[0055] In Figure 9 , the closer the gamma curve of the 60° side view is to the gamma curve of the 0° front view, the less obvious the color shift is. Comparing Figure 9 the multiple gamma curves shown, generally speaking, compared with the gamma curve of the REF_60° side view, the gamma curves of the 60° side view of Embodiments 1 to 4 of the present disclosure are closer to the gamma curve of the REF_0° front view. Therefore, the present disclosure can effectively improve the color shift.

[0056] In addition, since the edge side of the pixel electrode 104 and the adjacent group gaps where the domain regions are arranged along the data line extension direction Y are dark stripe regions, setting the first light shielding structure 105 on the edge side of the pixel electrode 104 and / or the adjacent group gaps where the domain regions are arranged along the data line extension direction Y will not affect the light transmittance.

[0057] In some embodiments, multiple domain regions (such as the first domain region D1 to the fourth domain region D4) can be aligned through an alignment layer. The alignment layer can be fabricated using the UV2A (ultraviolet light alignment) process or the SUVA (ultra-fine light alignment) process; compared with the UV2A technology, the exposure method of its upgraded version, the SUVA process, can further improve the light transmittance and has better response time performance and color shift characteristics. Optionally, Figure 2 and Figure 7 the alignment layer corresponding to the sub-pixels shown is fabricated using the UV2A process, Figures 3 to 6 the alignment layer corresponding to the sub-pixels shown is fabricated using the SUVA process.

[0058] In some embodiments, the first light shielding structure 105 can be set floating, that is, without loading any signal; or, the first light shielding structure 105 is loaded with a common voltage signal (Vcom). Optionally, in Figure 2 and Figure 7 , the first light shielding structure 105 can overlap with the middle part of the pixel electrode 104 extending along the gate line extension direction X to form a storage capacitor (Cst); in Figures 3 to 6 , the first light shielding structure 105 can overlap with the edge of the pixel electrode 104 extending along the gate line extension direction X to form a storage capacitor (Cst); the storage capacitor (Cst) can effectively hold the voltage of the pixel electrode 102 until the next frame update.

[0059] In some embodiments, in the above array substrate provided by the embodiments of the present disclosure, as Figures 3 to 6As shown, the first domain region D1, the second domain region D2, the third domain region D3, and the fourth domain region D4 of the pixel electrode 102 are arranged in sequence from left to right in the gate line extending direction X.

[0060] In some embodiments, Figure 4 the liquid crystal molecules between the second domain region D2 and the third domain region D3 will be affected by the orientations of both the second domain region D2 and the third domain region D3 simultaneously, resulting in disorder and the appearance of dark streaks. Therefore, brightness differences will also occur at different viewing angles here, forming a color shift defect. Optionally, a second light-shielding structure 106 can be provided between the second domain region D2 and the third domain region D3 to block it, preventing the disordered liquid crystal from being observed and presenting a color shift phenomenon.

[0061] Based on this, as Figure 4 shown, the array substrate may further include a second light-shielding structure 106. The pixel electrode 104 includes a connecting portion 104' connecting the second domain region D2 and the third domain region D3. The orthographic projection of the second light-shielding structure 106 on the substrate 101 overlaps with the orthographic projection of the connecting portion 104' on the substrate 101. For example, the orthographic projection of the second light-shielding structure 106 on the substrate 101 is located within the orthographic projection of the connecting portion 104' on the substrate 101. Moreover, by disposing the second light-shielding structure 106 within the region where the connecting portion 104' is located, the influence of the second light-shielding structure 106 on the light transmittance can also be avoided. Figure 4 Compared with Figure 3 the main difference is the addition of the second light-shielding structure 106. As can be seen from Figure 9 the corresponding Figure 3 gamma curve embodiment 2_60° of Figure 4 and the corresponding Figure 4 gamma curve embodiment 3_60° of Figure 3 it can be seen that the gamma curve embodiment 3_60° corresponding to

[0062] is closer to the gamma curve of REF_0° than the gamma curve embodiment 2_60° corresponding to Figures 3 to 6 showing a better color shift improvement effect.

[0063] In some embodiments, as Figures 3 to 5 shown, to improve the light transmittance, the pixel electrode 104 may include a first slit SL1 located between the first domain region D1 and the second domain region D2, and a second slit SL2 located between the third domain region D3 and the fourth domain region D4.

[0063] In some embodiments, as Figures 3 to 5 shown, the areas of the first domain region D1, the second domain region D2, the third domain region D3, and the fourth domain region D4 may be the same. In other embodiments, to further improve the color shift, as Figure 6As shown, it can also be achieved by adjusting the area ratio of the four domain regions. For example, the area of the first domain region D1 is the same as that of the second domain region D2, and the area of the third domain region D3 is the same as that of the fourth domain region D4. The ratio of the area of the first domain region D1 to the area of the third domain region D3 is 1:1.5 to 1:2.5. Optionally, the ratio of the area of the first domain region D1 to the area of the third domain region D3 is 1:1.5, 1:2, 1:2.5, etc. Figure 6 The main difference from Figure 3 is that the area ratio of the four domain regions is different. As shown by Figure 9 the corresponding Figure 3 gamma curve of Embodiment 2_60°, and the corresponding Figure 6 gamma curve of Embodiment 4_60° as shown by Figure 6 it can be seen that the gamma curve of Embodiment 4_60° corresponding to Figure 3 is closer to the gamma curve of REF_0° than the gamma curve of Embodiment 2_60° corresponding to

[0064] It should be noted that in the embodiments provided in the present disclosure, due to process conditions or other factors such as measurement, "the same area" may be exactly equal or there may be some deviations (such as a deviation of ±5%). Therefore, as long as the relationship of "the same area" between relevant features meets the error tolerance, it falls within the protection scope of the present disclosure.

[0065] The liquid crystal molecules between the domain regions will be affected by the orientation of the domain regions on both sides at the same time and become disordered, resulting in dark stripes. To reduce the width of the dark stripes and improve color deviation, in the Figure 3 embodiment shown, the pretilt angle of the liquid crystal in the first domain region D1 can be complementary to the pretilt angle of the liquid crystal in the second domain region D2, the pretilt angle of the liquid crystal in the third domain region D3 is opposite to the pretilt angle of the liquid crystal in the first domain region D1, and the pretilt angle of the liquid crystal in the fourth domain region D4 is opposite to the pretilt angle of the liquid crystal in the second domain region D2. For example, the pretilt angle of the liquid crystal in the first domain region D1 is 40° to 50°. Optionally, the pretilt angle of the liquid crystal in the first domain region D1 is 45°, the pretilt angle of the liquid crystal in the second domain region D2 is 135°, the pretilt angle of the liquid crystal in the third domain region D3 is -45°, and the pretilt angle of the liquid crystal in the fourth domain region D4 is -135°. In the Figure 5 embodiment shown, the pretilt angle of the liquid crystal in the first domain region D1 can be opposite to the pretilt angle of the liquid crystal in the second domain region D2, the pretilt angle of the liquid crystal in the third domain region D3 is opposite to the pretilt angle of the liquid crystal in the fourth domain region D4, and the absolute value of the pretilt angle of the liquid crystal in the first domain region D1 is greater than the absolute value of the pretilt angle of the liquid crystal in the third domain region D3. Optionally, in the Figure 5In the illustrated embodiment, the absolute value of the pretilt angle of the liquid crystal in the first domain region D1 is 40° to 50°, and the absolute value of the pretilt angle of the liquid crystal in the third domain region D3 is 32° to 42°; in some embodiments, the pretilt angle of the liquid crystal in the first domain region D1 is 45°, the pretilt angle of the liquid crystal in the second domain region D2 is -45°, the pretilt angle of the liquid crystal in the third domain region D3 is 37°, and the pretilt angle of the liquid crystal in the fourth domain region D4 is -37°, or the pretilt angle of the liquid crystal in the first domain region D1 is -45°, the pretilt angle of the liquid crystal in the second domain region D2 is 45°, the pretilt angle of the liquid crystal in the third domain region D3 is -37°, and the pretilt angle of the liquid crystal in the fourth domain region D4 is 37°.

[0066] In some embodiments, Figure 4 and Figure 6 In the illustrated embodiment, the pretilt angles of the liquid crystal in the four domain regions may be Figure 3 the pretilt angles of the liquid crystal in the four domain regions shown in the illustrated embodiment, or Figure 5 the pretilt angles of the liquid crystal in the four domain regions shown in the illustrated embodiment, and the present disclosure does not make specific limitations. Additionally, Figures 3 to 6 it can be seen that the pixel electrode 104 is a slit electrode, and the slit orientation thereof (equivalent to the orientation of the strip-shaped electrodes between the slits) in the four domain regions may be the same as the pretilt angle of the liquid crystal in the corresponding domain regions.

[0067] In some embodiments, in the above-described array substrate provided by the embodiments of the present disclosure, in addition to being arranged in sequence from left to right along the gate line extension direction X as Figures 3 to 6 shown, such as Figure 2 and Figure 7 shown, it is also possible to arrange the first domain region D1 and the second domain region D2 along the gate line extension direction X, arrange the third domain region D3 and the fourth domain region D4 along the gate line extension direction X, arrange the first domain region D1 and the third domain region D3 along the data line extension direction Y, arrange the second domain region D2 and the fourth domain region D4 along the data line extension direction Y, and the first domain region D1 and the second domain region D2 are located on the side of the gate line 102 close to the pixel electrode 104 where the third domain region D3 and the fourth domain region D4 are electrically connected, that is, the first domain region D1 is located in the upper left corner, the second domain region D2 is located in the upper right corner, the third domain region D3 is located in the lower left corner, and the fourth domain region D4 is located in the lower right corner.

[0068] Optionally, to reduce the width of the dark streaks (equivalent to the region where the liquid crystal molecules are disordered) and reduce the color shift defect, in Figure 2 and Figure 7 the illustrated embodiment, it is possible to set the pretilt angle of the liquid crystal in the first domain region D1 to be opposite to the pretilt angle of the liquid crystal in the second domain region D2, the pretilt angle of the liquid crystal in the third domain region D3 to be opposite to the pretilt angle of the liquid crystal in the fourth domain region D4, and the absolute value of the pretilt angle of the liquid crystal in the first domain region D1 to be less than the absolute value of the pretilt angle of the liquid crystal in the third domain region D3. Optionally, in Figure 2 and Figure 7In the illustrated embodiment, the absolute value of the pretilt angle of the liquid crystal in the first domain region D1 is 32° to 42°, and the absolute value of the pretilt angle of the liquid crystal in the third domain region D3 is 40° to 50°; in some embodiments, the pretilt angle of the liquid crystal in the first domain region D1 is 37°, the pretilt angle of the liquid crystal in the second domain region D2 is -37°, the pretilt angle of the liquid crystal in the third domain region D3 is 45°, and the pretilt angle of the liquid crystal in the fourth domain region D4 is -45°, or the pretilt angle of the liquid crystal in the first domain region D1 is -37°, the pretilt angle of the liquid crystal in the second domain region D2 is 37°, the pretilt angle of the liquid crystal in the third domain region D3 is -45°, and the pretilt angle of the liquid crystal in the fourth domain region D4 is 45°.

[0069] Continue to refer to Figure 2 and Figure 7 It can be seen that Figure 2 in [reference], the pixel electrode 104 is a block electrode, Figure 7 in [reference], the pixel electrode 104 is a slit electrode. Optionally, Figure 7 in [reference], the slit orientation of the pixel electrode 104 in the four domain regions (equivalent to the orientation of the strip electrodes between the slits) can be the same as the pretilt angle of the liquid crystal in the corresponding domain regions.

[0070] In some embodiments, in the above-mentioned array substrate provided by the embodiments of the present disclosure, as Figures 2 to 7 shown, it may further include a plurality of third light-shielding structures 107. The third light-shielding structures 107 overlap with the edges (i.e., the left and right edges) of the pixel electrode 104 arranged along the gate line extension direction X in the direction perpendicular to the substrate 101, so that the third light-shielding structures 107 and the pixel electrode 104 form a storage capacitor (Cst), which is beneficial to effectively maintaining the voltage of the pixel electrode 102 until the next frame update.

[0071] Optionally, the third light-shielding structure 107 is loaded with a common voltage signal, and as Figures 3 to 6 shown, the third light-shielding structure 107 can be connected to the first light-shielding structure 105 provided on the edge side (i.e., the upper and lower edges of the pixel electrode 104) of the pixel electrode 104 extending along the data line 103 direction (for example, integrally formed), so as to improve the uniformity of the common voltage signal. To further improve the uniformity of the common voltage signal, as Figures 5 to 7 shown, the adjacent third light-shielding structures 107 arranged in the gate line extension direction X can be integrally formed, and the adjacent third light-shielding structures 107 arranged in the data line extension direction Y can be electrically connected through a transfer electrode 108 formed of the same layer and the same material as the pixel electrode 104.

[0072] In some embodiments, as Figure 2 shown, the third light-shielding structure 107 can also be connected to the first light-shielding structure 105 in the lateral middle region of the pixel electrode 104 (for example, integrally formed). Of course, the third light-shielding structure 107 can also be physically isolated from the first light-shielding structure 105; asFigure 4 As shown, the first light-shielding structure 105 at the upper and lower edges of the pixel electrode 104 may be connected to the second light-shielding structure 106 in the longitudinal middle region of the pixel electrode 104 (for example, integrally provided). Of course, the second light-shielding structure 106 may also be physically isolated from the first light-shielding structure 105, and the present disclosure does not make specific limitations.

[0073] In some embodiments, the array substrate provided by the present disclosure may be Figure 1 the three-gate pixel architecture as shown. At this time, the pixel electrode 104 may include a first pixel electrode 1041 (for example, corresponding to the red sub-pixel R), a second pixel electrode 1042 (for example, corresponding to the green sub-pixel G), and a third pixel electrode 1043 (for example, corresponding to the blue sub-pixel B) that are arranged in a cyclic order along the data line extension direction Y in sequence; among the pixel electrodes 104 in the same row arranged along the data line extension direction Y: the first pixel electrode 1041 and the third pixel electrode 1043 in the same cycle period T are connected to the data line 103 (for example, the left data line 103) on one side of the row of pixel electrodes 104, and the second pixel electrode 1042 is connected to the data line 103 (for example, the right data line 103) on the other side of the row of pixel electrodes 104; the two first pixel electrodes 1041 in two adjacent cycle periods T are respectively connected to the data lines 103 on both sides of the row of pixel electrodes 104, the two second pixel electrodes 1042 are respectively connected to the data lines 103 on both sides of the row of pixel electrodes 104, and the two third pixel electrodes 1043 are respectively connected to the data lines 103 on both sides of the row of pixel electrodes 104.

[0074] Based on the same inventive concept, an embodiment of the present disclosure provides a display panel, including an array substrate and an opposing substrate that face each other, wherein the array substrate is the above-mentioned array substrate provided by the embodiment of the present disclosure. Since the principle of solving problems of this display panel is similar to that of the above-mentioned array substrate, therefore, the implementation of this display panel may refer to the embodiment of the above-mentioned array substrate, and the repeated parts will not be described again.

[0075] In some embodiments, in the above display panel provided by the embodiments of the present disclosure, the counter substrate includes a black matrix that covers the area outside the opening region; optionally, the counter substrate further includes a common electrode located on the side of the black matrix facing the array substrate, and the common electrode can be disposed across the entire display area. Additionally, a liquid crystal layer can be provided between the array substrate and the counter substrate. A first alignment layer can be provided on the side of the array substrate facing the counter substrate, a first polarizer can be provided on the side of the array substrate away from the counter substrate, a second alignment layer can be provided on the side of the counter substrate away from the array substrate, and a second polarizer can be provided on the side of the counter substrate away from the array substrate. Among them, both the first alignment layer and the second alignment layer can align the liquid crystal molecules in multiple domain regions, and the polarization direction of the first polarizer is perpendicular to the polarization direction of the second polarizer. Other essential components in the display panel should be understood by those of ordinary skill in the art and will not be elaborated here, nor should they be regarded as a limitation to the present disclosure.

[0076] Based on the same inventive concept, the embodiments of the present disclosure provide a display device, including the above display panel provided by the embodiments of the present disclosure, and a backlight module located on the light incident side of the display panel. The backlight module can be a direct-lit backlight module or an edge-lit backlight module. Optionally, the edge-lit backlight module can include a light bar, a reflective sheet, a light guide plate, a diffusion sheet, a prism group, etc. that are stacked, and the light bar is located on one side in the thickness direction of the light guide plate. The direct-lit backlight module can include a matrix light source, a reflective sheet, a diffusion plate, a brightness enhancement film, etc. that are stacked on the light output side of the matrix light source. The reflective sheet includes openings that are disposed opposite to the positions of the respective lamp beads in the matrix light source. The lamp beads in the light bar and the lamp beads in the matrix light source can be light-emitting devices (LEDs), such as quantum dot light-emitting devices (QLEDs), micro light-emitting devices (such as Mini LEDs, Micro LEDs), etc.

[0077] Among them, micro light-emitting devices in the sub-millimeter scale or even the micrometer scale, like organic light-emitting devices (OLEDs), belong to self-luminous devices. Similar to organic light-emitting devices, they have a series of advantages such as high brightness, ultra-low latency, and a large viewing angle. And because inorganic light-emitting devices emit light based on metal semiconductors with more stable properties and lower resistance, they have the advantages of lower power consumption, better resistance to high and low temperatures, and longer service life compared to organic light-emitting devices that emit light based on organic substances. Moreover, when micro light-emitting devices are used as backlights, a more precise dynamic backlight effect can be achieved, effectively improving the screen brightness and contrast while also solving the glare phenomenon caused by traditional dynamic backlights between bright and dark areas of the screen, and optimizing the visual experience.

[0078] In some embodiments, the display device provided by the embodiments of the present disclosure may be: a projector, a 3D printer, a virtual reality device, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, a smart watch, a fitness bracelet, a personal digital assistant, or any product or component with a display function. Optionally, the display device provided by the present disclosure includes, but is not limited to: a radio frequency unit, a network module, an audio output & input unit, a sensor, a display unit, a user input unit, an interface unit, and a control chip, etc. Optionally, the control chip is a central processing unit, a digital signal processor, a system on chip (SoC), etc. For example, the control chip may further include a memory, and may further include a power module, etc., and realizes the power supply and signal input / output functions through additionally provided wires, signal lines, etc. For example, the control chip may further include a hardware circuit and computer-executable code, etc. The hardware circuit may include conventional very large scale integration (VLSI) circuits or gate arrays, and existing semiconductors such as logic chips, transistors, or other discrete components; the hardware circuit may also include a field programmable gate array, a programmable array logic, a programmable logic device, etc. In addition, those skilled in the art can understand that the above structure does not constitute a limitation on the display device provided by the embodiments of the present disclosure. In other words, the display device provided by the embodiments of the present disclosure may include more or fewer of the above components, or combine some components, or have different component arrangements.

[0079] Although the preferred embodiments of the present disclosure have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications falling within the scope of the present disclosure.

[0080] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if these modifications and variations of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalent technologies, the present disclosure is also intended to include these modifications and variations.

Claims

1. An array substrate, characterized in that, Comprising: A substrate; A plurality of gate lines and a plurality of data lines, which are arranged in different layers and cross each other on the substrate; A plurality of pixel electrodes located within the region defined by the plurality of gate lines and the plurality of data lines, wherein the length of the pixel electrode in the extending direction of the gate line is greater than the length in the extending direction of the data line; the pixel electrode includes a plurality of domain regions, and the plurality of domain regions form at least two groups arranged in the extending direction of the gate line and at least one group arranged in the extending direction of the data line; A plurality of first light-shielding structures, which extend in the extending direction of the gate line, and the first light-shielding structures are disposed at the gaps between adjacent groups arranged in the extending direction of the data line, and / or are disposed on the edge side of the pixel electrode arranged in the extending direction of the data line.

2. The array substrate according to claim 1, wherein The plurality of domain regions include a first domain region, a second domain region, a third domain region, and a fourth domain region arranged in sequence along the extending direction of the gate line.

3. The array substrate according to claim 2, wherein Further comprising a plurality of second light-shielding structures, the pixel electrode includes a connecting portion connecting the second domain region and the third domain region, and the orthographic projection of the second light-shielding structure on the substrate overlaps with the orthographic projection of the connecting portion on the substrate.

4. The array substrate according to claim 2, wherein The pixel electrode includes a first slit located between the first domain region and the second domain region, and a second slit located between the third domain region and the fourth domain region.

5. The array substrate according to any one of claims 2 to 4, characterized in that, The area of the first domain region is the same as the area of the second domain region, the area of the third domain region is the same as the area of the fourth domain region, and the ratio of the area of the first domain region to the area of the third domain region is 1:1.5 to 1:2.

5.

6. The array substrate according to any one of claims 2 to 4, characterized in that, The pretilt angle of the liquid crystal in the first domain region is opposite to the pretilt angle of the liquid crystal in the second domain region, the pretilt angle of the liquid crystal in the third domain region is opposite to the pretilt angle of the liquid crystal in the fourth domain region, and the absolute value of the pretilt angle of the liquid crystal in the first domain region is greater than the absolute value of the pretilt angle of the liquid crystal in the third domain region.

7. The array substrate according to claim 6, wherein, The absolute value of the pretilt angle of the liquid crystal in the first domain region is 40° to 50°, and the absolute value of the pretilt angle of the liquid crystal in the third domain region is 32° to 42°.

8. The array substrate according to any one of claims 2 to 4, characterized in that, The pretilt angle of the liquid crystal in the first domain region is complementary to the pretilt angle of the liquid crystal in the second domain region, the pretilt angle of the liquid crystal in the third domain region is opposite to the pretilt angle of the liquid crystal in the first domain region, and the pretilt angle of the liquid crystal in the fourth domain region is opposite to the pretilt angle of the liquid crystal in the second domain region.

9. The array substrate according to claim 8, wherein, The pretilt angle of the liquid crystal in the first domain region is 40° to 50°.

10. The array substrate according to claim 1, wherein The pixel electrode is connected to the gate line; The plurality of domain regions include a first domain region, a second domain region, a third domain region, and a fourth domain region. Among them, the first domain region and the second domain region are arranged in the extending direction of the gate line, the third domain region and the fourth domain region are arranged in the extending direction of the gate line, the first domain region and the third domain region are arranged in the extending direction of the data line, the second domain region and the fourth domain region are arranged in the extending direction of the data line, and the first domain region and the second domain region are located on the side of the third domain region and the fourth domain region close to the gate line to which the pixel electrode is electrically connected.

11. The array substrate according to claim 10, wherein, The pretilt angle of the liquid crystal in the first domain region is opposite to that in the second domain region, the pretilt angle of the liquid crystal in the third domain region is opposite to that in the fourth domain region, and the absolute value of the pretilt angle of the liquid crystal in the first domain region is less than the absolute value of the pretilt angle of the liquid crystal in the third domain region.

12. The array substrate according to claim 11, wherein The absolute value of the pretilt angle of the liquid crystal in the first domain region is 32° to 42°, and the absolute value of the pretilt angle of the liquid crystal in the third domain region is 40° to 50°.

13. The array substrate according to any one of claims 1 to 4, 7, and 9 to 12, characterized in that, It further includes a plurality of third light-shielding structures, and the third light-shielding structures overlap with the edges of the pixel electrodes arranged along the gate line extension direction in a direction perpendicular to the substrate.

14. The array substrate according to any one of claims 1 to 4, 7, and 9 to 12, characterized in that The pixel electrode includes a first pixel electrode, a second pixel electrode, and a third pixel electrode that are sequentially arranged in a cycle along the data line extension direction; Among the pixel electrodes arranged in the same row along the data line extension direction: The first pixel electrode and the third pixel electrode in the same cycle are connected to the data line on one side of the row of pixel electrodes, and the second pixel electrode is connected to the data line on the other side of the row of pixel electrodes; The two first pixel electrodes in two adjacent cycles are respectively connected to the data lines on both sides of the row of pixel electrodes, the two second pixel electrodes are respectively connected to the data lines on both sides of the row of pixel electrodes, and the two third pixel electrodes are respectively connected to the data lines on both sides of the row of pixel electrodes.

15. A display panel, characterized in that, It includes an array substrate according to any one of claims 1 to 14, and an opposing substrate disposed opposite to the array substrate.

16. The display panel according to claim 15, wherein The opposing substrate includes a common electrode.

17. A display device, characterized in that, It includes a display panel according to claim 15 or 16.

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