Railway track fastener defect detection method, system, device and medium

Abstract

This application discloses a method, system, device, and medium for detecting defects in railway track fasteners, relating to the field of defect detection technology. The method comprises: obtaining a target image; the target image is an image containing the railway track fastener to be inspected; inputting the target image into a railway track fastener defect detection model to obtain a target defect detection result; the railway track fastener defect detection model is obtained by training an initial network constructed based on a wavelet transform convolution basic block, a wavelet feature upscaling network, a cross-stage partially parallel dilated convolution network, and a channel-gated attention downsampling network; the target defect detection result is a target image annotated with a predicted bounding box and a predicted category of the defect contained in the railway track fastener to be inspected. This application can achieve real-time detection of railway track fastener defects while improving detection accuracy.

Description

Technical Field

[0001] The present application relates to the field of defect detection technology, and in particular to a method, system, device and medium for detecting defects in railway track fasteners. Background Art

[0002] Railway track fasteners, core components of railway infrastructure, fulfill critical functions, including securing rails, absorbing vibrations, and maintaining track stability. However, over long periods of service, environmental erosion, train loads, and human factors can easily lead to fastener loosening, breakage, displacement, or loss, seriously threatening track system stability and operational safety. Therefore, real-time and accurate fastener status monitoring has both engineering value and safety implications.

[0003] Traditional rail fastener inspection relies on manual patrols, requiring maintenance personnel to visually inspect the fastener status along the track, manually record any anomalies, and schedule repairs. While this method is intuitive, it also has significant limitations: First, manual inspection is inefficient and cannot meet the real-time monitoring requirements of large-scale railway systems; second, human factors can easily lead to inconsistent inspection results, which are significantly influenced by subjective judgment; and third, the long inspection period is labor-intensive and poses safety risks. With the rapid expansion of the railway network, traditional manual inspection is no longer efficient and accurate enough to meet the needs of modern track maintenance.

[0004] In recent years, advances in computer vision technology have provided new solutions for rail fastener detection. Early image processing-based methods employed techniques such as edge detection and morphological processing to extract fastener regions and identify fastener status through template matching or feature analysis. Hong et al. proposed a high-speed railway fastener detection method based on minimum salient regions and centrosymmetric local binary patterns. This method improved detection performance through precise fastener localization and low-dimensional feature extraction. However, it still has limitations in adapting to complex environments and detecting partially missing fasteners. R. Manikandan et al. proposed a machine vision-based method that utilizes a support vector machine classifier to automatically detect and classify missing fasteners in track images. However, the complex track environment and the variability of fastener status (such as lighting changes, contamination interference, and morphological differences) can easily lead to the failure of these methods, resulting in insufficient robustness and generalization. These methods all suffer from complex image processing and redundant feature extraction, making them difficult to adapt to changing behavior.

[0005] With the development of deep learning, object detection methods based on convolutional neural networks have been widely used in the field of rail fastener inspection. Object detection algorithms are mainly divided into two categories: two-stage and one-stage. Two-stage algorithms require a two-step object recognition process based on candidate bounding boxes. One-stage algorithms can directly predict the location and category of objects without generating candidate regions. For example, the YOLO (You Only Look Once) series of algorithms are widely used in fastener defect detection tasks due to their end-to-end detection capabilities and high real-time performance.

[0006] However, YOLO algorithms still face challenges in detecting small fastener defects. They must first generate a large number of candidate frames and then apply a non-maximum suppression algorithm to eliminate inappropriate frames, which results in high computational overhead.

[0007] In contrast, Transformer-based fastener defect detection methods offer a more streamlined and efficient approach. Transformers feature a powerful self-attention mechanism, enabling more accurate classification of fastener defects in complex environments. However, this powerful mechanism comes at a high computational cost. Common Transformer-based object detection models include DETR (DEtection Transformer), Deformable DETR, and DINO. While these models outperform the traditional YOLO algorithm in terms of accuracy, they lack real-time detection performance. In 2023, Zhao et al. proposed the first real-time end-to-end detection transformer, RT-DETR, which enhances multi-scale feature processing through intra-scale interaction and cross-scale fusion. Zhang et al. proposed the TSD-DETR model, which improves small object detection performance by constructing a multi-scale feature extraction module and introducing an efficient multi-scale attention mechanism. Song et al. improved the RT-DETR model by proposing a super-resolution convolutional module to enhance image details and incorporating channel attention into the self-attention mechanism to enhance the model's focus on fastener defects. Experimental results demonstrate that this approach improves detection accuracy while achieving better computational resource utilization. Furthermore, to address the unique challenges of railway fastener detection, such as occlusion and complex background interference, Bai et al. proposed a detection method based on TSR-Net (deep learning-based super-resolution technology). This method integrates a visual transformer, an inverted residual block, and a self-supervised transform attention mechanism to enhance the model's detection capabilities in complex scenes. Experimental results demonstrate that this method achieves high accuracy and robustness when detecting fasteners occluded by foreign objects. However, its relatively high computational cost limits its suitability for applications with strict real-time requirements.

[0008] In summary, there is a need for a railway track fastener defect detection method that can improve the accuracy of fastener defect detection while ensuring efficient real-time detection. Summary of the Invention

[0009] The purpose of this application is to provide a railway track fastener defect detection method, system, device and medium to solve the problem that traditional railway track fastener defect detection methods cannot improve the accuracy of fastener defect detection while ensuring efficient real-time detection.

[0010] To achieve the above objectives, this application provides the following solutions.

[0011] In a first aspect, the present application provides a method for detecting defects in railway track fasteners, comprising:

[0012] Acquire a target image; the target image is an image containing the railway track fastener to be inspected;

[0013] The target image is input into a railway track fastener defect detection model to obtain a target defect detection result; the railway track fastener defect detection model is obtained by training an initial network, and the initial network is constructed based on a wavelet transform convolution basic block, a wavelet feature upscaling network, a cross-stage partially parallel dilated convolution network and a channel-gated attention downsampling network; the target defect detection result is a target image marked with a predicted bounding box and a predicted category of the defect contained in the railway track fastener to be detected.

[0014] In one embodiment, the process of determining the railway track fastener defect detection model includes:

[0015] Acquire multiple sample images and corresponding real defect detection results; the sample images are images containing sample railway track fasteners, and the real defect detection results are sample images annotated with real bounding boxes of defects contained in the sample railway track fasteners and real categories;

[0016] constructing the initial network;

[0017] The initial network is trained with each sample image as input and the corresponding real defect detection result as output to obtain the railway track fastener defect detection model.

[0018] In one embodiment, the initial network includes: a backbone network, a hybrid encoder and a Transform decoder;

[0019] The backbone network includes: a first convolution block, a second convolution block, a third convolution block, a first maximum pooling layer, a first wavelet transform convolution basic block, a second wavelet transform convolution basic block, a third wavelet transform convolution basic block, a fourth wavelet transform convolution basic block and a fourth convolution block, which are connected in sequence;

[0020] The hybrid encoder includes: a fifth convolution block, a sixth convolution block, an attention-based intra-scale feature interaction module, and a seventh convolution block, a first wavelet feature upgrading module, a first cross-stage partially parallel dilated convolution module, an eighth convolution block, a second wavelet feature upgrading module, a second cross-stage partially parallel dilated convolution module, a first channel gated attention downsampling module, a first adder, a third cross-stage partially parallel dilated convolution module, a second channel gated attention downsampling module, a second adder, and a fourth cross-stage partially parallel dilated convolution module connected in sequence; the second wavelet transform convolution basic block is connected to the fifth convolution block, the third wavelet transform convolution basic block is connected to the sixth convolution block, the attention-based intra-scale feature interaction module is connected to the seventh convolution block, the seventh convolution block is connected to the second adder, and the eighth convolution block is connected to the first adder;

[0021] The second cross-stage partially parallel dilated convolution module, the third cross-stage partially parallel dilated convolution module, and the fourth cross-stage partially parallel dilated convolution module are all connected to the Transform decoder.

[0022] In one embodiment, the first wavelet feature upgrading module and the second wavelet feature upgrading module are both wavelet feature upgrading networks, and the wavelet feature upgrading network includes: a wavelet transform unit, a residual block, a third adder, and an inverse wavelet transform unit;

[0023] The wavelet transform unit is connected to the residual block and the third adder respectively; the third adder and the residual block are connected to the inverse wavelet transform unit respectively.

[0024] In one embodiment, the first cross-stage partially parallel dilated convolution module, the second cross-stage partially parallel dilated convolution module, the third cross-stage partially parallel dilated convolution module, and the fourth cross-stage partially parallel dilated convolution module are all cross-stage partially parallel dilated convolution networks, and the cross-stage partially parallel dilated convolution network includes: a ninth convolution block, a tenth convolution block, a parallel dilated convolution unit, a fourth adder, and an eleventh convolution block; the parallel dilated convolution unit includes: a twelfth convolution block, a thirteenth convolution block, a fourteenth convolution block, a fifth adder, and a fifteenth convolution block;

[0025] The ninth convolution block is connected to the fourth adder, the tenth convolution block is respectively connected to the twelfth convolution block, the thirteenth convolution block and the fourteenth convolution block, the twelfth convolution block, the thirteenth convolution block and the fourteenth convolution block are all connected to the fifth adder, the fifth adder is connected to the fifteenth convolution block, the fifteenth convolution block is connected to the fourth adder, and the fourth adder is connected to the eleventh convolution block.

[0026] In one embodiment, the first channel-gated attention downsampling module and the second channel-gated attention downsampling module are both channel-gated attention downsampling networks, and the channel-gated attention downsampling network includes: a global average pooling layer, a sixteenth convolution block, a second maximum pooling layer, a channel gating unit, a sixth adder, a seventeenth convolution block, a multiplier, and an eighteenth convolution block; the channel gating unit includes: a nineteenth convolution block and a Hardsigmoid activation function;

[0027] The global average pooling layer is connected to the nineteenth convolution block, the nineteenth convolution block is connected to the Hardsigmoid activation function, the second maximum pooling layer is connected to the seventeenth convolution block, the sixteenth convolution block and the seventeenth convolution block are both connected to the sixth adder, the Hardsigmoid activation function and the sixth adder are both connected to the multiplier, and the multiplier is connected to the eighteenth convolution block.

[0028] In one embodiment, the target image is input into a railway track fastener defect detection model to obtain a target defect detection result, including:

[0029] Inputting the target image into a backbone network in a railway track fastener defect detection model to obtain a first backbone output feature map, a second backbone output feature map, and a third backbone output feature map of the railway track fastener to be detected;

[0030] Inputting the first backbone output feature map, the second backbone output feature map, and the third backbone output feature map into a hybrid encoder in a railway track fastener defect detection model to obtain a first encoding output feature map, a second encoding output feature map, and a third encoding output feature map of the railway track fastener to be detected;

[0031] The first encoding output feature map, the second encoding output feature map and the third encoding output feature map are all input into the Transform decoder in the railway track fastener defect detection model to obtain the target defect detection result.

[0032] In a second aspect, the present application provides a railway track fastener defect detection system to implement any of the above-mentioned railway track fastener defect detection methods, the railway track fastener defect detection system comprising:

[0033] An image acquisition module is used to acquire a target image; the target image is an image containing the railway track fastener to be inspected;

[0034] A defect detection module is configured to input the target image into a railway track fastener defect detection model to obtain a target defect detection result; the railway track fastener defect detection model is obtained by training an initial network; the target defect detection result is a target image annotated with a predicted bounding box and a predicted category of the defect contained in the railway track fastener to be detected.

[0035] In a third aspect, the present application provides a computer device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement any of the above-mentioned methods for detecting defects in railway track fasteners.

[0036] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements any of the above-mentioned railway track fastener defect detection methods.

[0037] According to the specific embodiments provided in this application, this application discloses the following technical effects:

[0038] The present application discloses a method, system, device, and medium for detecting defects in railway track fasteners. First, a target image is acquired; the target image is an image containing the railway track fastener to be detected; then, the target image is input into a railway track fastener defect detection model to obtain a target defect detection result; the target defect detection result is a target image with a predicted bounding box and a predicted category of the defect contained in the railway track fastener to be detected marked. The railway track fastener defect detection model in the present application is obtained by training an initial network. The initial network is constructed based on a wavelet transform convolution basic block, a wavelet feature upscaling network, a cross-stage partially parallel dilated convolution network, and a channel-gated attention downsampling network. The wavelet transform convolution basic block is introduced to fuse high-frequency and low-frequency features, enhance feature extraction capabilities, and reduce computational complexity. The cross-stage partially parallel dilated convolution network and the channel-gated attention downsampling network are used to enhance effective features and suppress redundant features. The wavelet feature upscaling network is applied to optimize the feature fusion network, strengthen the fusion of high-frequency and low-frequency information, and improve the sensitivity of the railway track fastener defect detection model to fastener defects, thereby improving the accuracy of railway track fastener defect detection and ensuring efficient real-time detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0040] Figure 1 This is a diagram of the application environment of a railway track fastener defect detection method in one embodiment of the present application.

[0041] Figure 2 A schematic flow chart of a method for detecting defects in railway track fasteners provided in one embodiment of the present application.

[0042] Figure 3 Schematic diagram of the initial network structure.

[0043] Figure 4 Schematic diagram of the wavelet feature upgrading network structure.

[0044] Figure 5 Schematic diagram of the cross-stage partially parallel dilated convolutional network structure.

[0045] Figure 6 Schematic diagram of the channel-gated attention downsampling network structure.

[0046] Figure 7 A schematic diagram of the structure of a computer device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0048] The purpose of this application is to provide a railway track fastener defect detection method, system, device and medium, aiming to improve the accuracy of railway track fastener defect detection while ensuring efficient real-time detection.

[0049] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0050] The railway track fastener defect detection method provided in the embodiment of the present application can be applied to Figure 1In the application environment shown. Among them, the terminal 102 communicates with the server 104 through the network. The data storage system can store the data that the server 104 needs to process. The data storage system can be set up separately, or integrated on the server 104, or placed on the cloud or other servers. The terminal 102 can send the target image to the server 104. After the server 104 receives the target image, the server 104 inputs the target image into the railway track fastener defect detection model to obtain the target defect detection result. The server 104 can feed back the obtained target defect detection result to the terminal 102. In addition, in some embodiments, the railway track fastener defect detection method can also be implemented separately by the server 104 or the terminal 102. For example, the terminal 102 can directly perform railway track fastener defect detection on the target image, or the server 104 can obtain the target image from the data storage system and perform railway track fastener defect detection on the target image.

[0051] In an exemplary embodiment, Figure 2 As shown, a railway track fastener defect detection method is provided, including steps 1 and 2.

[0052] Step 1: Acquire a target image; the target image is an image containing the railway track fastener to be detected.

[0053] Step 2: Input the target image into the railway track fastener defect detection model to obtain the target defect detection results.

[0054] Among them, the railway track fastener defect detection model is obtained by training the initial network, which is constructed based on the wavelet transform convolution basic block, the wavelet feature upgrading network, the cross-stage partially parallel dilated convolution network and the channel-gated attention downsampling network; the target defect detection result is a target image with the predicted bounding box and predicted category of the defects contained in the railway track fastener to be detected.

[0055] As an optional implementation, the process of determining the railway track fastener defect detection model includes the following steps.

[0056] Obtain multiple sample images and corresponding real defect detection results; the sample images are images containing sample railway track fasteners, and the real defect detection results are sample images marked with real bounding boxes of defects contained in the sample railway track fasteners and real categories.

[0057] Build the initial network.

[0058] With each sample image as input and the corresponding real defect detection results as output, the initial network is trained to obtain the railway track fastener defect detection model.

[0059] During training, the test set was also used to calculate the accuracy, average accuracy, and mean of average accuracy evaluation indicators of the railway track fastener defect detection model. The formulas are as follows.

[0060] .

[0061] .

[0062] .

[0063] in, is the accuracy rate; To detect the correct number of positive samples; is the number of positive samples for detection errors; is the average accuracy; Calculate the function for the PR curve; is the recall rate; is the mean of the average accuracy; is the total number of categories in the test set; For the The average accuracy of the categories.

[0064] As an optional implementation, Figure 3 As shown in Figure 1, the initial network includes: backbone network, hybrid encoder and Transform decoder.

[0065] The backbone network includes: a first convolution block, a second convolution block, a third convolution block, a first maximum pooling layer (Max-Pool), a first wavelet transform convolution basic block, a second wavelet transform convolution basic block, a third wavelet transform convolution basic block, a fourth wavelet transform convolution basic block and a fourth convolution block, which are connected in sequence.

[0066] Specifically, the first convolution block, the second convolution block, and the third convolution block are all convolution blocks with a convolution kernel size of 3×3 (ConvN, The fourth convolution block is a convolution block with a convolution kernel size of 1×1 (ConvN, ).

[0067] The first wavelet transform convolution basic block, the second wavelet transform convolution basic block, the third wavelet transform convolution basic block and the fourth wavelet transform convolution basic block are all wavelet transform convolution basic blocks (BasciBlock WTCnov).

[0068] The hybrid encoder includes: a fifth convolution block, a sixth convolution block, an attention-based intrascale feature interaction module (AIFI), and a seventh convolution block, a first wavelet feature upgrading module, a first cross-stage partially parallel dilated convolution module, an eighth convolution block, a second wavelet feature upgrading module, a second cross-stage partially parallel dilated convolution module, a first channel gated attention downsampling module, a first adder, a third cross-stage partially parallel dilated convolution module, a second channel gated attention downsampling module, a second adder, and a fourth cross-stage partially parallel dilated convolution module connected in sequence; the second wavelet transform convolution basic block is connected to the fifth convolution block, the third wavelet transform convolution basic block is connected to the sixth convolution block, the attention-based intrascale feature interaction module is connected to the seventh convolution block, the seventh convolution block is connected to the second adder, and the eighth convolution block is connected to the first adder.

[0069] Specifically, the fifth convolution block, the sixth convolution block, the seventh convolution block, and the eighth convolution block are all convolution blocks with a convolution kernel size of 1×1.

[0070] The second cross-stage partially parallel dilated convolution module, the third cross-stage partially parallel dilated convolution module, and the fourth cross-stage partially parallel dilated convolution module are all connected to the Transform decoder.

[0071] As an optional implementation, the first wavelet feature upgrade module and the second wavelet feature upgrade module are both wavelet feature upgrade networks (Wavelet Feature Upgrade Network, WFU), such as Figure 4 As shown, the wavelet feature upgrading network includes: a wavelet transform unit, a residual block, a third adder and a wavelet inverse transform unit.

[0072] The wavelet transform unit is connected to the residual block and the third adder respectively; the third adder and the residual block are connected to the inverse wavelet transform unit respectively.

[0073] As an optional implementation, the first cross-stage partially parallel dilated convolution module, the second cross-stage partially parallel dilated convolution module, the third cross-stage partially parallel dilated convolution module, and the fourth cross-stage partially parallel dilated convolution module are all cross-stage partially parallel dilated convolution networks (Cross Stage Partial Parallel DilationConvolution Network, CSPPDC), such as Figure 5As shown, the cross-stage partially parallel dilated convolution network includes: the ninth convolution block, the tenth convolution block, the parallel dilated convolution unit, the fourth adder and the eleventh convolution block; the parallel dilated convolution unit includes: the twelfth convolution block, the thirteenth convolution block, the fourteenth convolution block, the fifth adder and the fifteenth convolution block.

[0074] The ninth convolution block is connected to the fourth adder, the tenth convolution block is connected to the twelfth convolution block, the thirteenth convolution block and the fourteenth convolution block respectively, the twelfth convolution block, the thirteenth convolution block and the fourteenth convolution block are all connected to the fifth adder, the fifth adder is connected to the fifteenth convolution block, the fifteenth convolution block is connected to the fourth adder, and the fourth adder is connected to the eleventh convolution block.

[0075] Specifically, the ninth convolution block, the tenth convolution block, and the fifteenth convolution block are all convolution blocks with a convolution kernel size of 1×1. The twelfth convolution block, the thirteenth convolution block, and the fourteenth convolution block are all convolution blocks with a convolution kernel size of 3×3.

[0076] As an optional implementation, the first channel gated attention downsampling module and the second channel gated attention downsampling module are both channel gated attention downsampling networks (Channel Gated Attention Downsample, CGAD), such as Figure 6 As shown in the figure, the channel-gated attention downsampling network includes: a global average pooling layer, a sixteenth convolution block, a second maximum pooling layer, a channel gating unit, a sixth adder, a seventeenth convolution block, a multiplier and an eighteenth convolution block; the channel gating unit includes: a nineteenth convolution block and a Hardsigmoid activation function.

[0077] The global average pooling layer is connected to the nineteenth convolution block, the nineteenth convolution block is connected to the Hardsigmoid activation function, the second maximum pooling layer is connected to the seventeenth convolution block, the sixteenth convolution block and the seventeenth convolution block are both connected to the sixth adder, the Hardsigmoid activation function and the sixth adder are both connected to the multiplier, and the multiplier is connected to the eighteenth convolution block.

[0078] Specifically, the sixteenth convolution block is a convolution block with a convolution kernel size of 3×3. The seventeenth convolution block, the eighteenth convolution block, and the nineteenth convolution block are all convolution blocks with a convolution kernel size of 1×1.

[0079] As an optional implementation, step 2 includes steps 21 to 23.

[0080] Step 21: Input the target image into the backbone network in the railway track fastener defect detection model to obtain the first backbone output feature map, the second backbone output feature map and the third backbone output feature map of the railway track fastener to be detected.

[0081] Specifically, step 21 includes steps 211 to 219.

[0082] Step 211: Input the target image into the first convolution block in the backbone network. The first convolution block downsamples the resolution of the target image from 640×640 to 320×320, extracts primary features such as edges and textures, and obtains the first convolution output feature map. ; The expression is:

[0083] .

[0084] in, ReLU is the activation function for the Rectified Linear Unit, which is used to introduce nonlinear mapping into the neural network. Batch normalization operation, used to accelerate network convergence and improve stability; It is a convolution operation with a kernel size of 3×3 and a stride of 2; is the target image.

[0085] Step 212: Output the first convolution feature map Input into the second convolution block of the backbone network to enhance the feature expression ability and retain the local details of the railway track fastener to be detected, and obtain the second convolution output feature map ; The expression is:

[0086] .

[0087] in, It is a convolution operation with a kernel size of 3×3 and a stride of 1.

[0088] Step 213: Input the second convolution output feature map into the third convolution block of the backbone network to expand the feature channel to 64, capture higher-dimensional semantic information, and obtain the third convolution output feature map ; The expression is:

[0089] .

[0090] Step 214: Output feature map of the third convolution Input to the first maximum pooling layer of the backbone network, downsample to 160×160 after the maximum pooling operation, retain the key structural features, and obtain the first maximum pooling output feature map ; The expression is:

[0091] .

[0092] in, The maximum pooling operation with a pooling kernel size of 3×3 and a stride of 2 is used to downsample and retain the maximum response value in the local feature.

[0093] Step 215: Output the first maximum pooling feature map Input into the first wavelet transform convolution basic block of the backbone network to obtain the first wavelet transform convolution output feature map . Specifically including steps 2151 to 2153.

[0094] Step 2151: Use wavelet transform to transform the first maximum pooling output feature map Decompose into low-frequency components and three high-frequency components 、 、 , get the first maximum pooling output feature map after decomposition ; The expression is:

[0095] .

[0096] in, is the wavelet transform operation.

[0097] Step 2152: Reconstruct the first maximum pooling output feature map after decomposition through inverse wavelet Perform inverse wavelet transform to reconstruct the first spatial domain feature map ; The expression is:

[0098] .

[0099] in, is the inverse wavelet transform operation.

[0100] Step 2153: Transform the first spatial domain feature map With the first maximum pooling output feature map Add together to get the first wavelet transform convolution output feature map ; The expression is:

[0101] .

[0102] Step 216: Convolve the first wavelet transform output feature map Input into the second wavelet transform convolution basic block of the backbone network to obtain the first backbone output feature map ; Specifically includes steps 2161-2164.

[0103] Step 2161: Convolve the first wavelet transform output feature map through a 3×3 convolution with a step size of 2 The resolution is downsampled from 160×160 to 80×80, and the number of channels is expanded to 128 to obtain the second wavelet transform convolution intermediate feature map ; The expression is:

[0104] .

[0105] Step 2162: Use wavelet transform to convolve the second wavelet transform intermediate feature map Decompose into low-frequency components and three high-frequency components 、 、 , get the decomposed second wavelet transform convolution intermediate feature map ; The expression is:

[0106] .

[0107] Step 2163: Convolve the decomposed second wavelet transform intermediate feature map through inverse wavelet reconstruction Perform inverse wavelet transform to reconstruct the second spatial domain feature map ; The expression is:

[0108] .

[0109] Step 2164: Transform the second spatial domain feature map Convolution with the first wavelet transform output feature map Add together to get the first trunk output feature map ; The expression is:

[0110] .

[0111] Step 217: Output the first backbone feature map Input into the third wavelet transform convolution basic block of the backbone network to obtain the second backbone output feature map ; Specifically includes steps 2171-2174.

[0112] Step 2171: The first trunk output feature map is transformed into 3×3 convolution with a stride of 2. The resolution is downsampled from 80×80 to 40×40, and the number of channels is expanded to 256, and the third wavelet transform convolution intermediate feature map is obtained. ; The expression is:

[0113] .

[0114] Step 2172: Use wavelet transform to convolve the third wavelet transform intermediate feature map Decompose into low-frequency components and three high-frequency components 、 、 , get the decomposed third wavelet transform convolution intermediate feature map ; The expression is:

[0115] .

[0116] Step 2173: Convolve the decomposed third wavelet transform intermediate feature map through inverse wavelet reconstruction Perform inverse wavelet transform to reconstruct the third spatial domain feature map ; The expression is:

[0117] .

[0118] Step 2174: Transform the third spatial domain feature map With the first trunk output feature map Add together to get the second trunk output feature map ; The expression is:

[0119] .

[0120] Step 218: Output the second backbone feature map Input into the fourth wavelet transform convolution basic block of the backbone network to obtain the fourth wavelet transform convolution output feature map ; Specifically includes steps 2181-2184.

[0121] Step 2181: The second trunk output feature map is transformed into 3×3 convolution with a stride of 2. The resolution is downsampled from 40×40 to 20×20, and the number of channels is expanded to 512, and the fourth wavelet transform convolution intermediate feature map is obtained. ; The expression is:

[0122] .

[0123] Step 2182: Use wavelet transform to convolve the fourth wavelet transform intermediate feature map Decompose into low-frequency components and three high-frequency components 、 、 , get the decomposed fourth wavelet transform convolution intermediate feature map ; The expression is:

[0124] .

[0125] Step 2183: Convolve the decomposed fourth wavelet transform intermediate feature map through inverse wavelet reconstruction Perform inverse wavelet transform to reconstruct the fourth spatial domain feature map ; The expression is:

[0126] .

[0127] Step 2184: The fourth spatial domain feature map And the second trunk output feature map Add together to get the fourth wavelet transform convolution output feature map ; The expression is:

[0128] .

[0129] Step 219: Convolve the fourth wavelet transform output feature map Input to the fourth convolution block of the backbone network, and after 1×1 convolution, the input is projected to the fourth wavelet transform convolution output feature map The number of channels is compressed from 512 to 256, and the third backbone output feature map is obtained. ; The expression is:

[0130] .

[0131] in, It is a 1×1 convolution operation.

[0132] Step 22: Input the first trunk output feature map, the second trunk output feature map, and the third trunk output feature map into the hybrid encoder in the railway track fastener defect detection model to obtain the first encoding output feature map, the second encoding output feature map, and the third encoding output feature map of the railway track fastener to be detected.

[0133] Specifically, step 22 includes steps 2201 to 2213.

[0134] Step 2201: Output feature map of the third backbone Input into the attention-based intra-scale feature interaction module of the hybrid encoder to obtain the feature interaction output feature map ; Specifically includes steps 22011-22016.

[0135] Step 22011: Output feature map of the third trunk Flattened into sequence form, the flattened features are obtained ; The expression is:

[0136] .

[0137] in, It is a flattening operation used to convert the multi-dimensional feature map into a one-dimensional vector for subsequent full connection or classification processing.

[0138] Step 22012: Output feature map based on the third backbone Generate a two-dimensional sine-cosine position encoding using the spatial coordinates (row and column indices) of , encode the two-dimensional sine-cosine position With Flatten feature Add together to get the added feature map ; The expression is:

[0139] .

[0140] Step 22013: Use the 8-head attention mechanism to capture global dependencies, perform attention calculations, and obtain attention features ; The expression is:

[0141] .

[0142] in, is the sofemax activation function; and From the additive feature map , and Used to calculate attention weights; is transposed; From the Flatten feature , Used to store the actual feature values.

[0143] Step 22014: Attention Features and additive feature maps Perform residual connection and layer normalization to obtain normalized feature maps ; The expression is:

[0144] .

[0145] in, It is a layer normalization operation, which is used to normalize across feature dimensions to improve training stability and robustness; It is a random inactivation mechanism module, which is used to randomly discard some neurons during training to reduce overfitting.

[0146] Step 22015: Normalize the feature map , after feedforward network processing, the nonlinearity is enhanced by two layers of fully connected layers to obtain the nonlinear feature map ; The expression is:

[0147] .

[0148] in, is the Gaussian error linear unit activation function; is the weight matrix of the first fully connected layer; is the weight matrix of the second fully connected layer.

[0149] Step 22016: Nonlinear feature map And the normalized feature map Perform residual connection and layer normalization to obtain feature interaction output feature map ; The expression is:

[0150] .

[0151] Step 2202: Output the first backbone feature map , the second backbone output feature map Interact with features to output feature maps They are respectively input into the fifth convolution block, the sixth convolution block and the seventh convolution block of the hybrid encoder, and the number of output feature channels is unified to 256 through 1×1 convolution to obtain the unified first trunk output feature map, the unified second trunk output feature map and the unified feature interaction output feature map.

[0152] Step 2203: Input the unified second backbone output feature map and the unified feature interaction output feature map into the first wavelet feature upgrading module of the hybrid encoder to obtain the first up-sampling feature.

[0153] Step 2204: Input the unified first backbone output feature map into the first cross-stage partially parallel dilated convolution module of the hybrid encoder to obtain the feature map output by the first cross-stage partially parallel dilated convolution module.

[0154] Step 2205: Input the feature map output by the first cross-stage partially parallel dilated convolution module into the eighth convolution block of the hybrid encoder to obtain the feature map output by the eighth convolution block.

[0155] Step 2206: Input the unified first backbone output feature map and the feature map output by the eighth convolution block into the second wavelet feature upgrading module of the hybrid encoder to obtain the feature map output by the second wavelet feature upgrading module.

[0156] Step 2207: Input the feature map output by the second wavelet feature upgrading module into the second cross-stage partially parallel dilated convolution module of the hybrid encoder to obtain a first encoded output feature map.

[0157] Step 2208: Input the first encoding output feature map into the first channel gated attention downsampling module of the hybrid encoder to obtain the feature map output by the first channel gated attention downsampling module.

[0158] Step 2209: Input the feature map output by the first channel gated attention downsampling module and the feature map output by the eighth convolution block into the first adder of the hybrid encoder to obtain the feature map output by the first adder.

[0159] Step 2210: Input the feature map output by the first adder into the cross-stage partial parallel expansion convolution module of the hybrid encoder to obtain a second encoded output feature map.

[0160] Step 2211: Input the second encoded output feature map into the second channel gated attention downsampling module of the hybrid encoder to obtain the feature map output by the second channel gated attention downsampling module.

[0161] Step 2212: Input the feature map output by the second channel gated attention downsampling module and the unified feature interaction output feature map into the second adder of the hybrid encoder to obtain the feature map output by the second adder.

[0162] Step 2213: Input the feature map output by the second adder into the third cross-stage partially parallel dilated convolution module of the hybrid encoder to obtain a third encoded output feature map.

[0163] Among them, any two feature maps and Input into the wavelet feature upgrade network, the wavelet feature upgrade network performs and The processing process includes S11-S15.

[0164] S11: Through the wavelet transform unit, use the Ha wavelet transform to To break it down:

[0165] .

[0166] in, After decomposition The four sub-bands of is a low-frequency sub-band; 、 and There are three high-frequency sub-bands, corresponding to horizontal, vertical and diagonal details respectively; The low-frequency subband contains most of the image energy and structural information, while the high-frequency subband contains rich detail information such as edges and textures.

[0167] S12: The three high frequency sub-bands 、 、 Add and further enhance using residual blocks to obtain enhanced feature maps :

[0168] .

[0169] in, The residual block is used for further enhancement to highlight image details. The residual block design effectively avoids the gradient vanishing problem and enhances feature representation capabilities.

[0170] S13: Through the third adder, the low frequency sub-band With feature map Splicing to generate fusion feature map :

[0171] .

[0172] in, For splicing operation.

[0173] S14: Fusion feature map The dimensionality is reduced to 256 channels through 1×1 convolution, and the output is the fusion feature map after dimensionality reduction. :

[0174] .

[0175] The role of channel transformation is to effectively fuse features of different scales to extract more representative feature representations. The channel transformation module consists of two convolutional layers, one for feature dimensionality reduction and the other for feature expansion, to achieve effective interaction between features of different scales.

[0176] S15: Through the inverse wavelet transform unit, using the inverse Haar wavelet transform, based on the wavelet feature upgrade network and the fusion feature map after dimensionality reduction , get the final up-sampled feature wavelet feature upgrade network output feature map :

[0177] .

[0178] in, is the inverse Haar wavelet transform.

[0179] WFU can effectively fuse features at different scales and enhance image detail. Compared with traditional upsampling methods, WFU not only avoids the aliasing problem caused by directly fusing high-frequency and low-frequency components, but also better preserves the structure and texture information of the fastener through the multi-resolution characteristics of the wavelet transform.

[0180] Among them, any feature map Input to the cross-stage partially parallel dilated convolutional network, the cross-stage partially parallel dilated convolutional network performs feature map The processing process includes S21-S24.

[0181] S21: Compressing feature maps through 1×1 convolution The number of channels is reduced to 1 / 2 of the original, and the compressed feature map is obtained :

[0182] .

[0183] S22: After three independent 3×3 convolutions with different expansion rates (1, 2, 3), multi-scale context information is extracted to obtain a multi-scale feature map :

[0184] .

[0185] in, To extract multi-scale information operations; is a 3×3 convolution with a dilation rate of 1; For channel splicing; is a 3×3 convolution with a dilation rate of 2; is a 3×3 convolution with a dilation rate of 3.

[0186] S23: Maintain feature maps directly through 1×1 convolution The number of channels is obtained to maintain the feature map :

[0187] .

[0188] S24: Multi-scale feature map and maintain feature maps Combined, and then perform another 1×1 convolution to generate a fine feature map, that is, the feature map output by the cross-stage partially parallel dilated convolutional network :

[0189] .

[0190] Among them, the feature map output by the cross-stage partial parallel expansion convolutional network Input to the channel gated attention downsampling network, the channel gated attention downsampling network performs attention on the feature map The processing process includes S31-S38.

[0191] S31: Feature Map After global average pooling, the feature map after global average pooling is obtained to capture its overall context representation. :

[0192] .

[0193] in, It is a global average pooling process.

[0194] S32: Assign importance weights to each channel through 1×1 convolution and Hardsigmid activation function to generate channel attention maps :

[0195] .

[0196] S33: Feature map Input the 16th convolution block for 3×3 convolution to obtain the feature map output by the 16th convolution block :

[0197] .

[0198] S34: Feature map Input the second maximum pooling layer for maximum pooling to obtain the feature map output by the second maximum pooling layer :

[0199] .

[0200] in, is a maximum pooling operation with a pooling kernel size of 2×2.

[0201] S35: Using the seventeenth convolution block, the feature map Processing is performed to obtain the feature map output by the seventeenth convolution block.

[0202] S36: Using the sixth adder, the feature map output by the sixteenth convolution block It is added to the feature map output by the seventeenth convolution block to obtain the feature map output by the sixth adder.

[0203] S37: Using multipliers, channel attention map Multiply it by the feature map output by the sixth adder to obtain the feature map output by the multiplier.

[0204] S38: Use the eighteenth convolution block to process the feature map output by the multiplier to obtain the final feature map after feature weighting and fusion output, that is, the feature map output by the channel gated attention downsampling network .

[0205] The channel-gated attention downsampling network creates richer feature representations, which not only enhances the diversity of extracted features but also strengthens the expression of important features while minimizing irrelevant information.

[0206] Step 23: Input the first encoding output feature map, the second encoding output feature map, and the third encoding output feature map into the Transform decoder in the railway track fastener defect detection model to obtain the target defect detection result.

[0207] Specifically, the Transform decoder uses self-attention and cross-attention mechanisms, combines the first encoding output feature map, the second encoding output feature map, and the third encoding output feature map, and generates target defect detection results through the detection head.

[0208] In an exemplary embodiment, a railway track fastener defect detection system is provided to implement a railway track fastener defect detection method. The railway track fastener defect detection system includes the following modules.

[0209] The image acquisition module is used to acquire a target image; the target image is an image containing the railway track fastener to be detected.

[0210] The defect detection module is used to input the target image into the railway track fastener defect detection model to obtain the target defect detection result; the railway track fastener defect detection model is obtained by training the initial network; the target defect detection result is a target image marked with the predicted bounding box and predicted category of the defects contained in the railway track fastener to be detected.

[0211] In an exemplary embodiment, a computer device is provided, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement a railway track fastener defect detection method.

[0212] In an exemplary embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, a method for detecting defects in railway track fasteners is implemented.

[0213] In an exemplary embodiment, a computer program product is provided, comprising a computer program, which implements a railway track fastener defect detection method when executed by a processor.

[0214] In an exemplary embodiment, a computer device is provided. The computer device may be a server or a terminal. The internal structure diagram thereof may be as follows: Figure 7As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O) and a communication interface. The processor, memory and input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a method for detecting defects in railway track fasteners is implemented.

[0215] Those skilled in the art will understand that Figure 7 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0216] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the above-mentioned embodiments. In particular, any reference to memory, database, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM may be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0217] The databases involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, distributed databases based on blockchain. The processors involved in the various embodiments provided herein may include, but are not limited to, general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable connectors, and quantum computing-based data processing connectors.

[0218] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0219] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0220] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above examples is only intended to help understand the method and core concept of this application. At the same time, for those skilled in the art, based on the concept of this application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A method for detecting defects in railway track fasteners, characterized in that: The railway track fastener defect detection method comprises: Acquire a target image; the target image is an image containing the railway track fastener to be inspected; Inputting the target image into a railway track fastener defect detection model to obtain a target defect detection result; the railway track fastener defect detection model is obtained by training an initial network, and the initial network is constructed based on a wavelet transform convolution basic block, a wavelet feature upscaling network, a cross-stage partially parallel dilated convolution network, and a channel-gated attention downsampling network; the target defect detection result is a target image annotated with a predicted bounding box and a predicted category of the defect contained in the railway track fastener to be inspected; Initial network, including: backbone network, hybrid encoder and Transform decoder; The backbone network includes: a first convolution block, a second convolution block, a third convolution block, a first maximum pooling layer, a first wavelet transform convolution basic block, a second wavelet transform convolution basic block, a third wavelet transform convolution basic block, a fourth wavelet transform convolution basic block and a fourth convolution block, which are connected in sequence; The hybrid encoder includes: a fifth convolution block, a sixth convolution block, an attention-based intra-scale feature interaction module, and a seventh convolution block, a first wavelet feature upgrading module, a first cross-stage partially parallel dilated convolution module, an eighth convolution block, a second wavelet feature upgrading module, a second cross-stage partially parallel dilated convolution module, a first channel gated attention downsampling module, a first adder, a third cross-stage partially parallel dilated convolution module, a second channel gated attention downsampling module, a second adder, and a fourth cross-stage partially parallel dilated convolution module; the second wavelet transform convolution basic block is connected to the fifth convolution block, the third wavelet transform convolution basic block is connected to the sixth convolution block, the attention-based intra-scale feature interaction module is connected to the seventh convolution block, the seventh convolution block is connected to the second adder, and the eighth convolution block is connected to the first adder; The second cross-stage partially parallel dilated convolution module, the third cross-stage partially parallel dilated convolution module, and the fourth cross-stage partially parallel dilated convolution module are all connected to the Transform decoder; The first wavelet feature upgrading module and the second wavelet feature upgrading module are both wavelet feature upgrading networks, and the wavelet feature upgrading network includes: a wavelet transform unit, a residual block, a third adder and a wavelet inverse transform unit; The wavelet transform unit is connected to the residual block and the third adder respectively; the third adder and the residual block are connected to the inverse wavelet transform unit respectively; The first cross-stage partially parallel dilated convolution module, the second cross-stage partially parallel dilated convolution module, the third cross-stage partially parallel dilated convolution module, and the fourth cross-stage partially parallel dilated convolution module are all cross-stage partially parallel dilated convolution networks. The cross-stage partially parallel dilated convolution network includes: a ninth convolution block, a tenth convolution block, a parallel dilated convolution unit, a fourth adder, and an eleventh convolution block; the parallel dilated convolution unit includes: a twelfth convolution block, a thirteenth convolution block, a fourteenth convolution block, a fifth adder, and a fifteenth convolution block. the ninth convolution block is connected to the fourth adder, the tenth convolution block is connected to the twelfth convolution block, the thirteenth convolution block, and the fourteenth convolution block respectively, the twelfth convolution block, the thirteenth convolution block, and the fourteenth convolution block are all connected to the fifth adder, the fifth adder is connected to the fifteenth convolution block, the fifteenth convolution block is connected to the fourth adder, and the fourth adder is connected to the eleventh convolution block; The first channel-gated attention downsampling module and the second channel-gated attention downsampling module are both channel-gated attention downsampling networks. The channel-gated attention downsampling network includes: a global average pooling layer, a sixteenth convolution block, a second maximum pooling layer, a channel gating unit, a sixth adder, a seventeenth convolution block, a multiplier, and an eighteenth convolution block; the channel gating unit includes: a nineteenth convolution block and a Hardsigmoid activation function; The global average pooling layer is connected to the nineteenth convolution block, the nineteenth convolution block is connected to the Hardsigmoid activation function, the second maximum pooling layer is connected to the seventeenth convolution block, the sixteenth convolution block and the seventeenth convolution block are both connected to the sixth adder, the Hardsigmoid activation function and the sixth adder are both connected to the multiplier, and the multiplier is connected to the eighteenth convolution block.

2. The railway track fastener defect detection method according to claim 1, characterized in that: The process of determining the railway track fastener defect detection model includes: Acquire multiple sample images and corresponding real defect detection results; the sample images are images containing sample railway track fasteners, and the real defect detection results are sample images annotated with real bounding boxes of defects contained in the sample railway track fasteners and real categories; constructing the initial network; The initial network is trained with each sample image as input and the corresponding real defect detection result as output to obtain the railway track fastener defect detection model.

3. The railway track fastener defect detection method according to claim 2, characterized in that: The target image is input into a railway track fastener defect detection model to obtain target defect detection results, including: Inputting the target image into a backbone network in a railway track fastener defect detection model to obtain a first backbone output feature map, a second backbone output feature map, and a third backbone output feature map of the railway track fastener to be detected; Inputting the first backbone output feature map, the second backbone output feature map, and the third backbone output feature map into a hybrid encoder in a railway track fastener defect detection model to obtain a first encoding output feature map, a second encoding output feature map, and a third encoding output feature map of the railway track fastener to be detected; The first encoding output feature map, the second encoding output feature map and the third encoding output feature map are all input into the Transform decoder in the railway track fastener defect detection model to obtain the target defect detection result.

4. A railway track fastener defect detection system for implementing the railway track fastener defect detection method according to any one of claims 1 to 3, characterized in that: The railway track fastener defect detection system comprises: An image acquisition module is used to acquire a target image; the target image is an image containing the railway track fastener to be inspected; a defect detection module configured to input the target image into a railway track fastener defect detection model to obtain a target defect detection result; the railway track fastener defect detection model is obtained by training an initial network; the target defect detection result is a target image annotated with a predicted bounding box and a predicted category of a defect contained in the railway track fastener to be inspected; Initial network, including: backbone network, hybrid encoder and Transform decoder; The backbone network includes: a first convolution block, a second convolution block, a third convolution block, a first maximum pooling layer, a first wavelet transform convolution basic block, a second wavelet transform convolution basic block, a third wavelet transform convolution basic block, a fourth wavelet transform convolution basic block and a fourth convolution block, which are connected in sequence; The hybrid encoder includes: a fifth convolution block, a sixth convolution block, an attention-based intra-scale feature interaction module, and a seventh convolution block, a first wavelet feature upgrading module, a first cross-stage partially parallel dilated convolution module, an eighth convolution block, a second wavelet feature upgrading module, a second cross-stage partially parallel dilated convolution module, a first channel gated attention downsampling module, a first adder, a third cross-stage partially parallel dilated convolution module, a second channel gated attention downsampling module, a second adder, and a fourth cross-stage partially parallel dilated convolution module; the second wavelet transform convolution basic block is connected to the fifth convolution block, the third wavelet transform convolution basic block is connected to the sixth convolution block, the attention-based intra-scale feature interaction module is connected to the seventh convolution block, the seventh convolution block is connected to the second adder, and the eighth convolution block is connected to the first adder; The second cross-stage partially parallel dilated convolution module, the third cross-stage partially parallel dilated convolution module, and the fourth cross-stage partially parallel dilated convolution module are all connected to the Transform decoder; The first wavelet feature upgrading module and the second wavelet feature upgrading module are both wavelet feature upgrading networks, and the wavelet feature upgrading network includes: a wavelet transform unit, a residual block, a third adder and a wavelet inverse transform unit; The wavelet transform unit is connected to the residual block and the third adder respectively; the third adder and the residual block are connected to the inverse wavelet transform unit respectively; The first cross-stage partially parallel dilated convolution module, the second cross-stage partially parallel dilated convolution module, the third cross-stage partially parallel dilated convolution module, and the fourth cross-stage partially parallel dilated convolution module are all cross-stage partially parallel dilated convolution networks. The cross-stage partially parallel dilated convolution network includes: a ninth convolution block, a tenth convolution block, a parallel dilated convolution unit, a fourth adder, and an eleventh convolution block; the parallel dilated convolution unit includes: a twelfth convolution block, a thirteenth convolution block, a fourteenth convolution block, a fifth adder, and a fifteenth convolution block. the ninth convolution block is connected to the fourth adder, the tenth convolution block is connected to the twelfth convolution block, the thirteenth convolution block, and the fourteenth convolution block respectively, the twelfth convolution block, the thirteenth convolution block, and the fourteenth convolution block are all connected to the fifth adder, the fifth adder is connected to the fifteenth convolution block, the fifteenth convolution block is connected to the fourth adder, and the fourth adder is connected to the eleventh convolution block; The first channel-gated attention downsampling module and the second channel-gated attention downsampling module are both channel-gated attention downsampling networks. The channel-gated attention downsampling network includes: a global average pooling layer, a sixteenth convolution block, a second maximum pooling layer, a channel gating unit, a sixth adder, a seventeenth convolution block, a multiplier, and an eighteenth convolution block; the channel gating unit includes: a nineteenth convolution block and a Hardsigmoid activation function; The global average pooling layer is connected to the nineteenth convolution block, the nineteenth convolution block is connected to the Hardsigmoid activation function, the second maximum pooling layer is connected to the seventeenth convolution block, the sixteenth convolution block and the seventeenth convolution block are both connected to the sixth adder, the Hardsigmoid activation function and the sixth adder are both connected to the multiplier, and the multiplier is connected to the eighteenth convolution block.

5. A computer device comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the railway track fastener defect detection method according to any one of claims 1 to 3.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the railway track fastener defect detection method according to any one of claims 1 to 3 is implemented.

Images