Switching converter and control circuit thereof

Abstract

The invention discloses a switching converter and a control circuit thereof. The control circuit comprises a plurality of feedback loops, each feedback loop is used for inputting a corresponding feedback signal and a threshold signal, and generating an error signal according to the comparison of the feedback signal and the threshold signal; the comparator is used for taking the minimum error signal in the plurality of error signals as a loop adjusting signal and comparing the current sampling signal of the main power tube with the loop adjusting signal to generate a comparison signal; the logic circuit is used for generating a pulse width modulation signal according to the clock signal and the comparison signal; the driving circuit is used for converting the pulse width modulation signal into a switching control signal of the main power tube and the rectifier tube; and the clamping circuit is connected with the output ends of the plurality of feedback loops and is used for realizing mutual clamping among the plurality of error signals, so that when the loops are switched, the output of the new feedback loop can be quickly converged to a stable working point, and the dynamic response performance of the system when the load is suddenly changed is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of switching power supplies, and more specifically, to a switching converter and its control circuit. Background Art

[0002] In the field of power electronics, DC-DC converters are key components for realizing efficient conversion and distribution of electrical energy, and are widely used in consumer devices such as mobile phones and computers, as well as industrial devices such as automation equipment and new energy power generation systems.

[0003] Compared with traditional DC-DC converters that only rely on a single feedback variable to regulate the output voltage, DC-DC converters with multiple control loops adopt multiple feedback variables, such as voltage, current, etc., to jointly adjust the operating state of the converter, which has significant advantages. Under the multi-loop control system, in addition to the voltage loop and the current limiting loop, there may also be a power loop, a temperature loop, etc. For example, the power loop can monitor and regulate the output power of the converter to maintain efficient and stable operation under different loads. The temperature loop continuously monitors the temperature of key components of the converter. When the temperature is too high, it reduces the operating intensity of the components by adjusting the control signal to prevent performance degradation or even device damage caused by overheating. This is particularly crucial in high-power density application scenarios, greatly improving the reliability and stability of the converter under complex working conditions.

[0004] Although DC-DC converters with multiple control loops show great potential in performance improvement, they still face challenges in practical applications. When the load changes rapidly, the coordination between the loops becomes complex. Taking the voltage loop and the current limiting loop as an example, when the load quickly switches from light load to heavy load, the voltage loop and the current limiting loop need to respond quickly. However, if the parameters of the two loops are not properly matched, adjustment conflicts may occur, resulting in overshoot or undershoot of the inductor current and the output voltage. For example, during the adjustment process, if the response speeds of the two loops are inconsistent, it may cause abnormal values of relevant parameters at the intersection point, leading to overshoot of the inductor current, thereby weakening the current limiting protection effect. When the load quickly switches from the current limiting state to the light load, similar coordination problems may cause overshoot of the output voltage, posing an overvoltage threat to the electronic components in the device.

[0005] In summary, although DC-DC converters with multi-loop control have made significant progress in control accuracy and functional diversity, under complex working conditions such as rapid load changes, the coordination problems between the loops affect the stability and reliability of the system. Therefore, it is urgent to develop a new technical solution that can effectively coordinate multi-loop control and solve the overshoot and undershoot problems during load changes. Summary of the Invention

[0006] In view of the above problems, an object of the present invention is to provide a switching converter and its control circuit, which can enable the output of a new feedback loop to quickly converge to a stable operating point during loop switching, and improve the dynamic response performance of the system during load mutation.

[0007] According to an aspect of the present invention, there is provided a control circuit for a switching converter. The switching converter includes a main power transistor, a rectifier diode, and an inductor. The control circuit alternately turns on / off the main power transistor and the rectifier diode repeatedly, and uses the inductor for energy conversion to convert an input voltage into an output voltage. Wherein, the control circuit includes: a plurality of feedback loops, each feedback loop is configured to input a corresponding feedback signal and a target voltage / current signal, and generate an error signal according to the comparison between the feedback signal and the target voltage / current signal; a comparator, configured to use the smallest error signal among the plurality of error signals as a loop adjustment signal, and compare the current sampling signal of the main power transistor with the loop adjustment signal to generate a comparison signal; a logic circuit, configured to generate a pulse width modulation signal according to the clock signal and the comparison signal; a driving circuit, configured to convert the pulse width modulation signal into a switching control signal for the main power transistor and the rectifier diode; and a clamping circuit, connected to the output ends of the plurality of feedback loops, configured to implement mutual clamping between the plurality of error signals.

[0008] Optionally, the clamping circuit is configured to generate a clamping voltage of the error signals of the remaining feedback loops based on the loop adjustment signal.

[0009] Optionally, the clamping voltage is equal to the sum of the loop adjustment signal and a preset bias voltage.

[0010] Optionally, the clamping circuit includes: a voltage bias module, configured to generate the bias voltage; and a plurality of clamping operational amplifiers, the plurality of clamping operational amplifiers clamp to make the voltage difference between the plurality of error signals equal to the bias voltage.

[0011] Optionally, the plurality of feedback loops include: a first feedback loop, including a first error amplifier, an input end of the first error amplifier is configured to receive a feedback voltage of the output voltage and a target voltage signal, and an output end is configured to provide a first error signal; and a second feedback loop, including a second error amplifier, an input end of the second error amplifier is configured to receive a sampling signal of the inductor current and a target current signal, and an output end is configured to provide a second error signal.

[0012] Optionally, the voltage bias module includes a first current source, a first resistor, a second resistor, and a second current source connected in series between a power supply voltage and ground. The plurality of clamping operational amplifiers include a first clamping operational amplifier and a second clamping operational amplifier. Among them, the positive input terminal of the first clamping operational amplifier is connected to a first node between the first current source and the first resistor. The negative input terminal and the output terminal of the first clamping operational amplifier are connected to the output terminal of the second error amplifier. The output terminal of the first error amplifier is connected to a second node between the first resistor and the second resistor. The positive input terminal of the second clamping operational amplifier is connected to the output terminal of the second error amplifier. The negative input terminal of the second clamping operational amplifier is connected to a third node between the second resistor and the second current source. The output terminal of the second clamping operational amplifier is connected to the second node.

[0013] Optionally, the output currents of the first current source and the second current source are equal.

[0014] Optionally, the feedback signal is a signal for characterizing voltage / current parameters in the power stage circuit of the switching converter.

[0015] According to another aspect of the present invention, there is provided a switching converter, including: a power stage circuit; and the above control circuit.

[0016] In summary, in the embodiments of the present invention, by introducing an adaptive clamping circuit into the multi-feedback loop control system of the switching converter, the dynamic response performance during load mutation is significantly optimized. When loop switching occurs, the clamping circuit can forcibly constrain the output amplitudes of multiple feedback loops in real time, enabling the output of the new feedback loop to quickly converge to the steady-state operating point. This solution can effectively shorten the system recovery time and reduce the overshoot amplitude of the output voltage / inductor current without introducing operational amplifier offset errors, while maintaining the loop stability margin and avoiding the oscillation risk caused by the increased response speed. Moreover, the clamping circuit in the embodiments of the present invention significantly reduces the overshoot amplitudes of the output voltage and inductor current, thereby reducing the voltage stress on power devices and the impact on the input voltage, which is beneficial to improving the stability of the system. Description of the Drawings

[0017] Through the following description of the embodiments of the present invention with reference to the drawings, the above and other objects, features, and advantages of the present invention will become clearer. In the drawings:

[0018] Figure 1 A schematic circuit diagram of a switching converter with multiple control loops according to the prior art is shown.

[0019] Figure 2 A schematic waveform diagram of a switching converter according to the prior art when quickly switching from light load to heavy load is shown.

[0020] Figure 3 Shows a schematic waveform diagram of a prior art switching converter when quickly switching from heavy load to light load.

[0021] Figure 4 Shows a schematic circuit diagram of a switching converter with multiple control loops according to an embodiment of the present invention.

[0022] Figure 5 Shows a schematic circuit diagram of a clamping circuit according to an embodiment of the present invention.

[0023] Figure 6 Shows a schematic waveform diagram of a switching converter according to an embodiment of the present invention when quickly switching from light load to heavy load.

[0024] Figure 7 Shows a schematic waveform diagram of a switching converter according to an embodiment of the present invention when quickly switching from heavy load to light load. Detailed implementation manners

[0025] The various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In the respective drawings, the same elements are denoted by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0026] It should be understood that in the following description, "circuit" refers to a conductive loop formed by at least one element or sub-circuit through electrical connection or electromagnetic connection. When an element or circuit is said to be "connected to" another element or when an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there may be intermediate elements, and the connection between the elements can be physical, logical, or a combination thereof. In contrast, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two.

[0027] The present invention can be presented in various forms, and some examples will be described below.

[0028] Figure 1 Shows a schematic circuit diagram of a switching converter 100 according to the prior art. As Figure 1 shown, the switching converter 100 is described by taking a boost converter topology as an example. The switching converter 100 includes a power stage circuit and a control circuit. Its power stage circuit is the output circuit of a common synchronous rectification type boost switching regulator, which boosts the input voltage Vin applied to the input terminal and provides the output voltage Vout from the output terminal.

[0029] The power stage circuit includes power switches Q1 and Q2. The first end of power switch Q2 is used to provide the output voltage Vout. The second end of power switch Q2 is coupled to the first end of power switch Q1, and the second end of power switch Q1 is coupled to the reference ground of the switching converter. It should be understood that Figure 1 the power switch Q1 in

[0030] is the main power transistor, and the power switch Q2 is the rectifier diode. The power switches Q1 and Q2 can be any type of field effect transistor, such as a metal oxide semiconductor field effect transistor (MOSFET). An energy storage element (such as inductor Lx) is provided between the connection points of power switches Q1 and Q2. One end of inductor Lx is connected to the input voltage Vin, and the other end is connected to the switching node between power switches Q1 and Q2. The output capacitor Co is provided between the output terminal of the switching converter 100 and the reference ground to generate the output voltage Vout across its two ends, and is connected in parallel with the load to provide energy storage. The voltage dividing network composed of resistors R1 and R2 is used to obtain the feedback signal VFB of the output voltage Vout.

[0031] The control circuit adopts a closed-loop control mode to generate drive signals applied to the control terminals of power switches Q1 and Q2, and controls the switching states of power switches Q1 and Q2 to supply energy to the

[0032] Furthermore, the control circuit of the switching converter 100 in the prior art uses multiple feedback loops to control the switching states of the power switches Q1 and Q2. Specifically, the control circuit of the switching converter 100 includes a first feedback loop formed by an error amplifier 110, a second feedback loop formed by an error amplifier 120, a comparator 130, an RS flip-flop 140, and a drive circuit 150. Among them, the error amplifier 110 is used to compare the feedback signal VFB of the output voltage Vout with the target voltage signal VREF (for example, the signal VREF can be a divided voltage signal corresponding to the target value of the output voltage), and generate an error signal EA1 according to the voltage difference between the two. The error amplifier 120 is used to compare the detected value HSCS of the inductor current with the target current signal IREF, and generate an error signal EA2 according to the voltage difference between the two. The comparator 130 is used to use the smallest error signal among the error signal EA1 and the error signal EA2 as the loop adjustment signal, and compare the current sampling signal LSCS of the main power transistor Q1 with the loop adjustment signal, and generate a comparison signal according to the comparison result. The set terminal of the RS flip-flop 140 is used to receive the clock signal CLK, the reset terminal is connected to the output terminal of the comparator 130 to receive the comparison signal, and the RS flip-flop 140 is used to perform a set operation according to the clock signal CLK and a reset operation according to the comparison signal, so as to obtain pulse width modulation signals PWM for controlling the power switches Q1 and Q2 respectively at the output terminal. The drive circuit 150 is used to convert the pulse width modulation signal PWM into switching control signals LG and HG for the power switches Q1 and Q2 to control the switching states of the power switches Q1 and Q2.

[0033] In the control loop of the switching converter 100, the error amplifier 110 is a voltage outer-loop error amplifier, mainly used to control the stability of the output voltage Vout. The error amplifier 120 is a current inner-loop error amplifier, mainly used to limit the peak value of the inductor current. When the inductor current is in the normal operating range where the current-limiting threshold is not reached, the amplitude of the detected value HSCS of the inductor current is continuously lower than the target current signal IREF. At this time, since the error amplifier 120 of the current inner loop has no adjustment requirement, its output terminal is charged to the highest power supply rail voltage that the operational amplifier can reach and is in an "idle" state, not participating in the regulation of the peak value of the inductor current. In this case, the comparator 130 uses the output EA1 of the voltage outer-loop error amplifier 110 as the loop regulation signal MINEA to control the turn-off moment of the main power transistor Q1, thereby accurately determining the peak value of the inductor current. When the feedback signal VFB is higher than the target voltage signal VREF, based on its built-in operation mechanism, the amplitude of the output voltage of the error amplifier 110 decreases accordingly. This change is transmitted to the power switches Q1 and Q2 through precise control logic, causing the on and off times of the power switches Q1 and Q2 to change, thereby reducing the peak value of the inductor current. The decrease in the inductor current directly affects the output power of the switching converter, and thus the output voltage Vout decreases accordingly. Vice versa. Through this dynamic negative feedback regulation process, the voltage outer-loop control loop can stably clamp the feedback signal VFB near the target voltage signal VREF, thereby ensuring that the output voltage Vout can be stabilized at the preset ideal value, providing a stable and reliable power supply for the load.

[0034] When the load demand increases sharply and enters the heavy-load condition, the load current at the output end of the converter rises significantly, which in turn causes a significant drop in the output voltage Vout. At this time, the voltage outer-loop error amplifier 110 responds quickly to the deviation between the feedback signal VFB and the target voltage signal VREF, and the voltage amplitude of its output EA1 increases accordingly. As the load current continues to increase, the inductor current also rises continuously and gradually approaches the current-limiting threshold. Once the amplitude of the sampled signal HSCS of the inductor current exceeds the target current signal IREF, the voltage amplitude of the output EA2 of the error amplifier 120 decreases rapidly, so that the current-limiting inner loop immediately switches from the "idle" state to the working mode. At this time, the comparator 130 uses the output signal EA2 of the current inner-loop error amplifier 120 as the new loop regulation signal MINEA to control the turn-off moment of the main power transistor Q1.

[0035] During the regulation process of the inner current loop, a tight negative feedback regulation relationship is formed between the sampling signal HSCS of the inductor current and the output signal EA2 of the inner current loop error amplifier 120. When the amplitude of the sampling signal HSCS of the inductor current increases, it means that the inductor current exceeds the expected range. Based on its precise operation logic, the inner current loop error amplifier 120 causes the voltage amplitude of the output signal EA2 to decrease accordingly, and then adjusts the on and off times of the switching transistors Q1 and Q2, reducing the peak value of the inductor current. The decrease in the inductor current directly leads to a decrease in the amplitude of the sampling signal HSCS of the inductor current, thus achieving effective control of the inductor current. Through this dynamic negative feedback regulation mechanism, the inner current loop control loop can stably clamp the inductor current at a preset ideal current limit value, avoiding damage to the power devices in the system due to excessive current, providing reliable overcurrent protection for the entire power electronics system, and ensuring the safe and stable operation of the system under various complex operating conditions.

[0036] Figure 2 FIG. shows a schematic waveform diagram of a prior art switching converter when quickly switching from light load to heavy load. As Figure 2 shown, when the load quickly switches from light load to heavy load, the output terminal of the switching converter needs to quickly establish an inductor current matching the load to maintain the stability of the output voltage. Limited by the switching frequency of the power device and the bandwidth of the control loop, the inductor current cannot achieve an ideal step response, resulting in a drop in the output voltage Vout. This voltage deviation is transmitted to the outer voltage loop error amplifier 110 through the feedback network, triggering a synchronous voltage drop in the feedback signal VFB, prompting the output voltage of the error amplifier 110 to increase, and at the same time, the sampling signal HSCS of the inductor current also increases. When the signal amplitude of the sampling signal HSCS of the inductor current is greater than the target current signal IREF, the inner current loop error amplifier 120 enters the regulation state, and its output voltage begins to show a negative adjustment trend. During the switching process of the dual-loop control boost loop, when the signal EA2 is lower than the signal EA1, the inner current loop error amplifier will completely take over the peak current regulation function. If at the loop switching point (for example, when the voltage values of the signals EA1 and EA2 are equal, i.e., Figure 2 the moment t1 in FIG.) the output voltage of the error amplifier 120 is greater than the voltage at the steady-state operating point, an overshoot will occur in the peak value of the inductor current, and the overshoot amplitude is positively correlated with the voltage difference at the switching point, resulting in a poor effect of the system current limiting protection.

[0037] Figure 3 FIG. shows a schematic waveform diagram of a prior art switching converter when quickly switching from heavy load to light load. As Figure 3As shown, when the load quickly switches from the current limiting state to the light load condition, the system's demand for the inductor current drops sharply. At this time, the output voltage Vout rises rapidly due to the imbalance between energy supply and demand, causing the feedback signal VFB to rise synchronously. After the voltage outer loop error amplifier 110 detects that the feedback signal VFB is higher than the target voltage signal VREF, its output amplitude is significantly reduced, thereby driving the amplitude of the sampling signal HSCS of the inductor current to decrease. Once the amplitude of the sampling signal HSCS is lower than the target current signal IREF, the output voltage of the current inner loop error amplifier 120 begins to rise. When the output amplitude of the error signal EA2 is higher than the output value of the error signal EA1, the voltage outer loop error amplifier takes over the control of the loop again and adjusts the output voltage by adjusting the peak value of the inductor current. As shown Figure 3 As shown, if at the dual-loop switching point (for example, when the voltage values ​​of signal EA1 and signal EA2 are equal, that is, Figure 3 At time t2 in the figure, the output voltage of the error amplifier 110 is higher than its voltage value at the steady-state operating point, which will cause the feedback signal VFB to overshoot, and the overshoot amplitude is positively correlated with the voltage difference at the switching point, which will eventually cause the output voltage Vout to be out of regulation, which may pose an overvoltage risk to the system power devices.

[0038] In order to solve the above problems, most existing technologies improve the response speed of the voltage outer loop and the current inner loop to shorten the time it takes for the system to recover stability when the load changes suddenly, and reduce the amplitude of the output voltage overshoot. However, the increase in the control loop bandwidth will lead to a decrease in the system phase margin, which will in turn cause potential stability risks.

[0039] Figure 4 FIG. 4 shows a schematic circuit diagram of a switching converter with multiple control loops according to an embodiment of the present invention. Figure 4 As shown, the switching converter 200 is described by taking a boost converter topology as an example, and the switching converter 200 includes a power stage circuit and a control circuit. The power stage circuit is an output circuit of a common synchronous rectification boost switching regulator, which boosts the input voltage Vin applied to the input terminal and provides an output voltage Vout from the output terminal.

[0040] The power stage circuit includes power switches Q1 and Q2, the first end of the power switch Q2 is used to provide the output voltage Vout, the second end of the power switch Q2 is coupled to the first end of the power switch Q1, and the second end of the power switch Q1 is coupled to the reference ground of the switching converter. It should be understood that Figure 3The power switch Q1 therein is the main power transistor, and the power switch Q2 is the rectifier diode. The power switches Q1 and Q2 can be any type of field effect transistor, such as a metal oxide semiconductor field effect transistor (MOSFET). Within the scope not departing from what is taught by the present invention, they can also be other types of field effects and / or other types of transistors known to those skilled in the art.

[0041] A energy storage element (such as the inductor Lx) is provided between the connection points of the power switches Q1 and Q2. One end of the inductor Lx is connected to the input voltage Vin, and the other end is connected to the switching node between the power switches Q1 and Q2. The output capacitor Co is provided between the output terminal of the switching converter 100 and the reference ground to generate the output voltage Vout across its two ends, and is connected in parallel with the load to provide energy storage. The voltage dividing network composed of the resistors R1 and R2 is used to obtain the feedback signal VFB of the output voltage Vout.

[0042] It should be understood that although Figure 4 the power stage circuit therein is described as having a boost topology layout, the technical solution of the present invention can be applied to any type of layout design, such as buck, flyback, buck-boost, Cuk, Sepic, and Zeta, etc.

[0043] The control circuit adopts a closed-loop control mode to generate the drive signals applied to the control terminals of the power switches Q1 and Q2, and controls the switching states of the power switches Q1 and Q2 to provide energy to the load. In this embodiment, the switching converter 100 alternately turns on / off the power switches Q1 and Q2 repeatedly, and uses the inductor Lx for energy conversion, so that the input voltage Vin is boosted. The boosted voltage is smoothed by the inductor Lx and the output capacitor Co and output as the output voltage Vout.

[0044] Furthermore, the control circuit of the switching converter 200 of the present invention adopts multiple feedback loops to control the switching states of the power switches Q1 and Q2. Specifically, each feedback loop is used to input the corresponding feedback signal and threshold signal, and generates an error signal according to the comparison of the feedback signal and the threshold signal. By way of example, the feedback signal is a signal used to characterize the voltage / current parameters of the power stage circuit in the switching converter 200.

[0045] In an exemplary embodiment, the control circuit of the switching converter 200 includes a first feedback loop formed by an error amplifier 210, a second feedback loop formed by an error amplifier 220, a comparator 230, an RS flip-flop 240, and a drive circuit 250. Among them, the error amplifier 210 is used to compare the feedback signal VFB of the output voltage Vout with the target voltage signal VREF, and generate an error signal EA1 according to the voltage difference therebetween. The error amplifier 220 is used to compare the detected value HSCS of the inductor current with the target current signal IREF, and generate an error signal EA2 according to the voltage difference therebetween. The comparator 230 is used to use the smallest error signal among the error signal EA1 and the error signal EA2 as a loop regulation signal, and compare the current sampling signal LSCS of the main power transistor Q1 with the loop regulation signal, and generate a comparison signal according to the comparison result. The set terminal of the RS flip-flop 240 is used to receive the clock signal CLK, and the reset terminal is connected to the output terminal of the comparator 230 to receive the comparison signal. The RS flip-flop 240 is used to perform a set operation according to the clock signal CLK, and perform a reset operation according to the comparison signal, so as to obtain pulse width modulation signals PWM for controlling the power switches Q1 and Q2 respectively at the output terminal. The drive circuit 250 is used to convert the pulse width modulation signal PWM into switch control signals LG and HG for the power switches Q1 and Q2 to control the switching states of the power switches Q1 and Q2.

[0046] In the control loop of the switching converter 200, the error amplifier 210 is a voltage outer loop error amplifier, mainly used to control the stability of the output voltage Vout, and the error amplifier 220 is a current inner loop error amplifier, mainly used to limit the peak value of the inductor current.

[0047] When the inductor current is in the normal operating range where it has not reached the current limit threshold, the magnitude of the detected value HSCS of the inductor current is continuously lower than the target current signal IREF. At this time, the voltage magnitude of the signal EA2 output by the error amplifier 220 is greater than the voltage magnitude of the signal EA1 output by the error amplifier 210. Therefore, the comparator 230 uses the output EA1 of the voltage outer-loop error amplifier 210 as the loop regulation signal MINEA to control the turn-off moment of the main power transistor Q1, and thus accurately determines the peak value of the inductor current. When the feedback signal VFB is higher than the target voltage signal VREF, the voltage magnitude of the output of the error amplifier 210 decreases accordingly. This change is transmitted to the power switches Q1 and Q2 through precise control logic, causing the on and off times of the power switches Q1 and Q2 to change, and thus resulting in a decrease in the peak value of the inductor current. The decrease in the inductor current directly affects the output power of the switching converter, and thus causes the output voltage Vout to decrease accordingly. Vice versa. Through this dynamic negative feedback regulation process, the voltage outer-loop control loop can stably clamp the feedback signal VFB near the target voltage signal VREF, and thus ensure that the output voltage Vout can be stabilized at the preset ideal value, providing a stable and reliable power supply for the load.

[0048] When the load demand increases sharply and enters the heavy-load condition, the load current at the output end of the converter rises significantly, and thus causes a significant drop in the output voltage Vout. At this time, the voltage magnitude of the output signal EA1 of the voltage outer-loop error amplifier 210 increases accordingly. As the load current continues to increase, the inductor current also rises continuously and gradually approaches the current limit threshold. Once the magnitude of the sampled signal HSCS of the inductor current exceeds the target current signal IREF, the voltage magnitude of the output signal EA2 of the error amplifier 220 decreases rapidly, so that the current limit inner loop immediately switches from the "idle" state to the working mode. At this time, the comparator 230 uses the output signal EA2 of the current inner-loop error amplifier 220 as the new loop regulation signal MINEA to control the turn-off moment of the main power transistor Q1.

[0049] During the regulation process of the inner current loop, a tight negative feedback regulation relationship is formed between the sampling signal HSCS of the inductor current and the output signal EA2 of the inner current loop error amplifier 220. When the amplitude of the sampling signal HSCS of the inductor current increases, it means that the inductor current exceeds the expected range, and the voltage amplitude of the output signal EA2 of the inner current loop error amplifier 220 decreases accordingly. Subsequently, the on and off times of the switching transistors Q1 and Q2 are adjusted, causing the peak value of the inductor current to decrease. The decrease in the inductor current directly leads to a decrease in the amplitude of the sampling signal HSCS of the inductor current, thereby achieving effective control of the inductor current. Through this dynamic negative feedback regulation mechanism, the inner current loop control loop can stably clamp the inductor current at a preset ideal current limit value, avoiding damage to the power devices in the system due to excessive current, providing reliable overcurrent protection for the entire power electronics system, and ensuring the safe and stable operation of the system under various complex operating conditions.

[0050] Furthermore, to solve the problem of inductor current overshoot or output voltage overshoot during the feedback loop switching process, the switching converter 200 according to an embodiment of the present invention further includes a clamping circuit 260. The clamping circuit 260 is connected to the output ends of the multiple feedback loops and is used to achieve mutual clamping between multiple error signals, so that the error signal of the feedback loop to be clamped can quickly return to the stable value when the control loop switches, effectively reducing the overshoot of the inductor current / output voltage.

[0051] Furthermore, the clamping circuit is used to generate a clamping voltage for the error signals of the remaining feedback loops based on the loop regulation signal. Exemplarily, the clamping voltage is equal to the sum of the loop regulation signal and a preset bias voltage.

[0052] Furthermore, the bias voltage can be a very small voltage difference, so that the error signal to be clamped can quickly return to the stable value when the control loop switches. Furthermore, the existence of the bias voltage can also avoid the influence of the offset voltage of the error amplifier in each feedback loop on the control loop switching. Due to the existence of the offset voltage, if the multiple error signals are directly clamped to each other, taking the error signals EA1 and EA2 as an example, the signal EA2 may actually be clamped by EA1 - Vos, and the signal EA1 may actually be clamped by EA2 - Vos, resulting in a problem that when one control loop is working, the error signal of the other control loop is clamped to a value lower than the current error signal and wrongly takes over the control loop.

[0053] Figure 5 shows a schematic circuit diagram of the clamping circuit according to an embodiment of the present invention. As Figure 5As shown, the clamping circuit 260 of this embodiment includes a voltage biasing module 261 and a plurality of clamping operational amplifiers. Among them, the voltage biasing module 261 is used to generate a bias voltage. Further, the voltage biasing module 261 includes current sources I1 and I2 and resistors R3 and R4. Among them, the first end of the current source I1 is connected to the power supply voltage VDD, the second end of the current source I1 is connected to the first end of the resistor R3, the second end of the resistor R3 is connected to the first end of the resistor R4, the second end of the resistor R4 is connected to the first end of the current source I2, and the second end of the current source I2 is connected to the ground.

[0054] The plurality of clamping operational amplifiers are used to make the voltage difference between a plurality of error signals equal to the bias voltage through clamping. In an exemplary implementation manner, the clamping circuit 260 includes clamping operational amplifiers 262 and 263. Among them, the positive input terminal of the clamping operational amplifier 262 is connected to the node P1 between the current source I1 and the resistor R3, and the negative input terminal and the output terminal of the clamping operational amplifier 262 are connected to the output of the error amplifier 220 (i.e., the error signal EA2). The negative input terminal of the clamping operational amplifier 263 is connected to the node P3 between the resistor R4 and the current source I2, the positive input terminal of the clamping operational amplifier 263 is connected to the output terminal of the error amplifier 220, and the output terminal of the clamping operational amplifier 263 is connected to the output of the error amplifier 210 (i.e., the error signal EA1) and the node P2 between the resistor R3 and the resistor R4.

[0055] In this embodiment, the output currents of the current sources I1 and I2 are equal. Assuming that the output currents of the current sources I1 and I2 are both I0 and the resistance values of the resistors R3 and R4 are both R0, then the voltage V1 at the positive input terminal of the clamping operational amplifier 262 can be obtained as V1 = EA1 + I0 * R0, and the voltage V2 at the negative input terminal of the clamping operational amplifier 263 is V2 = EA1 - I0 * R0. When the system is controlled by the error amplifier 210 for the loop, at this time, the error signal EA2 is clamped to EA1 + I0 * R0 through the clamping operational amplifier 262; when the system is controlled by the error amplifier 220 for the loop, at this time, EA1 - I0 * R0 is clamped to the error signal EA2 through the clamping operational amplifier 263, that is, at this time the error signal EA1 = EA2 + I0 * R0.

[0056] In this embodiment, by introducing a voltage bias module 261 into the clamping circuit 260 to set the clamping voltage difference between multiple error signals, the problems that the error signal EA2 is abnormally clamped by EA1 - Vos and the error signal EA1 is abnormally clamped by EA2 - Vos in the traditional solution can be effectively avoided. At the same time, the limitation of operational amplifier selection can be avoided, and stable clamping can be achieved even with a general - purpose operational amplifier. In addition, compared with the traditional solution, in this embodiment, the temperature stability of the current source and resistor can be easily adjusted, thereby effectively reducing the influence of process, voltage, and temperature variations on the clamping accuracy. In addition, the clamping circuit of this embodiment provides a modular design advantage for subsequent circuit parameter calibration, thereby enhancing the system's environmental adaptability, debugging convenience, and long - term reliability.

[0057] Furthermore, since the output currents of the current sources I1 and I2 are equal, while generating a preset bias voltage, the voltage bias module 261 of this embodiment can also make the upper and lower currents at node P2 consistent, thereby avoiding introducing additional offset voltage into the error amplifier 210, ensuring that the output voltage of the switching converter is closer to the ideal value, and being beneficial to improving the stability and accuracy of the system.

[0058] Figure 6 FIG. shows a schematic waveform diagram of the switching converter according to the embodiment of the present invention when quickly switching from light load to heavy load. Among them, the dashed line shows the waveform diagram of the switching converter of the prior art when quickly switching from light load to heavy load. As Figure 6 shown, compared with the prior art, when the error amplifier 210 participates in loop control, the switching converter of the present invention can clamp the voltage value of the error signal EA2 to a position slightly greater than the error signal EA1, so that when the loop switches, the error signal EA2 can quickly return to the stable operating point, effectively reducing the overshoot of the inductor current.

[0059] Figure 7 FIG. shows a schematic waveform diagram of the switching converter according to the embodiment of the present invention when quickly switching from heavy load to light load. Among them, the dashed line shows the waveform diagram of the switching converter of the prior art when quickly switching from light load to heavy load. As Figure 7 shown, compared with the prior art, when the error amplifier 220 participates in loop control, the switching converter of the present invention can clamp the voltage value of the error signal EA1 to a position slightly greater than the error signal EA2, so that when the loop switches, the error signal EA1 can quickly return to the stable operating point, effectively reducing the overshoot of the feedback signal.

[0060] It should be noted that although the multi - loop - controlled switching converter according to the embodiment of the present invention is described by taking the voltage loop and current - limiting loop as examples in the above - mentioned embodiments, the clamping circuit of the embodiment of the present invention can also achieve voltage clamping between more feedback loops. AsFigure 5 As shown by the dashed box in

[0061] In summary, in the embodiments of the present invention, by introducing an adaptive clamping circuit into the multi-feedback loop control system of the switching converter, the dynamic response performance during load mutation is significantly optimized. When loop switching occurs, the clamping circuit can forcibly and real-time constrain the output amplitudes of multiple feedback loops, enabling the output of the new feedback loop to quickly converge to the steady-state operating point. This solution can effectively shorten the system recovery time and reduce the overshoot amplitude of the output voltage / inductor current without introducing operational amplifier offset errors, while maintaining the loop stability margin and avoiding the oscillation risk caused by the increased response speed. Moreover, the clamping circuit in the embodiments of the present invention significantly reduces the overshoot amplitudes of the output voltage and inductor current, thereby being able to reduce the voltage stress on the power devices and the impact on the input voltage, which is beneficial to improving the system stability.

[0062] In addition, this solution has a simple circuit structure, low requirements for circuit modules, does not require complex digital algorithms, effectively reduces the system cost and complexity, and can adapt to various load mutation situations. It is applicable to high-reliability scenarios such as electric vehicles, industrial power supplies, and consumer electronics, and has both high efficiency and engineering practicability.

[0063] In the above description, no detailed explanations are made for well-known structural elements and steps. However, those skilled in the art should understand that corresponding structural elements and steps can be implemented through various technical means. Additionally, in order to form the same structural elements, those skilled in the art can also design methods that are not exactly the same as the methods described above. Moreover, although the above embodiments are described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.

[0064] According to the embodiments of the present invention as above, these embodiments do not elaborate on all details and do not limit the invention to only the specific embodiments. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and its modified applications based on the present invention. The protection scope of the present invention should be defined by the scope of the claims of the present invention.

Claims

1. A control circuit for a switching converter, the switching converter including a main power transistor, a rectifier diode, and an inductor, the control circuit converting an input voltage to an output voltage by repeatedly causing the main power transistor and the rectifier diode to alternately conduct / cut off and using the inductor for energy conversion, wherein, The control circuit includes: Multiple feedback loops, each feedback loop is used to input a corresponding feedback signal and a target voltage / current signal, and generate an error signal according to the comparison between the feedback signal and the target voltage / current signal; A comparator, which is used to use the smallest error signal among the multiple error signals as a loop regulation signal, and compare the current sampling signal of the main power transistor with the loop regulation signal to generate a comparison signal; A logic circuit, which is used to generate a pulse width modulation signal according to the clock signal and the comparison signal; A drive circuit, which is used to convert the pulse width modulation signal into a switching control signal for the main power transistor and the rectifier diode; and A clamping circuit, which is connected to the output ends of the multiple feedback loops, and is used to achieve mutual clamping between the multiple error signals.

2. The control circuit according to claim 1, wherein, The clamping circuit is used to generate a clamping voltage for the error signals of the remaining feedback loops based on the loop regulation signal.

3. The control circuit according to claim 2, wherein, The clamping voltage is equal to the sum of the loop regulation signal and a preset bias voltage.

4. The control circuit according to claim 3, wherein, The clamping circuit includes: A voltage bias module, which is used to generate the bias voltage; and Multiple clamping operational amplifiers, and the multiple clamping operational amplifiers make the voltage difference between the multiple error signals equal to the bias voltage through clamping.

5. The control circuit according to claim 4, wherein, The multiple feedback loops include: A first feedback loop, which includes a first error amplifier, the input end of the first error amplifier is used to receive the feedback voltage of the output voltage and the target voltage signal, and the output end is used to provide a first error signal; and A second feedback loop, which includes a second error amplifier, the input end of the second error amplifier is used to receive the sampled signal of the inductor current and the target current signal, and the output end is used to provide a second error signal.

6. The control circuit according to claim 5, wherein, The voltage bias module includes a first current source, a first resistor, a second resistor, and a second current source connected in series between the power supply voltage and the ground, The multiple clamping operational amplifiers include a first clamping operational amplifier and a second clamping operational amplifier, Wherein, the positive input end of the first clamping operational amplifier is connected to a first node between the first current source and the first resistor, the negative input end and the output end of the first clamping operational amplifier are connected to the output end of the second error amplifier, The output end of the first error amplifier is connected to a second node between the first resistor and the second resistor, The positive input end of the second clamping operational amplifier is connected to the output end of the second error amplifier, the negative input end of the second clamping operational amplifier is connected to a third node between the second resistor and the second current source, and the output end of the second clamping operational amplifier is connected to the second node.

7. The control circuit according to claim 6, wherein, The output currents of the first current source and the second current source are equal.

8. The control circuit according to claim 1, wherein, The feedback signal is a signal used to characterize the voltage / current parameters in the power stage circuit of the switching converter.

9. A switching converter, comprising: A power stage circuit; And The control circuit according to any one of claims 1-8.

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