Smart switch with over-current protection during idle mode state

Abstract

The invention relates to a smart switch with over-current protection during an idle mode state. A circuit is described that includes a power transistor connected between a power supply terminal and an output terminal, a control circuit coupled to a control electrode of the power transistor and configured to apply a control current to the control electrode to turn on or off the power transistor, and an overcurrent protection circuit connected to the power transistor. The circuit may be in a first mode (some functions of the circuit are inactive to reduce power consumption) and a second mode (all functions of the circuit are active). The overcurrent protection circuit is configured to cause the circuit to change from a first mode to a second mode when the circuit is in the first mode and a sense signal indicative of a current through the power transistor has reached a first threshold, which requires a specific transition time from the sense signal reaching the first threshold, and to cause the circuit to change from the first mode to the second mode when the sense signal reaches the second threshold. A discharge signal that reduces the control current applied to the control electrode is output during the transition time.

Description

Field of the Invention

[0001] The present application relates to the field of intelligent semiconductor switches, and more particularly to intelligent semiconductor switches having an idle mode state. Background Art

[0002] A so-called intelligent semiconductor switch or intelligent switch is an integrated circuit which, in addition to the semiconductor switch itself (usually a power transistor), also includes additional circuitry configured to perform various auxiliary functions such as current measurement, temperature measurement, current limiting, circuit diagnostics, digital communication with other circuits, etc. Some of these auxiliary functions are implemented to protect the integrated circuit from operating outside its safe operating area (SOA). Over-current shutdown and current limiting are examples of such protection functions and are requirements for many applications.

[0003] Intelligent semiconductor switches can be used, for example, in automotive applications to protect electronic circuits or devices from excessive current, thereby replacing conventional fuses. However, the current consumption of these intelligent switches themselves may be relatively high, which can be a problem, for example, when the vehicle is parked, because the total current consumption must be low to avoid excessive battery discharge.

[0004] To reduce the power consumption of the intelligent switch, a so-called idle mode can be introduced, which is a low-power mode in which the electronic switch is turned on, but only a part of the functions of the intelligent switch are activated. In particular, the precise current measurement of the power switch and the conventional over-current protection (relatively high power consumption) should be deactivated in the idle mode.

[0005] However, when the vehicle starts after parking, the transition from the idle mode to the normal mode takes a certain amount of time, during which the power transistor and the intelligent switch are not protected by the conventional over-current protection. During this time period, rapid rising load current transients may occur and damage the device, usually due to a short circuit.

[0006] The object of the inventors is to provide an intelligent semiconductor switch circuit including a power transistor that can effectively protect the power transistor from over-current during the idle mode. Summary of the Invention

[0007] The above-mentioned object is achieved by using an emergency over-current circuit that is activated in the idle mode and meets the low supply current requirement. The emergency over-current circuit can respond quickly to rapid current transients in the idle mode and protect the power transistor during the transition from the idle mode to the normal mode until the conventional over-current protection becomes available after the mode change to the active mode (normal mode). To avoid any interaction with application-related load current variations, only rapid transients reflecting a short circuit are detected and cause a protective cut-off.

[0008] In one example, the present disclosure is directed to a circuit that includes a power transistor connected between a power terminal and an output terminal, a control circuit coupled to a gate electrode of the power transistor and configured to apply a gate current to the gate electrode to turn on or off the power transistor, and an overcurrent protection circuit connected to the power transistor. The circuit can be in a first mode and a second mode. In the first mode, some functions of the circuit are deactivated to reduce power consumption. In the second mode, all functions of the circuit are activated. The overcurrent protection circuit is configured to cause the circuit to change from the first mode to the second mode when the circuit is in the first mode and a sensing signal indicative of the current through the power transistor has reached a first threshold, which requires a specific transition time starting from when the sensing signal reaches the first threshold. The overcurrent protection circuit is further configured to output a discharge signal during the transition time when the sensing signal has reached a second threshold and the transition time has not ended, the discharge signal causing a reduction in the gate current applied to the gate electrode.

[0009] In one example, the present disclosure is directed to a method that includes the steps of turning on and off a power transistor of a circuit based on a gate current applied to a gate electrode of the power transistor, where the circuit can be in a first mode and a second mode. In the first mode, some functions of the circuit are deactivated to reduce power consumption. In the second mode, all functions of the circuit are activated; when the circuit is in the first mode, detecting that a sensing signal indicative of a load current through the power transistor has reached a first threshold, and in response thereto, changing the circuit from the first mode to the second mode, where the change from the first mode to the second mode requires a specific transition time starting from when the sensing signal reaches the first threshold; and detecting that the sensing signal has reached a second threshold, and in response thereto, outputting a discharge signal during the transition time, the discharge signal causing a reduction in a control current applied to a control electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The embodiments described herein can be better understood with reference to the following description and drawings. The components in the drawings are not necessarily drawn to scale, but rather the emphasis is placed on illustrating the principles of the embodiments. Further, in the drawings, like reference numerals designate corresponding parts. In the drawings:

[0011] Figure 1 An example of an intelligent semiconductor switch having an overcurrent protection function is illustrated.

[0012] Figure 2 A timing diagram is illustrated that depicts the behavior of the load current in an intelligent semiconductor switch during a transition between an idle mode and an active mode Figure 1 thereof.

[0013] Figure 3 Illustrates an example of an intelligent semiconductor switch with a current limiting function according to one or more techniques described herein.

[0014] Figure 4 Illustrates another example of an intelligent semiconductor switch with a current limiting function according to one or more techniques described herein.

[0015] Figure 5 Is a timing diagram illustrating the behavior of the load current and the output of a comparator in an example intelligent semiconductor switch in a first case where the load current transient is slower, in Figure 4 accordance with one or more techniques described herein.

[0016] Figure 6 Is a timing diagram illustrating the behavior of the load current and the output of a comparator in an example intelligent semiconductor switch in a second case where the load current transient is faster, in Figure 4 accordance with one or more techniques described herein.

[0017] Figure 7 Shows experimental curves graphing the behavior of several voltages and the load current as a function of time (a) in a first case where the load current transient is slow and (b) in a second case where the load current transient is fast.

[0018] Figure 8 Is a flowchart illustrating an example method for operating an intelligent semiconductor switch according to one or more techniques described in this disclosure. Detailed Description

[0019] Before describing the various embodiments in more detail, reference is made to Figure 1 an example of a conventional intelligent semiconductor switch (intelligent switch) 100. The examples described herein relate to a high-side switch connected between a power supply voltage terminal and an electrical load. However, it should be understood that the concepts described herein are also readily applicable to low-side switches.

[0020] In Figure 1 the example, the intelligent semiconductor switch 100 has (among other things) a power supply terminal VS and an output terminal OUT, to which a power supply voltage VS is applied, and an electrical load Z is L connected to the output terminal OUT during operation. A power transistor T L (i.e., more precisely, its load current path) can connect and disconnect the power supply terminal VS and the output terminal OUT depending on a control signal S ON In this example, the power transistor T Lis an n-channel MOS field-effect transistor (MOSFET) whose drain electrode is connected to a power supply terminal VS and whose source electrode is connected to an output terminal OUT. In the case of a MOSFET, the control signal S mentioned ON is converted into an appropriate gate current I G or gate voltage, which is supplied to the gate electrode of the MOSFET. In this example, the electrical load is represented by an impedance Z L connected between the output terminal OUT and a reference (e.g., ground) potential GND. The voltage across the electrical load Z L is labeled as V OUT (which is equal to the source voltage of the transistor T L ). The control signal S ON is generated by a control circuit 11 based on an input signal S IN that can be received at the input terminal IN of the intelligent semiconductor switch 100. The switch 100 also includes a driver circuit 13 that is configured to receive the control signal S ON from the control circuit 11 and generate the aforementioned gate current I L or gate voltage for the power transistor T G . In Figure 1 the example, the input signal S IN is a logic signal received from an external controller at the input pin IN. In other embodiments, the input signal S IN can be received via a digital communication interface (such as, for example, a Serial Peripheral Interface (SPI)). In one embodiment, the input signal S IN can be generated based on a command received via a bus line connected to the digital communication interface (e.g., by the communication interface). In the case of SPI, the bus line can be a so-called MOSI (Master Output / Slave Input) line.

[0021] Figure 1 The intelligent semiconductor switch 100 in also includes an overcurrent protection circuit 12 that can be configured to limit the load current I L when the switch 100 is operating in a normal mode (active mode), such that the load current I L does not exceed a specified current limit, particularly in the case of short circuit or overload conditions.

[0022] In some examples, in addition to current limiting, overcurrent shutdown is implemented. In this example, the overcurrent protection circuit 12 is coupled to a sense electrode of the power transistor T L that provides a sense current I S , and the sense current I S indicates the load current I L. The conventional overcurrent protection circuit 12 is also configured to generate a protection signal OC that is received by the control circuit 11. The protection signal OC is a logic signal, where, for example, a high level indicates that an overcurrent has been detected, and thus the control circuit 11 outputs a signal (as control signal S ON ), which causes the aforementioned overcurrent shutdown.

[0023] It should be understood that the intelligent semiconductor switch also includes a plurality of other circuits (such as an overvoltage clamping circuit and / or an overtemperature circuit), which are not shown in Figure 1 for the sake of clarity, but are well known to those skilled in the art. In addition, it should be noted that transistors with a separate source electrode that can be used as a sensing electrode for current measurement purposes are also well known and are not discussed in detail herein. Generally, a power transistor is composed of a plurality of transistor units connected in parallel. A small portion of the transistor units is connected to the sensing electrode, where the load current I L is related to the sensing current I S by a ratio k = I L / I S which is approximately equal to the ratio of the transistor units connected to the "normal" source electrode (providing the load current I L ) to the sensing electrode (providing the sensing current I S ).

[0024] In some cases, such as when the vehicle is parked, the self-current consumption of the intelligent semiconductor switch ( Figure 1 denoted by I gnd in L ) must be kept low. This can be achieved by operating the control circuit 11 (and thus the entire intelligent switch) in an idle mode (also referred to as the first mode in this application), where the power transistor T gnd is turned on, but multiple functions (and additional circuits) of the intelligent switch are disabled in order to reduce the current consumption I

[0025] . In particular, the conventional overcurrent protection 12 and current measurement can be disabled. This means that no conventional overcurrent protection is available during the idle mode. transition Due to the inherent response times of different circuits and the propagation delays introduced by the circuits when they send signals, the transition from the idle mode to the normal mode does not occur immediately. Instead, it requires a certain amount of time (mode transition time t

[0026] During this period, the conventional overcurrent protection 12 is not available, and during the transition period, typically due to a short circuit, a rapidly rising load current transient can occur and damage the device. Figure 2 This problem is further illustrated in Figure 2shows that during the transition from idle mode to normal mode, the load current I L When the load Z L becomes active (for example, when the vehicle is started after being parked), the load current I L When the load current I L Reaching the first threshold I L(idle)_thres When the corresponding signal (wake-up signal) is sent to the control circuit 11, the control circuit 11 starts the transition from the idle mode to the normal mode. At the end of the transition, all circuits of the intelligent switch are activated, especially the overcurrent protection 12. As mentioned, this requires a certain mode transition time t transition , which depends on the reaction time t of the control circuit and additional circuit of the intelligent switch reaction , and depends on the propagation time t required to send and receive the different signals required to activate the inactive function of the smart switch propagation In this example, the reaction time t reaction is 6μs, the propagation time t propagation is 9.5μs, so the total mode transition time t transition s. However, during this transition time, very fast current load transients can occur (e.g., with a slope of 20 A / μs or even 50 A / μs). This means that, at the end of the mode transition period, the load current can reach 250 A or even 800 A and thus far exceed the threshold current I trip , the threshold current I trip is used to trigger the overcurrent shutdown and is typically around 135 A. Therefore, the possibility that the smart switch and its power transistors are damaged during the mode transition time cannot be ruled out and should be avoided. transisition This is usually not feasible, so additional overcurrent protection is required in idle mode.

[0027] The first possibility is to keep the conventional overcurrent protection activated in idle mode, which has good accuracy. However, this will cause the current consumption I gnd This is incompatible with the low current requirement of idle mode.

[0028] Another possibility is to add a conventional low power overcurrent protection circuit capable of operating with low power consumption. However, because the performance of the protection stage is limited by the current consumption, the known circuits lack accuracy and cannot meet the overcurrent requirements.

[0029] Figure 3 An example of an intelligent semiconductor switch 10 is shown, which may be considered as Figure 1Modifications / improvements to the example. In this example, the intelligent switch circuit 10 includes an additional overcurrent protection circuit 15 (emergency overcurrent protection). The additional overcurrent protection circuit 15 is connected to the power transistor T L , such that it can (e.g., indirectly) sense the load current I L passing through the power transistor (or indicate the amount of the load current). It is configured to respond to rapid load current transients when the intelligent switch 10 is in the idle mode. In particular, it can distinguish between a short - circuit condition that causes a rapid current transient and a normal load change that causes a slower current transient. The additional overcurrent protection circuit 15 has a very low current consumption and meets the low - current limit in the idle mode.

[0030] When a rapid transient event is detected, the additional overcurrent protection circuit 15 sends a signal to the driver circuit 13, which causes the power transistor T L to turn off within a short time period, and thus causes the load current I L to decrease almost immediately. The additional overcurrent protection circuit 15 is also configured to generate a signal IDLE_off, which is received by the control circuit 11 and causes the control circuit 11 and the intelligent switch 10 to change from the idle mode to the normal mode.

[0031] The additional overcurrent protection circuit 15 has a response time significantly faster than the transition time t transition required for the conventional overcurrent protection circuit 12 to become fully operational. Thus, as further explained in detail below, the additional overcurrent protection circuit 15 ensures that the power transistor T L of the intelligent switch 10 is protected during the transition phase between the idle mode and the normal mode when the conventional overcurrent protection circuit 12 has not been activated yet.

[0032] In the idle mode, the conventional overcurrent protection circuit 12s is not activated, while the additional overcurrent protection 15 is activated. During the transition between the idle mode and the normal mode, the additional overcurrent protection circuit 15 protects the switch from rapid transient overcurrent conditions until the conventional overcurrent protection 12 becomes fully operational. In the normal mode, only the conventional overcurrent protection circuit 12 is activated, while the additional overcurrent protection 15 is not activated.

[0033] Figure 4 Illustrates a more detailed example similar to the Figure 3 circuit. The additional overcurrent protection 15 is connected between the source and the drain of the power transistor T L , and includes a first comparator K1 and a second comparator K2, which are configured to compare a sense signal ΔV L indicating the load current I L passing through the power transistor T BEReact. Sensing signal ΔV BE Based on the voltage drop V across the power transistor T L (ΔV DS ~ drain - source voltage V BE ). The comparator K1 and the comparator K2 are both coupled to the input stage that outputs the sensing signal ΔV DS such that the difference between the first input and the second input of each comparator is equal to the sensing signal ΔV BE . Since the two comparators receive the same input, their corresponding thresholds are correlated. BE

[0034] In the depicted example, the sensing signal ΔV BE is the voltage equal to the drain - source voltage V across the power transistor T L . When the transistor T DS conducts (is on), the drain - source voltage V L is equal to I DS ·R L , where R ON denotes the (known) on - resistance of the transistor T ON . Thus, ΔV L ≈I BE ·R L , and thus ΔV ON can be used as a sensing signal representing the load current I BE . L

[0035] The first comparator K1 is configured to output a signal IDLE_off to the control circuit 11 when the sensing signal ΔV BE reaches or exceeds the first threshold Idle_thres_slow. When receiving the signal IDLE_off of a specific logic level (e.g., high level), the control circuit 11 wakes up from the idle mode and initiates the mode change of the smart switch 10 from the idle mode to the normal mode. In particular, it sends a corresponding wake - up signal (not shown in the figure) to other inactive circuits of the smart switch 10 (especially the conventional over - current protection circuit 12). The wake - up signal is configured to activate the inactive circuits and activate all functions of the smart switch 10. As already discussed with reference to Figure 2 , the transition between the idle mode (the first mode) and the normal mode (the second mode) requires a certain transition time t transition , which starts from when the sensing signal reaches the first threshold Idle_thres_slow. The mode transition time depends on the response times of different circuits and on the time required for the signal to propagate between circuits.

[0036] ​​In this example, the first comparator K1 has a first response time t1. The response time t1 is an inherent parameter of the comparator K1 and corresponds to the time period between an event and the comparator signaling that event, i.e., the time required for the comparator to become active once the activation event occurs. In this example, the first response time t1 corresponds to the time required for the first comparator K1 to output a change in the level of the signal IDLE_off to the control circuit 11 once the sense signal has reached the first threshold. Thus, the transition time (and other parameters) of the intelligent switch 10 depends on the first response time t1.

[0037] The second comparator K2 is configured to signal that the sense signal ΔV BE has reached or exceeded a second threshold Idle_thres_fast and cause a discharge signal DIS to be output to the driver circuit 13. As will be explained later, the discharge signal causes the gate current I applied to the gate electrode G to decrease. It should be understood that the choice of the first threshold and the second threshold depends on the on-resistance R L of the transistor T ON .

[0038] In this example, the second threshold Idle_thres_fast is higher than the first threshold Idle_thres_slow. Additionally, the second comparator K2 has a second response time t2, which is shorter than the first response time t1 of the first comparator K1. In this example, the second response time t2 corresponds to the time required for the second comparator K2 to signal a change in the level of the discharge signal to the driver circuit 13 once the sense signal ΔV BE has reached the second threshold Idle_thres_fast. In this example, the response time of the first comparator K1 is at least 5 μs and, in particular, between 5 μs and 10 μs. The response time of the second comparator K2 is less than 3 μs and, in particular, between 1 μs and 2 μs. Thus, the first comparator K1 is considered "slow". The comparator topology of the first comparator K1 focuses on accuracy but at the cost of a longer response time. In contrast, the second comparator K2 is considered "fast" (i.e., faster than the first comparator K1). The comparator topology of the second comparator K2 can be implemented with a high-gain folded cascade, which allows for a faster response time, where the cost is that its accuracy is lower than that of the first comparator K1.

[0039] Since the first comparator K1 is very accurate, it can be ensured that the signal IDLE_off is sent only when the first threshold has been reached. The signal IDLE_off triggers the wake-up of the control circuit 11 and the mode change of the intelligent switch 10 to the normal mode. In particular, it can be ensured that the first comparator K1 does not respond to artifacts and only when the load current I LThe switch 10 changes to the normal mode only when a certain limit represented by the comparator threshold of the comparator K1 is exceeded. Since the second comparator K2 has a faster response time, it can react almost immediately once the second threshold has been reached, thereby enhancing the safety during the transition from the idle mode to the normal mode. Thus, the power transistor of the switch 10 can be effectively protected from overcurrent during the transition time.

[0040] In the depicted example, the overcurrent protection circuit 15 further includes a logic gate 122 that is configured to combine the output signals of the first comparator K1 and the second comparator K2. The logic gate 122 is configured to blank the output signal of the fast comparator K2 once the slow comparator K1 initiates the transition from the idle mode to the normal mode by generating a wake-up signal IDLE_off of an appropriate level. In this example, the logic gate 122 is an AND gate, and when the fast comparator signals that the second threshold Idle_thres_fast has been reached, assuming that the first comparator has not detected the first threshold Idle_thres_slow, the logic gate 122 outputs a discharge signal DIS. In other words, only when the first comparator K1 has not signaled that the sense signal ΔV BE has reached the first threshold Idle_thres_slow is the output signal of the fast comparator K2 forwarded as the discharge signal DIS to the gate driver 13. This can occur due to the difference between the first response time t1 and the second response time t1. As will be discussed with reference to Figure 6 In the case of a fast load current transient, even if the second threshold is higher than the first threshold, the second comparator K2 can react before the first comparator K1. However, in the case of a slow load current change, if the signal IDLE_off has been output before the second threshold is reached, the logic gate 122 is not activated and no discharge signal is output. Thus, only when the first comparator K1 is not activated (i.e., has not detected the condition ΔV BE ≥Idle_thres_slow) can the output of the second comparator K2 be forwarded. Thereby, the output signal of the second comparator K2 is only forwarded in the case of an "acute" short-circuit condition (i.e., a fast increase in the load current), thereby preventing the power transistor T L from being turned off after a "normal" load current change that does not damage the power transistor.

[0041] Essentially, the discharge signal DIS output by the logic gate 122 triggers the turn-off of the power transistor T L only in response to a sharp increase in the load current I L If the increase in the load current is "normal" (i.e., the load Z LIf the normal result is to become active, the output signal of comparator K2 will be nullified by comparator K1 with the help of logic gate 122 before comparator K2 signals an overcurrent.

[0042] The additional overcurrent protection circuit 15 may also include an optional delay element 121 connected to the first comparator K1 and configured to increase the propagation time of the output signal of the first comparator K1 to the logic gate 122 by a predefined delay time. The delay time can be fixed or adjustable. This delay element 121 makes it possible to adjust the difference between the first response time and the second response time of comparator K1 and comparator K2 (and in particular to compensate at least part of the mode transition time of the intelligent switch 10). As previously mentioned, the mode transition time depends on the propagation time of various signals and on the inherent response times of different circuits of the intelligent switch 10.

[0043] In this example, the input stage of the output sensing signal ΔV BE includes a first transistor T1 and a second transistor T2. The transistors T1 and T2 are connected to the power transistor T L in such a way that the voltage difference ΔV BE between the emitter voltages of the first transistor T1 and the second transistor T2 is equal to (or proportional to) the source-drain voltage V L across the power transistor T DS . In this example, the first transistor T1 and the second transistor T2 are bipolar transistors, where the base of the second transistor T2 is connected to the drain of the power transistor T L , and the collectors of the first transistor T1 and the second transistor T2 are connected to the source of the power transistor T L .

[0044] The on-resistance R L of the power transistor T ON with a positive temperature coefficient can be (at least partially) compensated by the input stage, so that the resulting voltage difference ΔV BE is substantially independent of temperature. Thus, the first threshold and the second threshold of the comparator can be constant with temperature, which enhances the robustness of the intelligent switch 10 over a wide temperature range. As mentioned, ΔV BE ≈V DS ≈I L ·R ON , and thus ΔV BE can be used as a sensing signal representing the load current I L .

[0045] The first inputs of the first comparator K1 and the second comparator K2 are coupled to the emitter of the first transistor T1, while the second inputs of the first comparator and the second comparator are coupled to the emitter of the second transistor T2. Thus, both comparators operate based on the same sense signal ΔV BE for operation.

[0046] The driver circuit 13 includes a driver 131 that generates a gate current I ON in accordance with a control signal S G (generating a corresponding gate voltage) to turn on and off the transistor T L . Further, the driver circuit 13 is configured to activate a discharge current path through which the gate electrode of the power transistor T L can be discharged, thereby causing a rapid turn-off of the transistor T L . In the present example, the driver circuit 13 includes a current source Q1 that is arranged in the discharge current path and is connected to the gate of the power transistor T L via a switch SW. The current source Q1 is configured to generate a current i1. The switch SW is turned on and off in accordance with a discharge signal DIS. When the current source Q1 (via the switch SW) is connected to the gate electrode of the power transistor T L , a discharge current I REG flows through the discharge current path, thereby discharging the gate electrode and causing the gate current I REG to decrease by the current I G . It should be understood that a resistor may be used instead of the current source Q1. In one embodiment, MOS transistors are used to implement the switch and the current source.

[0047] In the depicted example, the intelligent switch circuit 10 further includes an electronic switch M1 that is arranged between the drain of the power transistor T L and an additional overcurrent protection 15. The electronic switch M1 is configured to connect the additional overcurrent protection 15 to the power transistor T L and disconnect it from the power transistor T LDisconnect. In this embodiment, switch M1 is a MOSFET. Further, in this embodiment, when the intelligent switch circuit 10 is in the idle mode, the electronic switch M1 is turned on, and once the intelligent switch 10 operates in the normal mode (i.e., after the conventional overcurrent protection is activated), the electronic switch M1 is turned off. Although not explicitly shown in the figure, the electronic switch M1 can be turned on or off by the control circuit 11 depending on the operating mode. Thus, it can be ensured that the additional overcurrent protection circuit 15 is operable only when the intelligent switch 10 (and the control circuit 11) is in the idle mode or during the transition between the idle mode and the normal mode, thereby reducing the power consumption in the idle state and ensuring that the overcurrent protection circuit 12 and the overcurrent protection circuit 15 do not interfere with each other.

[0048] Now refer to Figure 5 and Figure 6 to further explain in detail the behavior and function of the additional overcurrent protection circuit 15.

[0049] Figure 5 shows the timing diagram of the load current I (upper figure) and the timing diagram of the outputs of the comparator K1 and the comparator K2 (lower figure) when the load current changes normally (i.e., relatively slowly) during the idle mode and the transition to the normal mode. Such a change in the load current may be the result of an intentional load change (e.g., activating the load Z from the standby state L ). In this example, the slope of the load current is less than 10 A / μs, which is considered slow. When the load current reaches the first threshold Idle_thres_slow, the first comparator K1 is triggered (by the signal IDLE_off, see L ) and the transition from the idle mode to the normal mode is initiated. In particular, this event triggers the first reaction time t1, at the end of which the output of the first comparator K1 becomes active and provides the signal IDLE_off (e.g., with a high level). Similarly, when the load current reaches the second threshold Idle_thres_fast, the second comparator K2 is triggered and the second reaction time t2 starts, at the end of which the output of the second comparator K2 becomes active (e.g., a high level at the comparator output). As can be seen in the lower figure, the second reaction time t2 is much shorter than the first reaction time t1. In Figure 4 's example, the first reaction time t1 ends before the second reaction time t2, so the first comparator K1 becomes active before the second comparator K2. Therefore, the logic gate 122 does not nullify the output signal of the fast comparator K2 and does not output a discharge signal to the driver circuit 13. Figure 5 's example, the first reaction time t1 ends before the second reaction time t2, so the first comparator K1 becomes active before the second comparator K2. Therefore, the logic gate 122 does not nullify the output signal of the fast comparator K2 and does not output a discharge signal to the driver circuit 13.

[0050] Once the first comparator K1 is activated, it provides an output signal IDLE_off (e.g., with a high level) to the control circuit 11, which causes the control circuit 11 to wake up from the idle mode and send a signal to the other non-activated sub-circuits of the switch (in particular to the conventional over-current protection circuit) to make them activated. When all the non-activated functions of the intelligent switch are activated, the transition period ends, and the intelligent switch is in the normal mode. In the normal mode, when the load current reaches the third threshold I trip when the conventional over-current protection circuit outputs a protection signal OC to the control circuit 11, and the control circuit 11 generates a control signal S ON which causes the driver circuit 13 to turn off the power transistor T L . Figure 5 It can also be seen in

[0051] that the load current then decreases. After transitioning to the normal mode, the additional over-current protection can be disabled as long as the conventional over-current protection circuit becomes activated.

[0052] In Figure 5 the example of (“slow” load current transient), although the additional over-current protection circuit is activated at the beginning of the transition, it does not start operating, and only the conventional over-current protection circuit actively protects the intelligent switch. Therefore, the additional over-current protection circuit 15 does not interfere with the operation of the conventional over-current protection circuit 12.

[0053] Figure 6 shows the timing diagram of the load current I L in another case (upper figure) and the timing diagrams of the outputs of the comparator K1 and the comparator K2 (lower figure), where the load current changes rapidly during the idle mode, which is usually due to severe short-circuit conditions. In this example, the load current slope is greater than 10 A / μs, which is considered fast. Contrary to Figure 5 the example of, the second response time t2 of the second comparator K2 ends before the first response time t1 of the first comparator K1, so the second comparator K2 is activated before the first comparator K1. Therefore, the logic gate 122 does not nullify the output signal of the second comparator K2, and the power transistor T L can be actively protected by the additional over-current protection circuit within a given time. Therefore, a discharge signal DIS is output to the driver circuit 13, and the gate current decreases, which causes the load current to decrease and ultimately causes the transistor to turn off, as Figure 6as shown in the timing diagram. Once the first response time t1 ends, the first comparator K1 becomes active, and the conventional overcurrent protection circuit protects the device from a short - circuit event that occurs again. Thus, until the first comparator K1 and thus the conventional overcurrent protection become active, the power transistor of the intelligent switch is actively protected by the additional overcurrent protection circuit.

[0054] Figure 7 (a) shows the experimental curves that graph the behavior of several voltages and the behavior of the load current as a function of time in the first case where the load - current transient is slow. This corresponds to Figure 5 the ideal case illustrated in

[0055] In this case, the slope of the load current I L is approximately 2.5 A / μs. When the load current reaches the first threshold, the transition to the normal mode is initiated. However, during the transition time, the load current I L remains below the second threshold of the second comparator, and the additional over - current protection does not start operating. Once the transition time ends, the power transistor of the intelligent switch is protected by the conventional over - current protection. In this example, when the load current reaches the third threshold I trip (which is equal to 125 A in this case), the conventional over - current protection sends a protection signal that causes the control current to decrease and the power transistor to turn off.

[0056] Figure 7 (b) shows the experimental curves that graph the behavior of several voltage signals and the behavior of the load current I L as a function of time in the second case where the load - current transient is fast. This corresponds to Figure 6 the ideal case illustrated in

[0057] In this case, the slope of the load current is approximately 25 A / μs. When the load current reaches the first threshold, the transition to the normal mode is initiated. Since the current transient is very fast, the load current quickly exceeds the second threshold, thus activating the second comparator, and the additional over - current protection circuit can trigger the turn - off of the power transistor T L . Thus, the additional over - current protection circuit then outputs a discharge signal, which causes the load current to decrease and ultimately turns off the power transistor. Once the transition to the normal mode ends, the conventional over - current protection will take over the function of the additional over - current protection circuit.

[0058] Figure 8 is a flowchart that illustrates an example method for operating an intelligent semiconductor switch and protecting it from over - current. The example process 500 can be used to operate the devices illustrated in the present disclosure (such as according to Figure 3 and Figure 4intelligent semiconductor switches).

[0059] Process 500 includes determining the gate current I G To turn on and off the power transistor T of the circuit 10 L (Step 510), the gate current I G Applied by the control circuit 11 to the power transistor T L The gate electrode of the smart switch. In one example, the circuit 10 is a smart semiconductor switch. The circuit 10 can operate in a first mode (referred to as an idle mode) in which some functions of the circuit are inactive to reduce power consumption, and in a second mode (referred to as a normal mode or an active mode) in which all functions of the smart switch are active. For example, the circuit can include a conventional overcurrent protection circuit 12 that is inactive in the idle mode and active in the normal mode. The conventional overcurrent protection circuit 12 is configured to send a signal that causes a load current reduction when the load current exceeds a predefined threshold.

[0060] Process 500 also includes detecting an indication that a power supply is provided through power transistor T when circuit 10 is in the first mode (idle mode). L The current I L The sensing signal ΔV BE The first threshold has been reached, and in response thereto, the circuit 10 is changed from the first mode to the second mode (step 520). The sense signal ΔV BE can be based on the power transistor T L The drain-source voltage V DS The step of changing the circuit 10 from the first mode to the second mode requires a certain transition time starting from when the sensing signal reaches the first threshold. This transition time is due to the inherent reaction time of the different subcircuits of the circuit 10 and due to the propagation time required to propagate the signal between the subcircuits. In one example, the sensing signal ΔV is detected. BE Having reached the first threshold value includes signaling by the first comparator K1 that the sense signal has reached the first threshold value. The first comparator K1 may then output a wake-up signal IDLE_off to the control circuit 11 of the circuit 10, which causes the control circuit 11 to initiate a mode change from the idle mode to the normal mode, and to send activation signals to the inactive sub-circuits of the circuit 10 (such as the conventional overcurrent protection circuit 12). Upon receiving these signals, the corresponding sub-circuits also become active. Once all sub-circuits that were inactive in the idle mode become active, the transition is complete, and the circuit is in the normal mode.

[0061] Process 500 also includes detecting that the sense signal has reached a second threshold, and in response thereto, outputting a discharge signal during a transition time, which causes a gate current I to be applied to the gate electrode. GDecrease (step 530). The second threshold may be higher than the first threshold. Thus, when the transition to the normal mode has started, the detection of the sense signal reaching the second threshold occurs. However, the discharge signal is output only if the transition has not ended (i.e., if the circuit 10 is not yet in the normal mode). In one example, detecting that the sense signal has reached the second threshold includes signaling by the second comparator K2 that the sense signal has reached the second threshold. In one example, decreasing the gate current I applied to the gate electrode G includes activating a discharge current path, the power transistor T L whose gate electrode can be discharged via the discharge current path. The discharge current path may include a current source that is connected to the gate electrode of the power transistor T through a switch activated by the discharge signal L . The first comparator and the second comparator are part of an additional overcurrent protection circuit that is deactivated in the normal mode and activated in the idle mode.

[0062] In one example, the method further includes combining the output signals of the first comparator K1 and the second comparator K2, and outputting a discharge signal when the second comparator K2 signals that the sense signal has reached the second threshold and the first comparator K1 has not signaled that the sense signal has reached the first threshold. The second comparator K2 has an inherent response time shorter than that of the first comparator K1.

[0063] When the load current transient is fast enough, due to the difference in response times between the comparators, the second comparator K2 may provide an output signal before the first comparator K1 provides its output signal. In this case, the discharge signal is output and the power transistor is turned off. Thus, during at least part of the transition time, the circuit is actively protected by the additional overcurrent protection circuit. When the load current changes slowly enough, the first comparator K1 provides its output signal before the second comparator K2 can provide an output signal, and no discharge signal is output. Once the transition time ends, the additional overcurrent protection circuit will become deactivated, and the conventional overcurrent protection circuit ensures the protection of the circuit. In one example, the process includes predefining a delay time for the propagation delay of the output signal of the first comparator K1. Thereby, at least part of the response and propagation times of the sub-circuit can be accommodated to ensure that the circuit is always protected by one of the conventional overcurrent protection circuit and the additional overcurrent protection circuit.

[0064] This application describes the use of an additional overcurrent protection circuit in an intelligent semiconductor switch having a power transistor, which is activated at least during the idle mode of the circuit. The additional overcurrent protection circuit is capable of reacting to rapid load current transients and has low power consumption. Thereby, it is possible to effectively protect the circuit with low power consumption during the transition from the idle mode to the normal mode. In particular, by using a logical combination of two comparators with an idle threshold comparator, it is possible to distinguish rapid load current transients reflecting a short circuit from load current variations related to the application, and thus avoid any unexpected interaction or unnecessary turn-off of the power transistor. In particular, the additional overcurrent protection circuit reacts only under "hard" short-circuit conditions.

[0065] Although the specification only describes the transition from the idle mode to the normal mode, it is obvious that Figure 3 and Figure 4 the circuit can also be used in a similar way for the transition from the normal mode to the idle mode, where the additional overcurrent protection circuit is activated at the start of the transition and protects the intelligent switch during the transition and in the idle mode. In particular, the first (slow) comparator K1 of the additional overcurrent protection circuit can be used to enter the idle mode, and the second (fast) comparator K2 can detect rapid load current transients after the conventional overcurrent protection is deactivated.

[0066] Although various embodiments have been illustrated and described with respect to one or more specific embodiments, changes and / or modifications can be made to the illustrated examples without departing from the spirit and scope of the features and structures described herein. In particular, for the various functions performed by the above-described components or structures (units, components, devices, circuits, systems, etc.), unless otherwise specified, the terms used to describe such components (including references to "components") are intended to correspond to any component or structure that performs the specified function of the component (e.g., functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the function in the exemplary embodiments of the present disclosure illustrated herein.

Claims

1. A circuit (10), comprising: Power transistor (T L ), the power transistor (T L ) is connected between a power supply terminal (VS) and an output terminal (OUT); Control circuit (11), the control circuit (11) being coupled to a control electrode of the power transistor (T L ) and configured to apply a control current (I G ) to the control electrode to turn on or off the power transistor (T L ); and Overcurrent protection circuit (15), the overcurrent protection circuit being connected to the power transistor (T L ). wherein the circuit (10) can be in a first mode and in a second mode. In the first mode, some functions of the circuit (10) are deactivated to reduce power consumption. In the second mode, all functions of the circuit (10) are activated; and wherein the overcurrent protection circuit (15) is configured to: When the circuit (10) is in the first mode and indicates that a sensing signal (ΔV L ) of a load current (I L ) passing through the power transistor (T BE ) has reached a first threshold, causing the circuit to change from the first mode to the second mode, which requires a specific transition time starting from when the sensing signal (ΔV BE ) reaches the first threshold, and When the sensing signal (ΔV BE ) has reached a second threshold, a discharge signal (DIS) is output during the transition time, and the discharge signal (DIS) causes a decrease in the control current (I G ) applied to the control electrode.

2. The circuit according to claim 1, wherein the sensed signal (ΔV BE ) is based on a drain-source voltage (V L ) across the power transistor (T DS ).

3. The circuit according to claim 1 or 2, wherein the second threshold is higher than the first threshold.

4. The circuit according to any one of claims 1 to 3, wherein the overcurrent protection circuit (15) comprises: First comparator (K1), the first comparator (K1) being configured to signal that the sensed signal (ΔV BE ) has reached the first threshold; Second comparator (K2), the second comparator (K2) being configured to signal that the sense signal (ΔV BE ) has reached the second threshold value.

5. The circuit according to claim 4, wherein the overcurrent protection circuit (15) further comprises a logic gate (122), and the logic gate (122) is configured to combine the output signals of the first comparator (K1) and the second comparator (K2).

6. The circuit according to claim 5, wherein the logic gate (122) indicates a first condition, that is: the second comparator (K2) signals that the sensed signal has reached the second threshold, and the first comparator (K1) has not signaled that the sensed signal has reached the first threshold.

7. The circuit according to claim 6, wherein when the logic gate (122) indicates that the first condition is satisfied, the discharge signal (DIS) is output.

8. The circuit according to any one of claims 4 to 7, wherein the first comparator (K1) has a first response time (t1), and the second comparator (K2) has a second response time (t2), and the first response time (t1) is longer than the second response time (t2).

9. The circuit according to claim 8, wherein the response time (t1) of the first comparator (K1) is at least 5 μs, and in particular, between 5 μs and 10 μs.

10. The circuit according to claim 8 or 9, wherein the response time (t2) of the second comparator (K2) is less than 3 μs, and in particular, between 1 μs and 2 μs.

11. The circuit according to any one of claims 8 to 10, wherein the overcurrent protection circuit (15) further comprises: a delay element (121), the delay element (121) is connected to the first comparator (K1), and is configured to predefine a delay time for the propagation delay of the output signal of the first comparator (K1) to the logic gate (122).

12. The circuit according to any one of claims 1 to 11, further comprising: Driver circuit (13), wherein the discharge signal (DIS) causes the driver circuit (13) to activate a discharge current path, and the control electrode of the power transistor (T L ) can be discharged via the discharge current path.

13. The circuit according to any one of claims 1 to 12, further comprising: another overcurrent protection circuit (12), the another overcurrent protection circuit (12) is configured to: When the circuit (10) is in the second mode, another sensing signal (I BE ) different from the sensing signal (ΔV S ) is received, and When the circuit (10) is in the second mode, a protection signal (OC) is output based on the value of the other sensing signal (I S ), and the protection signal (OC) causes a decrease in the control current (I G ) applied to the control electrode.

14. The circuit according to claim 13, wherein when the circuit (10) is in the first mode, the another overcurrent protection circuit (12) is deactivated.

15. The circuit according to claim 13 or 12, wherein the other overcurrent protection circuit (12) is configured to output the protection signal (OC) in response to the other sensing signal (I S ) reaching a third threshold (I trip ).

16. The circuit according to claim 15, wherein the third threshold value (I trip ) represents a load current value, and the load current value is higher than the load current value represented by the second threshold value.

17. A method, comprising: According to a control current (I G ), a power transistor (T L ) of a circuit (10) is turned on and off, and the control current (I G ) is applied to a control electrode of the power transistor (T L ), wherein the circuit (10) can be in a first mode and a second mode. In the first mode, some functions of the circuit are deactivated to reduce power consumption, and in the second mode, all functions of the circuit are activated; When the circuit (10) is in the first mode, it is detected that a sensing signal (ΔV L ) indicating a load current (I L ) passing through the power transistor (T BE ) has reached a first threshold, and in response to detecting that the sensing signal (ΔV L ) indicating the load current (I L ) passing through the power transistor (T BE ) has reached the first threshold, the circuit (10) is changed from the first mode to the second mode, wherein the change from the first mode to the second mode requires a specific transition time starting from when the sensing signal reaches the first threshold; and Detect that the sensed signal (ΔV BE ) has reached a second threshold, and in response to detecting that the sensed signal (ΔV BE ) has reached the second threshold, output a discharge signal (DIS) during the transition time, the discharge signal (DIS) causing a decrease in the control current (I G ) applied to the control electrode.

18. The method according to claim 17, further comprising at least one of the following: signaling by a first comparator (K1) that the sense signal has reached the first threshold; and signaling by a second comparator (K2) that the sense signal has reached the second threshold.

19. The method according to claim 18, further comprising: combining output signals of the first comparator (K1) and the second comparator (K2), wherein the discharge current is sent when: The second comparator (K2) signals that the sensed signal (ΔV BE ) has reached the second threshold, and The first comparator (K1) has not signaled that the sensed signal (ΔV BE ) has reached the first threshold value.

20. The method according to claim 18 or 19, further comprising: predefining a propagation delay of the output signal of the first comparator (K1) by a predefined delay time.

21. The method according to any one of claims 17 to 20, wherein reducing the control current (I G ) applied to the control electrode comprises: Activate the discharge current path, and the control electrode of the power transistor (T L ) can discharge via the discharge current path.

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