A combined receiving device tester

By designing a combination receiving device tester that integrates multiple signal simulation functions, the problems of a wide variety of test equipment and inconsistent interfaces in the existing technology are solved, and efficient and unified testing of combination receiving devices is achieved to meet the multifunctional requirements of modern aviation navigation equipment.

CN120263312BActive Publication Date: 2025-09-12CHENGDU RONGCHUANG AVIATION TECH CO LTD
View PDF 3 Cites 0 Cited by

Patent Information

Application Number
CN202510742178.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-06-05
Publication Date
2025-09-12
Estimated Expiration
2045-06-05

AI Technical Summary

Technical Problem

In the existing technology, the combined receiving equipment testing process involves a wide variety of test equipment, complex test procedures, inconsistent interfaces, and the inability to centrally test multiple receiver modules, making it difficult to meet the multifunctional, modular, and integrated requirements of modern aviation navigation equipment.

Method used

A combination receiving equipment tester is designed. Based on the software radio platform architecture, it integrates multiple signal simulation functions such as pointing beacon, Volt, heading glide, microwave landing, etc. It can test different types of navigation receivers through a single platform. It adopts modular design and unified interface to support regular inspection of multiple models of combination receiving equipment.

Benefits of technology

It simplifies the test process, reduces the number of equipment, improves the adaptability and compatibility of the test system, reduces operational complexity and maintenance costs, adapts to different test modes and signal standards, and is suitable for field maintenance and regular inspection operations.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120263312B_ABST
    Figure CN120263312B_ABST
Patent Text Reader

Abstract

The present invention relates to the field of radio testing technology, and particularly relates to a combined receiving device tester, comprising a hardware module platform and a software module platform; the hardware module platform comprises a power supply unit, an input and display unit, a main control unit, and a radio frequency unit; the software module platform comprises an MCU embedded software module, embedded in a processor of the main control unit, and comprising a communication module, a human-computer interaction module, and a function option management module; and an FPGA logic software module, configured by power-on loading of the MCU, and comprising a top-level connection module, an FMC communication module, a signal generation module, a transmission module, a self-test metering module, and an ADC / DAC driver module. The present invention integrates the functions of simulating a pointing beacon, a volt, a heading / glide path, and a microwave landing signal into a single device platform, supports centralized testing of beacon receivers, volt receivers, heading / glide path receivers, microwave landing receivers, and a combined receiver, reduces the number of devices, and improves the adaptability and compatibility of the test system.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The invention relates to the technical field of radio testing, in particular to a combined receiving device tester. Background Art

[0002] Combined receivers are composite avionics devices that integrate multiple navigation reception functions, including marker beacons, very high frequency omnidirectional beacons, instrument landing systems, and microwave landing systems. These devices can simultaneously receive and process navigation signals from multiple different systems, providing pilots with localizer and glide path deviation information, as well as approach guidance. They are a key means for aircraft to obtain spatial position information during takeoff, approach, and landing, and are widely used in both military and civil aviation.

[0003] To ensure the reliability and navigation accuracy of combined receivers during use, aviation maintenance organizations must regularly perform functional testing and performance verification. Existing techniques typically test each module individually, using single-function devices such as a marker beacon simulator, VOR simulator, heading / glide path simulator, or microwave landing simulator, depending on the aircraft's navigation receiver module.

[0004] However, with the advancement of aviation navigation technology and the increasing complexity of aircraft electronic systems, existing single-function simulators face multiple technical bottlenecks. Firstly, differences in interfaces, protocols, and signal models between different test equipment lead to cumbersome testing processes and frequent switching operations. Secondly, existing equipment generally lacks unified integration capabilities, making it unable to meet the requirements for coordinated testing of multiple modules in a combined receiver. This decentralized testing approach not only increases testing time and equipment maintenance costs, but also makes it difficult to adapt to the multifunctional, modular, and integrated test system requirements of the new generation of combined navigation receivers.

[0005] Therefore, a combined receiving equipment test system is needed that can integrate multiple navigation signal simulation functions into one and support unified testing of multiple types of receivers, so as to improve test efficiency, reduce operational complexity and meet the ground support needs of future aviation navigation equipment. Summary of the Invention

[0006] The present invention proposes a combined receiving device tester to solve the problems in the prior art of a wide variety of test devices, complex test procedures, inconsistent interfaces, and inability to perform centralized testing on multiple receiver modules during combined receiving device testing.

[0007] The tester is based on a software radio platform architecture and integrates multiple signal simulation capabilities such as marker beacons, Volt, heading descent, and microwave landing. It can test different types of navigation receivers through a single platform, adapt to the regular inspection requirements of multiple models of combined receiving equipment, simplify the test process, reduce equipment redundancy, improve ground support efficiency, and meet the needs of modern avionics systems for multi-functional integrated test instruments.

[0008] The present invention is achieved through the following technical solutions:

[0009] A combined receiving device tester includes a hardware module platform and a software module platform;

[0010] The hardware module platform includes a power supply unit for providing portable power supply and external power access, and has overcurrent, overcharge, overdischarge, short circuit and DC reverse protection functions;

[0011] Input and display unit, including serial port display screen and key module;

[0012] Main control unit, including processor, power conversion module, input processing module and waveform generation module;

[0013] The radio frequency unit is housed in an aluminum alloy shielded cavity, operates in the VHF and microwave frequency bands, and has modulation, mixing, filtering, and power amplification functions;

[0014] The software module platform includes an MCU embedded software module, which is embedded in the processor of the main control unit and includes a communication module, a human-computer interaction module, and a function option management module;

[0015] The FPGA logic software module is configured by MCU power-up loading, including the top-level connection module, FMC communication module, signal generation module, transmission module, self-test metering module, and ADC / DAC driver module;

[0016] The main control unit receives parameter instructions from the input unit through the input processing module, calls the function option management module to schedule the Volt, heading, glide path, beacon, and microwave landing function modules. The function option management module outputs modulation parameters to the waveform generation module to generate an intermediate frequency transmission signal. The modulation parameters and the intermediate frequency signal are transmitted to the FPGA through the FMC communication module. The FPGA controls the signal generation module, DAC driver module, and transmission module to output a digital waveform. The radio frequency unit receives the waveform and performs modulation, mixing, filtering, and power amplification before outputting it.

[0017] Furthermore, the power conversion module outputs four voltages of 12V, 8.4V, 5V and 3.3V, which are supplied to the main control unit and each module of the radio frequency unit respectively.

[0018] Furthermore, the input and display unit includes a serial port display screen and a keyboard assembly consisting of function keys and a knob, and the display screen and keyboard assembly are connected to the input processing module of the main control unit via a flexible cable.

[0019] Furthermore, the processor of the main control unit controls the human-computer interaction module to process keyboard and knob inputs, and communicates with the FPGA through the communication module, and sends the modulation parameters and waveform data calculated by the functional module to the FPGA via the FMC interface.

[0020] Furthermore, the radio frequency unit includes a modulation module, a mixing module, a digital filtering module and a radio frequency amplification module connected to the FPGA, and the output end of the radio frequency unit is connected to the external antenna port.

[0021] Furthermore, the function option management module presets five types of function units, namely, Volt, heading, glide path, beacon, and microwave landing, and the function units output parameters to the waveform generation module through a unified interface.

[0022] Furthermore, the signal generation module generates a digital waveform according to the signal type and modulation parameters, and controls the DAC to output the corresponding signal to the radio frequency module for modulation and transmission.

[0023] Furthermore, the ADC / DAC driver module includes: a DAC driver module with a built-in main program, a timer interrupt process and a ping-pong buffer mechanism; an ADC driver module with a built-in sampling control, digital filtering, audio DA restoration and serial port idle interrupt module.

[0024] Beneficial effects of the present invention:

[0025] (1) The present invention proposes a combined receiving device tester that integrates the functions of simulating beacon, volt, heading / glide path, and microwave landing signals into a single device platform. This supports centralized testing of beacon receivers, volt receivers, heading / glide path receivers, microwave landing receivers, and combined receivers, thereby reducing the number of devices and improving the adaptability and compatibility of the test system.

[0026] (2) The present invention proposes a combined receiving device tester based on an open software radio platform architecture, adopting a modular design to separate the main control unit from the radio frequency unit. The software layer adopts a layered design to facilitate maintenance, upgrading and expansion, and adapt to different test modes and signal standards.

[0027] (3) In the combined receiving device tester proposed by the present invention, the main control unit dispatches each functional submodule to generate modulation parameters through the function option management module, and sends control information to the FPGA through the FMC communication mode. The FPGA completes the generation, modulation and output of digital signals. Each module works together through a clear signal chain structure, which is conducive to the precise control of test waveforms and spectrum characteristics.

[0028] (4) The present invention proposes a combined receiving device tester, whose power supply unit supports dual-channel power supply modes of battery power supply and external power supply, and has a complete protection mechanism. The device is portable, small in size and light in weight, and is suitable for field maintenance and regular inspection operations;

[0029] (5) The present invention proposes a combined receiving device tester, in which the input and display units form a unified interactive interface through a liquid crystal screen and a keyboard, and have the ability to switch and quickly set parameters with one button, avoiding the switching operation between multiple separate test windows and improving operation efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0031] Figure 1 This is a hardware system block diagram of a combined receiving device tester proposed by the present invention;

[0032] Figure 2 This is a system block diagram of a power supply unit of a combined receiving device tester proposed by the present invention;

[0033] Figure 3 This is a schematic diagram of a 28V to 12V circuit for a power supply unit of a combined receiving device tester proposed by the present invention;

[0034] Figure 4 This is a schematic diagram of a 12V / 8.4V to 5V circuit for a power supply unit of a combined receiving device tester proposed in the present invention;

[0035] Figure 5 This is a schematic diagram of a 12V / 8.4V to 3.3V circuit for a power supply unit of a combined receiving device tester proposed by the present invention;

[0036] Figure 6 This is a system block diagram of a main control unit of a combined receiving device tester proposed by the present invention;

[0037] Figure 7 The main control unit processor circuit principle of a combined receiving device tester proposed by the present invention Figure 1 ;

[0038] Figure 8 The main control unit processor circuit principle of a combined receiving device tester proposed by the present invention Figure 2 ;

[0039] Figure 9 The secondary power conversion circuit principle of the main control unit of a combined receiving device tester proposed by the present invention Figure 1 ;

[0040] Figure 10 The secondary power conversion circuit principle of the main control unit of a combined receiving device tester proposed by the present invention Figure 2 ;

[0041] Figure 11 This is a circuit schematic diagram of the input processing module of the main control unit of a combined receiving device tester proposed by the present invention;

[0042] Figure 12 The circuit principle of the waveform generation module of the main control unit of the combined receiving device tester proposed by the present invention Figure 1 ;

[0043] Figure 13 The circuit principle of the waveform generation module of the main control unit of the combined receiving device tester proposed by the present invention Figure 2 ;

[0044] Figure 14 The circuit principle of the waveform generation module of the main control unit of the combined receiving device tester proposed by the present invention Figure 3 ;

[0045] Figure 15 This is a software system block diagram of a combined receiving device tester proposed by the present invention;

[0046] Figure 16 This is a processing flow chart of a human-computer interaction module of a combined receiving device tester proposed by the present invention;

[0047] Figure 17 This is a main program flow chart of the DAC driver module of the combined receiving device tester proposed by the present invention;

[0048] Figure 18 This is a flow chart of the interrupt service branch of the DAC driver module timer 0 of the combined receiving device tester proposed by the present invention;

[0049] Figure 19 This is a flow chart of the interrupt service branch of the DAC driver module timer 1 of the combined receiving device tester proposed by the present invention;

[0050] Figure 20 This is a flow chart of the serial port idle interrupt service branch of a DAC driver module of a combined receiving device tester proposed by the present invention;

[0051] Figure 21This is a main program flow chart of the ADC driver module of the combined receiving device tester proposed by the present invention;

[0052] Figure 22 This is a flow chart of the interrupt service branch of the ADC driver module timer 0 of the combined receiving device tester proposed by the present invention;

[0053] Figure 23 This is a flow chart of the interrupt service branch of the ADC driver module timer 1 of the combined receiving device tester proposed by the present invention;

[0054] Figure 24 This is a flow chart of the serial port idle interrupt service branch of the ADC driver module of the combined receiving device tester proposed by the present invention;

[0055] Figure 25 This is a schematic diagram of the landing system of the combined receiving equipment tester proposed by the present invention, showing the working principle. DETAILED DESCRIPTION

[0056] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with examples and drawings. The exemplary embodiments of the present invention and their descriptions are only used to explain the present invention and are not intended to limit the present invention.

[0057] Example 1

[0058] This embodiment proposes a combined receiving device tester, which includes a hardware module platform and a software module platform. Figure 1 , where the hardware module platform includes power supply unit, input and display unit, main control unit, and radio frequency unit.

[0059] In this embodiment, the power supply unit uses batteries as its primary power source. This eliminates interference from power converters or external power cables. The tester also features a backup external power supply to address emergency situations when the battery is low. For power protection, the battery pack's built-in battery protection board provides overcurrent, overcharge, overdischarge, and short-circuit protection. Furthermore, a DC reverse polarity protection circuit eliminates the need to worry about polarity when connecting the auxiliary power cable, ensuring normal charging even if the cable is connected incorrectly.

[0060] refer to Figure 2-Figure 5In this embodiment, the power supply unit uses an 8.4V battery pack as a portable power input. The battery pack is connected to a 5V and 3.3V DC converter module to provide basic operating voltage. Simultaneously, the battery pack is connected to a 28V DC / 220V AC charger, which switches between charging and power supply when an external power source is connected. The charger outputs 28V and continuously supplies power to the 12V DC converter module, which in turn connects to the 5V and 3.3V DC converter module, implementing a power supply structure parallel to the battery power supply path. This creates a power supply system with automatic switching and redundant backup between the external power source and the battery. In the figure, Vin represents voltage input, MON 3V3 represents 3.3V voltage output, and MON 5V represents 5V voltage output.

[0061] The input and display unit, which forms the human-computer interaction interface, primarily includes an LCD display and a keyboard assembly. The display is a serial port LCD with a resolution of 800×480, used to display information such as the current test mode, parameter settings, system status, and menu contents during device operation. This LCD is connected to the main control unit via a serial port, receives display commands output by the main control unit's processor, and presents the required content in the form of a graphical interface.

[0062] The keyboard assembly includes multiple function keys and a rotary knob input device. The function keys are used to quickly access test functions, select operating modes, or adjust parameters; the rotary knob is used for sequence adjustments, parameter value input, and interface navigation. To improve operational redundancy and stability, the input method incorporates physical function keys, a rotary knob, and virtual interface keys, creating a dual-redundant or multi-input configuration that can accommodate diverse user preferences.

[0063] The user inputs the required parameters or control commands via buttons or knobs. These are then encoded and parsed by the main control unit's input processing module, and the relevant operation results are displayed in real time on the LCD screen. The display control unit dynamically adjusts the display content based on the test mode, providing interface support for parameter setting, status monitoring, and operational guidance. The input and display unit is connected to the main control unit via a multi-wire cable, with its input signals connected to the main control unit's encoder interface, IO interface, and serial port, respectively, to achieve a complete closed-loop data exchange and status control.

[0064] refer to Figure 6 The main control unit is based on the software radio platform architecture and is used for secondary power conversion, keyboard scanning, display control, radio frequency unit management and generation of different intermediate frequency transmission signals. It is mainly composed of a processor, a power conversion module, an input processing and waveform generation module.

[0065] refer to Figure 7-Figure 8The processor is the core control component of the main control unit, which integrates embedded program control logic, receives user operation signals from the input processing module, calls the function option management module to select signal type and calculate parameters, and controls the display output and the initialization and data transmission of the communication link. The processor is connected to the FPGA module through the FMC communication interface and interacts with the radio frequency unit through the SPI communication interface.

[0066] refer to Figure 9-10 The power conversion module is used to perform multi-level conversion on the DC voltage provided by the power supply unit, outputting voltage levels that meet the requirements of the various circuit units within the main control board. In this embodiment, the power conversion module converts the input 3.3V voltage into two voltages, 1.2V and 2.5V, respectively, to supply the input processing module, waveform generation module, and processor body. In the figure, MON1V2 represents the 1.2V voltage output, and MON2V5 represents the 2.5V voltage output.

[0067] refer to Figure 11 The input processing module is connected to the input and display unit and receives control signals generated by physical function keys, knobs, or virtual keys. This module includes an encoder reading circuit, a key scanning circuit, and a signal shaping circuit. The collected input signals are converted into digital signals by this module and transmitted to the processor for subsequent function calls, parameter adjustments, and mode settings.

[0068] refer to Figure 12-14 The waveform generation module is used to output signal parameters based on the function options called by the processor and generate corresponding intermediate frequency waveform data. This module presets multiple modulation models and combines different frequency, amplitude, and phase values ​​based on the input parameters to form a standardized intermediate frequency signal format for subsequent FPGA modules to perform waveform reconstruction and RF output. The generated intermediate frequency signal is sent to the radio frequency unit after DA conversion or transmitted to the FPGA module via the FMC interface for digital synthesis. In the figure, DAC0 OUT represents the analog signal output terminal, ZHJ MOD represents the combined modulation signal output terminal, which is the analog test signal output by the system, AV5V0 represents the +5V analog power supply, and AV-5V0 represents the −5V analog power supply for dual-power op amps.

[0069] The RF unit operates in both the VHF and microwave frequency bands. This embodiment houses the unit within an independent aluminum alloy cavity to shield it from external interference. The unit generates carrier frequencies across the full range of LOC / VOR, G-S, MLS, and MB bands, modulates the carrier using a synthesized signal from the main control unit, and amplifies the modulated signal. The desired transmit signal is generated by mixing the intermediate frequency transmit signal from the main control unit with the high-frequency signal generated by the local oscillator, then filtering it through a digital filter. This signal is then transmitted via the antenna.

[0070] refer to Figure 15 ,The software module platform includes the MCU embedded software module, which is embedded in the ,processor of the main control unit, and includes a communication ,module, a human-computer interaction module, and a function option management ,module.

[0071] Among them, the communication module includes FMC communication module, SPI communication module and serial communication module. The FMC module mainly transmits FPGA configuration parameters, the SPI communication module mainly transmits RF parameters, and the serial communication module mainly transmits FPGA control instructions and communicates with the upper-level PC end. The entire system runs smoothly through calling.

[0072] The human-computer interaction module includes an encoder module, a keyboard scanning module, a liquid crystal driver module, and a power management module. The main program uses its functions by calling them. Only the interface parameters need to be configured separately to complete a good human-computer interaction. The main function of the human-computer interaction module is to detect keyboard actions and associate the keyboard actions with the content displayed on the display screen to achieve the purpose of human-computer interaction. The main processing flow of the human-computer interaction module is as follows: Figure 16 shown.

[0073] The function option management module includes Volt, heading, glide path, beacon, and microwave landing functional units. The main function of the function option management module is to select the corresponding functional unit according to the instruction. The main function of the functional unit is to complete the calculation of radio frequency parameters under different modes, and the data calculation results are transmitted to the FPGA logic software module through the FMC communication module.

[0074] It includes an FPGA logic software module, which is configured by MCU power-on loading, and contains a top-level connection module, FMC communication module, signal generation module, transmission module, self-test metering module and ADC / DAC driver module.

[0075] Among them, the top-level module describes the signal connection relationship between the FPGA external interface and the FMC communication module, transmitter module, and self-test measurement module.

[0076] The transmitter module describes the signal connection relationship and a state machine of its internal ASK modulation module, AM modulation module, and PSK modulation module. Its output is connected to the external DAC through the top-level module; its input is connected to the FMC communication module.

[0077] The self-test metering module describes the connection relationship between its internal digital filter, sampling control module, demodulation module and state machine. Its input is connected to the external ADC through the top-level module; its output is connected to the FMC communication module through the top-level module.

[0078] The signal generation module is mainly used to convert the RF parameters transmitted by the function option management module into relevant signal parameters, and control the digital-to-analog converter to generate corresponding waveform signals.

[0079] The ADC / DAC driver module is embedded software written in C language, compiled by the CCS platform, and solidified inside the DSP processor. It does not need to rely on an operating system to run. The driver module is used for digital signal processing.

[0080] Example 2

[0081] Based on Example 1, this embodiment proposes a specific implementation of an ADC / DAC driver module.

[0082] The ADC / DAC driving module includes a DAC driving module and an ADC driving module.

[0083] The DAC driver module performs digital-to-analog conversion operations on the up-converted signal. Its main functions include DA operations on the up-converted signal: the DA operations on the up-converted signal are equivalent to the modulation of the transmitted signal. Based on the mathematical model of the modulated signal, the DSP brings multiple frequency components, amplitudes, and phases into the modulation formula to perform a large number of floating-point calculations, and obtains all the sampling points of one cycle of the modulated signal. The DAC is then controlled by the FPGA to restore it to an analog signal.

[0084] Audio signal AD operation: Audio signal AD operation is used to sample and filter the input signal of the microphone and apply the result to the modulation of the up-converter.

[0085] The ADC driver module is used to complete the sampling, demodulation and measurement of the down-converted baseband signal. Its main functions include down-converted AD signal operation: AD signal operation is equivalent to demodulation of the received signal. Similarly, the DSP reads the ADC sampling results in the FPGA and then performs operations according to the mathematical model to obtain various measurement parameters such as signal coding, power, carrier frequency, etc.

[0086] Audio signal DA operation: The audio signal DA operation controls the audio DA to restore the audio part of the demodulated signal based on the result of the down-conversion AD operation, and sends it to the tester's external headphones for sound.

[0087] The ADC / DAC driver module in this embodiment consists of a main program and an interrupt service branch.

[0088] refer to Figure 17 The main program of the DAC driver module includes a DAC coprocessor main program, which is mainly used to perform calculation operations on the DA conversion data of the up-converted baseband signal. The number of calculation results is determined by the number of sampling points and the signal period. To ensure signal continuity, this embodiment adopts a ping-pong operation, always storing two cycles of sampling data in the cache, and performing calculations for the next signal period while the dot conversion is being performed;

[0089] The interrupt service branch of the DAC driver module mainly includes timer 0, timer 1 and serial port idle interrupt service branch, refer to Figure 18 Timer 0 interrupt is used to control DAC conversion and complete the output of baseband signal. Each interrupt outputs a sampling point data. The interrupt interval of the timer and the number of sampling points jointly determine the period of the baseband signal. Figure 19 Timer 1 interrupt is used to control ADC conversion and complete the sampling of audio signals so that the sampling results can be applied to the baseband signal DA operation in the main program. Each interrupt samples one point of data. Because the bandwidth of the audio signal is relatively fixed, the timer uses a fixed sampling period and number of sampling points; refer to Figure 20 The serial port idle interrupt service is used to parse and execute the protocol of the FMC bus inside the motherboard.

[0090] refer to Figure 21 The ADC driver module's main program includes an ADC coprocessor main program, which is primarily responsible for performing AD conversion data acquisition, analysis, and calculations on the down-converted baseband signal, thereby completing baseband demodulation and measuring related parameters. The ADC coprocessor operates similarly to a digital storage oscilloscope: its sampling buffer always stores two time slices of signal data for calculation and analysis, and new sampling results always overwrite the data from the previous time slice.

[0091] The interrupt service branches of the DAC driver module mainly include timer 0, timer 1 and serial port idle interrupt service branches.

[0092] refer to Figure 22 Timer 0 interrupt is used to control ADC conversion and complete the sampling of down-converted baseband signal. Each interrupt samples one point of data. The interrupt interval of the timer and the number of sampling points are determined by the configuration of the internal bus; refer to Figure 23 Timer 1 interrupt is used to control DAC conversion and restore the demodulated audio signal. Each interrupt controls the DA output to one point; refer to Figure 24 ,The serial port idle interrupt service is used to parse and execute the serial communication protocol.

[0093] Example 3

[0094] This embodiment, based on Embodiment 1 and Embodiment 2, proposes the functions and test flow of a combined receiving device tester.

[0095] Microwave landing test

[0096] The tester works in the transmitting mode, radiating azimuth and elevation scanning signals into the air, and simulating the scenario of the aircraft deviating from the course and glide path through the data words, the time difference of the forward and reverse scanning of the azimuth deflection signal, and the time difference of the forward and reverse scanning of the elevation deflection signal.

[0097] (1) Deflection test: The tester simulates three scenarios: upper left full deflection, alignment, and lower right full deflection. The DUT receives and analyzes the signals and displays them through relevant signals. The function of the receiver is verified by observing and checking whether the indication results are consistent with the simulated scenarios.

[0098] (2) Identification sound test: The tester inserts Morse code into the deflection signal to simulate the station identification signal. The device under test receives and interprets the signal and outputs sound or displayed characters. The station identification function of the receiver is verified by comparing the display or sound to the Morse code sent by the tester.

[0099] Instrument landing test

[0100] (1) Heading receiver test: The tester works in the transmit mode and simulates the scenario of an aircraft deviating from the runway by changing the modulation depth difference between the 90Hz and 150Hz modulated signals received by the device under test.

[0101] (1.1) Deflection test: The tester simulates three scenarios: left deviation, alignment, and full right deviation. At this time, the output or indication of the heading receiver should be full left, center, and full right, respectively.

[0102] (1.2) Station identification test: The tester adds identification audio or Morse code to the deflection signal. At this time, a continuous tone or Morse code should be heard from the audio output of the heading receiver.

[0103] (1.3) Alarm test: The tester removes a certain frequency from the modulated signal to simulate the scenario where the receiver loses the signal. At this time, the receiver should display an alarm indication or alarm signal.

[0104] (2) Glide path receiver test: The tester works in the transmit mode and simulates the scenario of the aircraft deviating from the glide path by changing the modulation depth difference between the 90Hz and 150Hz modulated signals received by the device under test.

[0105] (2.1) Deflection test: the tester simulates three scenarios: upper full deflection, alignment and lower full deflection. At this time, the output or indication of the downlink receiver should be upper full deflection, center and lower full deflection respectively.

[0106] (2.2) Alarm test: The tester removes a certain frequency from the modulated signal to simulate the scenario where the receiver loses the signal. At this time, the receiver should display an alarm indication or alarm signal.

[0107] (3) VOR receiver test: the tester works in the transmitting mode and simulates the VOR angle by changing the phase difference between the 30 Hz reference item and the 30 Hz variable item modulation envelope.

[0108] (3.1) Azimuth measurement accuracy test: The tester simulates the VOR angles of the four azimuths: due east, due west, due south, and due north. The accuracy is tested by observing the deviation between the carrier aircraft indication and the tester setting angle.

[0109] (3.2) Alarm test: The tester removes a certain frequency from the modulated signal to simulate the scenario where the receiver loses the signal. At this time, the receiver should display an alarm indication or alarm signal.

[0110] (3.3) Station identification test: the tester adds identification audio or Morse code to the azimuth signal. At this time, a continuous tone or Morse code should be heard from the audio output of the Volt receiver.

[0111] Marker beacon receiver test

[0112] The tester operates in transmit mode, using 400Hz, 1300Hz, and 3000Hz AM modulated signals to simulate the scenario of an aircraft passing through three beacons: far, medium, and near. The tester simulates the three signals of far, medium, and near stations respectively. At this time, the beacon indicator light or Morse audio is used to determine whether the receiver status corresponds to the tester setting.

[0113] This embodiment proposes a test principle, referring to Figure 25 The instrument landing system mainly relies on the radiation field generated by the localizer antenna and the glide path beacon antenna to collect landing information. The main function of the tester is to simulate the function of the ground beacon to test whether the landing system responds normally under different circumstances.

[0114] The beacon antenna includes: the radiation field generated by the localizer antenna forms a heading plane in the vertical plane passing through the extension line of the runway center, which is used to provide lateral guidance signals for aircraft deviating from the localizer.

[0115] The radiation field generated by the glide path beacon antenna forms the glide path. The glide path beacon is used to generate vertical guidance signals for the aircraft to deviate from the glide path. It is also used to provide deviation signals for the aircraft to deviate from the glide path.

[0116] This tester mainly uses 1020Hz identification signal, heading 90Hz audio signal, heading 150Hz audio signal, downdraft 90Hz audio signal, downdraft 150Hz audio signal, airborne directional 155Hz audio signal, heading carrier signal, downdraft carrier signal, 30Hz reference phase, 30Hz variable phase, 9960Hz subcarrier, Vol carrier signal, 400Hz far-station beacon audio, 1300Hz mid-station beacon, 3000Hz near-station beacon audio beacon carrier signal.

[0117] The 1020Hz signal is used to distinguish stations. When the heading receiver receives this signal, it outputs a navigation identification signal to the audio system. This signal's primary function is to verify that the heading receiver has the capability to decode the navigation identification signal. This function can be accomplished by including the 1020Hz signal in the modulated signal. Therefore, the identification audio signal generated by this simulator is a continuous 1020Hz sine wave.

[0118] The modulation signals used for the deviation check of the heading extension and the deviation check of the glideslope extension are both 90Hz and 150Hz. The angle of deviation from the runway center and the angle of deviation from the glidepath center are both proportional to the modulation depth difference DDM.

[0119] In any receiving direction, the modulation depth difference DDM between 90HZ and 150HZ can be expressed as: Formula 1;

[0120] in and Respectively represent the modulation of 90HZ signal and 150Hz signal, and It can be expressed as:

[0121] Formula 2;

[0122] Formula 3;

[0123] Formula 4 is derived from Formula 2 and Formula 3:

[0124] Formula 4;

[0125] m represents the amplitude ratio of the modulating signal to the carrier signal, and are the modulation changes of 90Hz and 150Hz signals under different angles. and It has a certain relationship with the radiation field, where the radiation field of a 90HZ signal antenna can be expressed as Formula 5:

[0126] Formula 5;

[0127] is the carrier amplitude, is the angular frequency of the 90 Hz signal, is the phase angle of the antenna radiation field, is the angular frequency of the 150Hz signal. The radiation field of the 150HZ signal antenna can be expressed as Formula 6:

[0128] Formula 6;

[0129] Radiation field of synthetic space :

[0130] Formula 7;

[0131] The signal format transmitted by the Vol ground station is , which is expressed as Formula 8. is the carrier signal, and its carrier frequency It is a fixed value, and the carrier frequency is determined by the current channel. is the reference signal, It is a variable phase signal.

[0132] Formula 8;

[0133] It is the reference signal transmitted by the Vol ground station, including the identification tone signal used for station identification , Morse code and a subcarrier signal containing a 30Hz reference phase . It is a navigation identification tone with a fixed frequency of 1020Hz±50Hz. The ground station usually transmits 2 to 3 words of Morse identification code every 30 seconds. , the 9960Hz subcarrier is frequency modulated using the 30Hz reference phase signal, and the specific implementation of the frequency change is an integral upper limit function from 0 to t , Indicates the subcarrier frequency of 9960Hz, The frequency of the reference phase signal is 30Hz. When the frequency modulation coefficient is 16, the frequency coefficient The value is 480Hz.

[0134] 、 、 are the modulation coefficients of the above three respectively. The expression of is shown in Formula 9.

[0135] Formula 9;

[0136] is a 30Hz variable phase signal, and its expression is shown in Formula 10.

[0137] Formula 10;

[0138] There are three marker beacons: the far (outer), middle, and near (inner). The carrier signals in these three beacons are amplitude modulated using three different modulation signals, each providing a corresponding set of keystroke-formatted audio signals. The far station's RF carrier is modulated at 400 Hz, with the keystroke-formatted signal being transmitted continuously at a rate of two strokes per second. The middle station's RF carrier is modulated at 1300 Hz, with the keystroke-formatted signal consisting of alternating dots and dashes, with a keying rate of two strokes per second and a dot keying rate of six dots per second. The near station's RF carrier is modulated at 3000 Hz, with the keystroke-formatted signal being transmitted continuously at six dots per second.

[0139] The basic principles, main features, and advantages of the present invention are shown and described above. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and modifications are intended to fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.

Claims

1. A combined receiving device tester, characterized in that: Including hardware module platform and software module platform; The hardware module platform includes a power supply unit for providing portable power supply and external power access, and has overcurrent, overcharge, overdischarge, short circuit and DC reverse protection functions; Input and display unit, including serial port display screen and key module; Main control unit, including processor, power conversion module, input processing module and waveform generation module; The radio frequency unit is housed in an aluminum alloy shielded cavity, operates in the VHF and microwave frequency bands, and has modulation, mixing, filtering, and power amplification functions; The software module platform includes an MCU embedded software module, which is embedded in the processor of the main control unit and includes a communication module, a human-computer interaction module, and a function option management module; The FPGA logic software module is configured by MCU power-up loading, including the top-level connection module, FMC communication module, signal generation module, transmission module, self-test metering module, and ADC / DAC driver module; The main control unit receives parameter instructions from the input unit through the input processing module, calls the function option management module to schedule the Volt, heading, glide path, beacon, and microwave landing function modules. The function option management module outputs modulation parameters to the waveform generation module to generate an intermediate frequency transmission signal. The modulation parameters and the intermediate frequency signal are transmitted to the FPGA through the FMC communication module. The FPGA controls the signal generation module, DAC driver module, and transmission module to output a digital waveform. The radio frequency unit receives the waveform and performs modulation, mixing, filtering, and power amplification before outputting it. The function option management module presets five types of function units: Volt, heading, glide path, beacon, and microwave landing. The function units output parameters to the waveform generation module through a unified interface; The signal generation module generates a digital waveform according to the signal type and modulation parameters, and controls the DAC to output the corresponding signal to the RF module for modulation and transmission; The ADC / DAC driver module includes: a built-in main program of the DAC driver module, a timer interrupt process and a ping-pong buffer mechanism; The ADC driver module has built-in sampling control, digital filtering, audio DA restoration and serial port idle interrupt modules.

2. A combined receiving device tester according to claim 1, characterized in that: The power conversion module outputs four voltages of 12V, 8.4V, 5V and 3.3V, which are supplied to the main control unit and each module of the radio frequency unit respectively.

3. The combined receiving device tester according to claim 1, characterized in that: The input and display unit includes a serial port display screen and a keyboard assembly consisting of function keys and knobs. The display screen and keyboard assembly are connected to the input processing module of the main control unit through a flexible cable.

4. A combined receiving device tester according to claim 1, characterized in that: The processor of the main control unit controls the human-computer interaction module to process keyboard and knob inputs, and communicates with the FPGA through the communication module, and sends the modulation parameters and waveform data calculated by the function module to the FPGA via the FMC interface.

5. The combined receiving device tester according to claim 1, characterized in that: The radio frequency unit includes a modulation module, a mixing module, a digital filtering module and a radio frequency amplification module connected to the FPGA, and the output end of the radio frequency unit is connected to the external antenna port.

Citation Information

Patent Citations

  • Visual simulation detection system of instrument landing system

    CN113232886A

  • Meteorological radar target simulator and simulation method

    CN115575913A

  • Aviation radio comprehensive tester

    CN116961782A