Method, device and equipment for implementing block cipher based on lightweight algorithm structure
By designing a packet cipher implementation method with a lightweight algorithm structure, the implementation problem of traditional packet cipher algorithms on resource-constrained devices is solved, and a smaller data scale and higher security is achieved, which is suitable for data encryption and decryption of network and communication transmission.
Patent Information
- Application Number
- CN202510744187.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-05
- Publication Date
- 2025-08-08
- Estimated Expiration
- 2045-06-05
AI Technical Summary
Existing packet cipher algorithms are difficult to effectively implement on resource-constrained devices, especially in devices with weak computing power, limited storage space and high energy consumption requirements. Traditional packet cipher algorithms have shortcomings in balancing lightweight, algorithm complexity, encryption and decryption consistency, efficiency and security.
Design a packet cryptographic implementation method based on a lightweight algorithm structure. Through the new round function structure and key scheduling algorithm, the plaintext packet is processed in parallel with SIMD registers, and the lightweight algorithm structure is used for encryption and decryption, including nonlinear functions, key mixing and branch cross-operation, reducing the cost of hardware implementation and improving security.
With the same packet length, the data input and output scale is smaller, making it easy to implement lightweight cryptographic applications, reduce the cost of software and hardware implementation, provide higher security and diffusion, and resist differential analysis and linear analysis.
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Figure CN120263394B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of block ciphers, and in particular relates to a block cipher implementation method, apparatus and device based on a lightweight algorithm structure. Background Art
[0002] With the rapid development of technologies such as high-speed network information transmission, wireless communications, and the Internet of Things (IoT) based on data center networks, as well as related technologies such as wireless sensor networks (WSNs) and radio frequency identification (RFID), resource-constrained devices are increasingly being used. These devices typically have weak computing power, limited storage space, and high energy requirements. Therefore, traditional block cipher algorithms (such as AES) are difficult to implement effectively on these devices. Lightweight block cipher algorithms have gradually become a research hotspot due to their advantages in hardware resource consumption, encryption speed, and power consumption.
[0003] Block ciphers are widely used in fields such as data encryption, identity authentication, and communication security. Their design is based on the principles of "obfuscation" and "diffusion" proposed by Shannon. As a key component of a cryptographic algorithm, the cipher structure plays a crucial role in its diffusibility. A well-designed iteration structure not only effectively safeguards the security of a block cipher but also supports efficient hardware and software implementations.
[0004] Existing technologies balance lightweighting, algorithmic complexity, encryption and decryption consistency, efficiency, robustness, and security, all of which lack advantages in other areas. Common block cipher structures fall into two categories: those that require the calculation of the inverse of a nonlinear function for decryption, such as the SPN (Substitution-Permutation Network) structure; and those that do not, such as the Feistel-like structure. Feistel-like structures employ different implementation methods depending on the block length or round function used. While offering the advantages of consistent encryption and decryption, they exhibit slower robustness. Currently, widely adopted Feistel-like structures include the Feistel, Lai-Massey, SM4, MARS, Type-I generalized Feistel, and Type-II generalized Feistel structures. Due to their weak robustness, these structures often employ a longer number of integral discriminators, leading to a higher number of iterations when designing cryptographic algorithms. Summary of the Invention
[0005] In order to solve the above-mentioned problems existing in the prior art, the present invention proposes a block cipher implementation method, device and equipment based on a lightweight algorithm structure. A lightweight algorithm structure is established by designing a new round function structure, and a block cipher algorithm is designed using the lightweight algorithm structure to implement the block cipher. The lightweight algorithm structure adopted by the method makes the data input and output scale smaller in the block cipher algorithm under the condition of the same block length, thereby facilitating the realization of lightweight cipher application requirements, reducing the software and hardware implementation costs in the application process, and having higher security.
[0006] A block cipher implementation method based on a lightweight algorithm structure, comprising:
[0007] Step 110: Obtain plaintext to be cryptographically implemented from a cache device or a data interface, and transmit the plaintext to a register or cache; the plaintext includes data transmitted over a network or communication, and the data type includes at least one of text, image, audio, video, numerical value, or structured data;
[0008] Step 120: Load plaintext from a register or cache, and group the plaintext into four branches for parallel processing using a SIMD register.
[0009] Step 130, generating round keys by designing a key scheduling algorithm, and storing the round keys in a dedicated register;
[0010] Step 140: Design a lightweight algorithm structure for cryptographically implementing the four branches stored in the SIMD registers, including encrypting the plaintext and decrypting the encrypted ciphertext; each round of the algorithm in the lightweight algorithm structure performs a round function operation, and the operation process includes a nonlinear function, key mixing, and branch crossing; the round function operation includes an encryption round function operation and a decryption round function operation;
[0011] Step 150: For the four branches stored in the SIMD register in the previous round, perform an XOR operation on the first two branches and the first three branches using the encryption round function operation to obtain two intermediate variables; after mixing the two intermediate variables with the round key, transform them using a nonlinear function to generate a nonlinear function result;
[0012] Step 160: cyclically shift the four branches of the previous round using the nonlinear function result to obtain the four branches of the current round.
[0013] Step 170: execute the initial input plain text Rounds of encryption are iterated to generate ciphertext and complete the plaintext encryption process.
[0014] The present invention also protects a device for implementing a block cipher based on a lightweight algorithm structure, which implements the steps of the aforementioned method for implementing a block cipher based on a lightweight algorithm structure. The device comprises:
[0015] The first module is configured to obtain plaintext to be cryptographically implemented from a cache device or a data interface and transmit the plaintext to a register or cache; the plaintext includes data transmitted via a network or communication, and the data type includes at least one of text, image, audio, video, numerical value, or structured data;
[0016] The second module is used to load plaintext from registers or caches and group the plaintext into four branches for parallel processing using SIMD registers;
[0017] The third module is configured to generate round keys by designing a key scheduling algorithm and store the round keys in a dedicated register;
[0018] The fourth module is used to design a lightweight algorithm structure and implement cryptographic operations on the four branches stored in SIMD registers, including plaintext encryption and decryption of encrypted ciphertext. Each round of the algorithm in the lightweight algorithm structure performs a round function operation, which includes nonlinear functions, key mixing, and branch crossing. The round function operation includes encryption round function operation and decryption round function operation.
[0019] The fifth module is used to perform an XOR operation on the first two branches and the first three branches of the four branches stored in the SIMD register in the previous round using the encryption round function operation to obtain two intermediate variables; after mixing the two intermediate variables with the round key, they are transformed using a nonlinear function to generate a nonlinear function result;
[0020] The sixth module is used to perform a cyclic left shift operation on the four branches of the previous round using the result of the nonlinear function to obtain the four branches of the current round;
[0021] The seventh module is used to execute the initial input plain text Rounds of encryption are iterated to generate ciphertext and complete the plaintext encryption process.
[0022] The present invention provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above-mentioned frequency standard measurement method when executing the computer program.
[0023] In summary, the present invention proposes a method, apparatus, device, and storage medium for implementing a block cipher based on a lightweight algorithm structure. Compared with the prior art, the method of the present invention has the following advantages and beneficial effects:
[0024] (1) Compared with the traditional Feistel structure, the lightweight algorithm structure designed and adopted by the present invention has more branches. Even under the conditions of the same number of branches and packet length, the nonlinear function designed by the present invention has a smaller input and output scale per round, which makes it easier to design lightweight cryptographic algorithms and reduce the cost of software and hardware implementation of data transmitted over the network or by communication.
[0025] (2) The key scheduling algorithm designed based on the above algorithm structure can handle block cipher applications with a master key of more than 128 bits and a number of iterations of 32. It not only provides better diffusion but also can ensure the high security requirements of larger data volumes.
[0026] (3) When the lightweight algorithm structure designed by the present invention is used to implement a block cipher, the security is higher because the number of rounds to resist differential analysis is higher (13 rounds and above), while the number of impossible differential rounds, zero-correlation linear shell rounds and integral distinguisher rounds is smaller (5 rounds). BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 Flowchart of a method for implementing a block cipher based on a lightweight algorithm structure in a first embodiment of the present invention;
[0028] Figure 2 Schematic diagram of the round function structure in the lightweight algorithm structure encryption process in the first embodiment of the present invention, wherein: It is Four branches of the round encryption process input, and It is Nonlinear function in the round encryption process, It is The four branches output by the round encryption process, ;
[0029] Figure 3 Schematic diagram of the round function structure in the lightweight algorithm structure decryption process in the first embodiment of the present invention, wherein: It is The four branches of the round decryption process input, and It is The nonlinear function in the round decryption process, It is Four branches of the round decryption process output;
[0030] Figure 4 This is a schematic diagram of the key scheduling process in the second embodiment of the present invention, wherein Represents each bit in the master key;
[0031] Figure 5 is the nonlinear function in the round function structure of the second embodiment of the present invention Schematic diagram of the design structure, where It is The round key used by the round function operation, express box, express Transformation. DETAILED DESCRIPTION
[0032] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0033] In response to the efficiency and security issues of applying lightweight block cipher technology in the process of network data transmission and communication signal transmission, the present invention proposes a block cipher implementation method, device and equipment based on a lightweight algorithm structure. By designing a new lightweight algorithm structure, a block cipher algorithm is constructed to implement the block cipher. The lightweight algorithm structure adopted by the method has the structural characteristics of consistent encryption and decryption, which makes the data input and output scale in the block cipher algorithm smaller, improves the encryption / decryption efficiency, and makes it easier to realize the lightweight cipher application requirements, and has higher security.
[0034] In the first embodiment, referring to Figure 1 As shown, the present invention provides a block cipher implementation method based on a lightweight algorithm structure, which specifically includes the following steps:
[0035] Step 110, obtain the plaintext that needs to be cryptographically implemented from the cache device or data interface, and transmit the plaintext to the register or cache; the plaintext includes data transmitted over the network or communication, and the type of the data includes at least one of text, image, audio, video, numerical value or structured data.
[0036] Step 120 : Load plaintext from a register or cache, and group the plaintext into four branches for parallel processing using a SIMD register.
[0037] Specifically, the four branches of the initial plaintext input are marked as , where each Corresponds to a branch, each branch corresponds to The binary data on The value of is determined according to the length of the plaintext to be processed. In the round function operation of the lightweight algorithm structure, the four branches input the branch output of the previous round in parallel. , after the round function operation of this round, the output , is the number of rounds implemented by the cipher, is the total number of rounds executed.
[0038] Step 130: Generate round keys by designing a key scheduling algorithm , , including: using a random number generator to randomly generate bits of the master key, filling it with The round key is stored in a dedicated register, which has a high security level setting.
[0039] Step 140, design a lightweight algorithm structure (KYS) for implementing cryptography for the four branches stored in the SIMD register, including encryption and decryption of the encrypted ciphertext; each round function operation in the lightweight algorithm structure includes a nonlinear function Transformations, key mixing, and branch crossing, Is the current round of the cryptographic implementation. The round function operation includes the encryption round function operation and the decryption round function operation. The nonlinear function Related to the current round key, the mapping is done directly through dedicated hardware logic: , to achieve function transformation, where "dedicated hardware logic" refers to an FPGA-specific module with a multi-stage pipeline design, which can complete nonlinear function operations and output results in one to two clock beats.
[0040] like Figure 2 As shown, the encryption round function operation in the lightweight algorithm structure is used. The round algorithm steps (round function structure) implement the process of plaintext encryption, including:
[0041] Step 150: the four branches outputted in the previous round and stored in the SIMD register , the first branch With the second branch Perform XOR operation, using Represents an exclusive OR operation to obtain the first intermediate variable ; The first three branches , and Perform XOR operation to obtain the second intermediate variable ;
[0042] Further, the first intermediate variable is combined with the corresponding round key After the mixing operation, the nonlinear function Perform transformation processing to generate the first nonlinear function result ; Combine the second intermediate variable with the corresponding round key After the mixing operation, the nonlinear function Perform transformation processing to generate the second nonlinear function result ;
[0043] Step 160, using the nonlinear function result to perform a cyclic left shift operation on the four branches of the previous round, to obtain the four branches of the current round, including: Perform an XOR operation with the result of the first nonlinear function and the result of the second nonlinear function to obtain the first branch of the current round ; Directly change the third branch of the previous round As the second branch of the current round ; The fourth branch of the previous round Perform an XOR operation with the result of the second nonlinear function to obtain the third branch of the current round ; The first branch of the previous round Perform an XOR operation on the result of the first nonlinear function and the result of the second nonlinear function to obtain the fourth branch of the current round .
[0044] Step 170: Mark the initial input into four branches The plain text, execute The encryption is iterated through rounds to generate ciphertext that finally meets the diffusion and security requirements, completing the plaintext encryption process.
[0045] During the mixed operation of the aforementioned round keys, as well as the XOR operation and circular left shift operation, the SIMD instruction set is used to simultaneously execute parallel calculations of multiple branches, and a multi-core processor is used to assign different branches to multiple threads for task-level parallel calculations.
[0046] The lightweight algorithm structure given in step 140 above satisfies the encryption and decryption consistency, that is, in the reverse decryption process, there is no need to calculate the nonlinear function and The inverse of step 150 is to replace the input in the previous step with the output of the current round. , after reverse solution, we get the last round ( Four branches of the output Specifically, the inverse process is described by the following algorithm steps:
[0047] ;
[0048] in, , It is an intermediate variable set during the decryption process; and , is to put two intermediate variables Round keys After the mixing operation, the nonlinear function The nonlinear function result generated by the transformation; the last four formulas are the algorithm process of performing a reverse loop (right shift) operation on the current round of branches to obtain the results of the four branches in the previous round.
[0049] Combined with the above inversion process, the decryption round function structure of the lightweight algorithm structure (KYS) is as follows: Figure 3 As shown, each decryption round function operation will convert the current round ( The encrypted output of the previous round (round) is calculated by reverse calculation using the inverse process. The encrypted output result of the round is used to realize the decryption process. Figure 3 middle, It is The four branches of the round decryption process input, and It is The nonlinear function in the round decryption process, It is The four branches output by the round decryption process.
[0050] The total number of executions will be The ciphertext of the round encryption iteration is decrypted using the round function operation in the lightweight algorithm structure, and the total number of executions is The decryption iteration of the round is repeated to restore the plaintext before encryption.
[0051] In fact, in the above KYS algorithm structure During the iteration process, if the branch replacement operation is ignored in the last round, the plaintext In-round key Under the influence of , generate ciphertext , then in the decryption structure of KYS During the round of iteration, the last round also ignores the branch permutation operation, and the ciphertext In-round key Recover the plaintext under the action of .
[0052] The intermediate variables in the above steps are written back to the memory through the cache line, and the cache consistency protocol is used to ensure data synchronization in a multi-core environment.
[0053] In the second embodiment of the present invention, a round key length of 64 bits is set for a master key length of 128 bits and a data size of 32 bits for each branch after plaintext grouping. A lightweight algorithm structure is used for cryptographic implementation in this case. For ease of description, the lightweight algorithm structure designed in step 140 is numbered KYS-BC-128.
[0054] Specifically, in step 130, the process of generating round keys using the key scheduling algorithm includes:
[0055] Use a random number generator to randomly generate a 128-bit master key , Represents each bit in the master key, , and fill it into a 128-stage linear feedback shift register; the generating polynomial of the linear feedback shift register is ,like Figure 4 As shown, the recursive relationship is:
[0056] ;
[0057] because is a primitive polynomial, so the period of the linear feedback shift register is , with 128 bits of entropy. Let , For the Round key, where the last 32 bits are used as the round key With nonlinear functions The first 32 bits are used as the round key. With nonlinear functions The input is XORed.
[0058] Furthermore, in step 140, the four branches of the initial input plaintext are , No. The wheel input is , No. The output of the wheel is , each branch is taken from Elements on . Nonlinear function The input is , nonlinear function The input is .
[0059] Specifically, nonlinear function and use Structure, such as Figure 5 As shown, the function transformation process is performed by round key addition, Substitution Box (Substitution Box) replacement layer, The transformation (Permutation Box) layer consists of three operation steps.
[0060] For the The nonlinear function used by the round , ,enter First, with the round key Perform XOR operation to get Input to the box replacement layer: ,in The length is 32 bits.
[0061] ;
[0062] set up The box is a bijective mapping with 8 inputs and 8 outputs, then The input of the transformation layer is:
[0063] .
[0064] The one used here The box is used in the traditional AES algorithm Box. Specific The box replacement table is shown in Table 1 below:
[0065] Table 1 S-box replacement table for KYS-BC-128
[0066]
[0067] The transformation layer uses the column confusion operation of the AES-128 standard algorithm, The output of the transformation layer is:
[0068] ;
[0069] So we have:
[0070] ;
[0071] Will Considered as a finite field The elements in , which are polynomials:
[0072] ;
[0073] One-to-one correspondence, where are the polynomial coefficients, .therefore:
[0074] ;
[0075] at the same time Also a nonlinear function The output, .
[0076] Will Output value and Output value At the same time Performing XOR operation, we get:
[0077] ;
[0078] Will The output value of The output value of Performing XOR operation, we get:
[0079] ;
[0080] Let the intermediate variable ;
[0081] Will The output value of Performing XOR operation, we get:
[0082] ;
[0083] Will Perform branch loop left shift operation to get the Output value of the wheel:
[0084] .
[0085] Therefore, the ciphertext using the KYS-BC-128 algorithm structure is: .
[0086] The lightweight algorithm structure of this embodiment adopts a pipeline architecture. For example, in an FPGA or ASIC, the stages of the round function structure, such as nonlinear function transformation, shift operation, key mixing, and round key addition, are designed as a multi-stage pipeline, and one data block is processed per clock cycle to maximize throughput.
[0087] Differential analysis and linear analysis of the lightweight algorithm structure (KYS-BC-128) used in this embodiment:
[0088] Since the algorithm structure adopts The maximum difference probability of the box is , and 13 rounds of minimum differential active The number of boxes is 22. Therefore, there is no effective differential path for the KYS-BC-128 cryptographic algorithm with 13 rounds or more, that is, the KYS-BC-128 cryptographic algorithm is resistant to differential analysis.
[0089] Similarly, since the algorithm uses The maximum absolute value of the correlation of the box is , and 13 rounds of at least linear activity The number of boxes is 22. Therefore, there is no valid linear path for the KYS-BC-128 cryptographic algorithm with 13 rounds or more, that is, the cryptographic algorithm KYS-BC-128 is resistant to linear analysis.
[0090] In addition, the algorithm structure KYS-BC-128 used in the block cipher implementation method of this embodiment has 6 rounds of impossible differentials, 6 rounds of zero-correlation linear shells, and 6 rounds of integral distinguishers.
[0091] Combined with the above performance analysis results, it can be seen that the block cipher implementation method based on the lightweight algorithm structure adopted in the above embodiments of the present invention has the following beneficial effects in data cipher implementation applications in application fields such as network transmission and communication transmission:
[0092] First, compared with the traditional Feistel structure, the KYS algorithm structure has more branches. Therefore, under the premise of the same block length, the input and output scale of the nonlinear function is smaller, making it easier to design lightweight cryptographic algorithms and reduce the cost of software and hardware implementation.
[0093] Second, compared with the SM4 structure, MARS structure, and four-branch Type-II generalized Feistel structure, the KYS algorithm structure has fewer impossible differential rounds, zero-correlation linear shell rounds, and integral integrator rounds, better diffusion, and higher security.
[0094] Third, since the SM4 structure has 11 rounds of impossible differences, 11 rounds of zero-correlation linear shells, and 11 rounds of integral discriminators, the MARS structure has 11 rounds of impossible differences, 11 rounds of zero-correlation linear shells, and 11 rounds of integral discriminators, and the four-branch Type-II generalized Feistel structure has 9 rounds of impossible differences, 9 rounds of zero-correlation linear shells, and 9 rounds of integral discriminators, while the lightweight algorithm structure KYS proposed in this invention has 5 rounds of impossible differences, 5 rounds of zero-correlation linear shells, and 5 rounds of integral discriminators, the security of the cryptographic algorithm designed based on the lightweight algorithm structure KYS is superior to the cryptographic algorithms based on the SM4 structure, MARS structure, and four-branch Type-II generalized Feistel structure in terms of impossible difference analysis, zero-correlation linear analysis, and integral analysis, given the same internal details of the nonlinear function.
[0095] A third embodiment of the present invention provides a device for implementing a block cipher based on a lightweight algorithm structure, which implements the steps of the method for implementing a block cipher based on a lightweight algorithm structure in the aforementioned embodiment. The device includes the following modules:
[0096] The first module is configured to obtain plaintext to be cryptographically implemented from a cache device or a data interface and transmit the plaintext to a register or cache; the plaintext includes data transmitted via a network or communication, and the data type includes at least one of text, image, audio, video, numerical value, or structured data;
[0097] The second module is used to load plaintext from registers or caches and group the plaintext into four branches for parallel processing using SIMD registers;
[0098] The third module is configured to generate round keys by designing a key scheduling algorithm and store the round keys in a dedicated register;
[0099] The fourth module is used to design a lightweight algorithm structure and implement cryptographic operations on the four branches stored in SIMD registers, including plaintext encryption and decryption of encrypted ciphertext. Each round of the algorithm in the lightweight algorithm structure performs a round function operation, which includes nonlinear functions, key mixing, and branch crossing. The round function operation includes encryption round function operation and decryption round function operation.
[0100] The fifth module is used to perform an XOR operation on the first two branches and the first three branches of the four branches stored in the SIMD register in the previous round using the encryption round function operation to obtain two intermediate variables; after mixing the two intermediate variables with the round key, they are transformed using a nonlinear function to generate a nonlinear function result;
[0101] The sixth module is used to perform a cyclic left shift operation on the four branches of the previous round using the result of the nonlinear function to obtain the four branches of the current round;
[0102] The seventh module is used to execute the initial input plain text Rounds of encryption are iterated to generate ciphertext and complete the plaintext encryption process.
[0103] On the other hand, in one embodiment of the present invention, a computer device is provided, which may be a server, comprising a processor, a memory, a network interface, and a database connected via a system bus. The processor of the device is configured to provide computing and control capabilities. The memory of the device comprises a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The database of the device is configured to store block cipher implementation data based on a lightweight algorithm structure. The network interface of the device is configured to communicate with an external terminal via a network connection. When the computer program is executed by the processor, the block cipher implementation method based on the lightweight algorithm structure is implemented.
[0104] Those skilled in the art will understand that the description of the technical features of the equipment in the above embodiments does not constitute a limitation on all equipment to which the present invention is applied. The specific equipment may include more or fewer components, or combine certain components, or have different component arrangements.
[0105] In another embodiment, the present invention provides a storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the aforementioned method for implementing a block cipher based on a lightweight algorithm structure.
[0106] Those skilled in the art will understand that all or part of the processes of the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0107] Matters not covered by the present invention are known technologies.
[0108] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0109] The above-described embodiments merely illustrate several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that a person skilled in the art would be able to make numerous modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
Claims
1. A block cipher implementation method based on a lightweight algorithm structure, characterized in that: include: Step 110: Obtain plaintext to be cryptographically implemented from a cache device or a data interface, and transmit the plaintext to a register or cache; the plaintext includes data transmitted over a network or communication, and the data type includes at least one of text, image, audio, video, numerical value, or structured data; Step 120: Load plaintext from a register or cache, and group the plaintext into four branches for parallel processing using a SIMD register. Step 130, generating round keys by designing a key scheduling algorithm, and storing the round keys in a dedicated register; Step 140 , designing a lightweight algorithm structure for cryptographically implementing the four branches stored in the SIMD register, including encrypting the plaintext and decrypting the encrypted ciphertext; Each round of the algorithm in the lightweight algorithm structure performs a round function operation, and the operation process includes nonlinear functions, key mixing and branch crossing; The round function operation includes an encryption round function operation and a decryption round function operation; Step 150: For the four branches stored in the SIMD register in the previous round, perform an XOR operation on the first two branches and the first three branches respectively using the encryption round function operation to obtain two intermediate variables; After mixing the two intermediate variables with the round key respectively, a nonlinear function is used to transform them to generate a nonlinear function result; Step 160: cyclically shift the four branches of the previous round using the nonlinear function result to obtain the four branches of the current round. Step 170: execute the initial input plain text Rounds of encryption are iterated to generate ciphertext and complete the plaintext encryption process.
2. The method for implementing a block cipher based on a lightweight algorithm structure according to claim 1, wherein: use Represents four branches of the initial plaintext input, where each Corresponds to a branch, each branch corresponds to The binary data on The value of is determined according to the length of the plaintext to be processed; In the round function operation of the lightweight algorithm structure, the four branches use the SIMD instruction set to input the branch output of the previous round in parallel , after the round function operation of the current round, the output , is the current round of the cipher implementation, , is the total number of rounds executed; The nonlinear function includes and , nonlinear function Related to the current round key, the mapping is done directly through dedicated hardware logic: , to achieve function transformation.
3. The method for implementing a block cipher based on a lightweight algorithm structure according to claim 2, wherein: In step 130, the key scheduling algorithm includes: Randomly generate using a random number generator bit master key; Fill the master key into The round key is obtained by recursively using the feedback shift register ( ), ; The round keys are stored in dedicated registers, which have a high security level setting.
4. The method for implementing a block cipher based on a lightweight algorithm structure according to claim 3, wherein: Step 150 includes: Four branches that input the output of the previous round and store it in the SIMD register , the first branch With the second branch Perform XOR operation to obtain the first intermediate variable , Indicates XOR operation; the first three branches and Perform XOR operation to obtain the second intermediate variable The intermediate variables are written back to the memory through the cache line, and the cache consistency protocol is used to ensure data synchronization in a multi-core environment; Combine the first intermediate variable with the corresponding round key After the mixing operation, the nonlinear function Perform transformation processing to generate the first nonlinear function result ; Combine the second intermediate variable with the corresponding round key After the mixing operation, the nonlinear function Perform transformation processing to generate the second nonlinear function result .
5. The method for implementing a block cipher based on a lightweight algorithm structure according to claim 4, wherein: In step 160, the four branches of the previous round are cyclically shifted left using the nonlinear function result to obtain the four branches of the current round, including: The second branch of the previous round Perform an XOR operation with the result of the first nonlinear function and the result of the second nonlinear function to obtain the first branch of the current round ; Directly the third branch of the previous round As the second branch of the current round ; The fourth branch of the previous round Perform an XOR operation with the result of the second nonlinear function to obtain the third branch of the current round ; The first branch of the previous round Perform an XOR operation on the result of the first nonlinear function and the result of the second nonlinear function to obtain the fourth branch of the current round .
6. The method for implementing a block cipher based on a lightweight algorithm structure according to claim 5, characterized in that: It also includes the process of using the decryption round function to complete the ciphertext decryption, including: The four branches of the current round obtained by encrypting the plaintext , perform XOR operations on the first two branches and the first three branches respectively to obtain two intermediate variables: , ; The two intermediate variables ( , ) are respectively related to the round keys ( , ) after the mixing operation, the nonlinear function Perform the transformation to generate a nonlinear function result: and ; Perform a reverse loop operation on the current round of branches to obtain the four branches of the previous round: ; ; ; ; implement The decryption is repeated to restore the plaintext before encryption.
7. The method for implementing a block cipher based on a lightweight algorithm structure according to claim 6, wherein: In step 130, the master key length is 128 bits, and the length of each branch data after the plaintext grouping is 32 bits. Each branch is taken from The process of generating round keys using the key scheduling algorithm includes: The 128-bit master key Filled into the 128-stage linear feedback shift register, Represents each bit in the master key, ; Using the primitive polynomial, set the period to The generator polynomial of the linear feedback shift register is: , Get the recurrence relation: ; Set the The round-by-round keys are: ,in ; In the key mixing operation, the The last 32 bits are used as the round key For nonlinear functions The first 32 bits are used as the round key. For nonlinear functions The input is XORed.
8. The method for implementing a block cipher based on a lightweight algorithm structure according to claim 7, wherein: In step 140, the nonlinear function and use Structure, function transformation process is all done by round key plus, Box replacement layer, The transformation layer consists of three operation steps, including: The intermediate variables to be obtained With wheel key Perform XOR operation to get Input to the box replacement layer: , in, is the current round number, , yes The last 32 bits of yes The first 32 bits of set up The box is a bijective mapping with 8 inputs and 8 outputs. go through After box replacement layer mapping, we get The input of the transformation layer is: ; The transformation layer uses the column confusion operation of the AES-128 standard algorithm to obtain Transformation layer output as a nonlinear function The output: ; in, 。 9. A block cipher implementation device based on a lightweight algorithm structure, characterized in that: The device is used to implement the steps of the method according to any one of claims 1 to 8, wherein the device comprises: The first module is configured to obtain plaintext to be cryptographically implemented from a cache device or a data interface and transmit the plaintext to a register or cache; the plaintext includes data transmitted via a network or communication, and the data type includes at least one of text, image, audio, video, numerical value, or structured data; The second module is used to load plaintext from registers or caches and group the plaintext into four branches for parallel processing using SIMD registers; The third module is configured to generate round keys by designing a key scheduling algorithm and store the round keys in a dedicated register; The fourth module is used to design a lightweight algorithm structure and implement cryptographic operations on the four branches stored in SIMD registers, including plaintext encryption and decryption of encrypted ciphertext. Each round of the algorithm in the lightweight algorithm structure performs a round function operation, which includes nonlinear functions, key mixing, and branch crossing. The round function operation includes encryption round function operation and decryption round function operation. The fifth module is used to perform an XOR operation on the first two branches and the first three branches of the four branches stored in the SIMD register in the previous round using the encryption round function operation to obtain two intermediate variables; after mixing the two intermediate variables with the round key, they are transformed using a nonlinear function to generate a nonlinear function result; The sixth module is used to perform a cyclic left shift operation on the four branches of the previous round using the result of the nonlinear function to obtain the four branches of the current round; The seventh module is used to execute the initial input plain text Rounds of encryption are iterated to generate ciphertext and complete the plaintext encryption process.
10. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 8 are implemented.
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