AlGaN / GaN-based HEMT (High Electron Mobility Transistor) device with adjustable threshold voltage and preparation method thereof

Abstract

The invention discloses an AlGaN / GaN-based HEMT device capable of regulating and controlling threshold voltage and a preparation method thereof. The device comprises an AlGaN barrier layer, a GaN access layer, a source electrode, a drain electrode and a grid electrode, wherein the AlGaN barrier layer and the GaN access layer are sequentially arranged from top to bottom, the source electrode and the drain electrode are arranged on the AlGaN barrier layer, and the grid electrode is arranged between the source electrode and the drain electrode. The AlGaN barrier layer and the GaN access layer form a semiconductor layer, a heterogeneous interface is formed between the AlGaN barrier layer and the GaN access layer, a two-dimensional electron gas layer is generated at the heterogeneous interface, a plurality of active regions are arranged on the semiconductor layer, a plurality of fins with different widths and a plurality of channels which are parallel to one another are arranged in each active region, the width of each fin is 30-500nm, and the width of each channel is 30-500nm. The adjacent fins are separated by a channel; the source electrode and the drain electrode are respectively arranged on two sides of the active region; the grid electrode is arranged across the fin and is perpendicular to the direction of the channel and the fin. According to the invention, the regulation and control of the threshold voltage are realized by arranging a plurality of fins with different widths, the sacrificial mask does not need to be separated in the preparation process, and the risk of damage to the surface of the semiconductor layer is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly relates to an AlGaN / GaN-based HEMT device with adjustable threshold voltage and a preparation method thereof. Background Art

[0002] A high electron mobility transistor (HEMT), also known as a heterojunction field-effect transistor (HFET), is a semiconductor device based on a heterojunction structure. Its basic structure includes a source electrode, a drain electrode, and a gate electrode. By applying a voltage to the gate electrode, the current flow between the source electrode and the drain electrode can be effectively controlled. Different from a CMOS transistor in which the current flows through a doped channel region, the core of an HEMT device lies in its heterojunction structure. This structure is formed by combining two semiconductor materials with different bandgap widths, forming a low-resistance current channel, thereby significantly improving the performance of the device.

[0003] HEMT devices are mainly divided into two types: depletion-mode and enhancement-mode. A depletion-mode HEMT is in an on state when the gate-source voltage is zero, while an enhancement-mode HEMT is in an off state when the gate-source voltage is zero. Through reasonable design, HEMT devices can possess excellent characteristics such as high breakdown voltage, high electron mobility, and a high concentration of two-dimensional electron gas (2DEG). These characteristics are mainly achieved by using a semiconductor layer composed of aluminum gallium nitride (AlGaN) and gallium nitride (GaN) materials. In an AlGaN / GaN heterostructure, due to the polarization effect, a two-dimensional electron gas layer is naturally formed at the interface, and the concentration of this two-dimensional electron gas layer is closely related to the Al concentration and the thickness of the AlGaN layer. In addition, the design of the gate structure also has an important impact on the device performance. For example, using a gate structure that surrounds the source-drain channel instead of the traditional planar top-gate design can further optimize the device performance.

[0004] In practical applications, in order to meet the requirements of different circuit functions, HEMT transistors with different threshold voltage characteristics are often needed. For example, a depletion-mode transistor with a low threshold voltage can be used as the load "resistor" in the logic part of the circuit, while an enhancement-mode transistor with a high threshold voltage is suitable for the SRAM part of the circuit and is used as a switching element. In silicon-based CMOS technology, multi-threshold voltage transistors can be manufactured by changing the channel doping concentration. However, since there is no doping path in HEMT devices, this method is not applicable to the manufacture of HEMT devices.

[0005] Currently, the existing technologies for manufacturing multi-threshold voltage AlGaN / GaN-based HEMTs mainly include methods such as barrier thinning and fluorine-based plasma treatment. However, these technologies all have certain limitations and problems. For the barrier thinning technology, when thinning the barrier layer, it will inevitably cause damage to the material surface. This surface damage not only destroys the original structural integrity of the material but also increases the gate leakage current. At the same time, the thinner barrier is more easily penetrated, allowing electrons to more easily pass through the barrier layer, further increasing the gate leakage current. In addition, since barrier thinning requires precise control of the etching process at the nm scale to achieve the desired barrier thickness, however, it is extremely difficult to perform precise etching control at such a small scale, making the reliability and repeatability of this technology poor and it is difficult to ensure consistent device performance for each preparation.

[0006] In the application process of the fluorine-based plasma treatment technology, the movement of fluorine ions will have an adverse effect on the gate characteristics of AlGaN / GaN HEMTs, which may lead to gate characteristic hysteresis. This is because the movement of fluorine ions within the material changes the electrical properties of the material, thereby affecting the gate's ability to control the channel current. Moreover, the fluorine-based plasma treatment process is affected by various factors, such as treatment time, power, gas flow rate, etc. Small changes in these factors may lead to significant differences in the treatment results, making the treatment results unstable and difficult to predict. Especially in a high-temperature application environment, the activity of fluorine ions increases and their movement is even more difficult to control, resulting in unforeseen changes in device performance and seriously affecting the stability and reliability of the device. Summary of the Invention

[0007] Aiming at the above problems, the present invention aims to provide a tunable threshold voltage AlGaN / GaN-based HEMT device and its preparation method. The threshold voltage is regulated by setting fins with multiple different widths, and there is no need to separate the sacrificial mask during the preparation process, reducing the risk of damage to the semiconductor layer surface.

[0008] The technical solution of the present invention is as follows:

[0009] On the one hand, the present invention provides an AlGaN / GaN-based HEMT device with adjustable threshold voltage, including an AlGaN barrier layer and a GaN channel layer arranged in sequence from top to bottom, a source electrode and a drain electrode arranged on the AlGaN barrier layer, and a gate electrode arranged between the source electrode and the drain electrode; the AlGaN barrier layer and the GaN channel layer form a semiconductor layer, a heterointerface is formed between the AlGaN barrier layer and the GaN channel layer, and a two-dimensional electron gas layer is generated at the heterointerface; a plurality of active regions are provided on the semiconductor layer, and a plurality of fins and a plurality of channels with different widths and parallel to each other are provided in each active region, the width of the fins is 30-500 nm, and adjacent fins are separated by the channels; the source electrode and the drain electrode are respectively arranged on both sides of the active region; the gate electrode straddles the fins and is perpendicular to the directions of the channels and the fins.

[0010] Preferably, the gate electrode includes a Ni metal layer with a thickness of 50 nm and an Au metal layer with a thickness of 100 nm.

[0011] Preferably, the thickness of the two-dimensional electron gas layer is 1-2 nm.

[0012] On the other hand, a method for manufacturing an AlGaN / GaN-based HEMT device with adjustable threshold voltage is also provided, including the following steps: S1: Device isolation: Define the active regions through a positive photolithography process, and use an inductively coupled plasma etching process (ICP) to remove the AlGaN barrier layer and the GaN channel layer in the non-active regions, with an etching depth of 480-500 nm; S2: Weak device isolation etching: Perform secondary etching on adjacent active regions, with an etching depth of 310-330 nm; S3: Source and drain preparation: Define the source and drain electrodes through a negative photolithography process, deposit multiple layers of metals such as Ti, Al, Ni, and Au on both sides of the active regions through an electron beam evaporation deposition process to form the source and drain electrodes, and perform high-temperature annealing to form ohmic contacts; S4: Gate region etching: Use an electron beam lithography process and a dry etching process to form channels and fins with a width of 30-500 nm in the active regions; S5: Gate preparation: Evaporate a Ni metal layer and an Au metal layer on the fins to form the gate electrode; S6: Passivation layer deposition: Deposit a SiN passivation layer with a thickness of 395-405 nm on the surfaces of the AlGaN barrier layer, the source electrode, the drain electrode, and the gate electrode through a plasma-enhanced chemical vapor deposition process (PECVD); x S7: Electrode opening: Define the etching regions of the source electrode, the drain electrode, and the gate electrode through a positive photolithography process, and then etch the SiN passivation layer to obtain a sample with etched openings for the source electrode, the drain electrode, and the gate electrode; S8: Interconnect metal preparation: Deposit an interconnect metal electrode with a two-layer metal structure of a Ni metal layer and an Au metal layer to obtain the HEMT device. x ​

[0013] Preferably, the etching depth of the channel is 38 - 42 nm.

[0014] Preferably, the preparation of the source and drain in step S3 includes the following steps: S1: Define the source and drain through a negative photoresist lithography process, then weakly remove the surface negative photoresist with a plasma asher, and then remove the surface oxide with hydrochloric acid; S2: Deposit the source-drain electrode film by electron beam evaporation. The multi-layer metals used are Ti, Al, Ni, and Au from bottom to top. The thicknesses of Ti, Al, Ni, and Au are 20, 130, 50, and 100 nm respectively, and the deposition rates are 0.05, 0.1, 0.08, and 0.11 nm / s respectively; Use acetone, isopropyl alcohol, and water to strip the deposited sample in an ultrasonic instrument at 70 °C to form the source and drain; S3: Use a high-temperature annealing furnace for high-temperature rapid annealing. The annealing time is 60 seconds and the annealing temperature is 930 °C.

[0015] Preferably, the gate preparation in step S5 includes the following steps: S1: Place the etched sample in an electron beam evaporation chamber. After the vacuum degree of the reaction chamber of the electron beam evaporation chamber reaches 8×10 -7 Torr, evaporate the Ni metal layer and the Au metal layer. The thicknesses of the Ni metal layer and the Au metal layer are 50 and 100 nm respectively; S2: Use acetone, isopropyl alcohol, and water to strip the deposited sample in an ultrasonic instrument at 70 °C to form the gate.

[0016] Preferably, in step S6, NH3 and SiH4 with a flow ratio of 60:45 sccm are used as reaction gases. The process parameters of the plasma-enhanced chemical vapor deposition process PECVD are: the deposition reaction temperature is 270 °C, the radio frequency power is 48 - 52 W, and the chamber pressure is 200 - 220 mTorr.

[0017] Preferably, in step S7, a reactive ion etching instrument RIE is used to etch the SiN x passivation layer. The etching time is 410 - 430 s and the etching rate is 0.8 - 1.2 nm / s.

[0018] Preferably, the preparation of the interconnect metal in step S8 includes the following steps: S1: Define the source, drain, and gate interconnect regions through a negative photoresist lithography process; S2: Weakly remove the surface negative photoresist with a plasma asher, then remove the surface oxide with hydrochloric acid, and finally deposit the interconnect metal electrode by electron beam evaporation. A two-layer metal structure is adopted, which is a Ni metal layer and an Au metal layer from bottom to top. The thicknesses of the Ni metal layer and the Au metal layer are 150 and 250 nm respectively, and the deposition rates are 0.08 and 0.11 nm / s respectively; S3: Use acetone, isopropyl alcohol, and water to strip the sample with the deposited interconnect metal at 70 °C in an ultrasonic instrument to form the interconnect metal electrode and obtain the HEMT device.

[0019] The beneficial effects of the present invention are as follows:

[0020] 1. The present invention can fabricate multiple HEMT devices with different threshold voltages on a single wafer, regulate the threshold voltage by fin width, and avoid the surface damage risk of the traditional sacrificial mask process. The present invention greatly simplifies the process flow, effectively avoids the potential risks caused by separating the sacrificial mask, minimizes the damage probability to the surface of the semiconductor layer, ensures the integrity and high quality of the semiconductor layer surface, and lays a solid foundation for the subsequent manufacture of high-performance HEMT devices.

[0021] 2. The HEMT devices fabricated by the present invention have broad application prospects in multiple key fields, such as the radio frequency (RF) field, the power electronics field, and the digital application field, etc. The HEMT devices fabricated by the present invention have excellent performance adaptability.

[0022] 3. The HEMT devices fabricated by the present invention can work stably under harsh working conditions such as high temperature and vibration around the automotive engine for a long time, providing reliable signal processing and power control for the engine control system, automotive electronic equipment, etc. In the oil exploration logging environment, it has to withstand high temperature, high pressure, and the erosion of corrosive substances. With its good stability and tolerance, the devices of the present invention can be used for downhole sensor signal processing, measurement-while-drilling systems, etc., to ensure the smooth progress of oil exploration work. In high-radiation and high-temperature environments such as nuclear reactors, it can still maintain stable performance, providing key electronic component support for the monitoring and control of nuclear reactors and ensuring the safe operation of nuclear facilities.

[0023] 4. The HEMT devices of the present invention effectively suppress the change in electron mobility and the increase in leakage current at high temperature, can maintain low power consumption and stable performance in a high-temperature environment, greatly improve the reliability and service life of the devices under high-temperature working conditions, and provide a better solution for the application of electronic equipment in a high-temperature environment. Description of the Drawings

[0024] Figure 1Schematic three-dimensional structure diagram of an AlGaN / GaN-based HEMT device with adjustable threshold voltage in an embodiment of the present invention.

[0025] Figure 2 Schematic structure diagram of an AlGaN / GaN-based HEMT device with adjustable threshold voltage in an embodiment of the present invention.

[0026] Figure 3 Schematic enlarged view of a local part of the channel and fin in an embodiment of the present invention.

[0027] Figure 4 Schematic diagram of the fin being etched into the active region in step 4 of an embodiment of the present invention.

[0028] Figure 5 Schematic diagram of the channel being etched into the active region in step 4 of an embodiment of the present invention.

[0029] Figure 6 Schematic diagram of the active region after fabricating the gate in step 5 of an embodiment of the present invention.

[0030] Figure 7 Process flow chart of an AlGaN / GaN-based HEMT device with adjustable threshold voltage in an embodiment of the present invention.

[0031] Component label description: 1. Source electrode; 2. Drain electrode; 3. Gate electrode; 4. AlGaN barrier layer; 5. GaN via layer; 6. Active region; 7. Fin; 8. Channel; 9. Two-dimensional electron gas layer; 10. Heterointerface. Detailed implementation manners

[0032] The present invention will be further described below in conjunction with the accompanying drawings and embodiments. However, it does not limit the scope of the present invention and is only for illustrative purposes. It should be noted that, without conflict, the embodiments and technical features in the embodiments of the present application can be combined with each other. Unless otherwise specified, all technical and scientific terms used in the present application have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present application belongs. The experimental methods used in the following embodiments are all conventional methods unless otherwise specified. The materials, reagents, etc. used in the following embodiments can all be obtained from commercial sources unless otherwise specified.

[0033] This embodiment provides an AlGaN / GaN-based HEMT device with adjustable threshold voltage and its manufacturing method. The present invention will be described in detail below in conjunction with specific embodiments.

[0034] Embodiment

[0035] As Figures 1-3As shown in the figure, the AlGaN / GaN-based HEMT device with adjustable threshold voltage in this embodiment includes an AlGaN barrier layer 4 and a GaN channel layer 5 which are sequentially arranged from top to bottom. A heterojunction interface 10 is formed between the AlGaN barrier layer 4 and the GaN channel layer 5, and a two-dimensional electron gas layer 9 is generated at the heterojunction interface 10. The source electrode 1 and the drain electrode 2 are arranged on the AlGaN barrier layer 4 and are respectively located on both sides of the active region 6. The gate electrode 3 is arranged between the source electrode 1 and the drain electrode 2, spans across the fin 7, and is perpendicular to the directions of the channel 8 and the fin 7.

[0036] A plurality of active regions 6 are provided on the semiconductor layer. A plurality of fins 7 with different widths and a plurality of channels 8 parallel to each other are provided in each active region 6. The width L2 of the fin 7 is 30 - 500 nm, and adjacent fins 7 are separated by the channel 8. The fin 7 is corrugated, and the threshold voltage is adjustable with the change of the width of the fin 7. By changing the width of the fin 7, the threshold voltage of the HEMT device can be regulated.

[0037] The width of the gate electrode 3 is L1, and the length of the fin 7 is L3. The length L3 of the fin 7 can be equal to, less than, or greater than the width L1 of the gate electrode 3.

[0038] This embodiment also provides a preparation method for an AlGaN / GaN-based HEMT device with adjustable threshold voltage. The process flow chart of the preparation process is as Figure 7 shown, and specifically includes the following steps:

[0039] Step 1: Device isolation

[0040] 1.1 Define the active region 6 through a positive photoresist (AZ1500) lithography process;

[0041] 1.2 Use an inductively coupled plasma etching (ICP) process to remove the AlGaN barrier layer 4 (Al composition 25%, thickness 25 nm) and the GaN channel layer 5 (thickness 2.5 μm) in the non-active region 6, and the etching depth is 500 nm; wherein, in the ICP process, the reaction gases are BCl3 and Cl2 with a flow ratio of 3:2, and the reaction rate is 80 nm / min;

[0042] 1.3 After cleaning with deionized water, use an N2 gas gun to dry it to achieve the preliminary isolation of the device.

[0043] Step 2: Weak device isolation etching

[0044] 2.1 In the adjacent region where the device spacing < 5 μm, define the weak isolation region by secondary lithography;

[0045] 2.2 Use ICP-RIE for selective etching (RF power 150 W, ICP power 300 W), and the etching depth is 320 nm;

[0046] 2.3 The etched surface roughness is detected by atomic force microscopy (AFM) to be less than 0.5 nm RMS.

[0047] Step 3: Preparation of source 1 and drain 2

[0048] 3.1 Define the positions of source 1 and drain 2 through photolithography process with negative photoresist (YN-S2000), then weakly remove the surface negative photoresist with a plasma asher, and then remove the surface oxide with hydrochloric acid;

[0049] 3.2 Deposit four layers of metals, namely Ti, Al, Ni, and Au, from bottom to top on both sides of the active region 6 through electron beam evaporation deposition process. The thicknesses of Ti, Al, Ni, and Au are 20, 130, 50, and 100 nm respectively, and the deposition rates are 0.05, 0.1, 0.08, and 0.11 nm / s respectively; Use acetone, isopropyl alcohol, and water to strip the deposited samples at 70 °C in an ultrasonic instrument to form source 1 and drain 2;

[0050] 3.3 Use a rapid thermal annealing furnace (RTA) for high-temperature rapid annealing. The annealing time is 60 seconds and the annealing temperature is 930 °C;

[0051] 3.4 After four-probe testing, the contact resistance is less than 0.5 Ω·mm, and the specific contact resistivity is less than 1×10 -6 Ω·cm 2 .

[0052] Step 4: Gate region etching

[0053] Adopt electron beam lithography process (EBL, acceleration voltage 100 kV) and dry etching process to form a channel 8 and fins 7 with a width of 30 - 500 nm in the active region 6. The etching depth of the channel 8 is 40 nm. The schematic diagram of forming fins and channels in the active region is as Figures 4-5 shown, where Figure 4 is the schematic diagram of fin etching into the active region, Figure 5 is the schematic diagram of channel etching into the active region.

[0054] Step 5: Gate 3 preparation

[0055] 5.1 Place the etched sample into an ultra-high vacuum electron beam evaporation platform. After the vacuum degree of the reaction chamber of the electron beam evaporation platform reaches 8×10 -7 Torr, evaporate the Ni metal layer and the Au metal layer. The thicknesses of the Ni metal layer and the Au metal layer are 50 and 100 nm respectively;

[0056] 5.2 Use acetone, isopropyl alcohol, and water to strip the deposited sample at 70 °C in an ultrasonic instrument to form the gate 3; after the stripping process, a T-shaped gate structure is formed, with a gate length Lg = 150 nm and a gate foot width of 80 nm. The schematic diagram of forming the gate in the active region is as shown in Figure 6 shown.

[0057] Step 6: Passivation layer deposition

[0058] 6.1 Deposit a 400-nm-thick SiN passivation layer on the surfaces of the AlGaN barrier layer 4, source electrode 1, drain electrode 2, and gate 3 through a plasma-enhanced chemical vapor deposition (PECVD) process. The deposition process parameters are as follows: Use NH3 and SiH4 with a flow rate ratio of 60:45 sccm as reaction gases, a reaction temperature of 270 °C, a radio frequency power of 52 W, and a chamber pressure of 210 mTorr; x 6.2 Measure the refractive index n = 2.0 @ 632 nm and the dielectric constant ε = 7.5 through an ellipsometer;

[0059] 6.3 After wet etching to open holes, the change rate of the contact resistance < 2%.

[0060] Step 7: Electrode opening

[0061] 7.1 Define the etching regions of the source electrode 1, drain electrode 2, and gate 3 through a positive photoresist (AZ1500) lithography process;

[0062] 7.2 Use a reactive ion etching instrument RIE to etch the SiN passivation layer to obtain openings for the source electrode 1, drain electrode 2, and gate 3. In the RIE process, the etching time is 420 s, the etching rate is 1 nm / s, use Cl2 and BCl3 with a flow rate ratio of 3:2 as reaction gases, and the radio frequency power is 300 W.

[0063] 7.2 Use a reactive ion etching instrument RIE to etch the SiN x passivation layer to obtain openings for the source electrode 1, drain electrode 2, and gate 3. In the RIE process, the etching time is 420 s, the etching rate is 1 nm / s, use Cl2 and BCl3 with a flow rate ratio of 3:2 as reaction gases, and the radio frequency power is 300 W.

[0064] Step 8: Interconnect metal preparation

[0065] 8.1 Define the interconnect regions of the source electrode 1, drain electrode 2, and gate 3 through a negative photoresist (YN-S1500) lithography process;

[0066] 8.2 Use a plasma asher to weakly remove the surface negative photoresist, then use hydrochloric acid (HCL:H2O = 1:10) to remove the surface oxide, and finally deposit the interconnect metal electrodes using electron beam evaporation. A two-layer metal structure is adopted, with a Ni metal layer and an Au metal layer from bottom to top. The thicknesses of the Ni metal layer and the Au metal layer are 150 nm and 250 nm respectively, and the deposition rates are 0.08 and 0.11 nm / s respectively;

[0067] 8.3 Use acetone, isopropanol and water to strip the deposited sample at 70 °C in an ultrasonic instrument to form an interconnected metal electrode, completing the preparation of the HEMT device.

[0068] Experimental example

[0069] Conduct a multi-threshold voltage regulation verification experiment on the HEMT device prepared in the example:

[0070] Prepare device groups with three different fin widths (30 nm / 200 nm / 500 nm) on a 6-inch sapphire substrate:

[0071] ① 30-nm fin width group: Threshold voltage Vth = +0.8 V, transconductance gm = 350 mS / mm;

[0072] ② 200-nm fin width group: Vth = -2.5 V, breakdown voltage BVds > 200 V;

[0073] ③ 500-nm fin width group: Vth = -4.2 V, on-resistance Ron = 2.5 Ω·mm.

[0074] The fin width is negatively correlated with the threshold voltage. The smaller the width (such as 30 nm), the higher the threshold voltage (enhancement type, threshold voltage > 0 V), and the larger the width (such as 500 nm), the lower the threshold voltage (depletion type, threshold voltage < 0 V).

[0075] 1. High-temperature reliability test (200 °C / 1000 h) shows that:

[0076] Threshold voltage drift ΔVth < 0.15 V;

[0077] Leakage current degradation rate < 10%;

[0078] Two-dimensional electron gas concentration is maintained at 2×10 13 cm -2 .

[0079] 2. Technical effect description

[0080] Precise threshold voltage regulation: The threshold voltage can be continuously adjusted from +0.8 V to -4.2 V through the 30-500 nm fin width design, meeting the integration requirements of digital / analog circuits.

[0081] 3. Process compatibility advantages

[0082] The compatibility with the existing GaN-based HEMT production line is > 90%. There are only two new process steps (electron beam lithography and selective etching), and the wafer yield is > 85%.

[0083] 4. High-frequency performance breakthrough

[0084] The three-dimensional fin structure enhances the gate control ability by 40%, and the device switching speed reaches <100 ps (about 150 ps for the traditional planar structure).

[0085] 5. Extreme environmental stability

[0086] Under the conditions of high temperature of 250 °C and neutron irradiation of 5×10 14 cm -2 The device performance degradation is <15%, which is suitable for aerospace applications.

[0087] The data of the above embodiments are based on the actual experimental measurement results. During specific implementation, the parameter adjustment of ±10% can be carried out according to the process conditions.

[0088] In summary, the AlGaN / GaN-based HEMT device and its manufacturing method of the present invention regulate the threshold voltage through the fin width, break through the limitations of traditional technologies, and achieve the following remarkable effects:

[0089] 1. Multi-threshold integrated manufacturing

[0090] Single-wafer multi-threshold: Manufacture multiple HEMT devices with different threshold voltages (such as depletion type and enhancement type) on the same wafer. Without sacrificing masks or complex process adjustments, the manufacturing cost is significantly reduced (the cost is reduced by about 40% compared with the traditional method).

[0091] Process compatibility: It is fully compatible with the existing electron beam lithography (EBL) and inductively coupled plasma dry etching (ICP-RIE) processes, and the yield is increased by 15%-20% (embodiment data: the threshold voltage offset tolerance is ±0.1 V).

[0092] 2. Breakthrough in performance and reliability

[0093] Low-damage process: Through the nano-scale fin isolation design (width 30-500 nm), avoid the surface damage caused by the traditional barrier thinning technology, and reduce the gate leakage current to 10 -7 A / mm level (reduced by 2 orders of magnitude compared with fluorine-based plasma treatment).

[0094] High-temperature stability: In extreme environments above 200 °C (such as automobile engines, nuclear reactors), the threshold voltage drift rate is <5%, showing excellent high-temperature control ability (the drift rate of traditional Si-based devices is >30%).

[0095] 3. Design flexibility and application expansion

[0096] Dynamic threshold regulation: By precisely controlling the fin width (such as 30 nm enhancement type vs. 500 nm depletion type), the threshold voltage can be linearly regulated in the range of +0.8 V to -4.2 V, meeting the requirements of multiple scenarios such as radio frequency (RF), power electronics, and digital logic circuits.

[0097] Miniaturization Advantage: By adopting a three-dimensional fin structure to replace the traditional planar design, the device density is increased by 3 times, which is suitable for high-integration IC chips.

[0098] 4. Improvement in Manufacturing Efficiency

[0099] Process Simplification: The channels and fins of multiple HEMT devices are simultaneously defined through a single photolithography-etching step, reducing the process steps by 50% (compared with the traditional multi-mask process).

[0100] Parameter Repeatability: Based on the nanoscale precision of electron beam lithography (±5nm error), the batch consistency of the threshold voltage reaches 98% (only 75%-80% for the traditional barrier dilution technology).

[0101] 5. Industrialization Value

[0102] Compatible with Existing Production Lines: It can be directly introduced into a 6-inch GaN-on-Si wafer production line, and the equipment transformation cost is less than $100,000.

[0103] Market Potential: It is applicable to multi-hundred-billion-level markets such as 5G base stations (radio frequency front-end), new energy vehicles (on-vehicle inverters), and industrial power modules. The device life is increased to 150,000 hours (the device life of the traditional solution is 80,000 - 100,000 hours).

[0104] Through the above embodiments, the present invention provides an AlGaN / GaN-based HEMT device with adjustable threshold voltage and its manufacturing method, which can realize the manufacturing of multiple HEMT devices with different threshold voltages on a single wafer without an additional separation sacrificial mask, reducing the risk of damage to the semiconductor layer surface. This device is applicable to fields such as radio frequency (RF), power electronics, and digital applications, and has significant advantages especially in extreme temperature and harsh environment applications such as automotive engines, oil exploration logging, and nuclear reactors. Compared with traditional Si-based and GaAs-based HEMT devices, the HEMT device of the present invention has obvious advantages in high-temperature control.

[0105] The above is only a preferred embodiment of the present invention, and it is not intended to limit the present invention in any form. Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some changes or modifications to the above-disclosed technical content to be equivalent variations within the scope of the technical solution of the present invention. However, as long as it does not depart from the content of the technical solution of the present invention, any simple modification, equivalent variation, and modification made to the above embodiments according to the technical essence of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. An AlGaN / GaN-based HEMT device with adjustable threshold voltage, comprising an AlGaN barrier layer (4) and a GaN channel layer (5) arranged successively from top to bottom, a source electrode (1) and a drain electrode (2) provided on the AlGaN barrier layer (4), and a gate electrode (3) provided between the source electrode (1) and the drain electrode (2); the AlGaN barrier layer (4) and the GaN channel layer (5) form a semiconductor layer, a heterointerface (10) is formed between the AlGaN barrier layer (4) and the GaN channel layer (5), and a two-dimensional electron gas layer (9) is generated at the heterointerface (10); characterized in that, A plurality of active regions (6) are provided on the semiconductor layer. Inside each active region (6), a plurality of fins (7) with different widths and a plurality of channels (8) that are parallel to each other are provided. The width of the fins (7) is 30 - 500 nm, and adjacent fins (7) are separated by the channels (8). The source electrode (1) and the drain electrode (2) are respectively arranged on both sides of the active region (6). The gate electrode (3) is arranged across the fins (7) and is perpendicular to the directions of the channels (8) and the fins (7).

2. The AlGaN / GaN-based HEMT device with adjustable threshold voltage according to claim 1, wherein The gate electrode (3) includes a Ni metal layer with a thickness of 50 nm and an Au metal layer with a thickness of 100 nm.

3. The AlGaN / GaN-based HEMT device with adjustable threshold voltage according to claim 1, characterized in that, The thickness of the two-dimensional electron gas layer (9) is 1 - 2 nm.

4. A method for fabricating an AlGaN / GaN-based HEMT device with adjustable threshold voltage according to any one of claims 1-3, characterized in that, It includes the following steps: S1: Device isolation: Define the active region (6) through a positive photoresist lithography process, and use an inductively coupled plasma etching process ICP to remove the AlGaN barrier layer (4) and the GaN via layer (5) in the non-active region (6), with an etching depth of 480 - 500 nm; S2: Weak device isolation etching: Perform secondary etching on adjacent active regions (6), with an etching depth of 310 - 330 nm; S3: Preparation of the source electrode (1) and the drain electrode (2): Define the source electrode (1) and the drain electrode (2) through a negative photoresist lithography process, deposit multiple layers of metals such as Ti, Al, Ni, and Au on both sides of the active region (6) through an electron beam evaporation deposition process to form the source electrode (1) and the drain electrode (2), and perform high-temperature annealing to form an ohmic contact; S4: Gate region etching: Use an electron beam lithography process and a dry etching process to form channels (8) and fins (7) with a width of 30 - 500 nm in the active region (6); S5: Preparation of the gate electrode (3): Evaporate a Ni metal layer and an Au metal layer on the fins (7) to form the gate electrode (3); S6: Passivation layer deposition: Deposit SiN with a thickness of 395 - 405 nm on the surfaces of the AlGaN barrier layer (4), source electrode (1), drain electrode (2), and gate electrode (3) through plasma enhanced chemical vapor deposition process PECVD x passivation layer; S7: Electrode opening: Define the etching regions of the source electrode (1), drain electrode (2), and gate electrode (3) through a positive photoresist lithography process, and then etch the SiN x passivation layer to obtain a sample with etched openings for the source electrode (1), drain electrode (2), and gate electrode (3); S8: Preparation of the interconnecting metal: Deposit an interconnecting metal electrode with a two-layer metal structure of a Ni metal layer and an Au metal layer to obtain a HEMT device.

5. The manufacturing method of the AlGaN / GaN-based HEMT device with adjustable threshold voltage according to claim 4, characterized in that, The etching depth of the channel (8) is 38 - 42 nm.

6. The manufacturing method of the AlGaN / GaN-based HEMT device with adjustable threshold voltage according to claim 4, characterized in that, The preparation of the source electrode (1) and the drain electrode (2) in the step S3 includes the following steps: S1: Define the source electrode (1) and the drain electrode (2) through a negative photoresist lithography process, then weakly remove the surface negative photoresist with a plasma asher, and then remove the surface oxide with hydrochloric acid; S2: Use an electron beam to evaporate and deposit a source-drain electrode thin film. The multiple layers of metals used are Ti, Al, Ni, and Au from bottom to top in sequence. The thicknesses of Ti, Al, Ni, and Au are 20, 130, 50, and 100 nm respectively, and the deposition rates are 0.05, 0.1, 0.08, and 0.11 nm / s respectively; Use acetone, isopropyl alcohol, and water to strip the deposited sample in an ultrasonic instrument at a temperature of 70 °C to form the source electrode (1) and the drain electrode (2); S3: Use a high-temperature annealing furnace for high-temperature rapid annealing. The annealing time is 60 seconds, and the annealing temperature is 930 °C.

7. The manufacturing method of the AlGaN / GaN-based HEMT device with adjustable threshold voltage according to claim 4, characterized in that, The preparation of the gate electrode (3) in the step S5 includes the following steps: S1: Place the etched sample into an electron beam evaporation chamber. After the vacuum degree of the reaction chamber of the electron beam evaporation chamber reaches 8×10 -7 Torr, deposit Ni metal layer and Au metal layer. The thicknesses of the Ni metal layer and the Au metal layer are 50 nm and 100 nm respectively; S2: Use acetone, isopropyl alcohol, and water to strip the deposited sample in an ultrasonic instrument at a temperature of 70 °C to form the gate electrode (3).

8. The preparation method of the AlGaN / GaN-based HEMT device with adjustable threshold voltage according to claim 4, characterized in that, In step S6, NH3 and SiH4 with a flow ratio of 60:45 sccm are used as reaction gases, and the process parameters of the plasma enhanced chemical vapor deposition process PECVD are as follows: the reaction temperature for deposition is 270 °C, the radio frequency power is 48 - 52 W, and the chamber pressure is 200 - 220 mTorr.

9. The manufacturing method of the AlGaN / GaN-based HEMT device with adjustable threshold voltage according to claim 4, wherein In the step S7, a reactive ion etching instrument RIE is used to etch the SiN x passivation layer, the etching time is 410 - 430 s, and the etching rate is 0.8 - 1.2 nm / s.

10. The manufacturing method of the AlGaN / GaN-based HEMT device with adjustable threshold voltage according to claim 4, characterized in that, The preparation of the interconnecting metal in step S8 includes the following steps: S1: Define the interconnecting regions of the source electrode (1), drain electrode (2), and gate electrode (3) through a negative photoresist lithography process; S2: Weakly remove the surface negative photoresist with a plasma asher, then remove the surface oxide with hydrochloric acid, and finally deposit the interconnecting metal electrode by electron beam evaporation. A two - layer metal structure is adopted, which is a Ni metal layer and an Au metal layer from bottom to top. The thicknesses of the Ni metal layer and the Au metal layer are 150 and 250 nm respectively, and the deposition rates are 0.08 and 0.11 nm / s respectively; S3: Use acetone, isopropyl alcohol, and water to strip the sample with the deposited interconnecting metal at 70 °C in an ultrasonic instrument to form the interconnecting metal electrode and obtain the HEMT device.

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