Driving method of display panel and display device

Abstract

The invention provides a driving method of a display panel and a display device. A pixel circuit in the display panel comprises a first transistor and a second transistor which are connected in series, the first transistor is connected with a data line, a grid of the first transistor is connected with a data control line, the second transistor is connected with a pixel electrode, and a grid of the second transistor is connected with a grid line; the grid lines extend in a first direction, and the data lines and the data control lines extend in a second direction; the first region and the second region are adjacent in the first direction. In at least one frame, a data control line connected with the first area controls a first transistor in the first area to be closed, and a grid line connected with the first area controls a second transistor in the first area to be opened; the data control line connected with the second area controls the first transistor in the second area to be opened, and the grid line connected with the second area controls the second transistor in the second area to be opened. According to the invention, left and right partition refreshing of the display panel can be realized.

Description

Technical Field

[0001] The present invention relates to the field of displays, and in particular, to a driving method for a display panel and a display device. Background Art

[0002] To enhance the consumer experience, the refresh rate of display products is getting higher and higher. The higher the display frequency, the greater the power consumption, which affects the usage time of electronic products. The zoned and frequency-divided display technology has become one of the optional solutions to solve the display power consumption problem. Zoned and frequency-divided display means that different refresh rates can be used for different partitions on a screen. For example, a high refresh frame rate is used in the dynamic picture area, and a low refresh frame rate is used in the static picture area. The setting of the low refresh area in zoned and frequency-divided display can reduce power consumption. Currently, zoned and frequency-divided display realizes up-and-down partition refresh according to the driving architecture of the gate lines. When the left half of the screen is a dynamic picture and the right half of the screen is a static picture, the existing scheme cannot be used to achieve partition refresh and reduce power consumption. Summary of the Invention

[0003] The present invention provides a driving method for a display panel and a display device to solve the technical problem of reducing power consumption by refreshing the left and right partitions of the display screen.

[0004] In a first aspect, the present invention provides a driving method for a display panel. The display area of the display panel includes pixels, gate lines, data lines, and data control lines. The pixel includes a pixel circuit and a pixel electrode. The pixel circuit includes a first transistor and a second transistor. The first transistor and the second transistor are connected in series. The first transistor is connected to the data line, the gate of the first transistor is connected to the data control line, the second transistor is connected to the pixel electrode, and the gate of the second transistor is connected to the gate line; The gate lines extend in a first direction, the data lines and the data control lines extend in a second direction, and the first direction intersects the second direction; The display area includes a first area and a second area adjacent in the first direction. The driving method includes: In at least one frame: The data control line connected to the pixel circuit in the first area controls the first transistor in the first area to turn off, and the gate line connected to the pixel circuit in the first area controls the second transistor in the first area to turn on; The data control line connected to the pixel circuit in the second area controls the first transistor in the second area to turn on, and the gate line connected to the pixel circuit in the second area controls the second transistor in the second area to turn on.

[0005] Second aspect, based on the same inventive concept, the present invention further provides a display device, the display device comprising a display panel; the display area of the display panel comprises pixels, gate lines, data lines and data control lines, the pixels comprising pixel circuits and pixel electrodes, the pixel circuits comprising a first transistor and a second transistor, the first transistor and the second transistor being connected in series, the first transistor being connected to the data line, the gate of the first transistor being connected to the data control line, the second transistor being connected to the pixel electrode, and the gate of the second transistor being connected to the gate line.

[0006] The driving method and display device of the display panel provided by the present invention have the following beneficial effects: The present invention provides a driving method for a display panel, the display area of the display panel comprising pixels, gate lines, data lines and data control lines, the pixels comprising pixel circuits and pixel electrodes, the pixel circuits comprising a first transistor and a second transistor, the first transistor and the second transistor being connected in series, the first transistor being connected to the data line, the gate of the first transistor being connected to the data control line, the second transistor being connected to the pixel electrode, and the gate of the second transistor being connected to the gate line; the gate lines extend in a first direction, the data lines and the data control lines extend in a second direction, the first direction intersecting the second direction; the display area comprises a first area and a second area adjacent to each other in the first direction, the driving method comprising: in at least one frame: the data control line connected to the pixel circuit in the first area controls the first transistor in the first area to turn off, and the gate line connected to the pixel circuit in the first area controls the second transistor in the first area to turn on; the data control line connected to the pixel circuit in the second area controls the first transistor in the second area to turn on, and the gate line connected to the pixel circuit in the second area controls the second transistor in the second area to turn on. By adopting the driving method provided by the present invention, it is possible to achieve that in at least one frame, the first area does not refresh data and the second area refreshes data, and the first area and the second area adjacent to each other in the extending direction of the gate line have different refresh rates, and it is possible to achieve left-right partition refreshing of the display panel. When applied to a scenario where a static image is displayed in the first area and a dynamic image is displayed in the second area, the power consumption of the display panel can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings based on these drawings without creative efforts.

[0008] Figure 1 It is a schematic diagram of a display panel provided by the present invention; Figure 2 It is a driving timing diagram provided by the present invention; Figure 3 It is another schematic diagram of a display panel provided by the present invention; Figure 4 Another driving timing diagram provided by the present invention; Figure 5 Another schematic diagram of the partitioned refresh of the display panel provided by the present invention; Figure 6 Another schematic diagram of the driving method provided by the present invention; Figure 7 Another schematic diagram of the driving method provided by the present invention; Figure 8 Another schematic diagram of the driving method provided by the present invention; Figure 9 Another schematic diagram of the driving method provided by the present invention; Figure 10 A schematic diagram of a display device provided by the present invention; Figure 11 Another schematic diagram of a display device provided by the present invention; Figure 12 Another schematic diagram of a display device provided by the present invention; Figure 13 Another schematic diagram of a display device provided by the present invention; Figure 14 Another schematic diagram of a display device provided by the present invention; Figure 15 Another schematic diagram of a display device provided by the present invention; Figure 16 A driving flow chart of the display device provided by the present invention. Detailed implementation manners

[0009] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The singular forms "a", "an", and "the" used in the embodiments of the present invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0010] The present invention provides a driving method for a display panel, which can be applied to drive a liquid crystal display panel. A first transistor and a second transistor are provided in the pixel circuit. The first transistor is connected to the pixel electrode through the second transistor. The first transistor is connected to the data line, and the gate of the second transistor is connected to the gate line. The first transistor controls whether the data voltage on the data line can be written into the pixel circuit, and the second transistor controls whether the data voltage can be written onto the pixel electrode. If the first transistor is controlled to be turned off and the second transistor is turned on, the voltage on the data line cannot be written into the pixel circuit, and the data voltage written last time is maintained on the pixel electrode, and the pixel does not perform data refreshing. When the first transistor is turned on and the second transistor is turned on, the data voltage on the data line is written onto the pixel electrode, and the pixel performs data refreshing. By separately controlling the states of the first transistors in the left and right partitions in the extending direction of the gate line, left and right partition refreshing can be achieved and power consumption can be reduced. The above is the main idea of the present invention. The technical solution of the present invention will be illustrated by way of specific embodiments below.

[0011] Figure 1 FIG. is a schematic diagram of a display panel provided by the present invention. As Figure 1 shown, the display area AA of the display panel includes pixels P, gate lines G, data lines Data, and data control lines Sc. The pixel P includes a pixel circuit 10 and a pixel electrode ( Figure 1 (not labeled). The display panel includes an array substrate and a color filter substrate disposed opposite to each other, and a liquid crystal layer is disposed between the array substrate and the color filter substrate. Among them, the pixel circuit 10, the gate line G, the data line Data, and the data control line Sc are located in the array substrate. The array substrate may further include a pixel electrode and a common electrode, and a pixel capacitance Cst is formed between the pixel electrode and the common electrode. The pixel circuit 10 writes the data voltage provided by the data line Data onto the pixel electrode, and then the pressure difference between the pixel electrode and the common electrode forms an electric field to control the deflection of liquid crystal molecules, realizing the grayscale display of the pixel P.

[0012] The pixel circuit 10 includes a first transistor T1 and a second transistor T2. The first transistor T1 and the second transistor T2 are connected in series. The first transistor T1 is connected to the data line Data, the gate of the first transistor T1 is connected to the data control line Sc, the second transistor T2 is connected to the pixel electrode, and the gate of the second transistor T2 is connected to the gate line G. The gate line G extends in the first direction x, the data line Data and the data control line Sc extend in the second direction y, and the first direction x intersects with the second direction y. Figure 1 In FIG., the first transistor T1 and the second transistor T2 are schematically shown as n-type transistors. In some other embodiments, the first transistor T1 and the second transistor T2 may also be p-type transistors.

[0013] In a display area AA, a plurality of pixels P are arranged in pixel rows in a first direction x, and the plurality of pixels P are arranged in pixel columns in a second direction y. Data lines Data are connected to a plurality of first transistors T1 in one pixel column, and a data control line Sc is connected to the gates of the plurality of first transistors T1 in one pixel column. Gate lines G are connected to the gates of a plurality of second transistors T2 in one pixel row, that is, one gate line G drives one pixel row. The display area AA includes a plurality of gate lines G. When driving the display panel for display, the plurality of gate lines G sequentially provide scan signals from top to bottom, and the data lines Data cooperate to write data voltages into the pixel circuits 10, so as to drive a plurality of pixel rows in the display area AA row by row and complete the display of one frame of image.

[0014] Figure 1 It is shown that the display area AA includes a first area Q1 and a second area Q2 adjacent to each other in the first direction x. Since the gate lines G penetrate the display area AA in the first direction x, the gate lines G connected to the pixel circuits 10 in the first area Q1 are also electrically connected to the pixel circuits 10 in the second area Q2, and these gate lines G drive the pixels P located in the first area Q1 and the pixels P located in the second area Q2.

[0015] An embodiment of the present invention provides a driving method for a display panel, which can be used to drive the display panel provided by the embodiment of the present invention. The driving method includes: In at least one frame: The data control line Sc connected to the pixel circuit 10 in the first area Q1 controls the first transistor T1 in the first area Q1 to turn off, and the gate line G connected to the pixel circuit 10 in the first area Q1 controls the second transistor T2 in the first area Q1 to turn on. That is, the first transistor T1 in the pixel circuit 10 in the first area Q1 turns off and the second transistor T2 turns on. In this frame, the signal on the data line Data cannot be written into the pixel circuit 10, and the data voltage written last time is maintained on the pixel electrode in the pixel P. Then, the pixels P in the first area Q1 do not perform data refreshing.

[0016] The data control line Sc connected to the pixel circuit 10 in the second area Q2 controls the first transistor T1 in the second area Q2 to turn on, and the gate line G connected to the pixel circuit 10 in the second area Q2 controls the second transistor T2 in the second area Q2 to turn on. That is, the first transistor T1 in the pixel circuit 10 in the second area Q2 turns on and the second transistor T2 turns on. In this frame, the signal on the data line Data can be written into the pixel electrode in the pixel P to charge the pixel electrode. Then, the pixels P in the second area Q2 perform data refreshing.

[0017] By using the driving method provided by the embodiment of the present invention, it is possible to achieve that in at least one frame, the first region Q1 does not refresh data, and the second region Q2 refreshes data. The first region Q1 and the second region Q2 adjacent to each other in the extending direction of the gate line G have different refresh rates, and it is possible to achieve left-right partitioned refreshing of the display panel. When applied to a scenario where the first region Q1 displays a static image and the second region Q2 displays a dynamic image, the power consumption of the display panel can be reduced.

[0018] Figure 1 It is shown in the figure that the first region Q1 and the second region Q2 are located in the middle region of the display area AA. By using the driving method provided by the embodiment of the present invention, it is possible to achieve left-right partitioned refreshing of the middle position of the display area AA. The embodiment of the present invention does not limit the positions and areas of the first region Q1 and the second region Q2. In some other embodiments, according to the refresh information of the display area AA, the display area AA can be divided into two adjacent regions on the left and right, and these two regions are the first region Q1 and the second region Q2. By using the driving method provided by the embodiment of the present invention, left-right partitioned refreshing of the display area AA is achieved.

[0019] In one embodiment, the display panel is driven to display the first frame and the second frame, and at least one second frame is included in two adjacent first frames. It should be noted that the first frame and the second frame are only a naming method to distinguish different display frames, and do not limit the display frames sorted in chronological order. For example, in the first frame, both the first region Q1 and the second region Q2 perform data refreshing, and in the second frame, the first region Q1 does not refresh data, and the second region Q2 refreshes data. The first frame is the data refresh frame of the entire display area AA, and the second frame is the refresh frame of the high-frequency region and the maintenance frame of the low-frequency region.

[0020] Figure 2 This is a driving timing diagram provided by the present invention. Figure 2 It shows the driving timing of a pixel circuit 10 in the first region Q1 and a pixel circuit 10 in the second region Q2. In combination with Figure 1 the pixel circuit 10 shown for understanding the driving method. Taking the data control line Sc providing a high-level signal to control the first transistor T1 to turn on and providing a low-level signal to control the first transistor T1 to turn off, and the gate line G providing a high-level signal to control the second transistor T2 to turn on and providing a low-level signal to control the second transistor T2 to turn off as an example. Among them, In the first frame Z1: The data control line Sc connected to the pixel circuit 10 in the first region Q1 controls the first transistor T1 in the pixel circuit 10 to turn on, and the gate line G connected to the pixel circuit 10 in the first region Q1 provides a high-level pulse once to control the second transistor T2 to turn on. The data control line Sc connected to the pixel circuit 10 in the second region Q2 controls the first transistor T1 in the pixel circuit 10 to turn on, and the gate line G connected to the pixel circuit 10 in the second region Q2 provides a high-level pulse once to control the second transistor T2 to turn on. In the first frame Z1, the pixel electrode of the pixel P in the first region Q1 is charged, and at the same time, the pixel electrode of the pixel P in the second region Q2 is charged. Both the first region Q1 and the second region Q2 perform data refreshing.

[0021] In the second frame Z2: The data control line Sc connected to the pixel circuit 10 in the first region Q1 controls the first transistor T1 in the pixel circuit 10 to turn off, and the gate line G connected to the pixel circuit 10 in the first region Q1 provides a high-level pulse once to control the second transistor T2 to turn on. The data control line Sc connected to the pixel circuit 10 in the second region Q2 controls the first transistor T1 in the pixel circuit 10 to turn on, and the gate line G connected to the pixel circuit 10 in the second region Q2 provides a high-level pulse once to control the second transistor T2 to turn on. In the second frame Z2, the pixel electrode of the pixel P in the second region Q2 is charged, but the pixel electrode of the pixel P in the first region Q1 is not charged. The second region Q2 performs data refreshing, and the first region Q1 does not refresh and maintains the display state of the previous frame.

[0022] When driving the display panel to display, at least one second frame Z2 is set between two adjacent first frames Z1. Then, the refresh rate of the first region Q1 is less than the refresh rate of the second region Q2, realizing left-right partition refreshing of the display panel. For example, if the display panel displays 200 frames in 1 s, only one frame of the 200 frames is the first frame Z1, and the remaining 199 frames are all second frames Z2. Then, the first region Q1 is the low-frequency region with a refresh rate of 1 Hz, and the second region Q2 is the high-frequency region with a refresh rate of 120 Hz.

[0023] In the embodiment of the present invention, the first region Q1 and the second region Q2 are adjacent in the first direction x, and the first region Q1 and the second region Q2 share a part of the gate line G. Then, this part of the gate line G drives the first region Q1 and the second region Q2 in the same time period. In some embodiments, in at least one frame, such as Figure 2 in the second frame Z2 schematically shown in the timing diagram, the time period for driving the first region Q1 and the second region Q2 to display: The data line Data connected to the pixel circuit 10 in the first region Q1 transmits a constant voltage; the data line Data connected to the pixel circuit 10 in the second region Q2 provides a data voltage with a voltage jump to the second region Q2.

[0024] Combined Figure 1As shown, the first region Q1 has a certain width in the second direction y. The first region Q1 covers multiple pixel rows, and the data line Data is connected to the pixels P located in multiple pixel rows in a column of pixels. During the period of driving the first region Q1 and the second region Q2 to display, since the first transistor T1 in the first region Q1 is turned off and there is no need to write a data voltage to the pixel electrode in the first region Q1, the data line Data connected to the pixel circuit 10 in the first region Q1 can be controlled to transmit a constant voltage. In this way, the power consumption of the display panel can be further reduced.

[0025] Among them, the constant voltage transmitted by the data line Data can be a fixed voltage set by the system, or the data voltage provided by the data line Data to the pixel circuit at the previous moment.

[0026] In some embodiments, Figure 3 Another schematic diagram of a display panel provided by the present invention is shown in Figure 3 As shown, the display area AA includes a first region Q1, a second region Q2, and a third region Q3. The first region Q1 and the second region Q2 are adjacent in the first direction x, and in the second direction y, the third region Q3 is adjacent to the second region Q2. The second direction y intersects with the first direction x. Figure 3 The data line Data, the data control line Sc, and the gate line G are shown, and the pixel circuit 10 is not shown. It can be seen that at least one gate line G penetrates the first region Q1 and the second region Q2 in the first direction x to drive the pixels in the first region Q1 and the second region Q2; at least one group of the data line Data and the data control line Sc penetrates the third region Q3 and the second region Q2 in the second direction y to drive the pixels in the third region Q3 and the second region Q2. Another driving method provided by the embodiments of the present invention can be used to drive the Figure 3 display panel in the above, and the driving method includes: in at least one frame: The data control line Sc connected to the pixel circuit 10 in the first region Q1 controls the first transistor T1 in the first region Q1 to turn off, and the gate line G connected to the pixel circuit 10 in the first region Q1 controls the second transistor T2 in the first region Q1 to turn on. The pixel P in the first region Q1 does not perform data refreshing.

[0027] The data control line Sc connected to the pixel circuit 10 in the second region Q2 controls the first transistor T1 in the second region Q2 to turn on, and the gate line G connected to the pixel circuit 10 in the second region Q2 controls the second transistor T2 in the second region Q2 to turn on. The pixel P in the second Q2 performs data refreshing.

[0028] The data control line Sc connected to the pixel circuit 10 in the third region Q3 controls the first transistor T1 in the third region Q3 to turn off; the gate line G connected to the pixel circuit 10 in the third region Q3 controls the second transistor T2 in the third region Q3 to turn off. In this frame, the signal on the data line Data cannot be written into the pixel circuit 10 in the third region Q3, and the data voltage written last time is maintained on the pixel electrode in the pixel P. The pixel P in the third region Q3 does not perform data refreshing.

[0029] The driving method provided by the embodiment of the present invention can control the working state of the pixel circuit 10 in the display area AA by cooperating with the data control line Sc and the gate line G, so as to realize that in at least one frame, the first region Q1 does not perform data refreshing, the second region Q2 performs data refreshing, and the third region Q3 does not perform data refreshing. The first region Q1 does not refresh data, and the second region Q2 refreshes data to realize the left - right partition refreshing of the display panel. The third region Q3 does not refresh data, and the second region Q2 refreshes data to realize the up - down partition refreshing of the display panel. By adopting the driving method provided by the embodiment of the present invention, the left - right partition refreshing and the up - down partition refreshing of the display panel can be realized simultaneously. The second region Q2 is a high - frequency refreshing region, and the first region Q1 and the third region Q3 are low - frequency refreshing regions, which can reduce the power consumption of the display panel.

[0030] Figure 4 This is another driving timing diagram provided by the present invention. Figure 4 It shows the driving timing of a pixel circuit 10 in the first region Q1, a pixel circuit 10 in the second region Q2, and a pixel circuit 10 in the third region Q3. In combination with Figure 1 the pixel circuit 10 shown for understanding the driving method. Take the data control line Sc providing a high - level signal to control the first transistor T1 to turn on and providing a low - level signal to control the first transistor T1 to turn off, and the gate line G providing a high - level signal to control the second transistor T2 to turn on and providing a low - level signal to control the second transistor T2 to turn off as an example.

[0031] In one embodiment, driving the display panel shown in Figure 3 to display the first frame Z1 and the second frame Z2. The first frame Z1 is a data refreshing frame of the display area AA, and the second frame Z2 is a refreshing frame of the high - frequency region and a maintaining frame of the low - frequency region. There is at least one second frame Z2 between two adjacent first frames Z1 to realize the left - right partition refreshing and the up - down partition refreshing of the display panel simultaneously. From Figure 4It can be seen that in the first frame Z1: the data control line Sc connected to the pixel circuit 10 in the first region Q1 controls the first transistor T1 in the pixel circuit 10 to turn on, the gate line G connected to the pixel circuit 10 in the first region Q1 provides a high-level pulse once to control the second transistor T2 to turn on, the data line Data connected to the pixel circuit 10 in the first region Q1 provides a jumping data voltage to charge the pixel electrode of the pixel P in the first region Q1; the data control line Sc connected to the pixel circuit 10 in the second region Q2 controls the first transistor T1 in the pixel circuit 10 to turn on, the gate line G connected to the pixel circuit 10 in the second region Q2 provides a high-level pulse once to control the second transistor T2 to turn on, the data line Data connected to the pixel circuit 10 in the second region Q2 provides a jumping data voltage to charge the pixel electrode of the pixel P in the second region Q2; the data control line Sc connected to the pixel circuit 10 in the third region Q3 controls the first transistor T1 in the pixel circuit 10 to turn on, the gate line G connected to the pixel circuit 10 in the third region Q3 provides a high-level pulse once to control the second transistor T2 to turn on, the data line Data connected to the pixel circuit 10 in the third region Q3 provides a jumping data voltage to charge the pixel electrode of the pixel P in the third region Q3. In the first frame Z1, data refreshing is performed in the first region Q1, the second region Q2, and the third region Q3.

[0032] In the second frame Z2: the data control line Sc connected to the pixel circuit 10 in the first region Q1 controls the first transistor T1 in the pixel circuit 10 to turn off, the gate line G connected to the pixel circuit 10 in the first region Q1 controls the second transistor T2 to turn on, the data line Data connected to the pixel circuit 10 in the first region Q1 provides a constant voltage signal and does not charge the pixel electrode in the first region Q1; the data control line Sc connected to the pixel circuit 10 in the second region Q2 controls the first transistor T1 in the pixel circuit 10 to turn on, the gate line G connected to the pixel circuit 10 in the second region Q2 controls the second transistor T2 to turn on, the data line Data connected to the pixel circuit 10 in the second region Q2 provides a jumping data voltage to charge the pixel electrode of the pixel P in the second region Q2; the data control line Sc connected to the pixel circuit 10 in the third region Q3 controls the first transistor T1 in the pixel circuit 10 to turn off, the gate line G connected to the pixel circuit 10 in the third region Q3 controls the second transistor T2 to turn off, the data line Data connected to the pixel circuit 10 in the third region Q3 provides a constant voltage signal and does not charge the pixel electrode in the third region Q3. In the second frame Z2, data refreshing is performed in the second region Q2, and the first region Q1 and the third region Q3 do not refresh and maintain the display state of the previous frame.

[0033] In some embodiments, the present invention further provides a driving method. In at least one frame, such as Figure 4In the schematic second frame Z2: During the period of driving the display of the third region Q3, the data line Data connected to the pixel circuit 10 in the third region Q3 transmits a constant voltage; during the period of driving the display of the second region Q2, the data line Data connected to the pixel circuit 10 in the second region Q2 provides a data voltage with a voltage jump to the second region Q2. As Figure 3 shown, the data line Data runs through the display area AA in the second direction y. The second region Q2 and the third region Q3 are adjacent in the second direction y, so the data line Data connected to the pixel circuit 10 in the second region Q2 is also connected to the pixel circuit 10 located in the third region Q3. A plurality of gate lines G sequentially provide scan signals from top to bottom for one-frame display, so the second region Q2 and the third region Q3 are driven for display in different time periods. Setting the data line Data shared by the second region Q2 and the third region Q3 to transmit a constant voltage during the period of driving the display of the third region Q3 and provide a data voltage with a voltage jump during the period of driving the display of the second region Q2 can further reduce the power consumption of the display panel.

[0034] In some embodiments, Figure 5 is another schematic diagram of the partitioned refresh of the display panel provided by the present invention. As Figure 5 shown, the display area AA includes a high-frequency region QG. The regions adjacent to the high-frequency region QG in the first direction x and the regions adjacent in the second direction y are all low-frequency refresh regions, that is, the surroundings of the high-frequency region QG are all low-frequency refresh regions. The high-frequency region QG is equivalent to Figure 3 the second region Q2 in Figure 4 . When driving the display panel for display, the pixels P in the high-frequency region QG are driven using the Figure 4 schematic timing for driving the second region Q2, and the pixels P in the region adjacent to the high-frequency region QG in the first direction x are driven using the Figure 4 schematic timing for driving the first region Q1, and the pixels P in the region adjacent to the high-frequency region QG in the second direction y are driven using the

[0035] In some embodiments, Figure 6 is another schematic diagram of the driving method provided by the present invention. As Figure 6 shown, the driving method provided by the embodiments of the present invention at least includes step S101 and step S102. Among them, step S101 and step S102 are executed in at least one frame: Step S101: Obtain data control instructions according to the refresh information of display area AA, where one pixel P corresponds to one data control instruction; display area AA includes a low-frequency area and a high-frequency area, the low-frequency area includes the first area Q1, and the high-frequency area includes the second area Q2. In this step, at least obtain the data control instructions corresponding to pixel P in the first area Q1 of the low-frequency area and the data control instructions corresponding to pixel P in the second area Q2 of the high-frequency area.

[0036] Step S102: Generate control signals according to the data control instructions, and provide the control signals to data control line Sc; among them, the control signals include a first control signal and a second control signal, the first control signal controls the first transistor T1 in the low-frequency area to turn off, and the second control signal controls the first transistor T1 in the high-frequency area to turn on.

[0037] Taking the first transistor T1 as an n-type transistor as an example, the first control signal is a low-level signal, and the second control signal is a high-level signal. According to step S102, obtain the control signals corresponding to each area pixel P in display area AA, that is, at least obtain the control signals corresponding to pixel P in the first area Q1 of the low-frequency area and the control signals corresponding to pixel P in the second area Q2 of the high-frequency area. Combining Figure 4 With reference to the schematic timing diagram, for example, in the first frame Z1, provide the second control signal to the data control line Sc connected to the pixel circuit 10 in the first area Q1 to control the first transistor T1 in the pixel circuit in the first area Q1 to turn on; in the second frame Z2, provide the first control signal to the data control line Sc connected to the pixel circuit 10 in the first area Q1 to control the first transistor T1 in the pixel circuit in the first area Q1 to turn off. In this way, the first area Q1 performs data refresh in the first frame Z1 and does not perform data refresh in the second frame Z2, and the first area Q1 is a low-frequency area. Similarly, the control signals generated according to the data control instructions can also control the first transistor T1 in the second area Q2 in the first frame Z1 and the second frame Z2 respectively, so that the second area Q2 performs high-frequency refresh.

[0038] The display panel is driven by the driving method provided in the embodiment of the present invention. A data control instruction is obtained according to the refresh information of the display area AA, and then a control signal is generated according to the data control instruction and provided to the data control line Sc. The data control line Sc controls the first transistor T1 in each pixel P by using the control signal, so as to control whether the pixel P is charged or not, thereby controlling whether the pixel P performs data refresh or not. In an application, in at least one frame, the pixels P in the first area Q1 are controlled not to be charged through the data control line Sc connected to the first area Q1, and the pixels P in the second area Q2 are controlled to be charged through the data control line connected to the second area Q2, so that different data refresh rates can be achieved in the first area Q1 and the second area Q2 adjacent in the first direction x. For example, the first area Q1 displays a static picture as a low-frequency area, and the second area Q2 displays a dynamic picture as a high-frequency area, which can reduce the power consumption of the display panel.

[0039] In some embodiments, such as Figure 3 shown, the low-frequency area of the display area AA includes the first area Q1 and the second area Q2, and the high-frequency area includes the second area Q2. The driving method shown in Figure 6 can be used to drive the Figure 3 display panel provided in the embodiment. Among them, step S101 is executed to obtain a data control instruction according to the refresh information of the display area AA, and obtain the data control instruction corresponding to the pixel P in the first area Q1, the data control instruction corresponding to the pixel P in the second area Q2, and the data control instruction corresponding to the pixel P in the third area Q3. Then, step S102 is executed to obtain the control signal corresponding to each area pixel P in the display area AA according to the data control instruction, and provide the control signal to the corresponding data control line Sc. Among them, at least obtain the control signal corresponding to the pixel P in the first area Q1 in the low-frequency area, the control signal corresponding to the pixel P in the second area Q2 in the high-frequency area, and the control signal corresponding to the pixel P in the third area Q3 in the low-frequency area, and provide the control signal to the corresponding data control line Sc to drive each area separately. In this way, it is possible to control the first transistor T1 in each pixel circuit 10 in the first area Q1, the second area Q3, and the third area Q3 respectively, so that the pixel P in the first area Q1 is not charged, the pixel P in the second area Q2 is charged, and the pixel P in the third area Q3 is not charged in at least one frame, realizing left-right partition refresh and up-down partition refresh of the display panel.

[0040] In other embodiments, Figure 7 is a schematic diagram of another driving method provided by the present invention. As Figure 7 shown, step S101 to obtain a data control instruction according to the refresh information of the display area AA includes: Step S1011: Obtain the status information of pixel P according to the refresh information of display area AA. One pixel P corresponds to one status information. In the low-frequency region, pixel P is in a non-refresh state, and in the high-frequency region, pixel P is in a refresh state. For example, if the low-frequency region includes the first area Q1 and the high-frequency region includes the second area Q2, then pixel P in the first area Q1 is in a non-refresh state, that is, it is not necessary to charge the pixels in the first area Q1, and pixel P in the second area Q2 is in a refresh state, that is, it is necessary to charge the pixels in the second area Q2.

[0041] Step S1012: Generate a data control instruction according to the status information.

[0042] In the driving method provided by the embodiment of the present invention, the status information of pixels P in each region (low-frequency region and / or high-frequency region) is obtained according to the refresh information of display area AA, and then the corresponding data control instructions are generated according to the status information of each pixel P. In the subsequent step S102, a corresponding control signal is generated according to the data control instruction, and the control signal is provided to the data control line Sc to control the state of the first transistor T1 in the pixel circuit 10 during one-frame display. The control signal is used to control the first transistor T1 in the low-frequency region to turn off, and the control signal is used to control the first transistor T1 in the high-frequency region to turn on, so as to charge the pixels P in the high-frequency region and not charge the pixels P in the low-frequency region, realizing the partitioned refresh of the display panel.

[0043] In some embodiments, Figure 8 is a schematic diagram of another driving method provided by the present invention. As Figure 8 shown, step S101 obtains a data control instruction according to the refresh information of display area AA, including step S1011 and step S1013, where step S1011 obtains the status information of pixels according to the refresh information of display area AA, including step S10111 and step S10112: Step S10111: Generate an image instruction according to the refresh information of display area AA. The image instruction includes the position information of the low-frequency region and the position information of the high-frequency region. In application, the main board of the display device generates an image instruction according to the refresh information of display area AA, and then provides the image instruction to the screen driving board.

[0044] Step S10112: Generate image information according to the image instruction. The image information includes status information. In application, the screen driving board of the display device generates image information according to the image instruction and provides the image information to the display driving chip.

[0045] Step S1013: Generate pixel data according to the image information. The pixel data includes data control instructions. In application, the display driving chip of the display device generates pixel data according to the image information, and then the display driving chip drives the display panel according to the pixel data.

[0046] After generating the pixel data, step S102 is executed to generate a control signal according to the data control instruction and provide the control signal to the data control line Sc, so as to control the on / off state of the first transistor T1 in the pixel circuit 10 according to the data control instruction.

[0047] By using the driving method provided by the present invention, a data control instruction is obtained according to the refresh information of the display area AA, and then a control signal is generated according to the data control instruction and provided to the data control line Sc. According to the refresh information of the display area AA, the control signal transmitted by the data control line Sc is used to control the first transistor T1 in the low-frequency region to be turned off, and the control signal is used to control the first transistor T1 in the high-frequency region to be turned on, so as to charge the pixel P in the high-frequency region and not charge the pixel P in the low-frequency region, realizing the partitioned refresh of the display panel and reducing the power consumption of the display panel.

[0048] The driving method provided in some embodiments further includes that in at least one frame: Step S103 is executed to provide a signal to the data line Data based on the data control instruction and the pixel gray information; wherein, a constant voltage is provided to the data line Data during the period of driving the low-frequency region, and a data voltage is provided to the data line Data during the period of driving the high-frequency region.

[0049] Taking the low-frequency region including Figure 1 the first region Q1 therein, and the high-frequency region including Figure 1 the second region Q2 therein as an example, the first region Q1 and the second region Q2 are adjacent in the first direction x, the first region Q1 and the second region Q2 share a part of the gate line G, and the first region Q1 and the second region Q2 are driven in the same period. Combining Figure 2 with the schematic timing diagram, in at least one frame, such as in the second frame Z2: Based on the data control instruction and the pixel gray information, during the period of driving the first region Q1 and the second region Q2, a constant voltage is provided to the data line Data connected to the pixel circuit 10 in the first region Q1, and a data voltage with a voltage jump is provided to the data line Data connected to the pixel circuit 10 in the second region Q2. In this way, the power consumption of the display panel can be further reduced.

[0050] Taking the low-frequency region including Figure 3 the third region Q3 therein, and the high-frequency region including Figure 3 the second region Q2 therein as an example, the third region Q3 and the second region Q2 are adjacent in the second direction y, the third region Q3 and the second region Q2 are driven in different periods respectively, and the third region Q3 and the second region Q2 share a part of the data line Data. Combining Figure 4From the schematic timing diagram, in at least one frame, such as in the second frame Z2: Based on the data control instruction and the pixel gray-scale information, during the period of driving the third region Q3, a constant voltage is provided to the data line Data connected to the pixel circuit 10 in the third region Q3, and during the period of driving the second region Q2, a data voltage with a voltage jump is provided to the data line Data connected to the pixel circuit 10 in the second region Q2. In this way, the power consumption of the display panel can be further reduced.

[0051] In some embodiments, Figure 9 is a schematic diagram of another driving method provided by the present invention. As Figure 9 shown, the driving method includes performing step S201 and step S202 in at least one frame.

[0052] Step S201: Obtain pixel gray-scale information according to the refresh information of the display area AA, where the pixel P corresponds to the pixel gray-scale information one by one.

[0053] Step S202: Based on the data control instruction and the pixel gray-scale information, provide a signal to the data line Data, including: The data control instruction includes a first instruction and a second instruction; combining with the above step S102, the first instruction corresponds to generating a second control signal to control the first transistor T1 in the high-frequency region to turn on, and the second instruction corresponds to generating a first control signal to control the first transistor T1 in the low-frequency region to turn off.

[0054] When the data control instruction is the first instruction, generate a data voltage according to the pixel gray-scale information and provide it to the data line Data; when the data control instruction is the second instruction, provide a constant voltage to the data line Data.

[0055] Adopting the driving method provided by the embodiment of the present invention, based on the data control instruction and the pixel gray-scale information, a signal is provided to the data line Data. When the data control instruction is the second instruction, a constant voltage is provided to the data line Data. That is, during the period corresponding to driving the low-frequency region for display, a constant voltage is provided to the data line Data connected to the pixel circuit in the low-frequency region. In this way, the power consumption of the display panel can be further reduced.

[0056] Based on the same inventive concept, the present invention also provides a display device. Figure 10 is a schematic diagram of a display device provided by the present invention. As Figure 10 shown, the display device 1000 includes a display panel 100. The display area AA of the display panel 100 includes pixels P, gate lines G, data lines Data, and data control lines Sc. The pixel P includes a pixel circuit 10 and a pixel electrode ( Figure 10(not shown), a pixel capacitor Cst is formed between the pixel electrode and the common electrode. The pixel circuit 10 includes a first transistor T1 and a second transistor T2. The first transistor T1 and the second transistor T2 are connected in series. The first transistor T1 is connected to the data line Data. The gate of the first transistor T1 is connected to the data control line Sc. The second transistor T2 is connected to the pixel electrode. The gate of the second transistor T2 is connected to the gate line G.

[0057] In an embodiment of the present invention, two transistors are provided in the pixel circuit 10. The gate of the first transistor T1 is connected to the data control line Sc. The gate of the second transistor T2 is connected to the gate line G. The first transistor T1 is used to control whether to write the data voltage into the pixel circuit. The second transistor T2 is used to control whether to write the data voltage onto the pixel electrode. When the first transistor T1 is turned off and the second transistor T2 is turned on, the voltage on the data line Data cannot be written into the pixel circuit, and the data voltage written last time is maintained on the pixel electrode, and the pixel P does not perform data refreshing. When the first transistor T1 is turned on and the second transistor T2 is turned on, the data voltage on the data line Data is written onto the pixel electrode, and the pixel P performs data refreshing. By controlling the states of the two transistors in the pixel circuit 10, the refreshing state of the pixel P can be controlled.

[0058] In some embodiments, such as Figure 10 shown, the gate line G extends in the first direction x, the data line Data and the data control line Sc extend in the second direction y, and the first direction x intersects the second direction y. In the pixel circuits 10 arranged in the first direction x, a plurality of second transistors T2 are connected to one gate line G. In the pixel circuits 10 arranged in the second direction y, a plurality of first transistors T1 are connected to one data control line Sc and a plurality of first transistors T1 are connected to one data line Data. That is, one gate line G drives a plurality of second transistors T2 in a plurality of pixel circuits 10 arranged in the first direction x, and one data control line Sc drives a plurality of first transistors T1 in a plurality of pixel circuits 10 arranged in the second direction y. In this way, the states of the first transistors T1 of the pixel circuits 10 in adjacent partitions in the first direction x can be controlled differently, so that in two adjacent partitions in the first direction x, one performs data refreshing and the other does not perform data refreshing, realizing left and right partition refreshing and reducing the power consumption of the display panel.

[0059] In some embodiments, such as Figure 10 shown, the display area AA includes a first area Q1 and a second area Q2 adjacent to each other in the first direction x; in at least one frame when the display panel is working: The first transistor T1 in the first region Q1 is turned off, and the second transistor T2 in the first region Q1 is turned on; the signal provided by the data line Data connected to the pixel circuit 10 in the first region Q1 is not written into the pixel circuit in the first region Q1, and during the display of this frame, the pixel P in the first region Q1 is not charged.

[0060] The first transistor T1 in the second region Q2 is turned on, and the second transistor T2 in the second region Q2 is turned on; the data voltage provided by the data line Data connected to the pixel circuit 10 in the second region Q2 is written into the pixel circuit in the second region Q2, and during the display of this frame, the pixel P in the second region Q2 is charged.

[0061] For the display device provided by this embodiment, when the pixel P in the second region Q2 is charged and the pixel P in the first region Q1 is not charged in at least one frame during which the display panel operates, the first region Q1 and the second region Q2 adjacent in the first direction x have different refresh rates. For example, the first region Q1 is a low-frequency refresh region, and the second region Q2 is a high-frequency refresh region. In applications, zoned refresh can reduce the power consumption of the display device.

[0062] In some embodiments, Figure 10 viewed in combination, the gate line G extends along the first direction x, and the first region Q1 and the second region Q2 are adjacent in the first direction x, then the first region Q1 and the second region Q2 are driven in the same time period. The display panel provided by this embodiment can be driven using the above Figure 2 timing diagram. Among them, during the time period when the first region Q1 and the second region Q2 are driven to display in at least one frame during which the display panel operates: The data line Data connected to the pixel circuit 10 in the first region Q1 transmits a constant voltage, and the data line Data connected to the pixel circuit 10 in the second region Q2 provides a data voltage with a voltage jump to the second region Q2.

[0063] In combination with Figure 2 the timing diagram, for example, in the second frame Z2 which is a sustain frame in the first region Q1, during the time period when the first region Q1 and the second region Q2 are driven to display, control the data line Data connected to the pixel circuit 10 in the first region Q1 to transmit a constant voltage. Since the first region Q1 does not need to perform data refresh in this frame, the data line Data does not need to write a data voltage to the first region Q1, so setting the data line Data to transmit a constant voltage during the time period of driving the first region Q1 not only does not affect the display but also can further reduce the power consumption of the display panel.

[0064] In some embodiments, Figure 11 is a schematic diagram of another display device provided by the present invention. As Figure 11As shown, the display device 1000 includes a display panel 100. The display area AA of the display panel 100 includes a first area Q1, a second area Q2, and a third area Q3. In the first direction x, the first area Q1 and the second area Q2 are adjacent, and in the second direction y, the third area Q3 is adjacent to the second area Q2. Among them, in at least one frame when the display panel is working: In the first area Q1, the first transistor T1 is turned off and the second transistor T2 is turned on. The signal provided by the data line Data connected to the pixel circuit 10 in the first area Q1 is not written into the pixel circuit in the first area Q1. When displaying in this frame, the pixel P in the first area Q1 is not charged.

[0065] In the second area Q2, the first transistor T1 is turned on and the second transistor T2 is turned on. The data voltage provided by the data line Data connected to the pixel circuit 10 in the second area Q2 is written into the pixel circuit in the second area Q2. When displaying in this frame, the pixel P in the second area Q2 is charged.

[0066] In the third area Q3, the first transistor T1 is turned off and the second transistor T2 is turned off. The signal provided by the data line Data connected to the pixel circuit 10 in the third area Q3 is not written into the pixel circuit in the third area Q3. When displaying in this frame, the pixel P in the third area Q3 is not charged.

[0067] Combined with Figure 4 Looking at the schematic timing diagram, the operation of the display panel includes a first frame Z1 and a second frame Z2. In the first frame Z1: In the first area Q1, the first transistor T1 is turned on and the second transistor T2 is turned on; in the second area Q2, the first transistor T1 is turned on and the second transistor T2 is turned on; in the third area Q3, the first transistor T1 is turned on and the second transistor T2 is turned on. In the second frame Z2: In the first area Q1, the first transistor T1 is turned off and the second transistor T2 is turned on; in the second area Q2, the first transistor T1 is turned on and the second transistor T2 is turned on; in the third area Q3, the first transistor T1 is turned off and the second transistor T2 is turned off. It can be realized that in the first frame Z1, data refreshing is performed in the first area Q1, the second area Q2, and the third area Q3, and in the second frame Z2, data refreshing is performed in the second area Q2, and data refreshing is not performed in the first area Q1 and the third area Q3. Executing at least one second frame Z2 between two adjacent first frames Z1 can realize left - right partition refreshing of the first area Q1 and the second area Q2 of the display panel, and up - down partition refreshing of the second area Q2 and the third area Q3.

[0068] In some embodiments, combined with Figure 4From the schematic timing diagram, during the period of driving the third region Q3 to display, the data line Data connected to the pixel circuit 10 in the third region Q3 transmits a constant voltage; during the period of driving the second region Q2 to display, the data line Data connected to the pixel circuit 10 in the second region Q2 provides a data voltage with a voltage jump to the second region Q2. In this way, on the basis of reducing the power consumption of the display panel by partitioned refreshing, the power consumption can be further reduced.

[0069] In some embodiments, Figure 12 Another schematic diagram of the display device provided by the present invention is shown, Figure 12 in which the data line Data, the data control line Sc, and the gate line G are shown, and the pixel circuit 10 is not shown. As Figure 12 shown, the display panel 100 includes a non-display area NA, the non-display area NA surrounds the display area AA, the non-display area NA includes a plurality of data control signal terminals 20, and one data control signal terminal 20 is connected to n data control lines Sc, where n is an integer and n≥2. Figure 12 Taking n = 2 as an example. The data control signal terminal 20 is used to provide a signal to the data control line Sc, and the data control signal terminal 20 needs to be coupled to the display driving chip in the display device 1000. Setting n≥2 can help reduce the number of data control signal terminals 20 required for the display panel, which is beneficial to reducing the number of pins of the display driving chip and can reduce the manufacturing cost of the display driving chip.

[0070] In other embodiments, Figure 13 Another schematic diagram of the display device provided by the present invention is shown, as Figure 13 shown, a plurality of data control signal terminals 20 are provided in the non-display area NA, and one data control signal terminal 20 is connected to one data control line Sc.

[0071] In some embodiments, the data control signal terminal 20 is electrically connected to the display driving chip, and the display driving chip directly provides a signal to the data control signal terminal 20.

[0072] In other embodiments, the data control signal terminal 20 is electrically connected to the display driving chip through a control module. In other words, the data control line Sc is connected to the output terminal of the control module, and the output terminal of the control module serves as the data control signal terminal 20.

[0073] In other embodiments, Figure 14 Another schematic diagram of the display device provided by the present invention is shown, as Figure 14 shown, the non-display area NA of the display panel 100 includes a control module 30, and the output terminal of one control module 30 is connected to at least one data control line Sc.

[0074] The display device 1000 further includes a display driving chip 40, Figure 14It is schematically shown that the display driving chip 40 is disposed in the non-display area NA of the display panel 100. In some other embodiments, the display driving chip 40 can be fixed on a flexible circuit board, and then the flexible circuit board is bonded to the non-display area NA of the display panel 100 to electrically connect the display driving chip 40 to the circuit in the display panel 100.

[0075] The display driving chip 40 is configured to drive the display panel to display according to pixel data; wherein, the pixel data includes data control instructions, one pixel corresponds to one data control instruction, and the data control instructions are obtained according to the refresh information of the display area AA; the display area AA includes a low-frequency area and a high-frequency area, and the low-frequency area includes a first area Q1 as Figure 10 schematically shown, and the high-frequency area includes a second area Q2 as Figure 10 schematically shown.

[0076] The control module 30 is electrically connected to the display driving chip 40. The control module 30 generates a control signal in response to the data control instruction and provides the control signal to the data control line Sc; wherein, the control signal includes a first control signal and a second control signal. The first control signal controls the first transistor T1 in the low-frequency area to turn off, and the second control signal controls the first transistor T1 in the high-frequency area to turn on. Optionally, the control module 30 is an operational amplifier.

[0077] In this embodiment, the control module 30 is disposed in the non-display area NA of the display panel 100. The control module 30 is electrically connected to the data control line Sc. The control module 30 generates a control signal in response to the data control instruction provided by the display driving chip 40 and provides the control signal to the data control line Sc to control the state of the first transistor T1 in the pixel circuit in the display area AA.

[0078] Figure 14 It is schematically shown that the control module 30 is located in the non-display area NA of the display panel 100. In some other embodiments, the control module can also be integrated in the display driving chip 40. Although this increases the integration degree of the display driving chip 40, it can save the space in the non-display area NA of the display panel.

[0079] In some embodiments, as Figure 14 shown, the data line Data is electrically connected to the display driving chip 40.

[0080] The pixel data includes pixel gray information, and each pixel corresponds to the pixel gray information one by one; the data control instructions include a first instruction and a second instruction; the control module 30 generates a second control signal in response to the first instruction to control the first transistor T1 in the high-frequency area to turn on, and the control module 30 generates a first control signal in response to the second instruction to control the first transistor T1 in the low-frequency area to turn off.

[0081] In at least one frame during which the display panel operates: The display driving chip 40 provides signals to the data line Data based on pixel gray-scale information and data control instructions; wherein, when the data control instruction is the first instruction, a data voltage is generated according to the pixel gray-scale information and provided to the data line Data; when the data control instruction is the second instruction, a constant voltage is provided to the data line Data.

[0082] In this embodiment, in at least one frame, signals are provided to the data line Data based on the data control instruction and the pixel gray-scale information. When the data control instruction is the second instruction, a constant voltage is provided to the data line Data. That is, during the period corresponding to driving the low-frequency region for display, a constant voltage is provided to the data line Data connected to the pixel circuits in the low-frequency region, thereby further reducing the power consumption of the display panel.

[0083] In some embodiments, Figure 15 Another schematic diagram of the display device provided by the present invention is shown, Figure 15 in which only a simplified schematic of each structure in the display device is shown. Figure 16 A driving flowchart of the display device provided by the present invention is shown. Figure 16 It schematically shows the working process of driving the display panel 100 to display one frame.

[0084] As Figure 15 shown, the display device 1000 includes a display panel 100, a control module 30, a display driving chip 40, a main board 50, and a screen driving board 60. The control module 30 is electrically connected to the data control line Sc in the display panel 100, the control module 30 is electrically connected to the display driving chip 40, the screen driving board 60 is electrically connected to the main board 50, and the display driving chip 40 is electrically connected to the screen driving board 60.

[0085] Combined with Figure 16 it can be seen that in at least one frame during which the display panel operates: The main board 50 generates an image instruction according to the refresh information of the display area AA, and provides the image instruction to the screen driving board 60. The image instruction includes the position information of the low-frequency region and the position information of the high-frequency region.

[0086] The screen driving board 60 generates image information in response to the image instruction, and provides the image information to the display driving chip 40. The image information includes the state information of the pixels; wherein, the state information is generated according to the refresh information of the display area AA. One pixel corresponds to one state information. The pixels in the low-frequency region are in a non-refresh state, and the pixels in the high-frequency region are in a refresh state.

[0087] The display driving chip 40 generates pixel data in response to the image information. The pixel data includes data control instructions and pixel gray-scale information. Among them, the data control instructions are generated according to the status information, and the pixels correspond to the pixel gray-scale information one by one. The data control instructions include a first instruction and a second instruction.

[0088] The control module 30 generates a control signal in response to the data control instructions and provides the control signal to the data control line Sc. Among them, a second control signal is generated according to the first instruction, and a first control signal is generated according to the second instruction. The first control signal controls the first transistor T1 in the low-frequency region to turn off, and the second control signal controls the first transistor T1 in the high-frequency region to turn on.

[0089] In the display device provided by the embodiment of the present invention, through the cooperative work of the control module 30, the display driving chip 40, the main board 50, and the screen driving board 60, it is possible to control the first transistor T1 in the low-frequency region to turn off and control the first transistor T1 in the high-frequency region to turn on in at least one frame when the display panel is working, so that the pixels in the low-frequency region do not perform data refreshing, realizing partition refreshing of the display panel and reducing the power consumption of the display panel.

[0090] In addition, the display driving chip 40 also provides a signal to the data line Data based on the pixel gray-scale information and the data control instructions. Among them, when the data control instruction is the first instruction, a data voltage is generated according to the pixel gray-scale information and provided to the data line Data; when the data control instruction is the second instruction, a constant voltage is provided to the data line Data. The first instruction corresponds to generating the second control signal, and the second instruction corresponds to generating the first control signal. That is, during the period corresponding to driving the low-frequency region, a constant voltage is provided to the data line Data connected to the low-frequency region, thereby further reducing the power consumption of the display panel.

[0091] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the scope of protection of the present invention.

[0092] As can be seen from the above embodiments, the driving method and display device of the display panel provided by the present invention at least achieve the following beneficial effects: The present invention provides a driving method for a display panel. The display area of the display panel includes pixels, gate lines, data lines, and data control lines. The pixels include pixel circuits and pixel electrodes. The pixel circuits include a first transistor and a second transistor. The first transistor and the second transistor are connected in series. The first transistor is connected to the data line, the gate of the first transistor is connected to the data control line, the second transistor is connected to the pixel electrode, and the gate of the second transistor is connected to the gate line. The gate lines extend in a first direction, the data lines and the data control lines extend in a second direction, and the first direction intersects the second direction. The display area includes a first area and a second area adjacent in the first direction. The driving method includes: in at least one frame: the data control line connected to the pixel circuit in the first area controls the first transistor in the first area to turn off, and the gate line connected to the pixel circuit in the first area controls the second transistor in the first area to turn on; the data control line connected to the pixel circuit in the second area controls the first transistor in the second area to turn on, and the gate line connected to the pixel circuit in the second area controls the second transistor in the second area to turn on. By using the driving method provided by the present invention, it is possible to achieve that in at least one frame, the first area does not refresh data, the second area refreshes data, the first area and the second area adjacent in the direction of the gate line extension have different refresh rates, and the left and right partitions of the display panel can be refreshed. When applied to the scenario where the first area displays a static picture and the second area displays a dynamic picture, the power consumption of the display panel can be reduced.

[0093] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A driving method for a display panel, wherein the display area of the display panel includes pixels, gate lines, data lines, and data control lines. The pixels include pixel circuits and pixel electrodes. The pixel circuits include a first transistor and a second transistor. The first transistor and the second transistor are connected in series. The first transistor is connected to the data line, the gate of the first transistor is connected to the data control line, the second transistor is connected to the pixel electrode, and the gate of the second transistor is connected to the gate line; The gate lines extend in a first direction, the data lines and the data control lines extend in a second direction, and the first direction intersects the second direction; The display area includes a first area and a second area adjacent in the first direction. The driving method includes: In at least one frame: The data control line connected to the pixel circuit in the first area controls the first transistor in the first area to turn off, and the gate line connected to the pixel circuit in the first area controls the second transistor in the first area to turn on; The data control line connected to the pixel circuit in the second area controls the first transistor in the second area to turn on, and the gate line connected to the pixel circuit in the second area controls the second transistor in the second area to turn on.

2. The driving method according to claim 1, wherein, During the period of driving the first area and the second area to display: The data line connected to the pixel circuit in the first area transmits a constant voltage; The data line connected to the pixel circuit in the second area provides a data voltage with a voltage jump to the second area.

3. The driving method according to claim 1, characterized in that The display area further includes a third area, and the third area is adjacent to the second area in the second direction, and the second direction intersects the first direction; The driving method includes: In at least one frame: The data control line connected to the pixel circuit in the third area controls the first transistor in the third area to turn off; the gate line connected to the pixel circuit in the third area controls the second transistor in the third area to turn off.

4. The driving method according to claim 3, characterized in that, During the period of driving the third area to display, the data line connected to the pixel circuit in the third area transmits a constant voltage; During the period of driving the second area to display, the data line connected to the pixel circuit in the second area provides a data voltage with a voltage jump to the second area.

5. The driving method according to claim 1, wherein, In at least one frame: Obtain a data control instruction according to the refresh information of the display area, and one pixel corresponds to one data control instruction; the display area includes a low-frequency area and a high-frequency area, the low-frequency area includes the first area, and the high-frequency area includes the second area; Generate a control signal according to the data control instruction, and provide the control signal to the data control line; wherein, the control signal includes a first control signal and a second control signal, the first control signal controls the first transistor in the low-frequency area to turn off, and the second control signal controls the first transistor in the high-frequency area to turn on.

6. The driving method according to claim 5, wherein: Obtaining the data control instruction according to the refresh information of the display area includes: Obtaining the state information of the pixel according to the refresh information of the display area, where one pixel corresponds to one state information; the pixel in the low-frequency area is in a non-refresh state, and the pixel in the high-frequency area is in a refresh state; Generating the data control instruction according to the state information.

7. The driving method according to claim 6, wherein: Obtaining the state information of the pixel according to the refresh information of the display area includes: Generating an image instruction according to the refresh information of the display area, where the image instruction includes the position information of the low-frequency area and the position information of the high-frequency area; Generating image information according to the image instruction, where the image information includes the state information; Generating pixel data according to the image information, where the pixel data includes the data control instruction.

8. The driving method according to claim 5, wherein: In at least one frame: Based on the data control instruction and the pixel gray-scale information, providing a signal to the data line; wherein, during the period of driving the low-frequency area, a constant voltage is provided to the data line, and during the period of driving the high-frequency area, a data voltage is provided to the data line.

9. The driving method according to claim 8, wherein: In at least one frame: Obtaining the pixel gray-scale information according to the refresh information of the display area, where the pixel and the pixel gray-scale information are in one-to-one correspondence; Based on the data control instruction and the pixel gray-scale information, providing a signal to the data line includes: The data control instruction includes a first instruction and a second instruction; When the data control instruction is the first instruction, generating a data voltage according to the pixel gray-scale information and providing it to the data line; when the data control instruction is the second instruction, providing a constant voltage to the data line.

10. A display device, characterized in that, The display device includes a display panel; the display area of the display panel includes pixels, gate lines, data lines, and data control lines. The pixel includes a pixel circuit and a pixel electrode. The pixel circuit includes a first transistor and a second transistor. The first transistor and the second transistor are connected in series. The first transistor is connected to the data line. The gate of the first transistor is connected to the data control line. The second transistor is connected to the pixel electrode. The gate of the second transistor is connected to the gate line.

11. The display device according to claim 10, wherein: The gate line extends in a first direction, the data line and the data control line extend in a second direction, and the first direction intersects the second direction; In the pixel circuits arranged in the first direction, multiple second transistors are connected to one gate line. In the pixel circuits arranged in the second direction, multiple first transistors are connected to one data control line and multiple first transistors are connected to one data line.

12. The display device according to claim 11, wherein: The display area includes a first area and a second area adjacent in the first direction; in at least one frame during which the display panel operates: In the first area, the first transistor is turned off and the second transistor is turned on. In the second area, the first transistor is turned on and the second transistor is turned on.

13. The display device according to claim 12, wherein During the period of driving the first area and the second area to display: The data line connected to the pixel circuit in the first area transmits a constant voltage, and the data line connected to the pixel circuit in the second area provides a data voltage with a voltage jump to the second area.

14. The display device according to claim 12, wherein The display area further includes a third area adjacent to the second area in the second direction; wherein, in at least one frame during which the display panel operates: In the third area, the first transistor is turned off and the second transistor is turned off.

15. The display device according to claim 14, wherein During the period of driving the third area to display, the data line connected to the pixel circuit in the third area transmits a constant voltage; During the period of driving the second area to display, the data line connected to the pixel circuit in the second area provides a data voltage with a voltage jump to the second area.

16. The display device according to claim 11, wherein The non-display area of the display panel includes a plurality of data control signal terminals, One of the data control signal terminals is connected to n data control lines, where n is an integer and n≥2.

17. The display device according to claim 10, wherein The non-display area of the display panel includes a control module, and an output terminal of one control module is connected to at least one data control line; The display device further includes a display driving chip for driving the display panel to display according to pixel data; wherein, the pixel data includes data control instructions, one pixel corresponds to one data control instruction, and the data control instruction is obtained according to the refresh information of the display area; the display area includes a low-frequency area and a high-frequency area; The control module is electrically connected to the display driving chip, and the control module generates a control signal in response to the data control instruction and provides the control signal to the data control line; wherein, the control signal includes a first control signal and a second control signal, and the first control signal controls the first transistor in the low-frequency area to be turned off, and the second control signal controls the first transistor in the high-frequency area to be turned on.

18. The display device according to claim 17, wherein The data line is electrically connected to the display driving chip; The pixel data includes pixel gray-scale information, and the pixel corresponds to the pixel gray-scale information one by one; The data control instruction includes a first instruction and a second instruction; In at least one frame during which the display panel operates: The display driving chip provides a signal to the data line based on the pixel gray information and the data control instruction; wherein, when the data control instruction is the first instruction, a data voltage is generated according to the pixel gray information and provided to the data line; when the data control instruction is the second instruction, a constant voltage is provided to the data line.

19. The display device according to claim 17, wherein the display device includes a main board and a screen driving board, the screen driving board is electrically connected to the main board, and the display driving chip is electrically connected to the screen driving board; in at least one frame when the display panel is working: the main board generates an image instruction according to the refresh information of the display area and provides the image instruction to the screen driving board, and the image instruction includes the position information of the low-frequency area and the position information of the high-frequency area; the screen driving board generates image information in response to the image instruction and provides the image information to the display driving chip, and the image information includes the state information of the pixels; wherein the state information is generated according to the refresh information of the display area, one pixel corresponds to one state information, the pixels in the low-frequency area are in a non-refresh state, and the pixels in the high-frequency area are in a refresh state; the display driving chip generates the pixel data in response to the image information, and the pixel data includes a data control instruction, wherein the data control instruction is generated according to the state information.

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