A unified power quality controller UPQC for photovoltaic and energy storage DC access

Abstract

The present invention discloses a unified power quality controller (UPQC) for photovoltaic and energy storage DC access, relating to the field of new energy technology. The controller includes real-time monitoring of voltage signal frequency, conductor temperature, and spacing, establishing a comprehensive analysis model for high-frequency voltage signal influence values ​​and thermal expansion influence values, calculating a parasitic capacitive reactance attenuation coefficient, and determining whether the capacitive reactance has decreased through a dynamic threshold matching algorithm. If abnormal, a common-mode voltage adjustment module is triggered to reduce the switching frequency of the photovoltaic inverter and the energy storage converter, thereby suppressing the common-mode voltage increase caused by high-frequency noise coupling at the source, and achieving intelligent coordinated control and power quality optimization of the photovoltaic and energy storage system. The present invention monitors voltage frequency, conductor temperature, and spacing in real time, establishes a model to calculate the parasitic capacitive reactance attenuation coefficient, triggers switching frequency adjustment through dynamic threshold judgment, suppresses the common-mode voltage increase caused by high-frequency coupling, and achieves intelligent coordinated control and power quality optimization of the photovoltaic and energy storage system.

Description

Technical Field

[0001] The present invention relates to the field of new energy technology, and in particular to a unified power quality controller UPQC for photovoltaic storage and direct current access. Background Art

[0002] The unified power quality controller UPQC for photovoltaic and energy storage DC access has demonstrated significant commercial value in the trillion-level market for distributed energy grid connection due to its innovative photovoltaic and energy storage collaborative architecture. By integrating photovoltaic DC access and multi-unit collaborative control, it can effectively improve the grid's ability to absorb clean energy, reduce the risks of voltage fluctuations and reactive power imbalance caused by distributed energy access, and significantly reduce line losses and equipment maintenance costs. It not only improves the flexibility of grid power supply, but also provides continuous power supply through energy storage modules in the event of a power outage in the distribution network, meeting the needs of industrial and commercial users for high-reliability power supply.

[0003] The device uses series units to compensate for voltage sags, surges and waveform distortion in real time, parallel units to dynamically adjust reactive power and filter harmonics, and energy storage units combined with photovoltaic DC access to achieve active power smoothing and clean energy absorption. The system adopts a multi-objective collaborative control strategy and can operate each unit independently or jointly. It comprehensively solves the voltage fluctuations, reactive power imbalance, harmonic pollution and active power impact problems caused by distributed energy grid connection in the active distribution network. At the same time, it improves energy efficiency through photovoltaic and storage collaborative optimization, providing customized power quality assurance for smart grids.

[0004] The photovoltaic inverter and energy storage converter in the energy storage unit are connected through a common DC bus. When the two perform high-frequency switching, the high-frequency noise generated will be coupled to the load side through parasitic capacitance, causing the common-mode voltage on the load side to increase, causing the unified power quality controller UPQC to fail or perform poorly. Summary of the Invention

[0005] Technical problems solved

[0006] In response to the shortcomings of the existing technology, the present invention provides a unified power quality controller UPQC for photovoltaic and energy storage DC access. It solves the problem that when the photovoltaic inverter and energy storage converter in the energy storage unit are connected via a common DC bus, the noise generated by the high-frequency switching action is coupled to the load side through parasitic capacitance, resulting in an increase in common-mode voltage, which can easily cause the unified power quality controller UPQC to malfunction or performance degradation.

[0007] Technical Solution

[0008] To achieve the above objectives, the present invention is implemented through the following technical solutions: a unified power quality controller UPQC for photovoltaic and energy storage DC access, including the following specific modules: a capacitive reactance reduction analysis module: real-time acquisition of voltage signal frequency, conductor temperature and conductor spacing, analysis of the voltage signal frequency increment based on the time series, obtaining the high-frequency voltage signal impact value, establishing a linear regression model of the conductor spacing with respect to the conductor temperature, obtaining the function of the conductor spacing with respect to the conductor temperature, and comprehensive analysis to obtain the thermal expansion impact value, comprehensive analysis of the high-frequency voltage signal impact value and the thermal expansion impact value, obtaining the parasitic capacitive reactance attenuation coefficient; a capacitive reactance reduction judgment module: judging whether the capacitive reactance of the parasitic capacitor is reduced according to the parasitic capacitive reactance attenuation coefficient, if the capacitive reactance of the parasitic capacitor is judged to be normal, returning to the capacitive reactance reduction analysis module to continue to repeatedly perform the above operations, if the capacitive reactance of the parasitic capacitor is judged to be reduced, triggering the common-mode voltage adjustment module; a common-mode voltage adjustment module: reducing the switching frequency of the photovoltaic inverter and the energy storage converter.

[0009] Furthermore, the specific method for obtaining the high-frequency voltage signal impact value is as follows: Among them, GY represents the impact value of high-frequency voltage signal, t represents time series, DP t Represents the voltage signal frequency at the tth moment, DP t-1 Indicates the voltage signal frequency at time t-1.

[0010] Furthermore, the function of the conductor spacing with respect to the conductor temperature is specifically obtained as follows: the asynchrony between the conductor temperature and the conductor spacing is tested by the Pearson correlation coefficient. When the asynchrony between the conductor temperature and the conductor spacing is established, a two-dimensional coordinate system for the conductor temperature and the conductor spacing is set according to the time series. t (x t ,y t ) conductor temperature-conductor spacing coordinates, and a linear function model is established based on the conductor temperature-conductor spacing coordinates as y t =kx t +b, where the independent variable x t represents the conductor temperature, k represents the slope and is less than zero, b represents the intercept and is greater than zero, and the dependent variable y t Represents the conductor spacing, calculate the slope and intercept respectively, and substitute them into y t =kx t +b, to obtain the conductor spacing as a function of the conductor temperature.

[0011] Furthermore, the specific steps of testing the asynchrony of conductor temperature and conductor spacing by using the Pearson correlation coefficient are as follows: averaging the conductor temperature and the conductor spacing to obtain the average conductor temperature and the average conductor spacing; calculating the mean difference of each conductor temperature based on the average conductor temperature to obtain the conductor temperature deviation degree; calculating the mean difference of each conductor spacing based on the average conductor spacing to obtain the conductor spacing deviation degree; multiplying each conductor temperature deviation degree by the corresponding conductor spacing deviation degree in sequence and summing them to obtain an asynchronous value; comparing the asynchronous value with zero in real time to verify whether the asynchrony of conductor temperature and conductor spacing is established.

[0012] Furthermore, the specific method for verifying the asynchrony between the conductor temperature and the conductor spacing is as follows: if the asynchronous value is less than zero, it is verified that the asynchrony between the conductor temperature and the conductor spacing is established; if the asynchronous value is equal to zero, the function value of the conductor spacing with respect to the conductor temperature is assigned a value of one; if the asynchronous value is greater than zero, the conductor temperature or conductor spacing is re-acquired in real time and data cleaning and analysis are performed until the asynchronous value is less than or equal to zero.

[0013] Furthermore, the slope and intercept are obtained by performing variance calculation on the conductor spacing and then multiplying the number of conductor spacings to obtain Where JP represents the degree of deviation of the overall conductor spacing, t represents the time series, and y t represents the conductor spacing, represents the average conductor spacing, i.e. Respectively with y t =kx t +b is substituted into Get a quadratic function about k and b, find the minimum value of this function, and get the values ​​of slope and intercept.

[0014] Furthermore, the thermal expansion influence value is specifically obtained as follows: normalizing the function value of the conductor spacing with respect to the conductor temperature so that the function value is greater than zero and less than one, and calculating the inverse of the function value to record it as the thermal expansion influence value.

[0015] Furthermore, the parasitic capacitive reactance attenuation coefficient is specifically obtained as follows: the high-frequency voltage signal influence value and the thermal expansion influence value are standardized and comprehensively analyzed to obtain the parasitic capacitive reactance attenuation coefficient; JS=GY×RP; wherein JS represents the parasitic capacitive reactance attenuation coefficient, GY represents the high-frequency voltage signal influence value, and RP represents the thermal expansion influence value.

[0016] Furthermore, in the capacitive reactance reduction judgment module, a parasitic capacitive reactance dynamic threshold is set, and the parasitic capacitive reactance dynamic thresholds are arranged in ascending order through bubble sorting. The parasitic capacitive reactance attenuation coefficient is compared with the parasitic capacitive reactance dynamic threshold in real time. If the parasitic capacitive reactance attenuation coefficient is greater than or equal to the maximum parasitic capacitive reactance dynamic threshold, the capacitive reactance of the parasitic capacitor is judged to be normal, and the capacitive reactance reduction analysis module is returned to continue to repeat the above operations. If the parasitic capacitive reactance attenuation coefficient is less than the minimum parasitic capacitive reactance dynamic threshold, the capacitive reactance of the parasitic capacitor is judged to be reduced, and the capacitive reactance reduction result of the parasitic capacitor is sent to the common-mode voltage adjustment module.

[0017] Beneficial effects

[0018] Compared with the prior art, the embodiments of the present invention have at least the following advantages or beneficial effects:

[0019] 1. The capacitive reactance reduction analysis module monitors voltage signal frequency, conductor temperature, and spacing in real time. The linear regression model is used to quantify the impact of thermal expansion on parasitic capacitance. The parasitic capacitive reactance attenuation coefficient is calculated by multiplying the high-frequency voltage signal impact value by the thermal expansion impact value. When the capacitive reactance attenuation coefficient is detected to be lower than the dynamic threshold, the common-mode voltage adjustment module is triggered to reduce the switching frequency of the photovoltaic inverter and energy storage converter, thereby reducing the generation of high-frequency noise at the source, effectively suppressing the problem of increased common-mode voltage on the load side caused by parasitic capacitance coupling, and significantly improving the stability and reliability of the unified power quality controller (UPQC).

[0020] 2. By combining a dynamic threshold matching algorithm optimized with bubble sorting, the unified power quality controller (UPQC) can accurately identify the critical state of capacitive reactance attenuation, avoiding the hysteresis of traditional fixed threshold control. When the capacitive reactance shows a trend of attenuation, UPQC can respond quickly and promptly adjust the switching frequency of the photovoltaic inverter and energy storage converter, thereby suppressing the increase in common-mode voltage caused by high-frequency noise coupling at the source.

[0021] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is the structural diagram of a unified power quality controller UPQC for photovoltaic storage and DC access. DETAILED DESCRIPTION

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0024] It should be noted that, in this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "include," "comprise," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus.

[0025] like Figure 1 As shown, the embodiment of the present invention provides a unified power quality controller UPQC for photovoltaic and energy storage DC access, which includes the following specific modules:

[0026] Capacitive reactance reduction analysis module: When high-frequency voltage is applied to parasitic capacitance, which is the capacitance naturally formed by the physical layout of the unified power quality controller UPQC or the characteristics of the insulating material, the electric field between the conductor materials changes rapidly, forcing the bound charge in the medium to move rapidly. Based on the capacitive reactance formula where X C The displacement current caused by this displacement increases significantly with the increase of the voltage signal frequency, resulting in a decrease in the capacitive reactance of the parasitic capacitor. This makes it easier for high-frequency voltage signals to couple to the load side through the parasitic capacitor rather than being transmitted along the designed copper traces. This increases the common-mode voltage on the load side of the unified power quality controller (UPQC).

[0027] Therefore, the voltage signal frequency is acquired in real time through a spectrum analyzer, and data cleaning is performed on the voltage signal frequency to remove redundant values ​​of the voltage signal frequency and improve the data quality of the voltage signal frequency. Since the faster the electric field changes, the higher the voltage signal frequency is, the increment of the voltage signal frequency is analyzed according to the time series to obtain the high-frequency voltage signal impact value;

[0028] The specific method for obtaining the high-frequency voltage signal impact value is as follows:

[0029]

[0030] Among them, GY represents the influence value of high-frequency voltage signal, which reflects whether the voltage signal frequency gradually increases. If the voltage signal frequency gradually increases, the influence value of high-frequency voltage signal is greater, t represents the time series, DP t Represents the voltage signal frequency at the tth moment, DP t-1It represents the voltage signal frequency at the t-1th moment. When the voltage signal frequency gradually increases, the voltage signal frequency at the tth moment is greater than the voltage signal frequency at the t-1th moment.

[0031] As the frequency of the voltage signal gradually increases, the displacement of the current is accelerated, the energy loss generated increases and is converted into heat energy, which increases the temperature of the conductor. The increase in the conductor temperature further causes the conductor material to expand thermally. According to the physical layout of the parasitic capacitor, the parallel plate capacitance formula is used. For analysis, C represents parasitic capacitance, α represents vacuum dielectric constant, which reflects the propagation characteristics of electric field in vacuum, β represents relative dielectric constant of medium, which reflects the response ability of conductor material to electric field, A represents effective area of ​​conductor material, d represents spacing of conductor material. Due to thermal expansion of conductor material, effective area of ​​conductor material becomes larger, spacing between conductor materials decreases. Even if conductor materials are not parallel, it does not affect the spacing between conductor materials. Therefore, parasitic capacitance increases. Combined with the capacitive reactance formula When the frequency of the voltage signal increases, the parasitic capacitance increases, and the capacitive reactance of the parasitic capacitance further decreases;

[0032] Therefore, the conductor temperature is obtained in real time through a temperature sensor, and the distance between conductor materials is obtained in real time through a laser displacement sensor and recorded as the conductor spacing. The conductor temperature and conductor spacing data are cleaned to remove redundant values ​​of the conductor temperature and conductor spacing, thereby improving the data quality of the conductor temperature and conductor spacing. By establishing a linear regression model for the conductor temperature and conductor spacing, the function of the conductor spacing with respect to the conductor temperature is obtained.

[0033] The specific method of obtaining the function of conductor spacing on conductor temperature is as follows:

[0034] The asynchrony between conductor temperature and conductor spacing is tested by the Pearson correlation coefficient. Asynchrony means whether the conductor spacing gradually decreases when the conductor temperature gradually increases. When the asynchrony between conductor temperature and conductor spacing is established, a two-dimensional coordinate system about conductor temperature and conductor spacing is set according to the time series. There are t (x t ,y t ) conductor temperature-conductor spacing coordinates, and a linear function model is established based on the conductor temperature-conductor spacing coordinates as y t =kx t +b, where the independent variable x t represents the conductor temperature, k represents the slope. As the conductor temperature increases, the conductor spacing decreases, so k is less than zero. b represents the intercept, that is, when the conductor temperature is zero, the conductor spacing is equal to the intercept. Since the spacing between conductor materials is usually greater than zero to avoid short circuits caused by mutual contact, b is greater than zero. The dependent variable y t Represents the conductor spacing, calculate the slope and intercept respectively, and substitute them into y t=kx t +b, to obtain the conductor spacing as a function of the conductor temperature.

[0035] The specific steps for testing the asynchrony between conductor temperature and conductor spacing using the Pearson correlation coefficient are as follows:

[0036] The conductor temperature and the conductor spacing are averaged to obtain the conductor temperature average and the conductor spacing average, which respectively reflect the concentration trend of the conductor temperature and the concentration trend of the conductor spacing, facilitating the subsequent calculation of the deviation from the mean. The deviation from the mean is calculated for each conductor temperature based on the conductor temperature average to measure the degree of deviation of each conductor temperature from the conductor temperature average, thereby obtaining the conductor temperature deviation. The deviation from the mean is calculated for each conductor spacing based on the conductor spacing average to measure the degree of deviation of each conductor spacing from the conductor spacing average to obtain the conductor spacing deviation. The product of each conductor temperature deviation and the corresponding conductor spacing deviation is calculated and summed in sequence to reflect the sign characteristics of the overall conductor temperature deviation and the overall conductor spacing deviation, thereby obtaining the asynchronous value.

[0037] The asynchronous value is compared with zero in real time. If the asynchronous value is less than zero, the asynchrony between the conductor temperature and the conductor spacing is verified, indicating that the conductor temperature is gradually increasing, the difference to the average conductor temperature is greater than zero, and the conductor spacing is gradually decreasing, the difference to the average conductor spacing is less than zero, reflecting the influence of the high-frequency voltage signal on the capacitive reactance of the parasitic capacitor. If the asynchronous value is equal to zero, it indicates that the conductor temperature and the conductor spacing have no effect on the capacitive reactance of the parasitic capacitor, that is, the reduction in the capacitive reactance of the parasitic capacitor is only related to the high-frequency voltage signal influence. The function value of the conductor spacing with respect to the conductor temperature is assigned a value of one. If the asynchronous value is greater than zero, it indicates that the conductor temperature is gradually increasing, the difference to the average conductor temperature is greater than zero, the conductor spacing is gradually increasing, the difference to the average conductor spacing is greater than zero, or the conductor temperature is gradually decreasing, the difference to the average conductor temperature is less than zero, the conductor spacing is gradually decreasing, and the difference to the average conductor spacing is less than zero. The conductor temperature or conductor spacing is re-acquired in real time and data cleaning and analysis are performed until the asynchronous value is less than or equal to zero.

[0038] The specific method of obtaining the slope and intercept is as follows:

[0039] The variance of the conductor spacing is calculated to reflect the degree of deviation of each conductor spacing, and then the product of the number of conductor spacings is calculated to reflect the degree of deviation of the overall conductor spacing, that is, Where JP represents the degree of deviation of the overall conductor spacing, t represents the time series and also represents the number of conductor spacings, y t represents the conductor spacing, represents the average conductor spacing, i.e. Respectively with y t=kx t +b is substituted into The quadratic function of k and b is obtained. The opening of the function is upward. The derivative of this function is taken. When the derivative of this function is equal to zero, the minimum value is obtained. The reason for calculating the minimum value is to reflect the conductor temperature-conductor spacing coordinate to y t =kx t The distance of +b is the smallest, that is, the conductor temperature-conductor spacing coordinates are approximately on a straight line, so the slope and intercept values ​​are obtained.

[0040] Since the function of conductor spacing with respect to conductor temperature decreases monotonically as the conductor temperature increases, the function value of conductor spacing with respect to conductor temperature is normalized. The function value is greater than zero and less than one. The reciprocal of the function value is taken and recorded as the thermal expansion influence value. The thermal expansion influence value increases monotonically as the conductor temperature increases. The high-frequency voltage signal influence value and the thermal expansion influence value are normalized and comprehensively analyzed to obtain the parasitic capacitive reactance attenuation coefficient.

[0041] JS = GY × RP;

[0042] Among them, JS represents the parasitic capacitive reactance attenuation coefficient, which reflects whether the parasitic capacitive reactance is attenuated. GY represents the high-frequency voltage signal influence value, which reflects whether the voltage signal frequency gradually increases. RP represents the thermal expansion influence value. If the asynchronous value is equal to zero, the function value of the conductor spacing with respect to the conductor temperature is assigned a value of one. Therefore, the thermal expansion influence value is one, indicating that the thermal expansion influence value has no effect on the parasitic capacitive reactance attenuation coefficient. If the asynchronous value is less than zero, the function value of the conductor spacing with respect to the conductor temperature is greater than zero and less than one. Therefore, the thermal expansion influence value is greater than one, and the higher the conductor temperature, the greater the thermal expansion influence value.

[0043] Capacitive reactance reduction judgment module: determines whether the parasitic reactance has been reduced based on the parasitic reactance attenuation coefficient, sets a parasitic reactance dynamic threshold, which is a set of parasitic reactances under normal operation. The parasitic reactance dynamic thresholds are arranged in ascending order through bubble sorting, and the parasitic reactance attenuation coefficient is compared with the parasitic reactance dynamic threshold in real time. If the parasitic reactance attenuation coefficient is greater than or equal to the maximum parasitic reactance dynamic threshold, the parasitic capacitor is judged to be normal, and the module returns to the capacitive reactance reduction analysis module to repeat the above operations. If the parasitic reactance attenuation coefficient is less than the minimum parasitic reactance dynamic threshold, the parasitic capacitor is judged to be reduced, and the parasitic capacitor capacitive reactance reduction result is sent to the common-mode voltage adjustment module.

[0044] Common-mode voltage adjustment module: Receives the capacitive reactance reduction results of the parasitic capacitors and reduces the switching frequency of the photovoltaic inverter and energy storage converter. This prevents the high-frequency noise generated by the high-frequency switching of the two from being coupled to the load side of the unified power quality controller UPQC through the parasitic capacitors. This prevents the common-mode voltage on the load side from increasing, causing equipment failure or performance degradation.

[0045] The preferred embodiments of the present invention disclosed above are intended only to help illustrate the present invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the present invention to the specific embodiments described. Obviously, many modifications and variations are possible based on the contents of this specification. These embodiments are selected and described in detail in this specification to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to better understand and utilize the present invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A unified power quality controller (UPQC) for solar-to-storage DC access, characterized by: Includes the following specific modules: Capacitive reactance reduction analysis module: This module acquires voltage signal frequency, conductor temperature, and conductor spacing in real time, analyzes the voltage signal frequency increment based on the time series, and obtains the high-frequency voltage signal impact value. A linear regression model of conductor spacing with respect to conductor temperature is established to obtain the function of conductor spacing with respect to conductor temperature. This module then comprehensively analyzes the thermal expansion impact value, and performs a comprehensive analysis of the high-frequency voltage signal impact value and the thermal expansion impact value to obtain the parasitic capacitive reactance attenuation coefficient. The specific method for obtaining the thermal expansion influence value is as follows: Normalize the function value of the conductor spacing with respect to the conductor temperature so that the function value is greater than zero and less than one, and calculate the inverse of the function value, which is recorded as the thermal expansion influence value; The specific method of obtaining the parasitic capacitance attenuation coefficient is as follows: The parasitic capacitive reactance attenuation coefficient is obtained by standardizing and comprehensively analyzing the high-frequency voltage signal influence value and the thermal expansion influence value. ； in, represents the parasitic capacitance attenuation coefficient, Indicates the impact value of high-frequency voltage signal, Indicates the thermal expansion influence value; Capacitive reactance reduction judgment module: determines whether the capacitive reactance of the parasitic capacitor has decreased based on the parasitic capacitive reactance attenuation coefficient. If the capacitive reactance of the parasitic capacitor is normal, the module returns to the capacitive reactance reduction analysis module to repeat the above operations. If the capacitive reactance of the parasitic capacitor is reduced, the common-mode voltage adjustment module is triggered. Common-mode voltage adjustment module: reduces the switching frequency of the photovoltaic inverter and energy storage converter.

2. The unified power quality controller UPQC for solar-to-storage DC access according to claim 1, characterized in that: The specific method for obtaining the high-frequency voltage signal impact value is as follows: ； in, Indicates the impact value of high-frequency voltage signal, represents a time series, Indicates the The voltage signal frequency at a moment, Indicates the -1 voltage signal frequency at a moment.

3. The unified power quality controller UPQC for solar-to-storage DC access according to claim 1, characterized in that: The specific method of obtaining the function of the conductor spacing with respect to the conductor temperature is as follows: The asynchrony between conductor temperature and conductor spacing is tested by the Pearson correlation coefficient. When the asynchrony between conductor temperature and conductor spacing is established, a two-dimensional coordinate system about conductor temperature and conductor spacing is set according to the time series. indivual The conductor temperature-conductor spacing coordinates are used to establish a linear function model based on the conductor temperature-conductor spacing coordinates. , where the independent variable represents the conductor temperature, represents the slope and is less than zero, represents the intercept and is greater than zero, the dependent variable Represents the conductor spacing, calculate the slope and intercept respectively, and substitute them into , get the function of conductor spacing with respect to conductor temperature; The specific steps of testing the asynchrony between conductor temperature and conductor spacing by the Pearson correlation coefficient are as follows: averaging the conductor temperature and the conductor spacing to obtain the average conductor temperature and the average conductor spacing; calculating the mean difference of each conductor temperature based on the average conductor temperature to obtain the conductor temperature deviation; calculating the mean difference of each conductor spacing based on the average conductor spacing to obtain the conductor spacing deviation; multiplying each conductor temperature deviation by the corresponding conductor spacing deviation in sequence and summing them to obtain an asynchronous value; comparing the asynchronous value with zero in real time to verify whether the asynchrony between conductor temperature and conductor spacing is established; the specific method of verifying the establishment of the asynchrony between conductor temperature and conductor spacing is as follows: if the asynchronous value is less than zero, it is verified that the asynchrony between conductor temperature and conductor spacing is established; if the asynchronous value is equal to zero, the function value of the conductor spacing with respect to the conductor temperature is assigned a value of one; if the asynchronous value is greater than zero, the conductor temperature or conductor spacing is re-acquired in real time and data cleaning and analysis are performed until the asynchronous value is less than or equal to zero.

4. The unified power quality controller UPQC for solar-to-storage DC access according to claim 3, characterized in that: The specific method for obtaining the slope and intercept is as follows: Calculate the variance of the conductor spacing and then multiply it by the number of conductor spacings to get ,in Indicates the degree of deviation of the overall conductor spacing, represents a time series, represents the conductor spacing, represents the average conductor spacing, i.e. , respectively and Substitute into , get about and A quadratic function of , minimizes this function, and obtains the values ​​of slope and intercept.

5. The unified power quality controller UPQC for solar-to-storage DC access according to claim 1, characterized in that: In the capacitive reactance reduction judgment module, a parasitic capacitive reactance dynamic threshold is set, and the parasitic capacitive reactance dynamic thresholds are arranged in ascending order through bubble sorting. The parasitic capacitive reactance attenuation coefficient is compared with the parasitic capacitive reactance dynamic threshold in real time. If the parasitic capacitive reactance attenuation coefficient is greater than or equal to the maximum parasitic capacitive reactance dynamic threshold, the capacitive reactance of the parasitic capacitor is judged to be normal, and the module returns to the capacitive reactance reduction analysis module to continue to repeat the above operations. If the parasitic capacitive reactance attenuation coefficient is less than the minimum parasitic capacitive reactance dynamic threshold, the capacitive reactance of the parasitic capacitor is judged to be reduced, and the capacitive reactance reduction result of the parasitic capacitor is sent to the common-mode voltage adjustment module.

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