Power amplifier

Abstract

The embodiment of the invention provides a power amplifier. The power amplifier comprises an amplification module which is provided with at least one amplification unit and is used for receiving a radio frequency input signal and outputting an amplified signal; and the adjusting module is coupled with the amplifying module, the adjusting module outputs an adjusting signal based on the radio frequency input signal, and the adjusting signal and the amplifying signal are superposed to obtain a first output signal, so that the gain of the power amplifier is reduced.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of circuit technologies, and more particularly, to a power amplifier. Background Art

[0002] A radio frequency power amplifier (PA) is an important component of the radio frequency circuit in an electronic device, responsible for amplifying and transmitting the power of the radio frequency signal to be transmitted to achieve communication with a base station or a WiFi hotspot.

[0003] When the working environment of the power amplifier changes, it will cause a change in gain. For example, when working at high and low temperatures, the parameters of the circuit devices inside it will change with temperature. As a result, at high temperatures, the gain of the power amplifier will decrease; at low temperatures, the gain of the power amplifier will increase. When the gain of the power amplifier changes, it will affect the stability of the power amplifier and it is difficult to meet the requirements of industry standards. Summary of the Invention

[0004] In view of this, embodiments of the present disclosure provide a power amplifier.

[0005] The technical solution of the present disclosure is implemented as follows:

[0006] Embodiments of the present disclosure provide a power amplifier, including:

[0007] An amplification module having at least one amplification unit for receiving a radio frequency input signal and outputting an amplified signal;

[0008] An adjustment module coupled to the amplification module, the adjustment module outputting an adjustment signal based on the radio frequency input signal, and superimposing the adjustment signal on the amplified signal to obtain a first output signal to reduce the gain of the power amplifier.

[0009] In some embodiments, the signal at the input end of the adjustment module has the same phase as the signal at the input end of the amplification module, and the signal at the output end of the adjustment module has a phase opposite to the signal at the output end of the amplification module, so that the amplitude of the first output signal is less than the amplitude of the amplified signal.

[0010] In some embodiments, the power amplifier further includes: an input module for receiving a radio frequency input signal and outputting a first signal with a phase difference through a first output end and a second output end of the input module based on the radio frequency input signal;

[0011] The amplification module includes a first amplification unit and a second amplification unit, the first amplification unit and the second amplification unit are respectively connected to the first output end and the second output end, and output a first amplified signal and a second amplified signal;

[0012] The adjustment module is connected to the first output terminal and / or the second output terminal, so that the adjustment signal is superimposed on the first amplified signal and / or the second amplified signal.

[0013] In some embodiments, the adjustment module includes a first adjustment unit and a second adjustment unit. The first adjustment unit is connected to the first output terminal and outputs a first adjustment signal based on the first signal; the second adjustment unit is connected to the second output terminal and outputs a second adjustment signal based on the first signal;

[0014] The first adjustment signal is superimposed on the first amplified signal or the second amplified signal;

[0015] The second adjustment signal is superimposed on the second amplified signal or the first amplified signal.

[0016] In some embodiments, the first adjustment signal, the second adjustment signal and the corresponding superimposed amplified signals have a phase difference.

[0017] In some embodiments, the first adjustment signal, the second adjustment signal and the corresponding superimposed amplified signals are in opposite phases.

[0018] In some embodiments, the first signal input to the adjustment module and the adjustment signal output are in opposite phases.

[0019] In some embodiments, the first amplification unit includes a first transistor. The control terminal of the first transistor is connected to the first output terminal. The first end of the first transistor is the output terminal of the first amplification unit, and the second end is grounded;

[0020] The second amplification unit includes a second transistor. The control terminal of the second transistor is connected to the second output terminal. The first end of the second transistor is the output terminal of the second amplification unit, and the second end is grounded;

[0021] The adjustment module includes a third transistor and a fourth transistor. The control terminal of the third transistor is connected to the first output terminal, and the control terminal of the fourth transistor is connected to the second output terminal.

[0022] In some embodiments, the second end of the third transistor is connected to the output terminal of the first amplification unit, the second end of the fourth transistor is connected to the output terminal of the second amplification unit, and the first ends of the third transistor and the fourth transistor are connected to the power supply voltage.

[0023] In some embodiments, a first end of the third transistor is connected to an output end of the second amplification unit, and a first end of the fourth transistor is connected to an output end of the first amplification unit; a second end of the third transistor and a second end of the fourth transistor are grounded.

[0024] In some embodiments, the adjustment module further includes a phase adjustment unit to make the adjustment signal have a phase difference from the amplification signal.

[0025] In some embodiments, via the phase adjustment unit, a control end of the third transistor is connected to the first output end, and a control end of the fourth transistor is connected to the second output end; a first end of the third transistor is connected to an output end of the first amplification unit, and a first end of the fourth transistor is connected to an output end of the second amplification unit;

[0026] Alternatively, via the phase adjustment unit, a first end of the third transistor is connected to an output end of the first amplification unit, and a first end of the fourth transistor is connected to an output end of the second amplification unit.

[0027] Embodiments of the present disclosure provide a power amplifier, including: an amplification module having at least one amplification unit for receiving a radio frequency input signal and outputting an amplification signal; an adjustment module coupled to the amplification module, the adjustment module outputting an adjustment signal based on the radio frequency input signal, and superimposing the adjustment signal on the amplification signal to obtain a first output signal so as to reduce the gain of the power amplifier. In the embodiments of the present disclosure, by providing an adjustment module in the power amplifier and superimposing the adjustment signal output by the adjustment module on the amplification signal, a first output signal different from the amplification signal is obtained, thereby realizing the adjustment of the gain of the power amplifier. And while realizing adjustable gain, the balance of other indexes (linearity, efficiency, etc.) of the power amplifier is realized. Description of the Drawings

[0028] Figure 1 is a circuit diagram of a power amplifier in an example;

[0029] Figure 2 is a circuit diagram of a first power amplifier provided by an embodiment of the present disclosure;

[0030] Figure 3 is a circuit diagram of a second power amplifier provided by an embodiment of the present disclosure;

[0031] Figure 4 is a circuit diagram of a third power amplifier provided by an embodiment of the present disclosure;

[0032] Figure 5 is a circuit diagram of a fourth power amplifier provided by an embodiment of the present disclosure;

[0033] Figure 6 This is the circuit diagram of the fifth power amplifier provided by the embodiments of the present disclosure. Detailed implementation manners

[0034] Next, the technical solutions in the embodiments of the present disclosure will be clearly and completely described in conjunction with the embodiments of the present disclosure and the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present disclosure without creative efforts shall fall within the scope of protection of the present disclosure.

[0035] In the following description, numerous specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure may be implemented without one or more of these details. In other instances, some well-known technical features are not described in order to avoid confusion with the present disclosure; that is, not all features of the actual embodiments are described here, and the well-known functions and structures are not described in detail.

[0036] In the drawings, for clarity, the dimensions of layers, regions, elements, and their relative dimensions may be exaggerated. The same reference numerals denote the same elements throughout.

[0037] It should be understood that when an element or layer is referred to as "on", "adjacent to", "connected to", or "coupled to" another element or layer, it can be directly on, adjacent to, connected to, or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as "directly on", "directly adjacent to", "directly connected to", or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, without departing from the teachings of the present disclosure, the first element, component, region, layer, or part discussed below may be referred to as the second element, component, region, layer, or part. And when discussing the second element, component, region, layer, or part, it does not mean that the present disclosure necessarily has a first element, component, region, layer, or part.

[0038] Spatial relationship terms such as "under", "below", "lower", "beneath", "above", "upper", etc. may be used herein for convenience of description to describe the relationship of one element or feature shown in the figure with other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatial relationship terms are also intended to include different orientations of the device in use and operation. For example, if the device in the attached drawings is flipped, then an element or feature described as "under other elements" or "beneath them" or "under them" will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both the upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0039] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present disclosure. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, identify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0040] To thoroughly understand the present disclosure, detailed steps and detailed structures will be presented in the following description to illustrate the technical solutions of the present disclosure. The preferred embodiments of the present disclosure are described in detail below. However, in addition to these detailed descriptions, the present disclosure may have other embodiments.

[0041] In the actual use process, the power amplifier needs to meet the gain requirements at high and low temperatures. Since in a high-temperature environment, the gain of the power amplifier will decrease; in a low-temperature environment, the gain of the power amplifier will increase. To reduce the gain difference of the power amplifier at high and low temperatures, a power amplifier with variable gain needs to be designed. At the same time, since the stability and chip burning situation of the power amplifier are also directly related to the gain. Specifically, the higher the gain of the power amplifier, the worse the stability, and it is more likely to burn the chip. Therefore, to further improve the performance of the power amplifier, it is very necessary to design a power amplifier with variable gain.

[0042] Figure 1 is a circuit diagram of a power amplifier in an example. As Figure 1As shown, the circuit of the power amplifier 100 includes a first balun 101, a transistor Q', a transistor Q", and a second balun 102. The first balun 101 is configured to receive a radio frequency input signal and output a differential signal. The transistor Q' and the transistor Q" are configured to amplify the differential signal output by the first balun 101. The second balun 102 is configured to combine paths to output a radio frequency output signal.

[0043] In the prior art, the power amplifier 100 can only adjust its gain through the bias circuits of the transistor Q' and the transistor Q". However, this will cause deterioration of indicators such as the linearity and efficiency of the power amplifier 100. Therefore, Figure 1 in actual use, it is difficult for the shown power amplifier 100 to achieve a balance between linearity and efficiency while adjusting the gain.

[0044] In view of this, embodiments of the present disclosure provide a power amplifier with variable gain, which can achieve a balance between gain, linearity, and efficiency during actual use.

[0045] Figure 2 This is the circuit diagram of the first power amplifier provided by the embodiments of the present disclosure. As Figure 2 shown, embodiments of the present disclosure provide a power amplifier 200, which includes: an amplification module 202 having at least one amplification unit, configured to receive a radio frequency input signal and output an amplified signal; an adjustment module 203 coupled to the amplification module 202, the adjustment module 203 outputs an adjustment signal based on the radio frequency input signal, and superimposes the adjustment signal on the amplified signal to obtain a first output signal, so as to reduce the gain of the power amplifier 200.

[0046] As Figure 2 shown, in some embodiments of the present disclosure, the power amplifier 200 includes a non-push-pull amplifier. Among them, the amplification module 202 of the non-push-pull amplifier includes one amplification unit, that is, a first amplification unit 207. The first amplification unit 207 is configured to receive a radio frequency input signal and output an amplified signal. The adjustment module 203 of the non-push-pull amplifier includes one adjustment unit, that is, a first adjustment unit 208. Among them, the first adjustment unit 208 further includes a structure for adjusting the phase, and here the structure for adjusting the phase is referred to as a phase adjustment structure 204. The phase adjustment structure 204 is configured to adjust the phase of the radio frequency input signal received by the first adjustment unit 208, so that the first adjustment unit 208 outputs an adjustment signal with a phase different from that of the amplified signal.

[0047] In some embodiments, the first amplification unit 207 includes a first transistor Q1, and the first adjustment unit includes a third transistor Q3 and a phase modulation structure 204. The control terminal 209 of the first transistor Q1 is the input terminal of the first amplification unit 207, the first terminal 210 of the first transistor Q1 is the output terminal of the first amplification unit 207, and the second terminal 211 of the first transistor Q1 is grounded. The control terminal 212 of the third transistor Q3 is the input terminal of the first adjustment unit 208, the first terminal 213 of the third transistor Q3 is the output terminal of the first adjustment unit 208, and the second terminal 214 of the third transistor Q3 is grounded.

[0048] In the embodiments of the present disclosure, the control terminal 212 of the third transistor Q3 is connected to the output terminal of the phase modulation structure 204. The phase modulation structure 204 adjusts the phase of the received radio frequency input signal and then inputs it to the third transistor Q3. The third transistor Q3 outputs an adjustment signal according to the signal output by the phase modulation structure 204. The output terminal of the amplification module 202 is coupled to the output terminal of the adjustment module 203. Thus, the amplified signal output by the output terminal of the amplification module 202 and the adjustment signal output by the output terminal of the adjustment module 203 are superimposed to generate a first output signal different from the amplified signal and the adjustment signal.

[0049] In some embodiments, the phase modulation structure 204 includes a phase shifter, an inverter, a power splitter, etc.

[0050] In some embodiments, the signal at the input terminal of the adjustment module 203 has the same phase as the signal at the input terminal of the amplification module 202, and the signal at the output terminal of the adjustment module 203 has a phase opposite to that of the signal at the output terminal of the amplification module 202, so that the amplitude of the first output signal is smaller than the amplitude of the amplified signal.

[0051] Here, it can be understood that since the first output signal is obtained by superimposing the adjustment signal output by the adjustment module 203 and the amplified signal output by the amplification module 202, and the adjustment signal and the amplified signal have opposite phases. Therefore, the amplitude of the first output signal is smaller than the amplitude of the amplified signal, and the gain of the power amplifier 200 is reduced.

[0052] In the embodiments of the present disclosure, the power amplifier 200 further includes an output module 215. In some embodiments, the output module 215 includes a balun, and the balun is used to convert the first output signal into a radio frequency output signal. As Figure 2 shown, the output module 215 includes an input terminal and an output terminal, which are the input terminal 216 and the output terminal 217 respectively. Among them, the input terminal 216 is connected to the first terminal 210 of the first transistor Q1, and the output terminal 217 is coupled to the radio frequency output terminal RFOUT for outputting a radio frequency output signal.

[0053] Figure 3 This is the circuit diagram of the second power amplifier provided by the embodiments of the present disclosure. AsFigure 3 As shown, the circuit of the power amplifier 300 is a differential circuit. The power amplifier 300 includes an amplification module 302, an adjustment module 303, and an output module 315. Moreover, the power amplifier 300 further includes: an input module 301, configured to receive a radio frequency input signal and output a first signal with a phase difference based on the radio frequency input signal through a first output terminal 305 and a second output terminal 306 of the input module. Among them, the amplification module 302 includes a first amplification unit 207 and a second amplification unit 307. The first amplification unit 207 and the second amplification unit 307 are respectively connected to the first output terminal 305 and the second output terminal 306, and output a first amplified signal and a second amplified signal; the adjustment module 303 is connected to the first output terminal 305 and / or the second output terminal 306 to superimpose an adjustment signal on the first amplified signal and / or the second amplified signal.

[0054] In the embodiment of the present disclosure, the input module 301 is configured to transform the radio frequency input signal received by the power amplifier 300 from single-ended transmission to differential transmission. As Figure 3 shown, the input module 301 includes an input terminal and two output terminals, namely a first input terminal 304, a first output terminal 305, and a second output terminal 306. Among them, the first input terminal 304 is coupled to the radio frequency input terminal RFIN for receiving a radio frequency input signal, and the first output terminal 305 and the second output terminal 306 respectively output a first signal with a phase difference based on the radio frequency input signal.

[0055] In some embodiments, the first signal includes differential signals with opposite phases and the same amplitudes. In other words, there is a 180-degree phase difference between the two signals respectively output by the first output terminal 305 and the second output terminal 306 of the input module 301.

[0056] As Figure 3 shown, the amplification module 302 includes two amplification units, namely a first amplification unit 207 and a second amplification unit 307. Among them, the first amplification unit 207 is connected to the first output terminal 305 and is configured to output a first amplified signal according to the first signal. The second amplification unit 307 is connected to the second output terminal 306 and is configured to output a second amplified signal according to the first signal.

[0057] In some embodiments, as Figure 3As shown, the adjustment module 303 includes a first adjustment unit 208 and a second adjustment unit 308. The first adjustment unit 208 is connected to the first output terminal 305, and the first adjustment unit 208 can output a first adjustment signal based on the first signal. The second adjustment unit 308 is connected to the second output terminal 306, and the second adjustment unit 308 can output a second adjustment signal based on the first signal. In the embodiments of the present disclosure, the first adjustment signal is superimposed on the first amplified signal or the second amplified signal; the second adjustment signal is superimposed on the second amplified signal or the first amplified signal. Figure 3 Among them, the first adjustment signal is superimposed on the second amplified signal, and the second adjustment signal is superimposed on the first amplified signal.

[0058] In some embodiments, the first adjustment signal, the second adjustment signal, and the amplified signals corresponding to the superimposition have a phase difference.

[0059] As Figure 3 shown, the first adjustment signal is superimposed on the second amplified signal, and the second adjustment signal is superimposed on the first amplified signal. At this time, there is a phase difference between the first adjustment signal and the second amplified signal, and there is a phase difference between the second adjustment signal and the first amplified signal.

[0060] In some embodiments, the first adjustment signal, the second adjustment signal, and the amplified signals corresponding to the superimposition are in opposite phases.

[0061] As Figure 3 shown, the first adjustment signal and the second amplified signal are in opposite phases, and the second adjustment signal and the first amplified signal are in opposite phases.

[0062] In some embodiments, the first signal input to the adjustment module is in opposite phase to the adjustment signal output.

[0063] As Figure 3 shown, the first signal input to the first adjustment unit 208 is in opposite phase to the first adjustment signal output by the first adjustment unit 208, and the first signal input to the second adjustment unit 308 is in opposite phase to the second adjustment signal output by the second adjustment unit 308.

[0064] In some embodiments, the first amplification unit includes a first transistor. The control terminal of the first transistor is connected to the first output terminal. The first end of the first transistor is the output terminal of the first amplification unit, and the second end is grounded. The second amplification unit includes a second transistor. The control terminal of the second transistor is connected to the second output terminal. The first end of the second transistor is the output terminal of the second amplification unit, and the second end is grounded. The adjustment module includes a third transistor and a fourth transistor. The control terminal of the third transistor is connected to the first output terminal, and the control terminal of the fourth transistor is connected to the second output terminal.

[0065] As Figure 3As shown, the first amplification unit 207 in the amplification module 302 includes a first transistor Q1. The control terminal 209 of the first transistor Q1 is connected to the first output terminal 305 of the input module 301 for receiving a first signal. The first transistor Q1 is configured to amplify the received first signal and output it from its first terminal 210. Here, the amplified signal output by the first transistor Q1 is referred to as an amplified signal, and more specifically, this signal is referred to as a first amplified signal. The second terminal 211 of the first transistor Q1 is grounded. The second amplification unit 307 in the amplification module 302 includes a second transistor Q2. The control terminal 309 of the second transistor Q21 is connected to the second output terminal 306 of the input module 301 for receiving a first signal. The second transistor Q2 is configured to amplify the received first signal and output it from its first terminal 310. Here, the amplified signal output by the second transistor Q2 is referred to as an amplified signal, and more specifically, this signal is referred to as a second amplified signal. The second terminal 311 of the second transistor Q2 is grounded.

[0066] Here, it should be noted that the structures of the first amplification unit 207 and the second amplification unit 307 are the same. Moreover, when the first signal is a differential signal, the first amplified signal and the second amplified signal respectively output by the first amplification unit 207 and the second amplification unit 307 are also differential signals with respect to each other.

[0067] The adjustment module 303 includes a first adjustment unit 208 and a second adjustment unit 308. Among them, the first adjustment unit 208 includes a third transistor Q3. The control terminal 212 of the third transistor Q3 is connected to the first output terminal 305 of the input module 301 for receiving a first signal. The third transistor Q3 is configured to output an adjustment signal from its first terminal 213 according to the received first signal. Here, this adjustment signal is referred to as a first adjustment signal. The first terminal 213 of the third transistor Q3 is connected to the output terminal of the second amplification unit, and the second terminal 214 of the third transistor Q3 is grounded. The second adjustment unit 308 includes a fourth transistor Q4. The control terminal 312 of the fourth transistor Q4 is connected to the second output terminal 306 of the input module 301 for receiving a first signal. The fourth transistor Q4 is configured to output an adjustment signal from its first terminal 313 according to the received first signal. Here, this adjustment signal is referred to as a second adjustment signal. The first terminal 313 of the fourth transistor Q4 is connected to the output terminal of the first amplification unit, and the second terminal 314 of the fourth transistor Q4 is grounded.

[0068] The adjustment module 303 is coupled to the amplification module 302. Specifically, the first terminal 213 of the third transistor Q3 is connected to the first terminal 310 of the second transistor Q2, and the first terminal 313 of the fourth transistor Q4 is connected to the first terminal 210 of the first transistor Q1. In this way, the first amplified signal and the corresponding second adjustment signal can be superimposed to obtain the first output signal, and the second amplified signal and the corresponding first adjustment signal can be superimposed to obtain the first output signal. That is to say, the first adjustment unit 208 realizes the adjustment of the amplitude of the output signal of the power amplifier 300, and the second adjustment unit 308 realizes the adjustment of the amplitude of the output signal of the power amplifier 300.

[0069] In some embodiments, the first transistor Q1, the second transistor Q2, the third transistor Q3, and the third transistor Q3 include heterojunction bipolar transistors HBT or metal oxide semiconductor field effect transistors MOSFET. The control terminal of the transistor (including the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4) can be its base or gate, the first terminal of the transistor can be its collector or drain, and the second terminal of the transistor can be its emitter or source. The structures of the first transistor Q1 and the second transistor Q2 are the same, and the structures of the third transistor Q3 and the fourth transistor Q4 are the same.

[0070] In the embodiments of the present disclosure, compared with Figure 1 the power amplifier 100 shown, Figure 3 the power amplifier 300 in Figure 1 introduces an additional adjustment module 303, and the introduction of this adjustment module 303 basically does not cause deterioration of indicators such as the linearity and efficiency of the power amplifier 300. Therefore, the power amplifier 300 provided by the embodiments of the present disclosure can achieve the balance of indicators such as linearity and efficiency while adjusting the gain. At the same time, compared with Figure 3 the power amplifier 300 has better design freedom and better performance.

[0071] In some embodiments, the second terminal of the third transistor is connected to the output terminal of the first amplification unit, the second terminal of the fourth transistor is connected to the output terminal of the second amplification unit, and the first terminals of the third transistor and the fourth transistor are connected to the power supply voltage.

[0072] Figure 4 This is the circuit diagram of the third power amplifier 400 provided by the embodiments of the present disclosure. As Figure 4 shown, the power amplifier 400 includes an input module 301, an amplification module 302, an adjustment module 403, and an output module 315. Among them, the input module 301, the amplification module 302, and the output module 315 can refer to Figure 3, which will not be elaborated here. The adjustment module 403 includes a first adjustment unit 208 and a second adjustment unit 308. Among them, the first adjustment unit 208 includes a third transistor Q3. The control terminal 212 of the third transistor Q3 is connected to the first output terminal 305 of the input module 301 for receiving a first signal. The third transistor Q3 is used to output a first adjustment signal from its second terminal 214 according to the received first signal. The first terminal 213 of the third transistor Q3 is connected to the power supply voltage terminal, and the power supply voltage terminal is used to provide a power supply voltage V CC . The second adjustment unit 308 includes a fourth transistor Q4. The control terminal 312 of the fourth transistor Q4 is connected to the second output terminal 306 of the input module 301 for receiving a first signal. The fourth transistor Q4 is used to output a second adjustment signal from its second terminal 314 according to the received first signal. The first terminal 313 of the fourth transistor Q4 is connected to the power supply voltage terminal. The second terminal 214 of the third transistor Q3 is connected to the first terminal 210 of the first transistor Q1, and the second terminal 314 of the fourth transistor Q4 is connected to the first terminal 310 of the second transistor Q2. In this way, the first amplified signal and the corresponding first adjustment signal can be superimposed to obtain a first output signal, and the second amplified signal and the corresponding second adjustment signal can be superimposed to obtain a first output signal. Here, it should be noted that when the first signal is a differential signal, the two adjustment signals output by the adjustment module 403 based on the first signal are also differential signals.

[0073] In some embodiments, the adjustment module further includes a phase adjustment unit to make the adjustment signal have a phase difference from the amplified signal.

[0074] Figure 5 This is the circuit diagram of the fourth power amplifier provided by the embodiments of the present disclosure. As Figure 5 shown, the power amplifier 500 includes an input module 301, an amplification module 302, an adjustment module 503, and an output module 315. Among them, the input module 301, the amplification module 302, and the output module 315 can be referred to Figure 3, which will not be elaborated here. The adjustment module 503 includes a first adjustment unit 504 and a second adjustment unit 505. Among them, the first adjustment unit 504 includes a third transistor Q3 and a first phase adjustment unit 506, and the control terminal 212 of the third transistor Q3 is coupled to the first output terminal 305 through the first phase adjustment unit 506. The second adjustment unit 505 includes a fourth transistor Q4 and a second phase adjustment unit 507, and the control terminal 312 of the fourth transistor Q4 is coupled to the second output terminal 306 through the second phase adjustment unit 507. The first end 213 of the third transistor Q3 is coupled to the first end 210 of the first transistor Q1, the first end 313 of the fourth transistor Q4 is coupled to the first end 310 of the second transistor Q2, and the second end 214 of the third transistor Q3 and the second end 314 of the fourth transistor Q4 are grounded. Here, the first phase adjustment unit 506 and the second phase adjustment unit 507 are used to receive and adjust the first signal transmitted differentially, and output the second signal transmitted differentially. The third transistor Q3 is used to output a first adjustment signal from its first end 213 according to the received second signal, and the fourth transistor Q4 is used to output a second adjustment signal from its first end 313 according to the received second signal. In the embodiments of the present disclosure, the adjustment of the first signal by the first phase adjustment unit 506 and the second phase adjustment unit 507 includes the adjustment of the phase of the first signal. For example, the first signal is inverted.

[0075] In the embodiments of the present disclosure, the first phase adjustment unit 506 and the second phase adjustment unit 507 include an inverter, a phase shifter or a power divider.

[0076] Figure 6 is the circuit diagram of the fifth power amplifier provided by the embodiments of the present disclosure. As Figure 6 shown, the power amplifier 600 includes an input module 301, an amplification module 302, an adjustment module 603 and an output module 315. Among them, the input module 301, the amplification module 302 and the output module 315 can refer to Figure 3, which will not be elaborated here. The adjustment module 603 includes a first adjustment unit 604 and a second adjustment unit 605. Among them, the first adjustment unit 604 includes a third transistor Q3 and a first phase adjustment unit 506. The first end 213 of the third transistor Q3 is coupled to the output end of the first amplification unit 207 via the first phase adjustment unit 506. The second adjustment unit 605 includes a fourth transistor Q4 and a second phase adjustment unit 507. The first end 313 of the fourth transistor Q4 is coupled to the output end of the second amplification unit 307 via the second phase adjustment unit 507. The control end 212 of the third transistor Q3 is coupled to the first output end 305, and the control end 312 of the fourth transistor Q4 is coupled to the second output end 306. The second end 214 of the third transistor Q3 and the second end 314 of the fourth transistor Q4 are grounded. Here, the third transistor Q3 and the fourth transistor Q4 are used to receive the first signal transmitted differentially and output the second signal transmitted differentially. The first phase adjustment unit 506 is used to adjust the phase of the received second signal and then output a first adjustment signal, and the second phase adjustment unit 507 is used to adjust the phase of the received second signal and then output a second adjustment signal. In the embodiments of the present disclosure, the adjustment of the second signal by the first phase adjustment unit 506 and the second phase adjustment unit 507 includes adjusting the phase of the second signal. For example, the second signal is inverted.

[0077] In some embodiments, the amplification module is further configured to receive a first bias signal; the amplification module outputs an amplified signal based on the first bias signal and the first signal; the adjustment module is further configured to receive a second bias signal, and the magnitude of the second bias signal changes with the change of the external ambient temperature; the adjustment module outputs an adjustment signal whose amplitude changes with the external ambient temperature based on the second bias signal and the first signal. In some embodiments, the second bias signal is greater than the first bias signal.

[0078] Reference Figure 3 , the control ends 209 of the first transistor Q1 and 309 of the second transistor Q2 are further configured to receive a first bias signal ( Figure 3 not shown in the figure). Among them, the first transistor Q1 can output a first amplified signal based on the first bias signal and the first signal, and the first bias signal is used to adjust the swing amplitude of the first amplified signal. The second transistor Q2 can output a second amplified signal based on the first bias signal and the first signal, and the first bias signal is used to adjust the swing amplitude of the second amplified signal. The control ends 212 of the third transistor Q3 and 312 of the fourth transistor Q4 are further configured to receive a second bias signal ( Figure 3 not shown in the figure). The third transistor Q3 can output a first adjustment signal based on the second bias signal and the first signal, and the second bias signal is used to adjust the swing amplitude of the first adjustment signal. The fourth transistor Q4 can output a second adjustment signal based on the second bias signal and the first signal, and the second bias signal is used to adjust the swing amplitude of the second adjustment signal.

[0079] Here, the first bias signal and the second bias signal can be provided by an external bias circuit, and the first bias signal and the second bias signal can be current signals or voltage signals.

[0080] In the embodiments of the present disclosure, during the use of the power amplifier 300, the magnitude of the first bias signal remains unchanged. Here, since the magnitude of the first bias signal does not change, the linearity and efficiency of the power amplifier 300 and other indicators are not affected.

[0081] It should be noted that in a normal temperature environment, if the magnitude of the first bias signal remains unchanged, the amplitude of the first amplified signal output by the first transistor Q1 and the amplitude of the second amplified signal output by the second transistor Q2 both remain unchanged. However, when the external environmental temperature decreases, if the magnitude of the first bias signal still remains unchanged, the amplitude of the first amplified signal output by the first transistor Q1 and the amplitude of the second amplified signal output by the second transistor Q2 both increase. Moreover, the more the external environmental temperature decreases, the more the amplitude of the amplified signal increases. Here, it can be understood that in the case where the power amplifier does not include an adjustment module, if the amplitude of the amplified signal increases, the gain of the power amplifier will also increase.

[0082] In the embodiments of the present disclosure, the magnitude of the second bias signal changes with the change of the external environmental temperature. Specifically, the lower the external environmental temperature, the larger the second bias signal; the higher the external environmental temperature, the smaller the second bias signal. Here, since the magnitude of the second bias signal changes with the change of the external environmental temperature, the conduction or cutoff of the third transistor Q3 and the fourth transistor Q4 can be controlled by using different second bias signals at different temperatures. Moreover, in the case where the second bias signal controls the conduction of the third transistor Q3 and the fourth transistor Q4, the magnitudes of the amplitude of the first adjustment signal output by the third transistor Q3 and the amplitude of the second adjustment signal output by the fourth transistor Q4 can also be controlled according to different second bias signals.

[0083] In a specific embodiment, when the external environmental temperature decreases significantly compared to the normal temperature, the amplitude of the first adjustment signal output by the third transistor Q3 is large, and the amplitude of the second adjustment signal output by the fourth transistor Q4 is also large. As a result, the amplitude of the first output signal obtained by superimposing the second amplified signal and the corresponding first adjustment signal is small, and the amplitude of the first output signal obtained by superimposing the first amplified signal and the corresponding second adjustment signal is also small. In this way, the gain of the power amplifier is significantly reduced.

[0084] In another specific embodiment, when the external environmental temperature drops less compared to the normal temperature, the swing of the first adjustment signal output by the third transistor Q3 is small, and the swing of the second adjustment signal output by the fourth transistor Q4 is also small. As a result, the swing of the first output signal obtained by superimposing the second amplified signal and the corresponding first adjustment signal is large, and the swing of the first output signal obtained by superimposing the first amplified signal and the corresponding second adjustment signal is also large. In this way, the gain of the power amplifier decreases less.

[0085] Here, the reduced partial gain can compensate for the gain increment caused by the increase in the swing of the amplified signal due to the drop in the environmental temperature. That is to say, the actual gain of the power amplifier after gain adjustment can be flexibly controlled within a certain threshold range, thereby reducing the difference in gain at different temperatures.

[0086] In the embodiments of the present disclosure, the magnitude of the first bias signal can be smaller than the magnitude of the second bias signal. Exemplarily, the magnitude of the second bias signal can be 1 to 2 times the magnitude of the first bias signal, so that the gain of the third transistor is 0 to 3 dB higher than the gain of the second transistor.

[0087] Under normal circumstances, the first transistor Q1 and the second transistor Q2 in the amplification module can generally be designed in class AB or class B to balance the linearity and efficiency of the power amplifier. In the embodiments of the present disclosure, the third transistor Q3 and the fourth transistor Q4 in the adjustment module are designed in class A, such that the bias signals connected to the third transistor Q3 and the fourth transistor Q4 are higher compared to the first transistor Q1 and the second transistor Q2. In this way, on the one hand, a greater reduction in gain can be achieved, and on the other hand, the third transistor Q3 and the fourth transistor Q4 can complement the first transistor Q1 and the second transistor Q2, thereby enabling the power amplifier to obtain better performance.

[0088] It should be noted that the gain-variable power amplifier provided in the embodiments of the present disclosure can be applied to application scenarios where the external environmental temperature is relatively low (lower than the normal temperature). The gain of this power amplifier can be flexibly adjusted according to the environmental temperature and always stabilized within a certain threshold range, thereby improving the performance of the amplifier.

[0089] An embodiment of the present disclosure provides a power amplifier, including: an amplification module having at least one amplification unit for receiving a radio frequency input signal and outputting an amplified signal; an adjustment module coupled to the amplification module, the adjustment module outputting an adjustment signal based on the radio frequency input signal, and superimposing the adjustment signal on the amplified signal to obtain a first output signal, so as to reduce the gain of the power amplifier. In the embodiment of the present disclosure, by providing an adjustment module in the power amplifier and using the adjustment signal output by the adjustment module to be superimposed on the amplified signal, a first output signal different from the amplified signal is obtained, thereby realizing the adjustment of the gain of the power amplifier. And while realizing the adjustable gain, the balance of other indexes (linearity, efficiency, etc.) of the power amplifier is realized.

[0090] It should be understood that the term "one embodiment" or "an embodiment" mentioned throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of the present disclosure. Therefore, the appearances of the phrase "in one embodiment" or "in an embodiment" throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that in various embodiments of the present disclosure, the order numbers of the above processes do not mean the order of execution. The order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are only for description and do not represent the advantages and disadvantages of the embodiments.

[0091] The above are only the preferred embodiments of the present disclosure, and do not limit the patent scope of the present disclosure. Any equivalent structural transformation made by using the content of the specification and drawings of the present disclosure under the inventive concept of the present disclosure, or direct / indirect application in other related technical fields is included in the patent protection scope of the present disclosure.

Claims

1. A power amplifier, characterized in that, Comprising: An amplification module having at least one amplification unit for receiving a radio frequency input signal and outputting an amplified signal; An adjustment module coupled to the amplification module, the adjustment module outputting an adjustment signal based on the radio frequency input signal, and superimposing the adjustment signal on the amplified signal to obtain a first output signal, so as to reduce the gain of the power amplifier.

2. The power amplifier according to claim 1, wherein The signal at the input end of the adjustment module has the same phase as the signal at the input end of the amplification module, and the signal at the output end of the adjustment module has a phase opposite to that of the signal at the output end of the amplification module, so that the amplitude of the first output signal is smaller than the amplitude of the amplified signal.

3. The power amplifier according to claim 1, wherein The power amplifier further includes: an input module for receiving a radio frequency input signal and outputting a first signal with a phase difference based on the radio frequency input signal through a first output end and a second output end of the input module; The amplification module includes a first amplification unit and a second amplification unit, the first amplification unit and the second amplification unit are respectively connected to the first output end and the second output end, and output a first amplified signal and a second amplified signal; The adjustment module is connected to the first output end and / or the second output end, so that the adjustment signal is superimposed on the first amplified signal and / or the second amplified signal.

4. The power amplifier according to claim 3, characterized in that, The adjustment module includes a first adjustment unit and a second adjustment unit, the first adjustment unit is connected to the first output end and outputs a first adjustment signal based on the first signal; the second adjustment unit is connected to the second output end and outputs a second adjustment signal based on the first signal; The first adjustment signal is superimposed on the first amplified signal or the second amplified signal; The second adjustment signal is superimposed on the second amplified signal or the first amplified signal.

5. The power amplifier according to claim 4, characterized in that, The first adjustment signal and the second adjustment signal have a phase difference from the amplified signal they are superimposed on respectively.

6. The power amplifier according to claim 4, characterized in that, The first adjustment signal and the second adjustment signal are in opposite phases to the amplified signal they are superimposed on respectively.

7. The power amplifier according to claim 3, characterized in that, The first signal input to the adjustment module is in opposite phase to the adjustment signal output by the adjustment module.

8. The power amplifier according to claim 3, wherein The first amplification unit includes a first transistor, the control end of the first transistor is connected to the first output end, the first end of the first transistor is the output end of the first amplification unit, and the second end is grounded; The second amplification unit includes a second transistor, the control end of the second transistor is connected to the second output end, the first end of the second transistor is the output end of the second amplification unit, and the second end is grounded; The adjustment module includes a third transistor and a fourth transistor, the control end of the third transistor is connected to the first output end, and the control end of the fourth transistor is connected to the second output end.

9. The power amplifier according to claim 8, characterized in that The second end of the third transistor is connected to the output end of the first amplification unit, the second end of the fourth transistor is connected to the output end of the second amplification unit, and the first ends of the third transistor and the fourth transistor are connected to the power supply voltage.

10. The power amplifier according to claim 8, wherein The first end of the third transistor is connected to the output end of the second amplification unit, and the first end of the fourth transistor is connected to the output end of the first amplification unit; the second ends of the third transistor and the fourth transistor are grounded.

11. The power amplifier according to claim 8, characterized in that, The adjustment module further includes a phase adjustment unit to make the adjustment signal have a phase difference from the amplification signal.

12. The power amplifier according to claim 11, wherein Through the phase adjustment unit, the control end of the third transistor is connected to the first output end, and the control end of the fourth transistor is connected to the second output end; the first end of the third transistor is connected to the output end of the first amplification unit, and the first end of the fourth transistor is connected to the output end of the second amplification unit; Alternatively, through the phase adjustment unit, the first end of the third transistor is connected to the output end of the first amplification unit, and the first end of the fourth transistor is connected to the output end of the second amplification unit.

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