A parallel control method for inverters

Abstract

The present application is applicable to the field of inverter technology and provides a parallel control method for inverters, the method comprising: after a plurality of inverters are powered on and the parallel task is started, obtaining the time base counter register EPWM count value and the real-time clock RTC time value in the plurality of inverters. Afterwards, based on the EPWM count value and the RTC time value, the controller area network CAN communication extension frame of each inverter is determined. Then, according to the CAN communication extension frame of each inverter, a master inverter and a plurality of slave inverters are determined from the plurality of inverters, and CAN communication addresses are allocated to the plurality of slave inverters through the master inverter. This method realizes the determination of the master-slave relationship of the inverter and the automatic allocation of the CAN communication address, thereby avoiding the tedious manual allocation of the master-slave address and effectively reducing the conflict of the communication address.

Description

Technical Field

[0001] The present application belongs to the technical field of inverters, and in particular relates to a parallel control method of inverters. Background Art

[0002] Currently, inverters are a crucial component of photovoltaic energy storage systems. They store energy generated by photovoltaic solar panels in batteries for emergency power, can be used directly for household appliances, and can sell this energy to the grid for subsidies during peak hours. To achieve higher power, higher-power inverters can be purchased, but these are often more expensive. Alternatively, multiple, more affordable, lower-power inverters can be stacked together, achieving high-power output through parallel inverter technology. However, this process requires determining the master-slave relationship. Inverters typically communicate using the Controller Area Network (CAN), so addresses must be unique. Only one master is allowed, and the number of connected slaves ranges from 0 to 255. All inverters have unique device addresses, operating under the master. Therefore, determining the master-slave relationship and assigning addresses is crucial.

[0003] Traditionally, paralleling inverters involves setting unique addresses using DIP switches or sending addresses via a display screen. The master-slave relationship between the inverters is determined by the size of the device addresses, and these addresses are used as CAN communication addresses for communication. This requires either professional assistance or an instruction manual explaining how to set addresses. Furthermore, to avoid address conflicts, the addresses of other devices must be known during setup, making these operations very cumbersome and prone to accidental contact, causing device addresses to change, potentially causing system errors. Summary of the Invention

[0004] The embodiment of the present application provides a parallel control method for inverters, which can solve the problems of cumbersome operation and communication address conflicts caused by the traditional inverters often setting a unique address through manual address dial switches or issuing addresses through display screens during the parallel process.

[0005] In a first aspect, an embodiment of the present application provides a parallel control method for inverters, the method comprising:

[0006] After the plurality of inverters are powered on and the paralleling task is started, the count values ​​of the time base counter registers EPWM and the time values ​​of the real-time clocks RTC in the plurality of inverters are obtained;

[0007] Determining a controller area network (CAN) communication extended frame for each inverter based on an EPWM count value and an RTC time value;

[0008] Determining a master inverter and a plurality of slave inverters from the plurality of inverters according to the CAN communication extended frame of each of the inverters;

[0009] CAN communication addresses are allocated to the plurality of slave inverters by the master inverter.

[0010] In a possible implementation of the first aspect, the CAN communication extended frame includes a CAN address value and a CAN data segment value; wherein the CAN address value includes a CAN low-order extended frame address value, and the CAN data segment value includes a first data segment value and a second data segment value;

[0011] The determining of the controller area network (CAN) communication extended frame of each inverter based on the EPWM count value and the RTC time value includes:

[0012] Using the EPWM count value as the CAN low-order extended frame address value in the CAN address value;

[0013] Using the RTC time value of the inverter as the first data segment value in the CAN data segment value;

[0014] The second data segment value in the CAN data segment value is set as a preset segment value.

[0015] In a possible implementation of the first aspect, determining a master inverter and multiple slave inverters from the multiple inverters according to the CAN communication extended frame of each inverter includes:

[0016] Sorting the CAN low-order extended frame address values ​​in the CAN address values ​​of the multiple inverters in ascending order to obtain sorting results corresponding to the multiple inverters;

[0017] The inverter corresponding to the CAN low-order extended frame address value that is first in the sorting result is determined as the master inverter, and the inverters corresponding to the remaining CAN low-order extended frame address values ​​are determined as the slave inverters.

[0018] In a possible implementation of the first aspect, allocating CAN communication addresses to the plurality of slave inverters by the master inverter includes:

[0019] After determining the master inverter and the plurality of slave inverters, sending a slave data frame to the slave inverters through the master inverter, wherein the slave data frame includes a CAN address value and a slave CAN data segment value of the slave inverter;

[0020] The CAN communication addresses of the multiple slave inverters are determined according to the CAN address value of the slave inverter and the slave CAN data segment value; wherein, the CAN address value of the slave inverter and the first data segment value in the slave CAN data segment value remain unchanged, and the second data segment value in the slave CAN data segment value is determined according to the size order of the CAN low-order extended frame address value of the slave inverter in the sorting result.

[0021] In a possible implementation of the first aspect, after determining the host inverter, when the second inverter is connected again, the method includes:

[0022] Receiving, through the host inverter, a CAN low-bit extended frame address value in a CAN communication extended frame of the second inverter;

[0023] Comparing the CAN low-bit extended frame address value of the host inverter with the CAN low-bit extended frame address value of the second inverter;

[0024] If the CAN low-bit extended frame address value of the master inverter is greater than the CAN low-bit extended frame address value of the second inverter, determining that the second inverter is the updated master inverter, and changing the master inverter to a slave inverter;

[0025] If the CAN low-order extended frame address value of the master inverter is smaller than the CAN low-order extended frame address value of the second inverter, the second inverter is determined to be a slave inverter, and the master inverter remains unchanged.

[0026] In a possible implementation of the first aspect, after determining the host inverter, when the third inverter and the fourth inverter are simultaneously connected again, the method further includes:

[0027] Receiving, through the host inverter, the CAN communication extended frame of the third inverter and the CAN communication extended frame of the fourth inverter;

[0028] If the CAN low-order extended frame address value in the CAN communication extended frame of the third inverter is the same as the CAN low-order extended frame address value in the CAN communication extended frame of the fourth inverter, then comparing the CAN data segment value in the CAN communication extended frame of the third inverter with the CAN data segment value in the CAN communication extended frame of the fourth inverter;

[0029] If the first data segment value in the CAN data segment value of the third inverter is less than the first data segment value in the CAN data segment value of the fourth inverter, a third slave data frame is sent to the third inverter through the master inverter to determine the CAN communication address of the third inverter based on the third slave data frame; and an address conflict data frame is sent to the fourth inverter so that the fourth inverter changes the CAN low-order extended frame address value in the CAN communication extended frame of the fourth inverter according to the address conflict data frame.

[0030] In a possible implementation manner of the first aspect, after allocating CAN communication addresses to the plurality of slave inverters by the master inverter, the method includes:

[0031] A dynamic address table is generated according to the master inverter, the multiple slave inverters and the CAN communication address, wherein the dynamic address table includes the CAN communication address of the master inverter, the CAN communication addresses of the multiple slave inverters and the address priorities of the multiple slave inverters.

[0032] In a possible implementation of the first aspect, after generating the dynamic address table, the method further includes:

[0033] The dynamic address table is sent to the online slave inverter through the master inverter in a first preset time period, so that after receiving the dynamic address table, the online slave inverter obtains its own address priority according to the dynamic address table and sends reply information to the master inverter, wherein the reply information is used to indicate that the slave inverter is in an online state.

[0034] In a possible implementation of the first aspect, after the master inverter sends the dynamic address table to the online slave inverter within the first preset time period, the method further includes:

[0035] If the master inverter does not receive the reply information from the slave inverter, it is determined that the slave inverter is in an offline state, and the information of the slave inverter in the dynamic address table is cleared to obtain an updated dynamic address table.

[0036] In a possible implementation of the first aspect, after generating the dynamic address table, the method further includes:

[0037] If the slave inverter does not receive the dynamic address table sent by the master inverter within a second preset time period, it is determined that the master inverter is in an offline state, and the slave inverter with the highest address priority is changed to a new master inverter.

[0038] In a second aspect, an embodiment of the present application provides a parallel control device for inverters, comprising:

[0039] An acquisition module is used to acquire the count value of the time base counter register EPWM and the time value of the real-time clock RTC in the multiple inverters after the multiple inverters are powered on and the parallel task is started;

[0040] A generating module, configured to determine a controller area network (CAN) communication extended frame of each inverter based on an EPWM count value and an RTC time value;

[0041] a determination module, configured to determine a master inverter and a plurality of slave inverters from the plurality of inverters according to the CAN communication extended frame of each of the inverters;

[0042] A distribution module is used to distribute CAN communication addresses to the plurality of slave inverters through the master inverter.

[0043] In a third aspect, an embodiment of the present application provides a terminal device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the parallel control method of the inverter described in any one of the above items when executing the computer program.

[0044] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the parallel control method of the inverter described in any one of the above items is implemented.

[0045] In a fifth aspect, an embodiment of the present application provides a computer program product, which, when executed on a terminal device, enables the terminal device to execute the inverter parallel control method described in any one of the above-mentioned first aspects.

[0046] Compared with the prior art, the embodiments of the present application have the following beneficial effects:

[0047] An embodiment of the present application provides a parallel control method for inverters, comprising: after powering on multiple inverters and initiating a parallel task, obtaining an EPWM count value and a real-time clock (RTC) time value in the multiple inverters. Subsequently, based on the EPWM count value and the RTC time value, determining a controller area network (CAN) communication extended frame for each inverter. Then, based on the CAN communication extended frame of each inverter, determining a master inverter and multiple slave inverters from the multiple inverters, and assigning CAN communication addresses to the multiple slave inverters via the master inverter. This method calculates the CAN communication extended frame by obtaining the EPWM count value and the RTC time value. The address fields in the CAN communication extended frame are compared bit by bit at the physical layer of the CAN bus. The node with the smallest value in the arbitration address field wins, obtains address allocation rights, and is designated as the master inverter. This method achieves the determination of the master-slave relationship between the inverters and the automatic assignment of CAN communication addresses, thereby avoiding the tedious manual allocation of master and slave addresses and effectively reducing communication address conflicts. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0049] Figure 1 This is a flow chart of a parallel control method for inverters provided in one embodiment of the present application;

[0050] Figure 2 is a flow chart of a parallel control method for inverters provided in another embodiment of the present application;

[0051] Figure 3 is a flow chart of a parallel control method for inverters provided in another embodiment of the present application;

[0052] Figure 4 is a flow chart of a parallel control method for inverters provided in another embodiment of the present application;

[0053] Figure 5 1 is a schematic structural diagram of a parallel control device for inverters provided in one embodiment of the present application;

[0054] Figure 6 This is a structural diagram of a terminal device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0055] In the following description, specific details such as specific system structures and techniques are provided for purposes of illustration rather than limitation to facilitate a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid obscuring the description of the present application with unnecessary detail.

[0056] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections thereof.

[0057] It will also be understood that the term "and / or" used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0058] As used in this specification and the appended claims, the term "if" can be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.

[0059] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0060] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0061] See also Figure 1 , Figure 11 is a flow chart of a parallel control method for inverters provided in one embodiment of the present application. The method includes:

[0062] S11 . After the multiple inverters are powered on and the paralleling task is started, the count values ​​of the time base counter registers EPWM and the time values ​​of the real-time clocks RTC in the multiple inverters are obtained.

[0063] S12: Determine a controller area network (CAN) communication extended frame of each inverter based on the EPWM count value and the RTC time value.

[0064] S13. Determine a master inverter and multiple slave inverters from the multiple inverters according to the CAN communication extended frame of each inverter.

[0065] S14. Allocate CAN communication addresses to multiple slave inverters through the master inverter.

[0066] It should be noted that this method can be applied to a parallel inverter system to control the parallel process. A parallel inverter system consists of multiple inverters connected electrically or by communication, enabling them to work together to supply power to a load or output power to the grid. Specifically, after multiple inverters are connected in parallel, their outputs are directly connected to the same load or grid, forming a distributed power supply network with shared output voltage and current. The reliability, flexibility, and efficiency of the parallel inverter system can be improved through redundancy, capacity expansion, or load balancing.

[0067] It should be noted that, in this embodiment, the execution entity may be a terminal device such as a server, and there is no specific limitation on this.

[0068] In a parallel inverter system, it is usually necessary to control the enhanced pulse width modulator (EPWM), and a real-time clock (RTC) is also indispensable. The enhanced pulse width modulator is a peripheral module that generates complex pulse width modulation signals. The real-time clock is an independent timing module in the system that can provide a high-precision time base for timestamp or synchronization operations. The EPWM count value can be combined with the EPWM count value of the real-time clock to eliminate the influence of clock drift between different inverters and ensure accurate time synchronization. Therefore, in this embodiment, the master-slave relationship of the parallel inverters and the automatic allocation of CAN communication addresses of the Controller Area Network (CAN) can be achieved by combining the EPWM count value of the enhanced pulse width modulator and the RTC time value of the real-time clock.

[0069] It's important to note that during system operation, the system's EPWM, CAN, and other functions are initialized. For example, the EPWM is configured, with its frequency set to a preset frequency (e.g., 20 kHz) and increment / decrement counting mode. After EPWM initialization, the time-base synchronization clock (TBCLK) is immediately turned on. This clock serves as the operating clock for the EPWM's peripherals. The RTC is also started after initialization. CAN communication is also configured using extended frames (e.g., 29 bits). CAN mailbox numbers with smaller numbers have higher priority, and the receive and transmit mailbox numbers are configured based on actual needs.

[0070] The Controller Area Network (CAN) is a serial communication protocol bus designed for real-time applications. The CAN bus typically transmits data in the form of messages, which are typically transmitted via frames, known as CAN extension frames. CAN extension frames identify the message type and priority. Arbitration using identifiers within CAN extension frames resolves bus access collisions, ensuring that both messages and time are not lost.

[0071] On the CAN bus, devices communicate using broadcast communication, sending data from one node to another. When a node wants to send data, it sends the data and an identifier to its CAN chip, prompting it to enter the preparation phase. Once the CAN chip receives the bus assignment, it enters the message sending phase, assembling the data into a specified message format (i.e., an extended CAN communication frame). Meanwhile, other nodes on the network are in the receiving phase, testing the received message to determine whether it is intended for them.

[0072] Typically, such complex inverter parallel systems run on real-time operating systems (RTOs), such as MicroC / OS-II, which include basic functions such as task scheduling, task management, time management, memory management, and inter-task communication and synchronization. Assuming that multiple tasks are scheduled to run in this system, when the task switches to the parallel task, the system immediately obtains the count value of the time base counter register (i.e., the EPWM count value (EPwm1Regs.TBCTR)) and the current real-time clock (RTC) time value, and saves these two values.

[0073] The EPWM count value is the value obtained by counting the clock signals of the EPWM peripheral clock time base synchronization clock under a specific time base. The EPWM count value generally ranges from 0 to the period of the time base synchronization clock. The RTC time value is the time of the timing clock RTC.

[0074] It should be noted that the EPWM count value and RTC time value are generally updated in the following three situations: (1) after the inverter is powered on, the EPWM count value and RTC time value are obtained once when the program runs to the parallel task; (2) when the inverter exits the parallel state and reconnects to the parallel system, the identifier is initialized and re-acquired; (3) when the unique identifiers of the inverters conflict and random value processing is required, the EPWM count value and RTC time value will not change in other situations, thereby ensuring the unique identification of the inverter.

[0075] Because there are multiple tasks switching and running in the parallel system of inverters, when a task with a higher priority is in the ready state, it will preemptively run, and there are also multiple interrupts during the operation of the system, resulting in different timing from the time each inverter is powered on to the time of reading, and thus different times for obtaining the RTC. Therefore, in this embodiment, the probability of obtaining the same EPWM count value for each inverter is extremely small, and the RTC time value of each inverter is also different. Therefore, the EPWM count value and the RTC time value can be used as the unique identifier of each inverter.

[0076] Assume that the control chip frequency of the inverter parallel system is 90MHz and the EPWM frequency is 20kHz. Using the increment and decrement calculation method, the EPWM count ranges from 0 to 2250. The binary representation of 2250 is 100011001010, for a total of 12 bits. In the RTC time value, minutes are represented by 0-59, with 59 represented by 111011 in binary; seconds are represented by 0-59, with 59 represented by 111011 in binary. The maximum minute and second combination is 11101111011, for a total of 12 bits. Assuming the global variables g_CanIdValue and g_RtcData, then g_CanIdValue = EPwm1Regs.TBCTR and g_RtcData = the RTC time value. The EPWM count and RTC time values ​​are stored in these global variables.

[0077] Further, in step S12, the CAN communication extended frame includes a CAN address value and a CAN data segment value; wherein the CAN address value includes a CAN low-order extended frame address value, and the CAN data segment value includes a first data segment value and a second data segment value.

[0078] Based on the EPWM count value and RTC time value, the controller area network (CAN) communication extended frame of each inverter is determined, including:

[0079] The EPWM count value is used as the CAN low-order extended frame address value in the CAN address value.

[0080] The RTC time value of the inverter is used as the first data segment value in the CAN data segment value.

[0081] The second data segment value in the CAN data segment value is set to a preset segment value.

[0082] After powering on, multiple inverters broadcast an address data frame carrying a unique device identifier, known as a CAN communication extended frame. In this embodiment, the CAN communication extended frame structure contains a 32-bit CAN address value (CANID) and an 8-byte CAN data segment value. Bits 0-15 of the CAN address value represent the CAN low-order extended frame address value, bits 16-17 represent the CAN high-order extended frame address value, and bits 18-28 represent the CAN standard frame address value, as shown in the following code. The CAN low-order extended frame address value can be used to identify the inverter.

[0083] The structure of the CAN communication extended frame is as follows:

[0084] typedef union

[0085] {

[0086] uint32_t CanId;

[0087] struct

[0088] {

[0089] uint16_tEXTMSGID_L:16; / / 15:0

[0090] uint16_tEXTMSGID_H:2; / / 17:16

[0091] uint16_tSTDMSGID:11; / / 28:18

[0092] uint16_tAAM:1; / / 29

[0093] uint16_tAME:1; / / 30

[0094] uint16_tIDE:1; / / 31

[0095] }BIT;

[0096] } sTCanId;

[0097] sTCanId g_canId.

[0098] The CAN address value (CanId = g_canId.CanId) can be used as the unique device identifier for each inverter. That is, g_canId.BIT.EXTMSGID_L = g_CanIdValue = EPwm1Regs.TBCTR.

[0099] In this embodiment, the format of the CAN communication extended frame is: CAN address value + CAN data segment value, that is:

[0100] CANID+(uint16_t)data0+(uint16_t)data1+(uint16_t)data2+(uint16_t)data3;

[0101] CANID=g_canId.CanId; data0=g_RtcData; data1=0x00; data2=0x00; data3=0x00.

[0102] Among them: CANID represents the CAN address value; data0~data3 represent the CAN data segment value.

[0103] In this embodiment, the CAN communication extended frame for each inverter is determined based on the EPWM count value and the RTC time value. The specific process is as follows: The inverter's EPWM count value (EPwm1Regs.TBCTR) is used as the CAN low-order extended frame address value (g_canId.BIT.EXTMSGID_L) in the CAN address value. That is, the CAN low-order extended frame address value and the EPWM count value are equal, that is, g_canId.BIT.EXTMSGID_L = EPwm1Regs.TBCTR. The inverter's RTC time value (g_RtcData) is used as the first data segment value (data0) in the CAN data segment value, that is, data0 = g_RtcData. Furthermore, the second data segment value (data1) in the CAN data segment value is set to a preset segment value, which is a pre-set value, such as data1 = 0x00.

[0104] Furthermore, in step S13, after determining the CAN communication extended frame of each inverter, a master inverter and multiple slave inverters can be determined from the multiple inverters according to the CAN communication extended frame of each inverter, including:

[0105] The CAN low-order extended frame address values ​​in the CAN address values ​​of the multiple inverters are sorted in ascending order to obtain sorting results corresponding to the multiple inverters.

[0106] The inverter corresponding to the CAN low-order extended frame address value that is ranked first in the sorting result is determined as the master inverter, and the inverters corresponding to the remaining CAN low-order extended frame address values ​​are determined as slave inverters.

[0107] The master inverter is the inverter in a parallel system responsible for global control functions such as task scheduling, parameter synchronization, and fault aggregation. For example, in a photovoltaic system, the master inverter can coordinate the maximum power point tracking strategy of multiple slave inverters. In this embodiment, the master inverter can send control commands to the slave inverters via the CAN bus and receive status information feedback from the slave inverters. Slave inverters are inverters other than the master inverter in the parallel system of inverters. They can execute tasks issued by the master inverter and provide status information to the master inverter.

[0108] Specifically, the CAN low-order extended frame address value is first extracted from the CAN address value of each inverter. Then, the CAN low-order extended frame address values ​​of each inverter are sorted in ascending order to obtain a sorting result. Finally, the inverter corresponding to the CAN low-order extended frame address value that ranks first in the sorting result is designated as the master inverter. That is, the inverter with the smallest CAN low-order extended frame address value is designated as the master inverter. The remaining inverters are then designated as slave inverters.

[0109] Furthermore, the corresponding inverters may be determined as slave inverter 1, slave inverter 2, etc. in sequence according to the order of the CAN low-order extended frame address values ​​in the sorting result.

[0110] It should be understood that address sorting can ensure that the master and slave roles are unique and fixed, avoiding system chaos caused by competition. In addition, the smallest address priority rule is simple and efficient, and does not require additional negotiation protocols.

[0111] In step S14, after a master inverter and multiple slave inverters are determined from the multiple inverters, the master inverter can assign CAN communication addresses to the multiple slave inverters. The CAN communication address is an address used to identify a node in a CAN network. In this embodiment, it can be used as the address of each slave inverter so that each slave inverter knows its slave role.

[0112] Furthermore, the master inverter allocates CAN communication addresses to the plurality of slave inverters, including:

[0113] After the master inverter and the plurality of slave inverters are determined, a slave data frame is sent to the slave inverters via the master inverter, wherein the slave data frame includes a CAN address value and a slave CAN data segment value of the slave inverter.

[0114] The CAN communication addresses of multiple slave inverters are determined based on the CAN address value and the slave CAN data segment value of the slave inverter; wherein the CAN address value of the slave inverter and the first data segment value in the slave CAN data segment value remain unchanged, and the second data segment value in the slave CAN data segment value is determined based on the size order of the CAN low-order extended frame address value of the slave inverter in the sorting result.

[0115] The slave data frame is a CAN data frame sent from the master inverter to the slave inverter. This slave data frame contains the slave inverter's CAN address value and slave CAN data segment value. The slave inverter's CAN address value is the slave inverter's CAN ID, which remains unchanged. The first data segment value in the slave CAN data segment value is the slave inverter's RTC value, which also remains unchanged. However, the second data segment value in the slave CAN data segment value changes. The second data segment value in the slave CAN data segment value of the slave inverter can be determined based on the sorting result obtained by sorting the CAN low-order extended frame address values ​​of each inverter in ascending order. Specifically, the second data segment value is determined based on the order of the slave inverter's CAN low-order extended frame address values ​​in the sorting result.

[0116] For example, there are three inverters: inverter 101, inverter 102, and inverter 103. The order of the CAN low-order extended frame address values ​​for these three inverters is: inverter 101 < inverter 102 < inverter 103. The second data segment values ​​in the CAN data segments of all three inverters are initial values ​​(e.g., data1 = 0x00). After the parallel task is started, it can be determined that inverter 101 is the master inverter, and inverters 102 and 103 are slave inverters. At this time, the second data segment values ​​in the CAN data segments of inverters 102 and 103 are the second data segment values ​​in the slave CAN data segments. Therefore, the second data segment value in the slave CAN data segment of inverter 102 is data1 = 0x01, and the second data segment value in the slave CAN data segment of inverter 103 is data1 = 0x02.

[0117] After determining the master inverter and slave inverter, the master inverter will assign a unique CANID, i.e., CAN communication address, to each slave inverter, and then send the CAN communication address to the corresponding slave inverter so that the slave inverter knows its own slave role and communication address; after receiving the CAN communication address sent by the master inverter, the slave inverter will also configure its own local CAN controller according to the CAN communication address, and then send feedback information to the master inverter.

[0118] It should be understood that by keeping the CAN address value and the first data segment value of the slave inverter unchanged, a stable identification basis is provided for the system, and the second data segment value can be dynamically adjusted according to actual needs, thereby improving the flexibility of the system.

[0119] like Figure 2 As shown, Figure 2 FIG. 1 is a flow chart of a parallel control method for inverters provided in another embodiment of the present application. Figure 2 In the process, first, the system is initialized; then, the EPWM count value (EPwm1Regs.TBCTR) and RTC time value of the inverter are obtained, and the CAN communication extended frame of the inverter is composed according to the EPWM count value and the RTC time value, and the CAN communication extended frame is sent to the CAN bus; then, the g_canId.BIT.EXTMSGID_L value in the CAN communication extended frame is compared; if the g_canId.BIT.EXTMSGID_L value does not conflict, the master-slave relationship of the inverter can be determined (that is, the master inverter and the slave inverter are determined), and then the CAN communication address of each inverter is determined; if the g_canId.BIT.EXTMSGID_L value conflicts, then according to the pre-set conditions, the g_canId.BIT.EXTMSGID_L value is randomly added with a value to change its CAN communication extended frame, and sent to the CAN bus, and then the CAN communication address of each inverter is determined.

[0120] It should be noted that the parallel control method of an inverter provided in this embodiment can be applied in a variety of scenarios. For example, this method can be applied to photovoltaic power generation systems to improve power generation efficiency; it can also be applied to battery energy storage systems to achieve flexible distribution of charging and discharging power; it can also be applied to electric vehicle charging piles to balance the charging voltage of battery packs by outputting large currents.

[0121] It is understood that an embodiment of the present application provides a method for controlling inverters in parallel, comprising: after powering on multiple inverters and initiating a paralleling task, obtaining an EPWM count value and a real-time clock (RTC) time value in the multiple inverters. Subsequently, based on the EPWM count value and the RTC time value, determining a controller area network (CAN) communication extended frame for each inverter. Then, based on the CAN communication extended frame for each inverter, determining a master inverter and multiple slave inverters from the multiple inverters, and assigning CAN communication addresses to the multiple slave inverters via the master inverter. This method calculates the CAN communication extended frame by obtaining the EPWM count value and the RTC time value. The address fields in the CAN communication extended frame are compared bit by bit at the physical layer of the CAN bus. The node with the smallest value in the arbitration address field wins, obtains address allocation rights, and is designated as the master inverter. This method achieves the determination of the master-slave relationship between the inverters and the automatic assignment of CAN communication addresses, thereby avoiding the tedious manual allocation of master and slave addresses and effectively reducing communication address conflicts.

[0122] In one possible implementation, after the master inverter is determined, when the second inverter is connected again, the method includes:

[0123] The host inverter receives the CAN low-bit extended frame address value in the CAN communication extended frame of the second inverter.

[0124] The CAN low-order extended frame address value of the host inverter is compared with the CAN low-order extended frame address value of the second inverter.

[0125] If the CAN low-order extended frame address value of the master inverter is greater than the CAN low-order extended frame address value of the second inverter, the second inverter is determined to be the updated master inverter, and the master inverter is changed to a slave inverter.

[0126] If the CAN low-order extended frame address value of the master inverter is smaller than the CAN low-order extended frame address value of the second inverter, the second inverter is determined to be a slave inverter, and the master inverter remains unchanged.

[0127] like Figure 3 As shown, Figure 3 This is a flow chart of a parallel control method for inverters provided in another embodiment of the present application. Figure 3In the parallel inverter system, after the master inverter (such as master inverter A) has been determined, when the second inverter (such as inverter B) is connected again, inverter B will send its own CAN communication extended frame on the CAN bus when it is powered on. At this time, the host inverter A receives the CAN communication extended frame of inverter B, extracts the CAN low-order extended frame address value (g_canId.BIT.EXTMSGID_L) in the CAN communication extended frame of inverter B, and then arbitrates the CAN low-order extended frame address value of the host inverter A with the CAN low-order extended frame address value of inverter B. That is, the EPWM count value of the host inverter A is compared with the EPWM count value of inverter B.

[0128] Specifically: if the CAN low-order extended frame address value of the host inverter A is greater than the CAN low-order extended frame address value of the inverter B, the inverter B is determined to be the updated host inverter B, and the host inverter A is changed to the slave inverter A. At the same time, the host inverter B sends the slave data frame to the slave inverter A; if the CAN low-order extended frame address value of the host inverter A is less than the CAN low-order extended frame address value of the inverter B, the host inverter A continues to serve as the host inverter, and the inverter B is determined to be the slave inverter B. At the same time, the host inverter A sends the slave data frame to the slave inverter B.

[0129] It should be noted that if multiple inverters are subsequently connected, and all are slave inverters, the number of slave inverters will be incremented by 1, meaning the second data segment value of each slave inverter will be incremented by 1. Continuing with the above example, if slave inverter B's second data segment value data1 = 0x01, and inverter C is subsequently connected and is also a slave inverter, then slave inverter C's second data segment value data1 = 0x02, and so on. The second data segment value can also be used to determine the address priority of the slave inverter.

[0130] In a possible implementation, after the master inverter is determined, when the third inverter and the fourth inverter are connected again simultaneously, the method further includes:

[0131] The CAN communication extended frame of the third inverter and the CAN communication extended frame of the fourth inverter are received through the host inverter.

[0132] If the CAN low-order extended frame address value in the CAN communication extended frame of the third inverter is the same as the CAN low-order extended frame address value in the CAN communication extended frame of the fourth inverter, the CAN data segment value in the CAN communication extended frame of the third inverter is compared with the CAN data segment value in the CAN communication extended frame of the fourth inverter.

[0133] If the first data segment value in the CAN data segment value of the third inverter is less than the first data segment value in the CAN data segment value of the fourth inverter, a third slave data frame is sent to the third inverter through the master inverter to determine the CAN communication address of the third inverter based on the third slave data frame; and an address conflict data frame is sent to the fourth inverter so that the fourth inverter changes the CAN low-order extended frame address value in the CAN communication extended frame of the fourth inverter based on the address conflict data frame.

[0134] like Figure 4 As shown, Figure 4 This is a flow chart of a parallel control method for inverters provided in another embodiment of the present application. Figure 4 In the inverter parallel system, after the host inverter (such as host inverter A) has been determined, when the third inverter (such as inverter C) and the fourth inverter (such as inverter D) are connected at the same time, inverter C and inverter D will send their own CAN communication extended frames on the CAN bus when powered on. At this time, the host inverter A can simultaneously receive the CAN communication extended frames of inverter C and inverter D, extract the CAN low-bit extended frame address value (expressed by g_canId.BIT.EXTMSGID_LC) in the CAN communication extended frame of inverter C and the CAN low-bit extended frame address value (expressed by g_canId.BIT.EXTMSGID_LC) in the CAN communication extended frame of inverter D. nId.BIT.EXTMSGID_LD); Since inverter C and inverter D are powered on at the same time, the g_canId.BIT.EXTMSGID_LC of inverter C is the same as the g_canId.BIT.EXTMSGID_LD of inverter D, that is, the EPWM count value of inverter C is the same as the EPWM count value of inverter D. At this time, the addresses of inverter C and inverter D conflict; then, the CAN data segment value in the CAN communication extended frame of inverter C is compared with the CAN data segment value in the CAN communication extended frame of inverter D, that is, the RTC time value of inverter C is compared with the RTC time value of inverter D. It should be noted that in this embodiment, inverter A remains unchanged as the host inverter, and the number of inverters connected at the same time can be more than two, and more inverters can be connected at the same time. Here, only the example of connecting two inverters at the same time is used for explanation.

[0135] Specifically: if the first data segment value (represented by data0C) in the CAN data segment value of inverter C is less than the first data segment value (represented by data0D) in the CAN data segment value of inverter D, that is, the RTC time value of inverter C is less than the RTC time value of inverter D, then the third slave data frame is sent to inverter C via host inverter A to determine the CAN communication address of inverter C; at the same time, host inverter A performs address modulo operation and adds the address to the address of inverter D. The operation value is used as the data segment content and the host inverter A sends an address conflict data frame (such as data=0xFF) to inverter D. After receiving the address conflict data frame, inverter D changes the CAN low-order extended frame address value in the CAN communication extended frame of inverter D according to the address conflict data frame, so that the address of inverter D and the address of inverter C no longer conflict. Correspondingly, if the first data segment value (represented by data0C) in the CAN data segment value of inverter C is greater than the first data segment value (represented by data0D) in the CAN data segment value of inverter D, a slave data frame is sent to inverter D via host inverter A to determine the CAN communication address of inverter D; at the same time, host inverter A sends an address conflict data frame (such as data=0xFF) to inverter C after a modulo operation, so that after receiving the address conflict data frame, inverter C changes the CAN low-order extended frame address value in the CAN communication extended frame of inverter C according to the address conflict data frame, so that the address of inverter C no longer conflicts with the address of inverter D.

[0136] It should be noted that when the inverter receives an address conflict data frame, it parses it and randomly changes the CAN low-order extended frame address value based on g_canId.BIT.EXTMSGID_L += g_canId.BIT.EXTMSGID_L % 16. After changing the CAN low-order extended frame address value, the inverter resends its updated CAN communication extended frame to continue determining the master-slave relationship and CAN communication address.

[0137] In one possible implementation, after allocating CAN communication addresses to a plurality of slave inverters by the master inverter, the method includes:

[0138] A dynamic address table is generated according to the master inverter, multiple slave inverters and CAN communication addresses, wherein the dynamic address table includes the CAN communication address of the master inverter, the CAN communication addresses of the multiple slave inverters and the address priorities of the multiple slave inverters.

[0139] like Figure 3 、 Figure 4As shown in the figure, after determining the master and slave inverters, the master inverter assigns a unique CAN ID (i.e., CAN communication address) to each slave inverter. It then sends this CAN communication address to the corresponding slave inverter, allowing the slave inverter to identify its own slave role and communication address. After receiving the CAN communication address from the master inverter, the slave inverter also configures its local CAN controller based on the CAN communication address and then sends feedback information to the master inverter. At this point, the master inverter saves each inverter's CAN communication address and the contents of the data segment in a dynamic address table (similar to a heartbeat packet). From this dynamic address table, the master inverter's CAN communication address, the CAN communication addresses of multiple slave inverters, and the address priority of multiple slave inverters can be obtained.

[0140] Among them, the address structure of the dynamic address table is as follows:

[0141] typedef struct

[0142] {

[0143] uint16_t uCanIdAddr;

[0144] uint16_t uCanIdpriority;

[0145] }tsCanAddrInfo.

[0146] Assuming that the maximum number of parallel inverters is 10, the dynamic address table is as follows:

[0147] tsCanAddrInfo CanAddrTable

[10] =

[0148] {

[0149] {0x0000, 0x0000},

[0150] {0x0000, 0x0000}, .......

[0151] {0x0000, 0x0000}

[0152] }.

[0153] It should be understood that by establishing a dynamic address table, the communication address and associated information of each slave inverter can be maintained in real time.

[0154] In a possible implementation, after generating the dynamic address table, the method further includes:

[0155] In a first preset time period, a dynamic address table is sent to an online slave inverter through the master inverter, so that after receiving the dynamic address table, the online slave inverter obtains its own address priority according to the dynamic address table, and sends a reply message to the master inverter, wherein the reply information is used to indicate that the slave inverter is in an online state.

[0156] The first preset time period is a pre-set period of time. After generating the dynamic address table, the master inverter periodically (i.e., during the first preset time period) sends the dynamic address table to the online slave inverters. After receiving the dynamic address table, the slave inverter sends a reply message to the master inverter. This allows the master inverter to know that the slave inverter is online. The slave inverter also uses the dynamic address table to determine its own address priority.

[0157] In a possible implementation, after the master inverter sends the dynamic address table to the online slave inverter within the first preset time period, the method further includes:

[0158] If the master inverter does not receive the reply information from the slave inverter, it determines that the slave inverter is in an offline state, clears the information of the slave inverter in the dynamic address table, and obtains an updated dynamic address table.

[0159] Furthermore, if a slave inverter is in an offline state, the host inverter will not receive the reply information of the slave inverter, so the host inverter can determine that the slave inverter is in an offline state. Then, the host inverter will delete the information about the slave inverter in the dynamic address table, thereby obtaining an updated dynamic address table.

[0160] It should be understood that by deleting the information of the slave inverters in the offline state, the dynamic address table can be kept in a real-time updating state, and the slave inverters in the system can be managed in real time.

[0161] In a possible implementation, after generating the dynamic address table, the method further includes:

[0162] If the slave inverter does not receive the dynamic address table sent by the master inverter within the second preset time period, it is determined that the master inverter is offline, and the slave inverter with the highest address priority is replaced as the new master inverter.

[0163] The second preset time period is a pre-set time period. The second preset time period may be the same as or different from the first preset time period. If the slave inverter does not receive the dynamic address table sent by the master inverter within the second preset time period, it can be determined that the master inverter is offline. Since the slave inverter knows its own address priority, the slave inverter with the highest address priority automatically changes to the master inverter, i.e., becomes the new master inverter.

[0164] It should be understood that by upgrading the slave inverter with the highest address priority to the master inverter, the new master inverter can re-establish the dynamic address table, restore communication with other slave inverters, and execute the control logic of the original master inverter, so that the parallel system of the inverters can operate stably.

[0165] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0166] Corresponding to the parallel control method of an inverter in the above embodiment, Figure 5 A schematic structural diagram of a parallel control device for inverters provided in one embodiment of the present application is shown. For ease of explanation, only the parts related to the embodiment of the present application are shown.

[0167] Reference Figure 5 The inverter parallel control device 3 of this embodiment includes:

[0168] The acquisition module 31 is used to acquire the count value of the time base counter register EPWM and the time value of the real-time clock RTC in the multiple inverters after the multiple inverters are powered on and the parallel task is started.

[0169] The generating module 32 is configured to determine a controller area network (CAN) communication extended frame of each inverter based on the EPWM count value and the RTC time value.

[0170] The determination module 33 is configured to determine a master inverter and a plurality of slave inverters from a plurality of inverters according to the CAN communication extended frame of each inverter.

[0171] The allocation module 34 is configured to allocate CAN communication addresses to multiple slave inverters via the master inverter.

[0172] It will be appreciated that in the inverter parallel control device provided in this embodiment, after the multiple inverters are powered on and the paralleling task is initiated, the inverter parallel control device 3 uses an acquisition module 31 to obtain the EPWM count value and the real-time clock (RTC) time value of the multiple inverters. Subsequently, a generation module 32 determines the controller area network (CAN) communication extended frame for each inverter based on the EPWM count value and the RTC time value. Then, a determination module 33 determines a master inverter and multiple slave inverters from the multiple inverters based on the CAN communication extended frame of each inverter. An allocation module 34 allocates CAN communication addresses to the multiple slave inverters via the master inverter. The parallel control device 3 of the inverter obtains the EPWM count value and the RTC time value to calculate the CAN communication extended frame, and compares the address field in the CAN communication extended frame bit by bit at the physical layer through the CAN bus. The node with the smallest value in the arbitration address field wins and obtains the address allocation right. At the same time, it is used as the master inverter, realizing the master-slave relationship determination of the inverter and the automatic allocation of the CAN communication address, thereby avoiding the tedious manual master-slave address allocation and effectively reducing the conflict of communication addresses.

[0173] Furthermore, the CAN communication extended frame includes a CAN address value and a CAN data segment value; wherein the CAN address value includes a CAN low-order extended frame address value, and the CAN data segment value includes a first data segment value and a second data segment value.

[0174] The generation module 32 specifically includes:

[0175] The first generating subunit is configured to use the EPWM count value as a CAN low-order extended frame address value in the CAN address value.

[0176] The second generating subunit is configured to use the RTC time value of the inverter as the first data segment value in the CAN data segment value.

[0177] The third generating subunit is configured to set the second data segment value in the CAN data segment value as a preset segment value.

[0178] Furthermore, the determination module 33 specifically includes:

[0179] The sorting subunit is used to sort the CAN low-order extended frame address values ​​in the CAN address values ​​of multiple inverters in ascending order to obtain sorting results corresponding to the multiple inverters.

[0180] The determination subunit is used to determine the inverter corresponding to the CAN low-order extended frame address value located first in the sorting result as the master inverter, and to determine the inverters corresponding to the remaining CAN low-order extended frame address values ​​as slave inverters.

[0181] Furthermore, the allocation module 34 specifically includes:

[0182] The first allocation subunit is used to send a slave data frame to the slave inverter through the master inverter after determining the master inverter and multiple slave inverters, wherein the slave data frame includes the CAN address value and the slave CAN data segment value of the slave inverter.

[0183] The second allocation subunit is used to determine the CAN communication addresses of multiple slave inverters based on the CAN address value and the slave CAN data segment value of the slave inverter; wherein the CAN address value of the slave inverter and the first data segment value in the slave CAN data segment value remain unchanged, and the second data segment value in the slave CAN data segment value is determined according to the size order of the CAN low-order extended frame address value of the slave inverter in the sorting result.

[0184] Furthermore, after the host inverter is determined, when the second inverter is connected again, the parallel control device 3 of the inverter includes:

[0185] The first receiving subunit is configured to receive a CAN low-bit extended frame address value in a CAN communication extended frame of the second inverter through the host inverter.

[0186] The first comparison subunit is configured to compare the CAN low-order extended frame address value of the host inverter with the CAN low-order extended frame address value of the second inverter.

[0187] The first determining subunit is used to determine that the second inverter is the updated master inverter if the CAN low-order extended frame address value of the master inverter is greater than the CAN low-order extended frame address value of the second inverter, and change the master inverter to a slave inverter.

[0188] The second determining subunit is configured to determine that the second inverter is a slave inverter and the master inverter remains unchanged if the CAN low-order extended frame address value of the master inverter is smaller than the CAN low-order extended frame address value of the second inverter.

[0189] Furthermore, after the host inverter is determined, when the third inverter and the fourth inverter are connected again at the same time, the parallel control device 3 of the inverter includes:

[0190] The second receiving subunit is configured to receive the CAN communication extended frame of the third inverter and the CAN communication extended frame of the fourth inverter through the host inverter.

[0191] The second comparison subunit is used to compare the CAN data segment value in the CAN communication extended frame of the third inverter with the CAN data segment value in the CAN communication extended frame of the fourth inverter if the CAN low-order extended frame address value in the CAN communication extended frame of the third inverter is the same as the CAN low-order extended frame address value in the CAN communication extended frame of the fourth inverter.

[0192] The second determination subunit is used to send a third slave data frame to the third inverter through the host inverter if the first data segment value in the CAN data segment value of the third inverter is less than the first data segment value in the CAN data segment value of the fourth inverter, so as to determine the CAN communication address of the third inverter according to the third slave data frame; and send an address conflict data frame to the fourth inverter, so that the fourth inverter changes the CAN low-order extended frame address value in the CAN communication extended frame of the fourth inverter according to the address conflict data frame.

[0193] Furthermore, after allocating CAN communication addresses to multiple slave inverters through the master inverter, the parallel control device 3 of the inverters includes:

[0194] The address table generation module is used to generate a dynamic address table according to the master inverter, multiple slave inverters and CAN communication addresses, wherein the dynamic address table includes the CAN communication address of the master inverter, the CAN communication addresses of the multiple slave inverters and the address priorities of the multiple slave inverters.

[0195] Furthermore, after generating the dynamic address table, the parallel control device 3 of the inverter further includes:

[0196] An address table sending module is used to send a dynamic address table to an online slave inverter through a master inverter in a first preset time period, so that the online slave inverter obtains its own address priority according to the dynamic address table after receiving the dynamic address table, and sends reply information to the master inverter, wherein the reply information is used to indicate that the slave inverter is in an online state.

[0197] Furthermore, after the dynamic address table is sent to the online slave inverters via the master inverter in the first preset time period, the parallel control device 3 of the inverters further includes:

[0198] The first status confirmation module is used to determine that the slave inverter is in an offline state if the master inverter does not receive the reply information from the slave inverter, clear the information of the slave inverter in the dynamic address table, and obtain an updated dynamic address table.

[0199] Furthermore, after generating the dynamic address table, the parallel control device 3 of the inverter further includes:

[0200] The second status confirmation module is used to determine that the master inverter is in an offline state if the slave inverter does not receive the dynamic address table sent by the master inverter within a second preset time period, and change the slave inverter with the highest address priority to a new master inverter.

[0201] It should be noted that the information interaction, execution process, etc. between the modules in the parallel control device 3 of the above-mentioned inverter are based on the same concept as the method embodiment of the present application. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.

[0202] The present application also provides a terminal device, such as Figure 6 As shown, Figure 6 This is a schematic diagram of the structure of a terminal device provided in one embodiment of the present application. Figure 6 The terminal device 4 of this embodiment includes: a memory 41, a processor 42, and a computer program stored in the memory 41 and executable on the processor 42. When the processor 42 executes the computer program, the steps of any one of the above-mentioned inverter parallel control method embodiments are implemented.

[0203] An embodiment of the present application further provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.

[0204] An embodiment of the present application provides a computer program product. When the computer program product is run on a mobile terminal, the mobile terminal can implement the steps in the above-mentioned various method embodiments when executing the computer program product.

[0205] If the integrated unit is implemented as a software functional unit and sold or used as a standalone product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application can implement all or part of the process steps in the above-mentioned method embodiments by using a computer program to instruct the relevant hardware. The computer program can be stored in a computer-readable storage medium. When executed by a processor, the computer program can implement the steps of each of the above-mentioned method embodiments. The computer program includes computer program code, which can be in source code form, object code form, executable file, or some intermediate form. Computer-readable media can include at least: any entity or device capable of carrying computer program code to a camera / terminal device, recording media, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signals, telecommunication signals, and software distribution media. Examples include USB flash drives, removable hard drives, magnetic disks, or optical disks. In some jurisdictions, based on legislation and patent practice, computer-readable media cannot be electric carrier signals or telecommunication signals.

[0206] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0207] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0208] In the embodiments provided in this application, it should be understood that the disclosed devices / network equipment and methods can be implemented in other ways. For example, the device / network equipment embodiments described above are merely schematic. For example, the division of modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0209] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0210] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. A parallel control method for inverters, characterized in that: include: After the plurality of inverters are powered on and the paralleling task is started, the count values ​​of the time base counter registers EPWM and the time values ​​of the real-time clocks RTC in the plurality of inverters are obtained; Determining a controller area network (CAN) communication extended frame for each inverter based on an EPWM count value and an RTC time value; Determining a master inverter and a plurality of slave inverters from the plurality of inverters according to the CAN communication extended frame of each of the inverters; CAN communication addresses are allocated to the plurality of slave inverters by the master inverter.

2. The parallel control method of the inverter according to claim 1, characterized in that: The CAN communication extended frame includes a CAN address value and a CAN data segment value; wherein the CAN address value includes a CAN low-order extended frame address value, and the CAN data segment value includes a first data segment value and a second data segment value; The determining of the controller area network (CAN) communication extended frame of each inverter based on the EPWM count value and the RTC time value includes: Using the EPWM count value as the CAN low-order extended frame address value in the CAN address value; Using the RTC time value of the inverter as the first data segment value in the CAN data segment value; The second data segment value in the CAN data segment value is set as a preset segment value.

3. The parallel control method of the inverter according to claim 2, characterized in that: Determining a master inverter and a plurality of slave inverters from the plurality of inverters according to the CAN communication extended frame of each inverter includes: Sorting the CAN low-order extended frame address values ​​in the CAN address values ​​of the multiple inverters in ascending order to obtain sorting results corresponding to the multiple inverters; The inverter corresponding to the CAN low-order extended frame address value that is first in the sorting result is determined as the master inverter, and the inverters corresponding to the remaining CAN low-order extended frame address values ​​are determined as the slave inverters.

4. The parallel control method of inverters according to claim 3, wherein: The allocating CAN communication addresses to the plurality of slave inverters by the master inverter includes: After determining the master inverter and the plurality of slave inverters, sending a slave data frame to the slave inverters through the master inverter, wherein the slave data frame includes a CAN address value and a slave CAN data segment value of the slave inverter; The CAN communication addresses of the multiple slave inverters are determined according to the CAN address value of the slave inverter and the slave CAN data segment value; wherein, the CAN address value of the slave inverter and the first data segment value in the slave CAN data segment value remain unchanged, and the second data segment value in the slave CAN data segment value is determined according to the size order of the CAN low-order extended frame address value of the slave inverter in the sorting result.

5. The parallel control method of inverters according to claim 4, wherein: After determining the host inverter, when the second inverter is connected again, the method includes: Receiving, through the host inverter, a CAN low-bit extended frame address value in a CAN communication extended frame of the second inverter; Comparing the CAN low-bit extended frame address value of the host inverter with the CAN low-bit extended frame address value of the second inverter; If the CAN low-bit extended frame address value of the master inverter is greater than the CAN low-bit extended frame address value of the second inverter, determining that the second inverter is the updated master inverter, and changing the master inverter to a slave inverter; If the CAN low-order extended frame address value of the master inverter is smaller than the CAN low-order extended frame address value of the second inverter, the second inverter is determined to be a slave inverter, and the master inverter remains unchanged.

6. The parallel control method of inverters according to claim 5, wherein: After determining the host inverter, when the third inverter and the fourth inverter are connected again at the same time, the method further includes: Receiving, through the host inverter, the CAN communication extended frame of the third inverter and the CAN communication extended frame of the fourth inverter; If the CAN low-order extended frame address value in the CAN communication extended frame of the third inverter is the same as the CAN low-order extended frame address value in the CAN communication extended frame of the fourth inverter, then comparing the CAN data segment value in the CAN communication extended frame of the third inverter with the CAN data segment value in the CAN communication extended frame of the fourth inverter; If the first data segment value in the CAN data segment value of the third inverter is less than the first data segment value in the CAN data segment value of the fourth inverter, a third slave data frame is sent to the third inverter through the master inverter to determine the CAN communication address of the third inverter based on the third slave data frame; and an address conflict data frame is sent to the fourth inverter so that the fourth inverter changes the CAN low-order extended frame address value in the CAN communication extended frame of the fourth inverter according to the address conflict data frame.

7. The parallel control method for inverters according to any one of claims 1 to 6, characterized in that: After allocating CAN communication addresses to the plurality of slave inverters by the master inverter, the method includes: A dynamic address table is generated according to the master inverter, the multiple slave inverters and the CAN communication address, wherein the dynamic address table includes the CAN communication address of the master inverter, the CAN communication addresses of the multiple slave inverters and the address priorities of the multiple slave inverters.

8. The parallel control method of inverters according to claim 7, wherein: After generating the dynamic address table, the method further includes: The dynamic address table is sent to the online slave inverter through the master inverter in a first preset time period, so that after receiving the dynamic address table, the online slave inverter obtains its own address priority according to the dynamic address table and sends reply information to the master inverter, wherein the reply information is used to indicate that the slave inverter is in an online state.

9. The parallel control method of inverters according to claim 8, wherein: After the master inverter sends the dynamic address table to the online slave inverter in the first preset time period, the method further includes: If the master inverter does not receive the reply information from the slave inverter, it is determined that the slave inverter is in an offline state, and the information of the slave inverter in the dynamic address table is cleared to obtain an updated dynamic address table.

10. The parallel control method of inverters according to claim 9, wherein: After generating the dynamic address table, the method further includes: If the slave inverter does not receive the dynamic address table sent by the master inverter within a second preset time period, it is determined that the master inverter is in an offline state, and the slave inverter with the highest address priority is changed to a new master inverter.

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