A method, device, equipment and storage medium for cutting layout and layout file

Abstract

The present invention relates to a method, device, equipment and storage medium for clipping a layout and layout file. The method comprises: obtaining a layout, determining a clipping object and a target clipping area of the layout; using the top-level structure in the clipping object as an entry structure; using the entry structure as a root node, based on a reference relationship, obtaining structures one by one for processing, obtaining graphic tasks to be clipped of the structure and sequentially adding them to a graphic queue; when it is detected that there are graphic tasks in the graphic queue and there are idle threads that can be assigned, assigning a thread to process the graphic tasks, including: retaining, deleting or clipping pixels of the pixel set based on the clipping area; after completing the processing of all graphic tasks in the graphic queue, obtaining a target structure as a clipping result. By optimizing the clipping strategy and algorithm design, the efficiency of layout clipping is significantly improved and the memory used in the clipping process is reduced.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuit design and manufacturing, and in particular relates to a method, device, equipment and storage medium for cutting a layout and a layout file. Background Art

[0002] In the semiconductor industry, chip layout design runs through the entire integrated circuit design and manufacturing process and is a critical step in ensuring device functionality, performance, and reliability. At various stages of layout design, such as design rule checking (DRC), optical proximity correction (OPC), and other manufacturing process simulation analysis, it is often necessary to cut large layouts into smaller sections according to specific rules to facilitate subsequent parallel processing and accelerated computing.

[0003] However, as chip process nodes continue to shrink, layout complexity and scale are rapidly increasing, making layout cutting efficiency a bottleneck in the design process. Inefficient cutting methods can lead to wasted computing resources, data processing delays, and even affect the design cycle. To address this challenge, the industry is increasingly focusing on optimizing and improving the efficiency of cutting algorithms, aiming to achieve faster and more accurate layout segmentation.

[0004] In the prior art, when cropping a chip layout, most methods use a flattening-then-cropping approach. That is, the hierarchical layout containing a multi-level structure is first flattened into a planar layout, and then cropped using methods such as Boolean And. Although this method can ensure the integrity of the cropping results, it has obvious shortcomings in terms of performance and resource usage, and the overall flattening-then-cropping process takes a long time. Since the flattening process requires all levels to be unfolded and a huge amount of data to be processed, the flattening process itself is slow. In addition, the amount of layout data after flattening increases sharply, requiring the cropping algorithm to process massive amounts of data, which greatly prolongs the cropping time. In addition, these two processes are difficult to parallelize and cannot meet the requirements of efficient parallel processing.

[0005] The scale of the layout data obtained by flattening is huge, which puts a huge burden on the system memory resources and easily causes problems such as insufficient memory or data exchange bottlenecks, especially when processing large-scale layouts.

[0006] At more sophisticated process nodes, the scale and complexity of the layout continue to increase, and the flattening operation further increases the burden on the system, making traditional methods face severe challenges in practical applications.

[0007] Therefore, the existing flattening and then trimming method can no longer meet the semiconductor industry's demand for fast and efficient layout processing. A new trimming method is needed to improve overall performance, reduce memory overhead, and adapt to more complex design rules and advanced processes. Summary of the Invention

[0008] In order to solve all or part of the problems of the above-mentioned prior art, the present invention provides a method, device, computer equipment and computer-readable storage medium for cutting layouts and layout files by optimizing the cutting process, significantly improving the efficiency of cutting layouts and reducing the memory used in the process.

[0009] In a first aspect, this embodiment provides a layout cutting method, including:

[0010] Acquire a layout, and determine a cropping object and a target cropping area of the layout;

[0011] Using the top-level structure in the clipping object as the entry structure;

[0012] Taking the entry structure as the root node, based on the reference relationship, structures are retrieved and processed one by one to obtain the graphics tasks to be clipped for the structure and sequentially added to the graphics queue; wherein the graphics tasks include the pixel set of the structure and the clipping area, and the clipping area is obtained based on the positional relationship of the structure relative to the entry structure and the target clipping area;

[0013] When it is detected that there is a graphics task in the graphics queue and there is an allocable idle thread, the thread is allocated to process the graphics task, including: retaining, deleting or cropping pixels of the pixel set based on the cropping area;

[0014] After completing the processing of all graphics tasks in the graphics queue, a target structure as a clipping result is obtained.

[0015] In some embodiments, the entry structure is used as the root node, and based on the reference relationship, structures are obtained one by one for processing, and the graphics tasks to be clipped of the structures are obtained and added to the graphics queue in sequence; including:

[0016] Create a structure task based on the entry structure and add it to the structure queue to be cut;

[0017] The creating structure task includes: adding a copy of the structure and a placement matrix as a structure task to be cut into a structure queue; wherein the placement matrix is used to represent the positional relationship of the structure relative to the entrance structure;

[0018] Obtaining a structure task in a structure queue for processing, including: the structure task includes a copy of the current structure and a placement matrix, obtaining a clipping area based on the placement matrix and a target clipping area; creating a graphics task to be clipped using a pixel set of the current structure and the clipping area and adding it to a graphics queue; and processing a substructure of the current structure based on the clipping area, including: retaining, deleting, or creating a new structure task and adding it to the structure queue.

[0019] In some embodiments, after completing processing of all graphics tasks in the graphics queue, obtaining a target structure as a clipping result includes:

[0020] After completing the processing of all structure tasks in the structure queue and all graphics tasks in the graphics queue, a hierarchical structure with the copy of the entry structure as the root node is obtained as the target structure of the clipping result.

[0021] In some embodiments, the layout clipping method supports multi-threaded parallel processing, and the threads include:

[0022] The monitoring thread is used to detect whether there are graphics tasks in the graphics queue and assign graphics tasks to idle threads;

[0023] Graphics thread, used to obtain graphics tasks in the graphics queue for processing;

[0024] The structure thread is used to obtain the structure tasks from the structure queue for processing.

[0025] In some of these embodiments, a copy of a structure placed in a structure queue is obtained by making a shallow copy of the structure.

[0026] In some embodiments, the target cropping area is a rectangular area.

[0027] In some embodiments, obtaining the clipping region based on the placement matrix and the target clipping region includes:

[0028] The target clipping area is inversely transformed using the placement matrix to obtain the clipping area.

[0029] In some embodiments, the obtaining of structure tasks in the structure queue for processing specifically includes:

[0030] The structure task includes a copy of the current structure and a placement matrix;

[0031] Get the clipping area based on the placement matrix and the target clipping area;

[0032] Acquire all pixels of the current structure as a pixel set, and add the pixel set of the current structure and the clipping area as graphics tasks to be clipped into a graphics queue;

[0033] Obtain all reference relationships of the current structure, obtain substructures of the current structure based on the reference relationships, calculate the bounding box of the substructure, and determine the relationship between the bounding box and the clipping area:

[0034] If the bounding box is completely contained by the clipping area, no processing is performed, that is, the reference relationship is retained in the current structure;

[0035] If the bounding box does not intersect with the clipping area, deleting the reference relationship in the current structure;

[0036] If the bounding box partially intersects with the clipping area, the copy of the substructure and the placement matrix are added to the structure queue as a new structure task; the reference relationship is deleted in the current structure, and a new reference relationship is generated to point to the copy of the substructure.

[0037] In some embodiments, adding the copy of the substructure and the placement matrix as a new structure task to a structure queue includes:

[0038] The placement matrix of the substructure is calculated by using the placement matrix of the current structure and the transformation matrix corresponding to the reference relationship.

[0039] In some embodiments, assigning a thread to process the graphics task includes:

[0040] The graphics task includes a pixel set and a clipping region;

[0041] Calculate the bounding boxes of the pixels in the pixel set respectively, and determine the relationship between the bounding boxes and the clipping area:

[0042] If the bounding box is contained in the clipping region, retaining the pixel in the pixel set;

[0043] If the bounding box does not intersect with the clipping area, deleting the pixel from the pixel set;

[0044] If the bounding box partially intersects with the cropping area, an intersection graph of the pixel and the cropping area is calculated, the pixel is deleted from the pixel set, and the intersection graph is added to the pixel set.

[0045] In a second aspect, a layout cutting device is provided in this embodiment, the device comprising:

[0046] An acquisition module is used to acquire a layout, determine a clipping object and a target clipping area of the layout; and use the top-level structure in the clipping object as an entry structure;

[0047] a structure processing module, configured to use the entry structure as a root node and, based on reference relationships, retrieve and process structures one by one, obtain graphics tasks to be clipped for the structures, and sequentially add them to a graphics queue; wherein the graphics tasks include a pixel set and a clipping region of the structure, and the clipping region is obtained based on the positional relationship of the structure relative to the entry structure and a target clipping region;

[0048] a graphics task processing module, configured to, when detecting that there is a graphics task in the graphics queue and there is an allocable idle thread, allocate a thread to process the graphics task, including: retaining, deleting, or cropping pixels of the pixel set based on a cropping region;

[0049] The output module is used to obtain a target structure output as a clipping result after completing the processing of all graphics tasks in the graphics queue.

[0050] In a third aspect, this embodiment provides a layout file clipping method, including:

[0051] Read the original layout file into memory;

[0052] Using the layout cropping method described in the first aspect above, cropping the layout in memory to obtain a target structure;

[0053] The target structure is written out into a target layout file as a cropping result.

[0054] In some embodiments, reading the original layout file into memory includes:

[0055] Record the structure in the original layout file, and the starting position and ending position in the original layout file.

[0056] In some embodiments, writing the target structure into a target layout file as a cropping result includes:

[0057] For the original structure in the target structure, using the original structure at the starting position and the ending position of the original layout file, copying the original structure from the original layout file to the target layout file;

[0058] The original structure refers to a structure that exists completely in both the target structure and the original layout file.

[0059] In a fourth aspect, a computer device is provided in this embodiment, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the layout cropping method described in the first aspect are implemented.

[0060] In a fifth aspect, a computer-readable storage medium is provided in this embodiment, on which a computer program is stored. When the computer program is executed by a processor, the steps of the layout cropping method described in the first aspect are implemented.

[0061] The above-described layout cropping method significantly improves layout cropping efficiency and reduces memory usage during the cropping process by optimizing cropping strategies and algorithm design. This overcomes the shortcomings of traditional technologies and provides efficient solutions for applications such as Design Rule Check (DRC) and Optical Proximity Correction (OPC), offering important technical support for chip design and manufacturing. The present invention further provides a layout cropping device, a layout file cropping method, a computer device, and a computer-readable storage medium, each of which possesses the performance and beneficial effects of the aforementioned layout cropping method. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0063] Figure 1 1 is a flow chart of a layout cutting method according to an embodiment;

[0064] Figure 2 Schematic diagram of a layout structure to be cut in a specific embodiment;

[0065] Figure 3 for Figure 2 Schematic diagram of the target structure obtained after cropping;

[0066] Figure 4 FIG. 1 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0067] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings provide embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0068] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0069] It should also be understood that the terms "include / comprising" or "having" etc. specify the presence of stated features, integers, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, integers, steps, operations, components, parts or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0070] In order to improve the efficiency of layout cutting and memory usage, this embodiment provides a Figure 1 The layout cutting method shown includes:

[0071] Acquire a layout, and determine a cropping object and a target cropping area of the layout;

[0072] Using the top-level structure in the clipping object as the entry structure;

[0073] Taking the entry structure as the root node, based on the reference relationship, structures (Cells) are acquired one by one for processing, and the graphics tasks (shape tasks) to be clipped of the structure are obtained and added to the graphics queue (shape queue) in sequence; wherein the graphics task includes the pixel set of the structure and the clipping area, and the clipping area is obtained based on the positional relationship of the structure relative to the entry structure and the target clipping area;

[0074] When it is detected that there is a graphics task in the graphics queue and there is an allocable idle thread, the thread is allocated to process the graphics task, including: retaining, deleting or cropping pixels of the pixel set based on the cropping area;

[0075] After completing the processing of all graphics tasks in the graphics queue, a target structure as a clipping result is obtained.

[0076] Specifically, the top structure in the clipping object is used as the entry structure; for example, if the clipping object is the entire layout, the top cell is designated as the entry structure (entry cell). By providing customization of the clipping object, this method can easily modify the clipping object from the entire layout to a specific cell, and further determine different cells as entry cells.

[0077] The above-mentioned layout cropping method, through optimizing the cropping strategy and algorithm design, is characterized by not requiring flattening and facilitating parallelization. It can effectively reduce the amount of calculation, increase the cropping speed, and reduce the memory used in the cropping process. It is particularly suitable for cropping large layout areas with hierarchical structures.

[0078] In this embodiment, the entry structure is used as the root node, and based on the reference relationship, structures are obtained one by one for processing, and the graphics tasks to be clipped of the structures are obtained and added to the graphics queue in sequence; including:

[0079] Create a structure task (Cell task) based on the entry structure and add it to the structure queue (Cell queue) to be cut;

[0080] The creating structure task includes: adding a copy of the structure and a placement matrix as a structure task to be cut (Cell task) to a structure queue (Cell queue); wherein the placement matrix is used to represent the positional relationship of the structure relative to the entry structure;

[0081] Obtaining a structure task in a structure queue for processing, including: the structure task includes a copy of the current structure and a placement matrix, obtaining a clipping area based on the placement matrix and a target clipping area; creating a graphics task to be clipped using a pixel set of the current structure and the clipping area and adding it to a graphics queue; and processing a substructure of the current structure based on the clipping area, including: retaining, deleting, or creating a new structure task and adding it to the structure queue.

[0082] Specifically, when acquiring a structure to create a structure task, a temporary copy of the current structure is created. Subsequent processing operates on this temporary copy, reducing copying overhead while not affecting the original layout. The placement matrix represents the positional relationship of the current structure relative to the entry structure. In two-dimensional graphics, the placement matrix can include positional relationships such as scaling, rotation, translation, and shearing, and is typically represented using a 3*3 two-dimensional matrix. When creating a structure task using the entry structure, its placement matrix is the unit placement matrix, which represents the "initial value" and "untransformed" state. Applying the unit placement matrix does not transform the graphics in any way.

[0083] When processing a structure task in a structure queue, the head structure task is retrieved and processed. A graphics task to be clipped is created using the current structure's pixel set and clipping region, and added to the graphics queue. The pixel set here refers to the current structure's pixels, including rectangles, polygons, and text, excluding references. These pixels are packaged together with the clipping region of the previous structure into a graphics task to be clipped and placed in the graphics queue.

[0084] In this embodiment, after completing the processing of all graphics tasks in the graphics queue, a target structure as a clipping result is obtained; including:

[0085] After completing the processing of all structure tasks in the structure queue and all graphics tasks in the graphics queue, a hierarchical structure (cell hierarchy structure) with the copy of the entry structure as the root node is obtained as the target structure of the clipping result.

[0086] Specifically, when all the structural tasks in the structure queue have been completed, if the graphics tasks have not been completed, they will wait for completion until all the structural tasks in the structure queue and all the graphics tasks in the graphics queue are processed. Then, a new hierarchical structure with a copy of the entry structure as the root node is obtained. This structure is the clipping result obtained after the initial entry structure is clipped through the target clipping area.

[0087] In this embodiment, the above layout cropping method supports multi-threaded parallel processing, and the threads include:

[0088] The monitoring thread is used to detect whether there are graphics tasks in the graphics queue and assign graphics tasks to idle threads;

[0089] Graphics thread, used to obtain graphics tasks in the graphics queue for processing;

[0090] The structure thread is used to obtain the structure tasks from the structure queue for processing.

[0091] Specifically, while the structure thread is processing, a monitoring thread monitors the graphics queue. If a graphics task is available in the graphics queue, an idle graphics thread is assigned to execute it. This multi-threaded parallel processing fully utilizes idle multi-core processor resources, significantly improving layout cropping speed and reducing memory usage when rapidly cropping large hierarchical layouts.

[0092] In this embodiment, the copy of the structure put into the structure queue is obtained by making a shallow copy of the structure.

[0093] A shallow copy is a method of copying an object. It creates a new object but does not copy any sub-objects nested within the original object. Instead, it copies only the references within the original object, meaning the new object shares the memory address of the sub-objects with the original object. Shallow copies are used to quickly copy structures without deep copying the sub-structures referenced by the structure. Subsequent processing operates on the copy of the structure, reducing copying overhead while leaving the original layout intact.

[0094] In this embodiment, the target cropping area is a rectangular area. Rectangular area cropping is a common practice in current layout cropping, but in actual applications, target cropping areas of other shapes can be expanded based on specific needs, and this application does not make specific limitations.

[0095] In this embodiment, obtaining a cropping region based on the placement matrix and the target cropping region includes: inversely transforming the target cropping region using the placement matrix to obtain the cropping region. During layout cropping, inversely transforming the target cropping region using the placement matrix to obtain the cropping region can effectively save resources. However, in other application scenarios, the need to save resources may not be considered, and the placement matrix may be used to perform a positive transformation on the structure. This application does not impose any specific limitations.

[0096] In this embodiment, obtaining the structure task in the structure queue for processing specifically includes:

[0097] The structure task includes a copy of the current structure and a placement matrix;

[0098] Get the clipping area based on the placement matrix and the target clipping area;

[0099] Obtain all pixels of the current structure as a pixel set, and add the pixel set of the current structure and the clipping area as a graphics task (shape task) to be clipped into a graphics queue (shape queue);

[0100] Get all reference relationships (ref, reference) of the current structure, get the substructures of the current structure based on the reference relationships, calculate the bounding box of the substructure, and determine the relationship between the bounding box and the clipping area:

[0101] If the bounding box is completely contained by the clipping area, no processing is performed, that is, the reference relationship is retained in the current structure;

[0102] If the bounding box does not intersect with the clipping area, deleting the reference relationship in the current structure;

[0103] If the bounding box partially intersects with the clipping area, the copy of the substructure and the placement matrix are added to the structure queue as a new structure task; the reference relationship is deleted in the current structure, and a new reference relationship is generated to point to the copy of the substructure.

[0104] Specifically, the system leverages the hierarchical structure of the layout and uses a non-flattening approach to process the layout starting from the entry structure. The structure's pixel set and clipping region are used to create graphics tasks to be clipped and added to the graphics queue. Based on the clipping region, the system then processes references to the structure, including deleting references, retaining references, and creating new structure tasks and modifying their references. This effectively reduces memory usage and lays the foundation for subsequent multi-threaded parallel processing of graphics tasks.

[0105] In this embodiment, calculating the bounding box of the substructure includes: caching the calculated bounding box in the substructure, thereby avoiding repeated calculation when other structures (Cell) subsequently reference this substructure (ref cell).

[0106] In this embodiment, the copy and placement matrix of the substructure are added to the structure queue as a new structure task, including: the placement matrix of the substructure is calculated by the placement matrix of the current structure and the transformation matrix corresponding to the reference relationship to save computing overhead.

[0107] In this embodiment, assigning a thread to process the graphics task includes:

[0108] The graphics task includes a pixel set and a clipping region;

[0109] Calculate the bounding boxes of the pixels in the pixel set respectively, and determine the relationship between the bounding boxes and the clipping area:

[0110] If the bounding box is contained in the clipping region, retaining the pixel in the pixel set;

[0111] If the bounding box does not intersect with the clipping area, deleting the pixel from the pixel set;

[0112] If the bounding box partially intersects with the cropping area, an intersection graph of the pixel and the cropping area is calculated, the pixel is deleted from the pixel set, and the intersection graph is added to the pixel set.

[0113] When processing graphics tasks, the bounding box of this series of pixels is calculated, and the relationship between the bounding box and the clipping area is determined. The pixels are processed according to three situations: the bounding box is included in the clipping area, the bounding box and the clipping area do not intersect, and the bounding box and the clipping area partially intersect. To handle the case where the bounding box and the clipping area partially intersect, a Boolean logic AND operation (Boolean AND) is performed on the pixel and the clipping area, the original pixel is deleted, and the new shape obtained after the Boolean AND operation is inserted.

[0114] The following is a specific application example to illustrate the above layout cutting method. Figure 2 As shown, the purple box is the top cell, which is also the entry cell in this embodiment; the green rectangle is the pixel under the top cell; the blue rectangle is the child cell directly referenced by the top cell, and the four blue cells are different placement methods of the same cell; the yellow cell is the child cell of the blue cell; and the red box is the clipping area.

[0115] Initially, the entry cell and unit placement matrix are added to the queue of cells to be clipped, and the processing begins.

[0116] From the cell queue, retrieve the head cell and its placement matrix (in this case, the top cell and the unit placement matrix). Get the graphics (i.e., pixels) under the top cell, which are the five green rectangles, and package them into a shape task to be clipped, placing them in the shape queue. Get the ref cells under the top cell, which are the three blue ref cells. Determine their positional relationship to the clipping area: one is included, one partially intersects, and one does not intersect. Delete the non-intersecting ref cell from the top cell and add the cell creation task for the partially intersecting ref cell to the cell queue. Delete the top cell from the queue head.

[0117] From the cell queue, retrieve the head cell and its placement matrix. Here, the top-left blue cell and the unit placement matrix are retrieved. Get the shape under the blue cell. If there is no shape, no shape task to be clipped is generated. Get the refs under the blue cell, which are the three yellow ref cells. Determine their positional relationship with the clipping region. If none intersect, remove them from the blue cell.

[0118] At this time, the cell queue to be cropped is empty, so stop cropping cells and wait for the shape task to be completed. After completion, you will get the following Figure 3 The layout structure shown.

[0119] Based on the same inventive concept, the present application also provides a layout cutting device for implementing the layout cutting method mentioned above. The solution provided by this device is similar to the solution described in the above method. Therefore, the specific limitations of one or more layout cutting device embodiments provided below can be found in the above-mentioned limitations of the layout cutting method and will not be repeated here.

[0120] In one embodiment, a layout cutting device is provided, comprising: an acquisition module, a structure processing module, a graphics task processing module, and an output module, wherein:

[0121] An acquisition module is used to acquire a layout, determine a clipping object and a target clipping area of the layout; and use the top-level structure in the clipping object as an entry structure;

[0122] A structure processing module is configured to use the entry structure as a root node and, based on reference relationships, retrieve and process structures one by one, obtaining graphics tasks to be clipped for the structures and sequentially adding them to a graphics queue (shape queue); wherein the graphics tasks include a pixel set and a clipping region of the structure, and the clipping region is obtained based on the positional relationship of the structure relative to the entry structure and the target clipping region;

[0123] a graphics task processing module, configured to, when detecting that there is a graphics task in the graphics queue and there is an allocable idle thread, allocate a thread to process the graphics task, including: retaining, deleting, or cropping pixels of the pixel set based on a cropping region;

[0124] The output module is used to obtain a target structure output as a clipping result after completing the processing of all graphics tasks in the graphics queue.

[0125] The functional modules of the layout cutting device implement the steps in the above-mentioned layout cutting method embodiments.

[0126] Each module in the layout cutting device can be implemented in whole or in part through software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in the computer device in the form of software, so that the processor can call and execute the corresponding operations of each module.

[0127] In one embodiment, a layout file clipping method is provided, comprising:

[0128] Read the original layout file into memory;

[0129] Using the layout cropping method in each of the above layout cropping method embodiments, the layout is cropped in the memory to obtain a target structure;

[0130] The target structure is written out into a target layout file as a cropping result.

[0131] In process simulation, lithography optimization, and failure analysis in the semiconductor manufacturing field, it is often necessary to cut a large layout file into multiple smaller layout files; read the layout file into memory, and use the layout cropping method described in the above-mentioned layout cropping method embodiments to crop the layout file in memory. After cropping, the new layout data structure is written to a file to reduce data size and improve cropping efficiency.

[0132] In this embodiment, reading the original layout file into the memory includes:

[0133] Record the structure in the original layout file, and the starting position and ending position in the original layout file.

[0134] In this embodiment, writing the target structure into a target layout file as a cropping result includes:

[0135] For the original structure in the target structure, using the original structure at the starting position and the ending position of the original layout file, copying the original structure from the original layout file to the target layout file;

[0136] The original structure refers to a structure that exists completely in both the target structure and the original layout file.

[0137] After cropping, the cells in the original layout will differentiate into three types of cells:

[0138] 1) Cells that do not exist in the target layout;

[0139] 2) Cells that exist completely in the target layout;

[0140] 3) A new cell that is different from the original cell after being cropped (for example, if cell A is cut in half, a new cell A1 will be generated with half the data of cell A).

[0141] For cells that still exist completely in the target layout, we can use the cell position in the file recorded during the reading process to copy the cell from the source file to the new file, thus omitting the step of data conversion from the memory data structure to the file.

[0142] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 4As shown. The computer device includes a processor, memory, an input / output interface, a communication interface, a display unit, and an input device. The processor, memory, and input / output interface are connected via a system bus, and the communication interface, display unit, and input device are connected to the system bus via the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with external terminals via wired or wireless means, and the wireless means can be achieved via Wi-Fi, mobile cellular networks, NFC (near-field communication), or other technologies. When executed by the processor, the computer program implements a method for parallel reading of layout files. The display unit of the computer device is used to produce a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device casing, or an external keyboard, touchpad or mouse.

[0143] Those skilled in the art will understand that Figure 4 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0144] In one embodiment, a computer device is further provided, including a memory and a processor. The memory stores a computer program, and the processor implements the steps in the above-mentioned layout cropping method embodiments when executing the computer program.

[0145] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned layout cropping method embodiments are implemented.

[0146] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the above-mentioned embodiments. In particular, any reference to memory, database, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The databases involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, distributed databases based on blockchains. The processors involved in the various embodiments provided herein may be, but are not limited to, general-purpose processors, central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), programmable logic devices (PLDs), data processing logic devices based on quantum computing, and the like.

[0147] It should be understood that, although the various steps in the flowcharts involved in the various embodiments described above are displayed in sequence according to the instructions of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowcharts involved in the various embodiments described above can include multiple steps or multiple stages, and these steps or stages are not necessarily executed and completed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of steps or stages in other steps.

[0148] Throughout this specification, references to terms such as "some embodiments," "other embodiments," and "desired embodiments" indicate that a particular feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present application. The schematic descriptions of these terms throughout this specification do not necessarily refer to the same embodiment or example.

[0149] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0150] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A layout cutting method, characterized in that: include: Acquire a layout, and determine a cropping object and a target cropping area of the layout; Using the top-level structure in the clipping object as the entry structure; Taking the entry structure as the root node, based on the reference relationship, structures are retrieved and processed one by one to obtain the graphics tasks to be clipped for the structure and sequentially added to the graphics queue; wherein the graphics tasks include the pixel set of the structure and the clipping area, and the clipping area is obtained based on the positional relationship of the structure relative to the entry structure and the target clipping area; When it is detected that there is a graphics task in the graphics queue and there is an allocable idle thread, the thread is allocated to process the graphics task, including: retaining, deleting or cropping pixels of the pixel set based on the cropping area; After completing the processing of all graphics tasks in the graphics queue, a target structure as a clipping result is obtained.

2. The layout cutting method according to claim 1, characterized in that: Taking the entry structure as the root node, based on the reference relationship, the structures are obtained one by one for processing, the graphics tasks to be clipped of the structures are obtained and added to the graphics queue in sequence; including: Create a structure task based on the entry structure and add it to the structure queue to be cut; The creating structure task includes: adding a copy of the structure and a placement matrix as a structure task to be cut into a structure queue; wherein the placement matrix is used to represent the positional relationship of the structure relative to the entrance structure; Obtaining a structure task in a structure queue for processing, including: the structure task includes a copy of the current structure and a placement matrix, obtaining a clipping area based on the placement matrix and a target clipping area; creating a graphics task to be clipped using a pixel set of the current structure and the clipping area and adding it to a graphics queue; and processing a substructure of the current structure based on the clipping area, including: retaining, deleting, or creating a new structure task and adding it to the structure queue.

3. The layout cutting method according to claim 2, characterized in that: After completing the processing of all graphics tasks in the graphics queue, obtaining a target structure as a clipping result; including: After completing the processing of all structure tasks in the structure queue and all graphics tasks in the graphics queue, a hierarchical structure with the copy of the entry structure as the root node is obtained as the target structure of the clipping result.

4. The layout cutting method according to claim 3, characterized in that: Supports multi-threaded parallel processing, the threads include: The monitoring thread is used to detect whether there are graphics tasks in the graphics queue and assign graphics tasks to idle threads; Graphics thread, used to obtain graphics tasks in the graphics queue for processing; The structure thread is used to obtain the structure tasks from the structure queue for processing.

5. The layout cutting method according to claim 2, characterized in that: A copy of a structure placed into the structure queue is obtained by making a shallow copy of the structure.

6. The layout cutting method according to claim 1, characterized in that: The target cropping area is a rectangular area.

7. The layout cutting method according to claim 2, characterized in that: Obtaining a clipping region based on the placement matrix and the target clipping region includes: The target clipping area is inversely transformed using the placement matrix to obtain the clipping area.

8. The layout cutting method according to claim 2, characterized in that: The structure task in the acquisition structure queue is processed, specifically including: The structure task includes a copy of the current structure and a placement matrix; Get the clipping area based on the placement matrix and the target clipping area; Acquire all pixels of the current structure as a pixel set, and add the pixel set of the current structure and the clipping area as graphics tasks to be clipped into a graphics queue; Obtain all reference relationships of the current structure, obtain substructures of the current structure based on the reference relationships, calculate the bounding box of the substructure, and determine the relationship between the bounding box and the clipping area: If the bounding box is completely contained by the clipping area, no processing is performed, that is, the reference relationship is retained in the current structure; If the bounding box does not intersect with the clipping area, deleting the reference relationship in the current structure; If the bounding box partially intersects with the clipping area, the copy of the substructure and the placement matrix are added to the structure queue as a new structure task; the reference relationship is deleted in the current structure, and a new reference relationship is generated to point to the copy of the substructure.

9. The layout cutting method according to claim 8, characterized in that: The step of adding the copy of the substructure and the placement matrix to a structure queue as a new structure task comprises: The placement matrix of the substructure is calculated by using the placement matrix of the current structure and the transformation matrix corresponding to the reference relationship.

10. The layout cutting method according to claim 1, wherein: Allocating a thread to process the graphics task includes: The graphics task includes a pixel set and a clipping region; Calculate the bounding boxes of the pixels in the pixel set respectively, and determine the relationship between the bounding boxes and the clipping area: If the bounding box is contained in the clipping region, retaining the pixel in the pixel set; If the bounding box does not intersect with the clipping area, deleting the pixel from the pixel set; If the bounding box partially intersects with the cropping area, an intersection graph of the pixel and the cropping area is calculated, the pixel is deleted from the pixel set, and the intersection graph is added to the pixel set.

11. A layout cutting device, characterized in that: The device comprises: An acquisition module is used to acquire a layout, determine a clipping object and a target clipping area of the layout; and use the top-level structure in the clipping object as an entry structure; a structure processing module, configured to use the entry structure as a root node and, based on reference relationships, retrieve and process structures one by one, obtain graphics tasks to be clipped for the structures, and sequentially add them to a graphics queue; wherein the graphics tasks include a pixel set and a clipping region of the structure, and the clipping region is obtained based on the positional relationship of the structure relative to the entry structure and a target clipping region; a graphics task processing module, configured to, when detecting that there is a graphics task in the graphics queue and there is an allocable idle thread, allocate a thread to process the graphics task, including: retaining, deleting, or cropping pixels of the pixel set based on a cropping region; The output module is used to obtain a target structure output as a clipping result after completing the processing of all graphics tasks in the graphics queue.

12. A layout file cutting method, characterized in that: include: Read the original layout file into memory; Using the layout cropping method according to any one of claims 1 to 10, cropping the layout in the memory to obtain a target structure; The target structure is written out into a target layout file as a cropping result.

13. The layout file cutting method according to claim 12, characterized in that: The process of reading the original layout file into the memory includes: Record the structure in the original layout file, and the starting position and ending position in the original layout file.

14. The layout file cutting method according to claim 13, characterized in that: Writing the target structure into a target layout file as a cropping result includes: For the original structure in the target structure, using the original structure at the starting position and the ending position of the original layout file, copying the original structure from the original layout file to the target layout file; The original structure refers to a structure that exists completely in both the target structure and the original layout file.

15. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the layout cutting method according to any one of claims 1 to 10 are implemented.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the layout cutting method according to any one of claims 1 to 10 are implemented.

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