Method and equipment for optimizing resonant driving of synchronous rectification switch of low-voltage large-current converter

Abstract

The invention discloses a method and equipment for optimizing resonance driving of a synchronous rectification switch of a low-voltage large-current converter. The method comprises the following steps: firstly, establishing a quantitative mathematical model of reverse conduction resistance, switch current and gate-source driving voltage when the synchronous rectification switch is reversely conducted; based on the model, under the set switching current and the maximum gate-source driving voltage, the conduction loss under different gate-source driving voltage rising time is calculated. Then, gate-source driving voltage and resonant current quantitative mathematical models of the resonant driving circuit in different working modes are established respectively, and gate-source driving voltage when the switching current is 0 is designed; according to the models, the resonant inductance of the resonant driving circuit is designed, and the driving loss under different gate-source driving voltage rising time is calculated according to the resonant inductance. And finally, calculating the total loss by combining the conduction loss and the driving loss, and selecting the gate-source driving voltage rise time with the minimum total loss. The invention aims to solve the problem that the overall efficiency of the converter is reduced because the driving loss is reduced and the conduction loss is increased in the prior art, so as to realize the optimization of the synchronous rectification switch resonance driving.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics, and particularly relates to an optimization method and device for synchronous rectification switch resonant drive of a low-voltage high-current converter. Background Art

[0002] With the rapid development of high-performance computing processors applied in industries such as artificial intelligence and data centers, their power supplies need to have the performance of outputting ultra-high currents up to thousands of amperes at ultra-low output voltages below 1V. This performance requirement necessitates paralleling multiple synchronous rectification switches (SRs) in the power supply to reduce their on-resistance and improve the conversion efficiency. This has led to an increase in the gate charge required by the SRs, resulting in a significant increase in drive losses at high switching frequencies, seriously affecting the peak efficiency and full-load efficiency of the power supply.

[0003] Resonant drive technology provides a potential solution for reducing drive losses. Resonant drive introduces a resonant inductor into the drive loop. The resonant cavity formed by the resonant inductor and the input capacitance of the switch tube can recover the energy of the drive loop, thereby reducing the drive losses of the switch tube. In the soft-switching (ZVS) topology widely used in data center power supplies, due to the significant reduction in switching losses, the sensitivity to drive speed is greatly increased. The drive speed of resonant drive is relatively slow to reduce the resonant current in the drive circuit and lower the drive losses. However, reducing the drive speed of the resonant drive circuit to reduce the drive current and switch drive losses will inevitably increase the on-conduction losses of the SR, especially under the working conditions of ultra-low output voltages and ultra-large output currents. Because a slower drive speed will reduce the turn-on speed of the SR, causing the switch to operate in an incomplete conduction state with a large on-resistance and the diode conduction state for a much longer time. When the output current rises rapidly, the on-conduction losses will also increase rapidly. In a resonant drive circuit, increasing the switch speed will increase the drive losses, and reducing the switch speed will increase the on-conduction losses. Existing optimization methods cannot achieve the optimal compromise between the two losses and are difficult to improve the efficiency of the power supply for high-performance processors. Summary of the Invention

[0004] Aiming at the problems existing in the prior art, the present invention provides an optimization method and device for synchronous rectification switch resonant drive of a low-voltage high-current converter, aiming to optimize the problem that in a low-voltage high-current converter adopting resonant drive synchronous rectification switch, while the drive losses are reduced, the on-conduction losses increase, and the overall efficiency of the converter decreases.

[0005] To solve the above technical problems, the present invention is realized through the following technical solutions:

[0006] According to the first aspect of the present invention, there is provided an optimization method for synchronous rectification switch resonant drive of a low-voltage high-current converter, including:

[0007] Establish a quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch;

[0008] Based on the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage, calculate the conduction loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times under the set switch current and maximum gate-source drive voltage;

[0009] Respectively establish a quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch and a quantitative mathematical model of the resonant current of the resonant drive circuit in different operating modes of the resonant drive circuit, and design the gate-source drive voltage of the synchronous rectifier switch when the switch current is 0;

[0010] According to the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch in different operating modes of the resonant drive circuit, the quantitative mathematical model of the resonant current of the resonant drive circuit, and the gate-source drive voltage of the synchronous rectifier switch when the switch current is 0, design the resonant inductor of the resonant drive circuit;

[0011] Calculate the drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times according to the resonant inductor of the resonant drive circuit;

[0012] According to the conduction loss and drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times, calculate the total loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times, and select the gate-source drive voltage rise time with the minimum total loss.

[0013] In a possible implementation manner of the first aspect, the establishment process of the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch is specifically as follows:

[0014] a. Set the gate-source drive voltage as a stepped-down voltage, where the maximum voltage of the stepped-down voltage is the maximum drive voltage of the gate-source drive voltage and the minimum voltage is 0;

[0015] b. Set the switch current during the reverse conduction process of the synchronous rectifier switch as a fixed value, and record the reverse conduction voltage of the synchronous rectifier switch under the gate-source drive voltage;

[0016] c. Calculate the reverse conduction resistance of the synchronous rectifier switch according to the switch current during the reverse conduction process of the synchronous rectifier switch and the reverse conduction voltage of the synchronous rectifier switch under the gate-source drive voltage;

[0017] d. Change the set value of the switch current during the reverse conduction process of the synchronous rectifier switch, and repeat steps b and c until the set number of executions;

[0018] e. Fit the reverse conduction resistance and the gate-source drive voltage of the synchronous rectifier switch under a fixed switch current to obtain the relationship between the reverse conduction resistance of the synchronous rectifier switch and the set gate-source drive voltage;

[0019] f. Fit the relationship of the reverse conduction resistance of the synchronous rectifier switch under different switch currents and the same gate-source drive voltage to obtain the relative relationship between different reverse conduction resistances under different switch currents and the same gate-source drive voltage;

[0020] g. Combine the relationship between the reverse conduction resistance of the synchronous rectifier switch and the set gate-source drive voltage, and the relative relationship between different reverse conduction resistances under different switch currents and the same gate-source drive voltage to obtain a quantitative mathematical model of the reverse conduction resistance, the switch current, and the gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch.

[0021] In a possible implementation manner of the first aspect, the quantitative mathematical model of the reverse conduction resistance, the switch current, and the gate-source drive voltage is:

[0022]

[0023] wherein, R sd is the reverse conduction resistance; V gs is the gate-source drive voltage; I s is the switch current; f1(V gs ) is the relationship between the reverse conduction resistance and the gate-source drive voltage; f rel21 (V gs ) is the relative relationship between reverse conduction resistances under the same gate-source drive voltage and different switch currents; a i and b j are fitting coefficients; m and n represent the polynomial coefficients of the numerator and denominator; I s1 and I s2 are two different switch currents; R sd (V gs , I s2 ) and R sd (V gs , I s1 ) are the reverse conduction resistances under the same gate-source drive voltage V s1 and I s2 for two different switch currents I gs respectively; α(I s ) is the influence coefficient of the changing switch current on the reverse conduction resistance.

[0024] In a possible implementation manner of the first aspect, calculating the conduction loss during the reverse conduction process of the synchronous rectifier switch at different rise / fall times of the gate-source drive voltage specifically includes:

[0025]

[0026] Wherein, p con (t) is the conduction loss; t is the time; i s (t) is the instantaneous value of the switching current; I sm is the maximum value of the switching current; T s is the switching period; t d is the dead time; v gs (t) is the instantaneous value of the gate-source drive voltage; V th is the gate-source drive voltage when the switching current is 0; V dr is the maximum gate-source drive voltage; t rf is the time when the gate-source drive voltage rises from V th to V dr ; t on is the duration of the maximum gate-source drive voltage; k is the rising slope of the gate-source drive voltage.

[0027] In a possible implementation manner of the first aspect, the quantitative mathematical models of the gate-source drive voltage of the synchronous rectification switch and the quantitative mathematical model of the resonant current of the resonant drive circuit in different working modes specifically include:

[0028] In the stage 0 - t1, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the gate-source drive voltage of the synchronous rectification switch are:

[0029]

[0030] In the stage t1 - t2, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the gate-source drive voltage of the synchronous rectification switch are:

[0031]

[0032] In the stage t2 - t3, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the gate-source drive voltage of the synchronous rectification switch are:

[0033]

[0034] In the stages t3 - t4 and t4 - t5, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the gate-source drive voltage of the synchronous rectification switch are:

[0035]

[0036] Wherein, t1 is the leading gate-source drive voltage V gs1The moment when the maximum gate-source driving voltage starts to drop to 0; in Case 1: t2 is the moment when the leading gate-source driving voltage V gs1 drops to 0, and t3 is the moment when the lagging gate-source driving voltage V gs2 starts to rise from 0; in Case 2: t2 is the moment when the lagging gate-source driving voltage V gs2 starts to rise from 0, and t3 is the moment when the leading gate-source driving voltage V gs1 drops to 0; t4 is the moment when the lagging gate-source driving voltage V gs2 rises to the maximum gate-source driving voltage; t5 is the end moment of the positive half cycle when the resonant current drops to 0; where, Case 1 refers to the situation where the drop process of the leading gate-source driving voltage V gs1 and the rise process of the lagging gate-source driving voltage V gs2 do not overlap; Case 2 refers to the situation where the drop process of the leading gate-source driving voltage V gs1 overlaps with the rise process of the lagging gate-source driving voltage V gs2 ;

[0037] In the formula, i L (t) is the instantaneous value of the resonant inductor current of the resonant drive circuit; L dri is the inductance value of the resonant inductor of the resonant drive circuit; v gs1 (t) is the instantaneous value of the leading gate-source driving voltage; K1 is the maximum value of the resonant inductor current of the resonant drive circuit in the stage t1 - t2; ω1 is the angular frequency of the resonant inductor current of the resonant drive circuit in the stage t1 - t2; is the initial phase of the resonant inductor current of the resonant drive circuit in the time period t1 - t2; C iss is the input capacitance of the synchronous rectifier switch; I1 is the value of the resonant inductor current of the resonant drive circuit at t1; V1 is the value of the leading gate-source driving voltage at t1; K2 is the maximum value of the resonant inductor current of the resonant drive circuit in the stage t2 - t3; ω2 is the angular frequency of the resonant inductor current of the resonant drive circuit in the stage t2 - t3; is the initial phase of the resonant inductor current of the resonant drive circuit in the time period t2 - t3; V2 is the value of the leading gate-source driving voltage at t2; v gs2 (t) is the instantaneous value of the lagging gate-source driving voltage; I2 is the value of the resonant inductor current of the resonant drive circuit at t2.

[0038] In a possible implementation manner of the first aspect, the gate-source driving voltage of the synchronous rectifier switch when the designed switch current is 0 is specifically:

[0039] When the switching current is 0, the gate-source drive voltage of the synchronous rectifier switch should be higher than the turn-on voltage of the synchronous rectifier switch to ensure that when the switching current is 0, soft switching is critically achieved or soft switching is not fully achieved; the standard for the incomplete achievement of soft switching is that when the switching current is 0, the drain-source voltage of the synchronous rectifier switch is 5% - 10% of the maximum drain-source voltage.

[0040] In a possible implementation manner of the first aspect, the resonant inductor of the resonant drive circuit is designed according to the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch in different operating modes of the resonant drive circuit, the quantitative mathematical model of the resonant current of the resonant drive circuit, and the gate-source drive voltage of the synchronous rectifier switch when the switching current is 0. Specifically:

[0041] At the moment of t1 + t rf the expression of the instantaneous value of the leading gate-source drive voltage is:

[0042]

[0043] Combined with the expression of the instantaneous value of the leading gate-source drive voltage at the moment of t1 + t rf the inductance value L of the resonant inductor of the resonant drive circuit is inversely solved. Specifically: dri

[0044]

[0045] According to the inductance value L of the resonant inductor of the resonant drive circuit dri the resonant inductor of the resonant drive circuit is designed.

[0046] In a possible implementation manner of the first aspect, the resonant inductor of the resonant drive circuit calculates the drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times. Specifically:

[0047] The drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times consists of the resonant inductor loss of the resonant drive circuit, the conduction loss of the switch of the resonant drive circuit, and the drive resistance loss of the resonant drive circuit. Among them, the resonant inductor loss of the resonant drive circuit is divided into winding loss and core loss; that is:

[0048] P dri = P winding + P core + P sw + P Rdri

[0049] P winding = I L 2 R ac

[0050] P core = P V V core

[0051] P sw = I L 2 R ds(on)sw

[0052]

[0053] Wherein, P dri is the drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times; P winding is the winding loss; P core is the core loss; P sw is the conduction loss of the switch of the resonant drive circuit; P Rdri is the drive resistance loss of the resonant drive circuit; I L is the effective value of the resonant inductor current of the resonant drive circuit; R ac is the AC resistance of the resonant inductor of the resonant drive circuit; P v is the core loss per unit volume; V core is the core volume; R ds(on)sw is the on-resistance of the switch of the resonant drive circuit; R dri is the resistance value of the drive resistance of the resonant drive circuit.

[0054] According to a second aspect of the present invention, there is provided a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the optimized method for resonant driving of the synchronous rectifier switch of a low-voltage high-current converter is implemented.

[0055] According to a third aspect of the present invention, there is provided a computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the optimized method for resonant driving of the synchronous rectifier switch of a low-voltage high-current converter is implemented.

[0056] According to a fourth aspect of the present invention, there is provided a computer program product, and when the computer program product is executed by a processor, the optimized method for resonant driving of the synchronous rectifier switch of a low-voltage high-current converter is implemented.

[0057] Compared with the prior art, the present invention has at least the following beneficial effects:

[0058] An optimization method for synchronous rectifier switch resonant driving of a low-voltage large-current converter provided by the present invention can calculate the conduction loss at different gate-source drive voltage rise times through quantitative mathematical modeling of the reverse conduction resistance of the synchronous rectifier switch. At the same time, a quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch and a quantitative mathematical model of the resonant current of the resonant drive circuit are respectively established under different operating modes of the resonant drive circuit, and then the resonant inductor of the resonant drive circuit is designed, and based on this, the drive loss at different gate-source drive voltage rise times is calculated. Finally, considering the conduction loss and drive loss at different gate-source drive voltage rise times, the overall loss is calculated and the gate-source drive voltage rise time with the minimum overall loss is selected. By designing the gate-source drive voltage rise time, the optimization of the overall loss is realized, achieving the optimal compromise between the drive loss and the conduction loss, and effectively solving the problem that the overall efficiency is reduced due to the inability to balance the two losses.

[0059] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following specific preferred embodiments are given and described in detail in conjunction with the accompanying drawings as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] In order to more clearly illustrate the technical solutions in the specific embodiments of the present invention, the following will briefly introduce the drawings required for use in the description of the specific embodiments. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0061] Figure 1 It is a flowchart of an optimization method for synchronous rectifier switch resonant driving of a low-voltage large-current converter of the present invention;

[0062] Figure 2 It is a circuit schematic diagram of an LLC converter in the optimization method for synchronous rectifier switch resonant driving of a low-voltage large-current converter described in the embodiment of the present invention;

[0063] Figure 3 It is a schematic diagram of the principle of a resonant drive circuit in the optimization method for synchronous rectifier switch resonant driving of a low-voltage large-current converter described in the embodiment of the present invention;

[0064] Figure 4 It is a schematic diagram of a test circuit for the quantitative relationship between the reverse conduction resistance, switch current, and gate-source drive voltage in the optimization method for synchronous rectifier switch resonant driving of a low-voltage large-current converter described in the embodiment of the present invention;

[0065] Figure 5The fitting result of the quantitative mathematical relationship between the reverse conduction resistance, the switching current, and the gate-source drive voltage in the optimized method for the resonant drive of the synchronous rectifier switch in the low-voltage high-current converter described in the embodiments of the present invention;

[0066] Figure 6 The waveform diagram of the gate-source drive voltage and the switching current of the synchronous rectifier switch in the optimized method for the resonant drive of the synchronous rectifier switch in the low-voltage high-current converter described in the embodiments of the present invention;

[0067] Figure 7 The waveform diagram and the equivalent circuit diagram of the resonant drive circuit in the optimized method for the resonant drive of the synchronous rectifier switch in the low-voltage high-current converter described in the embodiments of the present invention;

[0068] Figure 8 The schematic diagrams of the critical realization and the incomplete realization of soft switching in the optimized method for the resonant drive of the synchronous rectifier switch in the low-voltage high-current converter described in the embodiments of the present invention;

[0069] Figure 9 The conduction loss when soft switching is critically realized or incompletely realized in the optimized method for the resonant drive of the synchronous rectifier switch in the low-voltage high-current converter described in the embodiments of the present invention;

[0070] Figure 10 For the optimized method for the resonant drive of the synchronous rectifier switch in the low-voltage high-current converter described in the embodiments of the present invention, different t rf The drive loss below;

[0071] Figure 11 The experimental result diagram of the resonant drive circuit in the optimized method for the resonant drive of the synchronous rectifier switch in the low-voltage high-current converter described in the embodiments of the present invention;

[0072] Figure 12 The experimental result diagram of the LLC circuit with optimized resonant drive in the optimized method for the resonant drive of the synchronous rectifier switch in the low-voltage high-current converter described in the embodiments of the present invention, where (a) is the case of a load current of 50 A and (b) is the case of a load current of 200 A. Detailed implementation manners

[0073] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0074] An optimization method for synchronous rectifier switching resonance drive of a low-voltage high-current converter is provided in an embodiment of the present invention. According to the quantitative mathematical models of the reverse conduction characteristics of the synchronous rectifier switch and the conduction loss of the resonance drive circuit, global optimization of the overall switching loss of the low-voltage high-current converter can be achieved, reducing the loss of the low-voltage high-current converter and improving the operating efficiency of the low-voltage high-current converter. It is used to solve the problem that after the synchronous rectifier switch of the low-voltage high-current converter adopts resonance drive, the balance between the reduction of drive loss and the increase of conduction loss cannot be solved, resulting in a decrease in the overall efficiency. In this embodiment, the synchronous rectifier switch of the low-voltage high-current converter is illustrated by taking the secondary synchronous rectifier switch of the LLC converter as an example.

[0075] As Figure 1 shown, the LLC converter includes an input voltage V in , an output voltage V o , a transformer winding turns ratio N p primary switches Q p1 、Q p2 , secondary synchronous rectifier switches SR ax 、SR bx , a resonant capacitor C r , a resonant inductor L r , an exciting inductor L m , an output capacitor C o , and the gate-source drive voltages of the synchronous rectifier switches are v gs1 、v gs2 . As Figure 2 shown, the resonance drive circuit includes a drive voltage V dr , drive switching transistors Q1, Q2, Q3, Q4, a resonance drive inductor L dri and equivalent gate input capacitors C iss1 、C iss2 . The resonance current flowing through the resonance inductor is i L , and the gate-source drive voltages V gs1 、V gs2 of the synchronous rectifier switches are generated by the left and right bridge arms, with a phase difference of 180°. The equivalent gate input capacitors C iss1 and C iss2 are the parallel combination of the output capacitors of the drive switching transistors and the input capacitors of the synchronous rectifier switching transistors.

[0076] It should be noted that the synchronous rectifier switching device can be an electronic switching device such as a MOSFET or a GaN HEMT with a reverse body diode and channel conduction ability. The switching transistors in the resonance drive circuit are MOSFETs.

[0077] As Figure 1As shown in the figure, an embodiment of the present invention provides an optimization method for the synchronous rectifier switch resonant drive of a low-voltage high-current converter, specifically including the following steps:

[0078] S1. Establish a quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch.

[0079] In an implementable manner, as Figure 4 shown, the specific establishment process of the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch is as follows:

[0080] a. Set the gate-source drive voltage as a step-down voltage, where the maximum voltage of the step-down voltage is the maximum drive voltage of the gate-source drive voltage, and the minimum voltage is 0.

[0081] b. Set the switch current during the reverse conduction process of the synchronous rectifier switch as a fixed value, and record the reverse conduction voltage of the synchronous rectifier switch under the gate-source drive voltage.

[0082] c. Calculate the reverse conduction resistance of the synchronous rectifier switch according to the switch current during the reverse conduction process of the synchronous rectifier switch and the reverse conduction voltage of the synchronous rectifier switch under the gate-source drive voltage.

[0083] Specifically, Figure 4 in, V gs is the gate-source drive voltage applied between the gate and source of the synchronous rectifier switch. This gate-source drive voltage is a step-down voltage, and the maximum voltage of the step-down voltage is V dr ; V sd is the reverse conduction voltage of the synchronous rectifier switch, and I s is the switch current. In this case, the gate-source drive voltage V gs is provided by a function generator, and the gate-source drive voltage is set as a step-down voltage with a maximum voltage of V dr when there is a high level externally. The switch current I s is simulated by a DC voltage source operating in the current limiting mode. Therefore, the reverse conduction resistance of the synchronous rectifier switch can be calculated using the following formula:

[0084] R sd = V sd / I s

[0085] d. Change the set value of the switch current during the reverse conduction process of the synchronous rectifier switch, and repeat steps b and c until the set number of executions.

[0086] e. Fit the reverse conduction resistance and gate-source drive voltage of the synchronous rectifier switch at a fixed switch current to obtain the relationship between the reverse conduction resistance of the synchronous rectifier switch and the set gate-source drive voltage, as follows:

[0087]

[0088] f. Fit the relationship of the reverse conduction resistance of the synchronous rectifier switch under different switch currents and the same gate-source drive voltage to obtain the relative relationship between different reverse conduction resistances under different switch currents and the same gate-source drive voltage, as follows:

[0089]

[0090] g. Combine the relationship between the reverse conduction resistance of the synchronous rectifier switch and the set gate-source drive voltage, and the relative relationship between different reverse conduction resistances under different switch currents and the same gate-source drive voltage to obtain a quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch, as follows:

[0091]

[0092]

[0093] In the formula, R sd is the reverse conduction resistance; V gs is the gate-source drive voltage; I s is the switch current; f1(V gs ) is the relationship between the reverse conduction resistance and the gate-source drive voltage; f rel21 (V gs ) is the relative relationship between reverse conduction resistances under different switch currents and the same gate-source drive voltage; a i and b j are fitting coefficients; m and n represent the polynomial coefficients of the numerator and denominator; I s1 and I s2 are two different switch currents; R sd (V gs ,I s2 ) and R sd (V gs ,I s1 ) are the reverse conduction resistances at the same gate-source drive voltage V s1 and I s2 under two different switch currents I gs respectively; α(I s ) is the influence coefficient of the changing switch current on the reverse conduction resistance.

[0094] Measured and calculated at different switch currents Is Under the condition, the reverse conduction resistance R of the synchronous rectifier switch sd varies with the gate-source drive voltage V gs After the relationship of the change, the experimental test results and the fitting results are as Figure 5 shown Figure 5 In it, the abscissa is the gate-source drive voltage V gs , and the ordinate is the reverse conduction resistance R sd , because the reverse conduction resistance changes greatly during the reverse turn-on process of the synchronous rectifier switch, the ordinate is taken logarithmically. The solid dots are the measurement results, and the solid curve is the fitting curve (that is, the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage). It can be seen that the fitting curve obtained by using the fitting method of the present invention is basically consistent with the measurement results, and the fitting method of the present invention has high accuracy

[0095] In this embodiment, m = n = 5 is selected. Under different V gs and I s , the fitting curve and the measurement results fit very well

[0096] S2. Based on the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage, calculate the conduction loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times under the set switch current and maximum gate-source drive voltage. Specifically:

[0097]

[0098] In the formula, p con (t) is the conduction loss; t is the time; i s (t) is the instantaneous value of the switch current; I sm is the maximum value of the switch current; T s is the switch period; t d is the dead time; v gs (t) is the instantaneous value of the gate-source drive voltage; V th is the gate-source drive voltage when the switch current is 0; V dr is the maximum gate-source drive voltage; t rf is the time when the gate-source drive voltage rises from V th to V dr ; t on is the duration of the maximum gate-source drive voltage; k is the rise slope of the gate-source drive voltage

[0099] That is to say, using the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage, the influence of the driving speed on the conduction loss of the synchronous rectifier switch can be analyzed. That is, in the same period, the time t when the gate-source drive voltage of the synchronous rectifier switch rises from 0 to V dr ofrf The influence. V in the resonant drive gs usually exhibits a slow rising speed. At V gs remaining at V dr During the turn-on period below, the synchronous rectifier switch channel is not fully turned on, resulting in an increase in R sd and conduction losses. Figure 6 This is the waveform diagram of the gate-source drive voltage and conduction current of the synchronous rectifier switch in the optimization method of the resonant drive of the low-voltage high-current converter in the embodiment of the present invention.

[0100] In other words, in the LLC DCX circuit, the switching frequency is close to the resonant frequency, and the current is approximately a half-sine wave. The expression of the synchronous rectifier switch current can be assumed as:

[0101]

[0102] The expression of the conduction loss is:

[0103]

[0104] The drive voltage V gs The expression is:

[0105]

[0106] S3. Respectively establish a quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch and a quantitative mathematical model of the resonant current of the resonant drive circuit in different operating modes, and design the gate-source drive voltage of the synchronous rectifier switch when the switching current is 0;

[0107] Specifically, the waveform diagram and equivalent circuit diagram of the resonant drive circuit are as Figure 7 shown. The specific method for establishing a quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch and a quantitative mathematical model of the resonant current of the resonant drive circuit in different operating modes is as follows: Ignore the circuit losses to simplify the modeling. Without loss of generality, select the positive half-cycle of the resonant inductor current of the resonant drive circuit for analysis. During this time period, Figure 2 The leading gate-source drive voltage V gs1 gradually decreases from the maximum gate-source drive voltage to 0, and the lagging gate-source drive voltage V gs2 rises from 0 to the maximum gate-source drive voltage. Define two cases: As Figure 7 Case 1, the descent process of V gs1 and the rise process of V gs2 do not overlap; Case 2, the descent process of V gs1 and the rise process of V gs2The rising process overlaps. Six moments are defined to divide the positive half - cycle of the resonant inductor current into five stages: Among them, the moment 0 is the starting moment of the positive half - cycle when the resonant inductor current starts to rise from 0; the moment t5 is the ending moment of the positive half - cycle when the resonant inductor current drops to 0; the moment t1 is the moment when V gs1 starts to drop from the maximum gate - source drive voltage to 0; the moment t4 is the moment when V gs2 rises to the maximum gate - source drive voltage; in Case 1: the moment t2 is the moment when V gs1 drops to 0, and the moment t3 is the moment when V gs2 starts to rise from 0; in Case 2: the moment t2 is the moment when V gs2 starts to rise from 0, and the moment t3 is the moment when V gs1 drops to 0. The gate - source drive voltage, the resonant drive inductor current, the stage division, and the equivalent circuit of the resonant drive circuit within each stage are as Figure 5 shown. Based on the equivalent circuit, the quantitative mathematical models of the synchronous rectification switch gate - source drive voltage and the resonant current of the resonant drive circuit in different operating modes are established as follows:

[0108] Among them, within the stage 0 - t1, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the synchronous rectification switch gate - source drive voltage are:

[0109]

[0110] Within the stage t1 - t2, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the synchronous rectification switch gate - source drive voltage are:

[0111]

[0112] Within the stage t2 - t3, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the synchronous rectification switch gate - source drive voltage are:

[0113]

[0114] The waveforms of the resonant current and the drive voltage are symmetric about T s / 4. Therefore, there is no need to model the two stages of t3 - t4 and t4 - t5 anymore. By symmetry, within the stages t3 - t4 and t4 - t5, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the synchronous rectification switch gate - source drive voltage are:

[0115]

[0116] In the formula, i L (t) is the instantaneous value of the resonant inductor current of the resonant drive circuit; Vdr is the maximum gate-source drive voltage; L dri is the inductance value of the resonant inductor of the resonant drive circuit; v gs1 (t) is the instantaneous value of the leading gate-source drive voltage; K1 is the maximum value of the resonant inductor current of the resonant drive circuit during the stage t1 - t2; ω1 is the angular frequency of the resonant inductor current of the resonant drive circuit during the stage t1 - t2; is the initial phase of the resonant inductor current of the resonant drive circuit during the time period t1 - t2; C iss is the input capacitance of the synchronous rectifier switch; I1 is the value of the resonant inductor current of the resonant drive circuit at time t1; V1 is the value of the leading gate-source drive voltage at time t1; K2 is the maximum value of the resonant inductor current of the resonant drive circuit during the stage t2 - t3; ω2 is the angular frequency of the resonant inductor current of the resonant drive circuit during the stage t2 - t3; is the initial phase of the resonant inductor current of the resonant drive circuit during the time period t2 - t3; K2 is the maximum value of the resonant inductor current of the resonant drive circuit during the stage t2 - t3; V2 is the value of the leading gate-source drive voltage at time t2; v gs2 (t) is the instantaneous value of the lagging gate-source drive voltage; I2 is the value of the resonant inductor current of the resonant drive circuit at time t2.

[0117] Figure 8 is a schematic diagram of the incomplete implementation and critical implementation of soft switching, Figure 7 in which the curve v ds is the drain-source voltage waveform of the synchronous rectifier switch, and the curve v gs0 i.e., the V th waveform, and v gs is the gate-source drive voltage waveform, C gd , C gs and C ds are the junction capacitances of the synchronous rectifier switch respectively. Design the gate-source drive voltage of the synchronous rectifier switch when the switching current is 0, specifically:

[0118] The gate-source drive voltage of the synchronous rectifier switch when the switching current is 0 should be higher than the turn-on voltage of the synchronous rectifier switch to ensure that when the switching current is 0, the soft switching is critically implemented or incompletely implemented; the standard for the incomplete implementation of the soft switching is that when the switching current is 0, the drain-source voltage of the synchronous rectifier switch is 5% - 10% of the maximum drain-source voltage.

[0119] In the case of the present invention, the reason for ensuring that the soft switching of the synchronous rectifier switch is not fully achieved or critically achieved is that if the soft switching is over-achieved, the body diode of the synchronous rectifier switch conducts reversely, with a high reverse voltage, a large reverse conduction resistance, and a large conduction loss. At the same time, it is difficult to ensure the critical realization of soft switching, and it is easier to ensure the incomplete realization of soft switching. When ZVS is not fully realized, compared with the case of critical ZVS realization, the switching loss only increases by 2%, while the conduction loss will be greatly reduced. As Figure 8 shown, when V gs0 = 2.2V, the soft switching is not fully realized. At this time, the conduction loss of the synchronous rectifier switch is half of that when V gs0 = 1.6V and the soft switching is over-achieved. Therefore, increasing V th will greatly reduce the conduction loss of the synchronous rectifier switch while hardly increasing the switching loss. In the case of the present invention, 2.2V is selected as V th .

[0120] Figure 9 Let P rf be the conduction loss when the soft switching is critically realized or not fully realized. The abscissa in the figure is t gs0 , and the ordinate is the conduction loss of the synchronous rectifier switch. Different curves represent the conduction losses under different v winding . Among them, P core is the winding loss; P sw is the core loss; P Rdri is the conduction loss of the switch of the resonant drive circuit; P Figure 9 It can be seen from rf that the conduction loss increases with the increase of t

[0121] S4. Design the resonant inductor of the resonant drive circuit according to the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch, the quantitative mathematical model of the resonant current of the resonant drive circuit, and the gate-source drive voltage of the synchronous rectifier switch when the switch current is 0 in different operating modes of the resonant drive circuit.

[0122] Specifically, at the moment of t1 + t rf , the expression of the instantaneous value of the leading gate-source drive voltage is:

[0123]

[0124] Combined with the expression of the instantaneous value of the leading gate-source drive voltage at the moment of t1 + t rf , the inductance value L dri of the resonant inductor of the resonant drive circuit is solved inversely, specifically:

[0125]

[0126] According to the inductance value L of the resonant inductor of the resonant drive circuit dri Design the resonant inductor of the resonant drive circuit.

[0127] S5. Calculate the drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times according to the resonant inductor of the resonant drive circuit.

[0128] Specifically, the drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times consists of the loss of the resonant inductor of the resonant drive circuit, the conduction loss of the switch of the resonant drive circuit, and the drive resistance loss of the resonant drive circuit. Among them, the loss of the resonant inductor of the resonant drive circuit is divided into winding loss and core loss.

[0129] The drive loss P during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times dri , that is:[[]]

[0130] P dri = P winding + P core + P sw + P Rdri

[0131] That is to say, the loss of the resonant inductor of the resonant drive circuit is divided into winding loss and core loss. The calculation formula for the winding loss is:[[]]

[0132] P winding = I L 2 R ac

[0133] The calculation formula for the core loss is:[[]]

[0134] P core = P V V core

[0135] Among them, P winding is the winding loss; I L is the effective value of the current of the resonant inductor of the resonant drive circuit; R ac is the AC resistance of the resonant inductor of the resonant drive circuit; P core is the core loss; P v is the core loss per unit volume; V core is the core volume.

[0136] The calculation formula for the conduction loss of the switch of the resonant drive circuit is:[[]]

[0137] P sw = I L 2 R ds(on)sw

[0138] The calculation formula for the driving resistance loss of the resonant driving circuit is as follows:

[0139]

[0140] Where, P sw is the conduction loss of the switch of the resonant driving circuit; R ds(on)sw is the on-resistance of the switch of the resonant driving circuit; P Rdri is the driving resistance loss of the resonant driving circuit; R dri is the resistance value of the driving resistance of the resonant driving circuit.

[0141] Figure 10 is the driving loss at different t rf . As can be seen from Figure 10 , during the reverse conduction process of the synchronous rectifier switch, the driving loss at different gate-source drive voltage rise times decreases with the increase of t rf .

[0142] S6. Calculate the total loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times according to the conduction loss and driving loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times, and select the gate-source drive voltage rise time with the minimum total loss.

[0143] Calculate the total switching loss of the converter at different gate-source voltage rise times according to the conduction loss during the reverse conduction process of the synchronous rectifier switch and the loss of the resonant driving circuit, and select t rf in the interval with the minimum loss. As can be seen from Figure 9 , the conduction loss of the synchronous rectifier switch increases with t rf increasing, and as can be seen from Figure 10 , the loss of the synchronous rectifier switch decreases with the increase of t rf . According to the curves of Figure 9 and Figure 10 , 120 ns is selected as t rf in this case, and the inductance of the resonant driving circuit is 0.6 μH at this time.

[0144] Figure 11 is the experimental result diagram of the resonant driving circuit, Figure 12 is the experimental result diagram of the LLC circuit with optimized resonant driving. Among them, (a) is the case of a load current of 50 A, and (b) is the case of a load current of 200 A. The experimental results of the case of the present invention are as shown in Figure 11 and Figure 12 . Figure 11 Displays the measured gate-source and drain-source voltage waveforms of the synchronous rectifier switch. V gs0 That is, V thIncreased to 2.2V, higher than the 1.6V threshold voltage. The smooth V ds transition confirms the full realization of ZVS. At the same time, V ds has no obvious negative voltage bulge, minimizing SR conduction losses. Figure 12 shows the waveforms of the LLC converter at different load currents. The circuit works well at different load points. The primary switch achieves full ZVS, while the secondary switch achieves ideal zero-voltage switching and reverse conduction at different load currents. Figure 11 and Figure 12 The experimental results show that the present invention can optimize the synchronous rectification switch resonance drive circuit for low-voltage and high-current applications.

[0145] In another embodiment of the present invention, a computer device is provided. The computer device includes a processor and a memory. The memory is used to store a computer program. The computer program includes program instructions. The processor is used to execute the program instructions stored in the computer storage medium. The processor may be a central processing unit (CPU), or may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, and is suitable for implementing one or more instructions. Specifically, it is suitable for loading and executing one or more instructions in the computer storage medium to implement the corresponding method flow or corresponding function. The processor described in the embodiments of the present invention can be used for the operation of an optimization method for synchronous rectification switch resonance drive of a low-voltage and high-current converter.

[0146] In another embodiment of the present invention, the present invention further provides a storage medium, specifically a computer-readable storage medium (Memory). The computer-readable storage medium is a memory device in a computer device and is used to store programs and data. It can be understood that the computer-readable storage medium here can include both the built-in storage medium in the computer device and, of course, the extended storage medium supported by the computer device. The computer-readable storage medium provides a storage space, and the operating system of the terminal is stored in this storage space. Moreover, one or more instructions suitable for being loaded and executed by the processor are stored in this storage space, and these instructions can be one or more computer programs (including program codes). It should be noted that the computer-readable storage medium here can be a high-speed RAM memory or a non-volatile memory, such as at least one disk memory. One or more instructions stored in the computer-readable storage medium can be loaded and executed by the processor to implement the corresponding steps of the optimization method for synchronous rectification switch resonance driving of a low-voltage high-current converter in the above embodiment.

[0147] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, a system, or a computer program product. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program codes.

[0148] The present invention is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to the embodiments of the present invention. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the functions specified in Figure 1 one or more of these flows or multiple flows and / or blocks Figure 1 one or more of these blocks or multiple blocks.

[0149] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device implements the functions in the process Figure 1One process or multiple processes and / or boxes Figure 1 The functions specified in one box or multiple boxes.

[0150] These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one process or multiple processes and / or boxes Figure 1 One process or multiple processes and / or boxes Figure 1 The steps for implementing the functions specified in one box or multiple boxes.

[0151] The present invention also provides a computer program product, which is used to execute any one of the above-mentioned optimization methods for synchronous rectification switch resonance drive of a low-voltage high-current converter. Since the computer program product provided by the present invention and the above-mentioned optimization method for synchronous rectification switch resonance drive of a low-voltage high-current converter belong to the same inventive concept, the computer program product provided by the present invention has all the advantages of the above-mentioned optimization method for synchronous rectification switch resonance drive of a low-voltage high-current converter. Therefore, the beneficial effects of the computer program product provided by the present invention will not be elaborated one by one here.

[0152] In the present invention, terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0153] Finally, it should be noted that the above-described embodiments are only specific embodiments of the present invention, used to illustrate the technical solutions of the present invention, rather than limiting it. The protection scope of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that any person skilled in the art within the technical scope disclosed by the present invention can still modify the technical solutions recorded in the foregoing embodiments, or can easily think of changes, or perform equivalent replacements on some of the technical features; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims described.

Claims

1. An optimization method for synchronous rectification switching resonance drive of a low-voltage and high-current converter, characterized in that, Including: Establish a quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch; Based on the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage, calculate the conduction loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times under the set switch current and maximum gate-source drive voltage; Respectively establish a quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch and a quantitative mathematical model of the resonant current of the resonant drive circuit in different operating modes of the resonant drive circuit, and design the gate-source drive voltage of the synchronous rectifier switch when the switch current is 0; Design the resonant inductor of the resonant drive circuit according to the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch, the quantitative mathematical model of the resonant current of the resonant drive circuit, and the gate-source drive voltage of the synchronous rectifier switch when the switch current is 0 in different operating modes of the resonant drive circuit; Calculate the drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times according to the resonant inductor of the resonant drive circuit; Calculate the overall loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times according to the conduction loss and drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times, and select the gate-source drive voltage rise time with the minimum overall loss.

2. The optimization method for synchronous rectification switching resonance drive of a low-voltage high-current converter according to claim 1, characterized in that The establishment process of the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch is specifically as follows: a. Set the gate-source drive voltage as a step-down voltage, where the maximum voltage of the step-down voltage is the maximum drive voltage of the gate-source drive voltage and the minimum voltage is 0; b. Set the switch current during the reverse conduction process of the synchronous rectifier switch as a fixed value, and record the reverse conduction voltage of the synchronous rectifier switch under the gate-source drive voltage; c. Calculate the reverse conduction resistance of the synchronous rectifier switch according to the switch current during the reverse conduction process of the synchronous rectifier switch and the reverse conduction voltage of the synchronous rectifier switch under the gate-source drive voltage; d. Change the set value of the switch current during the reverse conduction process of the synchronous rectifier switch, and repeat steps b and c until the set number of executions; e. Fit the reverse conduction resistance of the synchronous rectifier switch and the gate-source drive voltage under the fixed-value switch current to obtain the relationship between the reverse conduction resistance of the synchronous rectifier switch and the set gate-source drive voltage; f. Fit the relationship between the reverse conduction resistances of the synchronous rectifier switch under different switch currents and the same gate-source drive voltage to obtain the relative relationship between different reverse conduction resistances under different switch currents and the same gate-source drive voltage; g. Combine the relationship between the reverse conduction resistance of the synchronous rectifier switch and the set gate-source drive voltage, and the relative relationship between different reverse conduction resistances under different switch currents and the same gate-source drive voltage to obtain the quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage during the reverse conduction process of the synchronous rectifier switch.

3. The optimization method for synchronous rectification switching resonance drive of a low-voltage high-current converter according to claim 2, characterized in that, The quantitative mathematical model of the reverse conduction resistance, switch current, and gate-source drive voltage is: Wherein, R sd is the reverse conduction resistance; V gs is the gate-source drive voltage; I s is the switching current; f1(V gs ) is the relationship between the reverse conduction resistance and the gate-source drive voltage; f rel21 (V gs ) is the relative relationship between the reverse conduction resistances under the same gate-source drive voltage but different switching currents; a i and b j are fitting coefficients; m and n represent the polynomial coefficients of the numerator and denominator; I s1 and I s2 are two different switching currents; R sd (V gs , I s2 ) and R sd (V gs , I s1 ) are the reverse conduction resistances under the same gate-source drive voltage V s1 and I s2 for two different switching currents I gs ; α(I s ) is the influence coefficient of the varying switching current on the reverse conduction resistance.

4. An optimization method for synchronous rectifier switch resonant drive of a low-voltage high-current converter according to claim 1, wherein calculating the conduction loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise / fall times specifically includes: Where p con (t) is the conduction loss; t is the time; i s (t) is the instantaneous value of the switching current; I sm is the maximum value of the switching current; T s is the switching period; t d is the dead time; v gs (t) is the instantaneous value of the gate-source drive voltage; V th is the gate-source drive voltage when the switching current is 0; V dr is the maximum gate-source drive voltage; t rf is the time when the gate-source drive voltage rises from V th to V dr ; t on is the duration of the maximum gate-source drive voltage; k is the rising slope of the gate-source drive voltage.

5. The optimization method for synchronous rectification switch resonance drive of a low-voltage high-current converter according to claim 4, wherein, The quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch and the quantitative mathematical model of the resonant current of the resonant drive circuit in different operating modes specifically include: In the stage from 0 to t1, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch are: In the stage from t1 to t2, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch are: In the stage from t2 to t3, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch are: In the stages from t3 to t4 and from t4 to t5, the expressions of the quantitative mathematical model of the resonant current of the resonant drive circuit and the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch are: wherein, t1 is the moment when the leading gate-source drive voltage V gs1 starts to drop from the maximum gate-source drive voltage to 0; in Case 1: t2 is the moment when the leading gate-source drive voltage V gs1 drops to 0, and t3 is the moment when the lagging gate-source drive voltage V gs2 starts to rise from 0; in Case 2: t2 is the moment when the lagging gate-source drive voltage V gs2 starts to rise from 0, and t3 is the moment when the leading gate-source drive voltage V gs1 drops to 0; t4 is the moment when the lagging gate-source drive voltage V gs2 rises to the maximum gate-source drive voltage; t5 is the end moment of the positive half-cycle when the resonant current drops to 0; wherein, Case 1 means that the dropping process of the leading gate-source drive voltage V gs1 and the rising process of the lagging gate-source drive voltage V gs2 do not overlap; Case 2 means that the dropping process of the leading gate-source drive voltage V gs1 overlaps with the rising process of the lagging gate-source drive voltage V gs2 ; Where, i L (t) is the instantaneous value of the resonant inductor current of the resonant drive circuit; L dri is the inductance value of the resonant inductor of the resonant drive circuit; v gs1 (t) is the instantaneous value of the leading gate-source drive voltage; K1 is the maximum value of the resonant inductor current of the resonant drive circuit during the stage t1 - t2; ω1 is the angular frequency of the resonant inductor current of the resonant drive circuit during the stage t1 - t2; is the initial phase of the resonant inductor current of the resonant drive circuit during the time period t1 - t2; C iss is the input capacitance of the synchronous rectifier switch; I1 is the value of the resonant inductor current of the resonant drive circuit at time t1; V1 is the value of the leading gate-source drive voltage at time t1; K2 is the maximum value of the resonant inductor current of the resonant drive circuit during the stage t2 - t3; ω2 is the angular frequency of the resonant inductor current of the resonant drive circuit during the stage t2 - t3; is the initial phase of the resonant inductor current of the resonant drive circuit during the time period t2 - t3; V2 is the value of the leading gate-source drive voltage at time t2; v gs2 (t) is the instantaneous value of the lagging gate-source drive voltage; I2 is the value of the resonant inductor current of the resonant drive circuit at time t2.

6. The optimization method for synchronous rectification switch resonance drive of a low-voltage high-current converter according to claim 5, characterized in that Designing the gate-source drive voltage of the synchronous rectifier switch when the switch current is 0 specifically includes: The gate-source drive voltage of the synchronous rectifier switch when the switch current is 0 should be higher than the turn-on voltage of the synchronous rectifier switch to ensure that when the switch current is 0, soft switching is critically achieved or soft switching is not fully achieved; the standard for non-fully achieved soft switching is that when the switch current is 0, the drain-source voltage of the synchronous rectifier switch is 5% - 10% of the maximum drain-source voltage.

7. An optimization method for synchronous rectification switching resonance driving of a low-voltage high-current converter according to claim 6, characterized in that Designing the resonant inductor of the resonant drive circuit according to the quantitative mathematical model of the gate-source drive voltage of the synchronous rectifier switch in different operating modes of the resonant drive circuit, the quantitative mathematical model of the resonant current of the resonant drive circuit, and the gate-source drive voltage of the synchronous rectifier switch when the switch current is 0 specifically includes: At t1 + t rf The expression for the instantaneous value of the leading gate-source drive voltage at this moment is: Combined at t1 + t rf At this moment, from the expression of the instantaneous value of the leading gate-source drive voltage, the inductance value L of the resonant inductor of the resonant drive circuit is inversely solved dri Specifically: According to the inductance value L of the resonant inductor of the resonant drive circuit dri Design the resonant inductor of the resonant drive circuit.

8. An optimization method for synchronous rectification switch resonance drive of a low-voltage high-current converter according to claim 7, characterized in that, The resonant inductor of the resonant drive circuit calculates the drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times specifically includes: The drive loss during the reverse conduction process of the synchronous rectifier switch at different gate-source drive voltage rise times consists of the resonant inductor loss of the resonant drive circuit, the conduction loss of the switch of the resonant drive circuit, and the drive resistance loss of the resonant drive circuit. Among them, the resonant inductor loss of the resonant drive circuit is divided into winding loss and core loss; that is: P dri = P winding + P core + P sw + P Rdri P winding = I L 2 R ac P core = P V V core P sw = I L 2 R ds(on)sw Where, P dri is the driving loss during the reverse conduction of the synchronous rectifier switch at different gate-source drive voltage rise times; P winding is the winding loss; P core is the core loss; P sw is the conduction loss of the switch in the resonant drive circuit; P Rdri is the driving resistance loss of the resonant drive circuit; I L is the effective value of the resonant inductor current in the resonant drive circuit; R ac is the AC resistance of the resonant inductor in the resonant drive circuit; P v is the core loss per unit volume; V core is the core volume; R ds(on)sw is the on-resistance of the switch in the resonant drive circuit; R dri is the resistance value of the driving resistance in the resonant drive circuit.

9. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it realizes an optimization method for synchronous rectifier switch resonant drive of a low-voltage high-current converter according to any one of claims 1 to 8.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it realizes an optimization method for synchronous rectifier switch resonant drive of a low-voltage high-current converter according to any one of claims 1 to 8.

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