Image processing method and device

Abstract

The invention provides an image processing method and device, relates to the technical field of media, and can perform adaptive filtering in combination with the authority of a user in an image encoding and decoding process. The method comprises the following steps: determining permission values of other pixels in a preset window where a to-be-filtered pixel in a current coding unit is located; wherein if the first pixel is located in the self-adaptive correction filtering unit corresponding to the current coding unit, the permission value of the first pixel is obtained from the permission storage unit corresponding to the first pixel; if the first pixel is located outside the self-adaptive correction filtering unit corresponding to the current coding unit, taking the permission value of the pixel closest to the first pixel in the self-adaptive correction filtering unit as the permission value of the first pixel, or obtaining the permission value of the first sample from a permission storage unit corresponding to the first sample; the first pixel is any one of other pixels; and based on the permission values of other pixels and the permission value of the to-be-filtered pixel, determining whether the to-be-filtered pixel needs to be subjected to skip filtering.

Description

[0001] This application claims the priority of a Chinese patent application with the application number 202410040143.9 and the application title "An Image Processing Method and Device", which was filed with the National Intellectual Property Administration on January 9, 2024. The entire content thereof is incorporated herein by reference. Technical Field

[0002] This application relates to the field of media technology, and in particular, to an image processing method and device. Background Art

[0003] During the video image encoding and decoding process, filtering the image can improve the quality of the video image.

[0004] Currently, in scenarios involving privacy protection (or called permission protection), how to perform image adaptive filtering to flexibly adapt to the needs of different users still requires further research. Summary of the Invention

[0005] This application provides an image processing method and device, which can perform adaptive filtering in combination with the user's permissions during the image encoding and decoding process.

[0006] This application adopts the following technical solutions:

[0007] In a first aspect, this application provides an image processing method, including: determining the permission values of other pixels within a preset window where the pixel to be filtered in the current coding unit is located; wherein, if a first pixel is within the adaptive correction filtering unit corresponding to the current coding unit, obtaining the permission value of the first pixel from the permission storage unit corresponding to the first pixel; if the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit, using the permission value of the pixel closest to the first pixel within the adaptive correction filtering unit as the permission value of the first pixel, or obtaining the permission value of the first sample from the permission storage unit corresponding to the first sample; the first pixel is any one of the other pixels; and determining whether to skip filtering the pixel to be filtered based on the permission values of the other pixels and the permission value of the pixel to be filtered.

[0008] In this application, a pixel is a sample in an image. Therefore, a pixel can be replaced with a sample. The pixel to be filtered mentioned above can also be called a sample to be filtered, other pixels can be called other samples, and the first pixel can be called the first sample.

[0009] In the image processing method provided by this application, in a privacy protection scenario, for the pixels to be filtered in the current coding unit, it is possible to determine whether to skip filtering based on the permission values of other pixels within a preset window where the pixels to be filtered are located. Among them, for other samples within the adaptive correction filtering unit and other samples outside the adaptive correction filtering unit corresponding to the current coding unit, this application provides a solution for determining their permission values, and can perform adaptive filtering in combination with the user's permissions during the image encoding and decoding process.

[0010] Furthermore, the image processing method provided by this application can save cache during the image filtering process and does not require caching the true permission values of other samples outside the adaptive correction filtering unit. Furthermore, when other samples are located outside the chip and cross-chip filtering is not supported, this method can also estimate the permission values of other samples for use in determining whether to skip filtering for the samples to be filtered.

[0011] In a possible implementation, if there are pixels among other pixels whose permission values are greater than the permission value of the pixel to be filtered, it is determined to skip filtering for the pixel to be filtered; otherwise, it is determined that filtering is required for the pixel to be filtered.

[0012] In a possible implementation, the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit, including: the first pixel is outside the image boundary where the current coding unit is located; or, the first pixel is outside the boundary of the slice to which the pixel to be filtered belongs, and the current coding unit does not support adaptive correction filtering across the slice boundary; or, the first pixel is outside the upper boundary or lower boundary of the adaptive correction filtering unit corresponding to the current coding unit.

[0013] In a possible implementation, the above-mentioned preset window includes samples (x + i, y + j); where (x, y) represents the sample to be filtered; i, j = -3, -2, -1, 0, 1, 2, 3.

[0014] In a second aspect, this application provides an image processing device, which includes various modules for implementing the method described in the first aspect and any of its possible implementations. This image processing device has the function of implementing the behaviors in any of the method examples described in the above-mentioned first aspect and any of its possible implementations. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0015] In a third aspect, this application provides an image processing device, including at least one processor and a memory. The at least one processor executes a program or instruction stored in the memory so that the image processing device implements the method described in any of the above-mentioned first aspect or any of its possible implementations.

[0016] Optionally, in the present application, the above image processing device may be an encoding device or a decoding device, or the image processing device is a part of the encoding device or the decoding device, and no specific limitation is made.

[0017] In a fourth aspect, the present application further provides a computer-readable storage medium for storing a computer program, where the computer program includes a method for implementing the method described in the above first aspect or any possible implementation manner thereof.

[0018] In a fifth aspect, the present application further provides a computer program product including instructions, which, when running on a computer, causes the computer to implement the method described in the above first aspect or any possible implementation manner thereof.

[0019] In a sixth aspect, the present application further provides a chip, including: an input interface, an output interface, and at least one processor. Optionally, the chip further includes a memory. The at least one processor is configured to execute the code in the memory, and when the at least one processor executes the code, the chip implements the method described in the above first aspect or any possible implementation manner thereof.

[0020] Optionally, the above chip may also be an integrated circuit.

[0021] The decoding device, computer storage medium, computer program product, and chip provided in the present application are all used to execute the method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the method provided above, and will not be elaborated here. Description of the Drawings

[0022] Figure 1a It is an exemplary block diagram of a decoding system provided by an embodiment of the present application;

[0023] Figure 1b It is an exemplary block diagram of a video decoding system provided by an embodiment of the present application;

[0024] Figure 2 It is an exemplary block diagram of a video encoder provided by an embodiment of the present application;

[0025] Figure 3 It is an exemplary block diagram of a video decoder provided by an embodiment of the present application;

[0026] Figure 4 It is an exemplary schematic diagram of a candidate image block provided by an embodiment of the present application;

[0027] Figure 5 It is an exemplary block diagram of a video decoding device provided by an embodiment of the present application;

[0028] Figure 6An exemplary block diagram of the device provided by the embodiment of the present application;

[0029] Figure 7 A schematic diagram of adaptively correcting a filtering coefficient provided by the embodiment of the present application;

[0030] Figure 8 Another schematic diagram of adaptively correcting a filtering coefficient provided by the embodiment of the present application;

[0031] Figure 9 A schematic flowchart of an image processing method provided by the embodiment of the present application;

[0032] Figure 10 A schematic diagram of a preset window provided by the embodiment of the present application;

[0033] Figure 11 A schematic diagram of a privacy area, a non-privacy area, and a preset window in an image provided by the embodiment of the present application;

[0034] Figure 12 A schematic diagram of the determination process of a sample permission value provided by the embodiment of the present application;

[0035] Figure 13 A schematic diagram of an image processing device provided by the embodiment of the present application;

[0036] Figure 14 A schematic diagram of the structure of a chip provided by the embodiment of the present application;

[0037] Figure 15 A schematic diagram of the structure of an electronic device provided by the embodiment of the present application;

[0038] Figure 16 A schematic diagram of the structure of an image processing device provided by the embodiment of the present application. Detailed implementation manners

[0039] The term "and / or" in this article is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. These three situations.

[0040] In the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations, or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the embodiments of the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Exactly speaking, using words such as "exemplary" or "for example" is intended to present relevant concepts in a specific manner.

[0041] In the description of the embodiments of the present application, unless otherwise specified, "a plurality of" means two or more.

[0042] Data encoding and decoding include two parts: data encoding and data decoding. Data encoding is performed on the source side (or usually referred to as the encoder side), and generally includes processing (e.g., compressing) the original data to reduce the amount of data required to represent the original data (so as to store and / or transmit more efficiently). Data decoding is performed on the destination side (or usually referred to as the decoder side), and generally includes performing inverse processing relative to the encoder side to reconstruct the original data. The "encoding and decoding" of data involved in the embodiments of the present application should be understood as "encoding" or "decoding" of data. The encoding part and the decoding part are also collectively referred to as encoding and decoding (encoding and decoding, CODEC).

[0043] In the case of lossless data encoding, the original data can be reconstructed, that is, the reconstructed original data has the same quality as the original data (assuming no transmission loss or other data loss during storage or transmission). In the case of lossy data encoding, further compression is performed through quantization, etc., to reduce the amount of data required to represent the original data, and the decoder side cannot completely reconstruct the original data, that is, the quality of the reconstructed original data is lower or worse than the quality of the original data.

[0044] The embodiments of the present application can be applied to video data and other data with compression / decompression requirements, etc. The following takes the encoding of video data (abbreviated as video encoding) as an example to illustrate the embodiments of the present application. Other types of data (such as image data, audio data, integer data, and other data with compression / decompression requirements) can refer to the following description, and the embodiments of the present application will not be elaborated herein. It should be noted that compared with video encoding, during the encoding process of data such as audio data and integer data, the data does not need to be divided into blocks, but can be directly encoded.

[0045] Video encoding generally refers to processing an image sequence that forms a video or a video sequence. In the field of video encoding, the terms "picture", "frame", or "image" can be used as synonyms.

[0046] Several video coding standards belong to "lossy hybrid video coding and decoding" (i.e., combining spatial and temporal prediction in the pixel domain with 2D transform coding for quantization in the transform domain). Each image in a video sequence is typically segmented into a set of non-overlapping blocks, and encoding is usually performed at the block level. In other words, the encoder typically processes and encodes video at the block (video block) level. For example, a predicted block is generated through spatial (intra-frame) prediction and temporal (inter-frame) prediction; the predicted block is subtracted from the current block (the currently processed / block to be processed) to obtain a residual block; the residual block is transformed and quantized in the transform domain to reduce the amount of data to be transmitted (compressed), and the decoder side applies the inverse processing part relative to the encoder to the encoded or compressed block to reconstruct the current block for representation. Additionally, the encoder needs to repeat the processing steps of the decoder so that the encoder and the decoder generate the same predictions (e.g., intra-frame prediction and inter-frame prediction) and / or reconstructed pixels for processing, i.e., encoding subsequent blocks.

[0047] In the following embodiments of the decoding system 10, the encoder 20 and the decoder 30 are described according to Figures 1a to 3 this.

[0048] Figure 1a FIG. is an exemplary block diagram of a decoding system 10 provided by an embodiment of the present application. For example, a video decoding system 10 (or simply referred to as the decoding system 10) that can utilize the technology of the embodiment of the present application. The video encoder 20 (or simply referred to as the encoder 20) and the video decoder 30 (or simply referred to as the decoder 30) in the video decoding system 10 represent devices and the like that can be used to execute various techniques according to the various examples described in the embodiments of the present application.

[0049] As Figure 1a shown, the decoding system 10 includes a source device 12, and the source device 12 is configured to provide encoded image data 21 such as encoded images to a destination device 14 for decoding the encoded image data 21.

[0050] The source device 12 includes an encoder 20, and additionally, optionally, may include an image source 16, a pre-processor (or pre-processing unit) 18 such as an image pre-processor, and a communication interface (or communication unit) 22.

[0051] The image source 16 may include or be any type of image capture device for capturing real-world images, etc., and / or any type of image generation device, such as a computer graphics processor for generating computer animation images or any type of device for acquiring and / or providing real-world images, computer-generated images (e.g., screen content, virtual reality (VR) images, and / or any combination thereof (e.g., augmented reality (AR) images). The above image source may be any type of memory or storage for storing any of the above images.

[0052] To distinguish the processing performed by the preprocessor (or preprocessing unit) 18, the image (or image data) 17 may also be referred to as the raw image (or raw image data) 17.

[0053] The preprocessor 18 is configured to receive the raw image data 17 and preprocess the raw image data 17 to obtain preprocessed image (or preprocessed image data) 19. For example, the preprocessing performed by the preprocessor 18 may include trimming, color format conversion (e.g., from RGB to YCbCr), color correction, or denoising. It can be understood that the preprocessing unit 18 may be an optional component.

[0054] The video encoder (or encoder) 20 is configured to receive the preprocessed image data 19 and provide encoded image data 21 (which will be further described below in accordance with Figure 2 etc.).

[0055] The communication interface 22 in the source device 12 may be used to: receive the encoded image data 21 and transmit the encoded image data 21 (or any other processed version) to another device such as the destination device 14 or any other device via the communication channel 13 for storage or direct reconstruction.

[0056] The destination device 14 includes a decoder 30, and additionally, optionally, may include a communication interface (or communication unit) 28, a postprocessor (or postprocessing unit) 32, and a display device 34.

[0057] The communication interface 28 in the destination device 14 is configured to directly receive the encoded image data 21 (or any other processed version) from the source device 12 or from any other source device such as a storage device. For example, the storage device is an encoded image data storage device, and provide the encoded image data 21 to the decoder 30.

[0058] The communication interfaces 22 and 28 can be used to send or receive encoded image data (or encoded data) 21 through a direct communication link between the source device 12 and the destination device 14, such as a direct wired or wireless connection, etc., or through any type of network, such as a wired network, a wireless network, or any combination thereof, any type of private network and public network, or any combination of any type thereof.

[0059] For example, the communication interface 22 can be used to encapsulate the encoded image data 21 into a suitable format such as a message, and / or use any type of transmission encoding or processing to process the encoded image data above for transmission on the communication link or communication network.

[0060] The communication interface 28 corresponds to the communication interface 22. For example, it can be used to receive the transmitted data and process the transmitted data using any type of corresponding transmission decoding or processing and / or de-encapsulation to obtain the encoded image data 21.

[0061] Both the communication interface 22 and the communication interface 28 can be configured as Figure 1a a unidirectional communication interface as indicated by the arrow of the corresponding communication channel 13 pointing from the source device 12 to the destination device 14 in

[0062] or a bidirectional communication interface, and can be used to send and receive messages, etc., to establish a connection, confirm and exchange any other information related to the communication link and / or data transmission such as the transmission of encoded image data, etc. Figure 3 etc. will be further described below.

[0063] The video decoder (or decoder) 30 is used to receive the encoded image data 21 and provide decoded image data (or decoded image data) 31 (which will be further described below according to

[0064] The display device 34 is configured to receive the post - processed image data 33 to display an image to a user, viewer, etc. The display device 34 may be or include any type of display for presenting the reconstructed image. For example, an integrated or external display screen or monitor. For example, the display screen may include a liquid crystal display (LCD), an organic light - emitting diode (OLED) display, a plasma display, a projector, a micro - LED display, a liquid crystal on silicon (LCoS), a digital light processor (DLP), or any other type of display screen.

[0065] The decoding system 10 further includes a training engine 25. The training engine 25 is configured to train the encoder 20 (especially the entropy - coding unit 270 in the encoder 20) or the decoder 30 (especially the entropy - decoding unit 304 in the decoder 30) to perform entropy coding on the image blocks to be encoded according to the estimated probability distribution. For a detailed description of the training engine 25, please refer to the following method test embodiments.

[0066] Although Figure 1a The source device 12 and the destination device 14 are shown as separate devices, but the device embodiments may also include both the source device 12 and the destination device 14 or the functions of both the source device 12 and the destination device 14 simultaneously, that is, including both the source device 12 or the corresponding function and the destination device 14 or the corresponding function. In these embodiments, the source device 12 or the corresponding function and the destination device 14 or the corresponding function may be implemented using the same hardware and / or software, or by separate hardware and / or software, or any combination thereof.

[0067] According to the description, Figure 1a The presence and (exact) division of different units or functions in the illustrated source device 12 and / or destination device 14 may vary according to the actual device and application, which is obvious to those skilled in the art.

[0068] Please refer to Figure 1b , Figure 1b FIG. is an exemplary block diagram of a video decoding system 40 provided by an embodiment of the present application. The encoder 20 (such as a video encoder 20) or the decoder 30 (such as a video decoder 30), or both, may be implemented by, for example, Figure 1bThe processing circuitry in the illustrated video decoding system 40 is implemented by, for example, one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, video coding dedicated processors, or any combination thereof. Refer to Figure 2 and Figure 3 , Figure 2 which is an exemplary block diagram of a video encoder provided by an embodiment of the present application, Figure 3 and Figure 2 which is an exemplary block diagram of a video decoder provided by an embodiment of the present application. The encoder 20 can be implemented by the processing circuitry 46 to include various modules discussed with reference to Figure 3 the encoder 20 and / or any other encoder system or subsystem described herein. The decoder 30 can be implemented by the processing circuitry 46 to include various modules discussed with reference to Figure 3 the decoder 30 and / or any other decoder system or subsystem described herein. The above-mentioned processing circuitry 46 can be used to perform various operations discussed below. As Figure 5 shown, if part of the technology is implemented in software, the device can store the instructions of the software in a suitable non-transitory computer-readable storage medium and execute the instructions in hardware using one or more processors, thereby implementing the technology of the embodiments of the present application. One of the video encoder 20 and the video decoder 30 can be integrated as part of a combined codec (encoder / decoder, CODEC) in a single device, as Figure 1b shown.

[0069] The source device 12 and the destination device 14 can include any of a variety of devices, including any type of handheld device or fixed device, such as, for example, a laptop or notebook computer, a mobile phone, a smartphone, a tablet or tablet computer, a camera, a desktop computer, a set-top box, a television, a display device, a digital media player, a video game console, a video streaming device (e.g., a content service server or a content distribution server), a broadcast receiving device, a broadcast transmitting device, and a monitoring device, etc., and may or may not use any type of operating system. The source device 12 and the destination device 14 can also be devices in a cloud computing scenario, such as virtual machines in a cloud computing scenario. In some cases, the source device 12 and the destination device 14 can be equipped with components for wireless communication. Therefore, the source device 12 and the destination device 14 can be wireless communication devices.

[0070] The source device 12 and the destination device 14 can install virtual scene application programs (applications, APPs) such as virtual reality (VR) applications, augmented reality (AR) applications, or mixed reality (MR) applications, and can run VR applications, AR applications, or MR applications based on user operations (such as clicking, touching, swiping, shaking, voice control, etc.). The source device 12 and the destination device 14 can collect images / videos of any object in the environment through cameras and / or sensors, and then display virtual objects on the display device according to the collected images / videos. The virtual objects can be virtual objects in a VR scene, an AR scene, or an MR scene (i.e., objects in a virtual environment).

[0071] It should be noted that in the embodiments of the present application, the virtual scene application programs in the source device 12 and the destination device 14 can be application programs built into the source device 12 and the destination device 14 themselves, or can be application programs provided by third-party service providers installed by users themselves, and no specific limitation is made thereto.

[0072] In addition, the source device 12 and the destination device 14 can install real-time video transmission applications, such as live broadcast applications. The source device 12 and the destination device 14 can collect images / videos through cameras, and then display the collected images / videos on the display device.

[0073] In some cases, Figure 1a The video decoding system 10 shown is merely exemplary. The technology provided by the embodiments of the present application can be applied to video coding settings (e.g., video encoding or video decoding), and these settings do not necessarily include any data communication between the encoding device and the decoding device. In other examples, data is retrieved from a local memory, sent over a network, and so on. The video encoding device can encode data and store the data in a memory, and / or the video decoding device can retrieve data from the memory and decode the data. In some examples, encoding and decoding are performed by devices that do not communicate with each other but only encode data into a memory and / or retrieve and decode data from the memory.

[0074] Please refer to Figure 1b , Figure 1b which is an exemplary block diagram of the video decoding system 40 provided by the embodiments of the present application. As shown in Figure 1b , the video decoding system 40 can include an imaging device 41, a video encoder 20, a video decoder 30 (and / or a video codec implemented by a processing circuit 46), an antenna 42, one or more processors 43, one or more memory memories 44, and / or a display device 45.

[0075] As shown inFigure 1b As shown, the imaging device 41, antenna 42, processing circuit 46, video encoder 20, video decoder 30, processor 43, memory 44, and / or display device 45 can communicate with each other. In different instances, the video decoding system 40 may include only the video encoder 20 or only the video decoder 30.

[0076] In some instances, the antenna 42 can be used to transmit or receive an encoded bitstream of video data. Additionally, in some instances, the display device 45 can be used to present video data. The processing circuit 46 can include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, and so on. The video decoding system 40 can also include an optional processor 43, which can similarly include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, and so on. Additionally, the memory 44 can be any type of memory, such as volatile memory (e.g., static random access memory (SRAM), dynamic random access memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.). In a non-limiting instance, the memory 44 can be implemented by cache memory. In other instances, the processing circuit 46 can include a memory (e.g., a cache, etc.) for implementing an image buffer, etc.

[0077] In some instances, the video encoder 20 implemented by a logic circuit can include an image buffer (e.g., implemented by the processing circuit 46 or the memory 44) and a graphics processing unit (e.g., implemented by the processing circuit 46). The graphics processing unit can be communicatively coupled to the image buffer. The graphics processing unit can include the video encoder 20 implemented by the processing circuit 46 to implement the various modules discussed with reference to Figure 2 and / or any other encoder system or subsystem described herein. The logic circuit can be used to perform the various operations discussed herein.

[0078] In some instances, the video decoder 30 can be implemented in a similar manner by the processing circuit 46 to implement with reference to Figure 3The video decoder 30 and / or the various modules discussed for any other decoder system or subsystem described herein. In some examples, the video decoder 30 implemented by logic circuitry may include an image buffer (implemented by the processing circuitry 46 or the memory 44) and a graphics processing unit (e.g., implemented by the processing circuitry 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include the video decoder 30 implemented by the processing circuitry 46 to implement with reference to Figure 3 and / or the various modules discussed for any other decoder system or subsystem described herein.

[0079] In some examples, the antenna 42 may be used to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data, indicators, index values, mode selection data, etc. discussed herein related to encoded video frames, e.g., data related to encoded partitions (e.g., transform coefficients or quantized transform coefficients, optional indicators as discussed, and / or data defining the encoded partitions). The video decoding system 40 may further include a video decoder 30 coupled to the antenna 42 and configured to decode the encoded bitstream. A display device 45 is used to present video frames.

[0080] It should be understood that for the examples described with reference to the video encoder 20 in the embodiments of this application, the video decoder 30 may be used to perform the reverse process. Regarding signaling syntax elements, the video decoder 30 may be used to receive and parse such syntax elements and accordingly decode the relevant video data. In some examples, the video encoder 20 may entropy encode the syntax elements into an encoded video bitstream. In such examples, the video decoder 30 may parse such syntax elements and accordingly decode the relevant video data.

[0081] For ease of description, the embodiments of this application are described with reference to the Versatile Video Coding (VVC) reference software or the High-Efficiency Video Coding (HEVC) developed by the Video Coding Experts Group (VCEG) of the ITU-T and the Joint Collaboration Team on Video Coding (JCT-VC) of the ISO / IEC Moving Picture Experts Group (MPEG). Those of ordinary skill in the art understand that the embodiments of this application are not limited to HEVC or VVC.

[0082] Encoder and encoding method

[0083] As Figure 2As shown, the video encoder 20 includes an input end (or input interface) 201, a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a loop filter 220, a decoded picture buffer (DPB) 230, a mode selection unit 260, an entropy encoding unit 270, and an output end (or output interface) 272. The mode selection unit 260 may include an inter prediction unit 244, an intra prediction unit 254, and a segmentation unit 262. The inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). Figure 2 The video encoder 20 shown may also be referred to as a hybrid video encoder or a video encoder based on a hybrid video codec.

[0084] See Figure 2 , the inter prediction unit is a trained target model (also referred to as a neural network), and this neural network is used to process an input image or an image region or an image block to generate a predicted value of the input image block. For example, the neural network for inter prediction is used to receive an input image or an image region or an image block and generate a predicted value of the input image or an image region or an image block.

[0085] The residual calculation unit 204, the transform processing unit 206, the quantization unit 208, and the mode selection unit 260 form the forward signal path of the encoder 20, while the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, the inter prediction unit 244, and the intra prediction unit 254 form the backward signal path of the encoder, where the backward signal path of the encoder 20 corresponds to the signal path of the decoder (see Figure 3 the decoder 30 in). The inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the loop filter 220, the decoded picture buffer 230, the inter prediction unit 244, and the intra prediction unit 254 also form the "built-in decoder" of the video encoder 20.

[0086] Images and image segmentation (images and blocks)

[0087] The encoder 20 can be used to receive an image (or image data) 17 through an input terminal 201, etc., for example, an image in an image sequence forming a video or video sequence. The received image or image data can also be a preprocessed image (or preprocessed image data) 19. For simplicity, the following description uses the image 17. The image 17 can also be referred to as the current image or the image to be encoded (especially when distinguishing the current image from other images in video coding, such as the previously encoded and / or decoded images in the same video sequence, i.e., the video sequence that also includes the current image).

[0088] (Digital) images are or can be regarded as two-dimensional arrays or matrices composed of pixel points with intensity values. The pixel points in the array can also be called pixels (pixel or pel, short for picture element). The number of pixel points in the horizontal and vertical directions (or axes) of the array or image determines the size and / or resolution of the image. To represent colors, usually three color components are used, that is, the image can be represented as or include three pixel point arrays. In the RBG format or color space, the image includes corresponding red, green, and blue pixel point arrays. However, in video coding, each pixel is usually represented in a luminance / chrominance format or color space, such as YCbCr, including a luminance component indicated by Y (sometimes also denoted by L) and two chrominance components denoted by Cb and Cr. The luminance (luma) component Y represents the luminance or gray-level intensity (for example, the two are the same in a grayscale image), while the two chrominance (chrominance, abbreviated as chroma) components Cb and Cr represent the chrominance or color information components. Accordingly, an image in the YCbCr format includes a luminance pixel point array of luminance pixel point values (Y) and two chrominance pixel point arrays of chrominance values (Cb and Cr). An image in the RGB format can be converted or transformed into the YCbCr format, and vice versa, and this process is also called color transformation or conversion. If the image is black and white, the image can only include a luminance pixel point array. Accordingly, the image can be, for example, a luminance pixel point array in a monochrome format or a luminance pixel point array and two corresponding chrominance pixel point arrays in 4:2:0, 4:2:2, and 4:4:4 color formats.

[0089] In one embodiment, an embodiment of the video encoder 20 may include an image segmentation unit ( Figure 2(not shown in the figure) for splitting the image 17 into a plurality of (usually non-overlapping) image blocks 203. These blocks may also be referred to as root blocks, macro blocks (H.264 / AVC), or coding tree blocks (CTBs), or coding tree units (CTUs) in the H.265 / HEVC and VVC standards. The splitting unit can be used to use the same block size for all images in a video sequence and the corresponding grid defining the block size, or to change the block size between images or subsets of images or groups of images, and split each image into corresponding blocks.

[0090] In other embodiments, the video encoder can be used to directly receive the blocks 203 of the image 17, for example, one, several, or all of the blocks constituting the above-mentioned image 17. The image block 203 can also be referred to as the current image block or the image block to be encoded.

[0091] Similar to the image 17, the image block 203 is also or can be considered as a two-dimensional array or matrix composed of pixel points with intensity values (pixel point values), but the image block 203 is smaller than the image 17. In other words, the block 203 can include an array of pixel points (for example, the luminance array in the case of a monochrome image 17 or the luminance array or chrominance array in the case of a color image) or three arrays of pixel points (for example, one luminance array and two chrominance arrays in the case of a color image 17) or any other number and / or type of arrays according to the color format adopted. The number of pixel points in the horizontal and vertical directions (or axes) of the block 203 defines the size of the block 203. Accordingly, the block can be an array of M×N (M columns × N rows) pixel points, or an array of M×N transform coefficients, etc.

[0092] In one embodiment, Figure 2 the shown video encoder 20 is used to encode the image 17 block by block, for example, perform encoding and prediction on each block 203.

[0093] In one embodiment, Figure 2 the shown video encoder 20 can also be used to split and / or encode an image using slices (also called video slices), where the image can be split or encoded using one or more slices (usually non-overlapping). Each slice can include one or more blocks (for example, coding tree units CTUs) or one or more groups of blocks (for example, coding blocks (tiles) in the H.265 / HEVC / VVC standards and bricks in the VVC standard).

[0094] In one embodiment, Figure 2The video encoder 20 shown can also be used to segment and / or encode an image using slices / coding block groups (also referred to as video coding block groups) and / or coding blocks (also referred to as video coding blocks), where the image can be segmented or encoded using one or more slices / coding block groups (usually non-overlapping), each slice / coding block group may include one or more blocks (e.g., CTUs) or one or more coding blocks, etc., and each coding block can be in a shape such as a rectangle and may include one or more complete or partial blocks (e.g., CTUs).

[0095] Residual calculation

[0096] The residual calculation unit 204 is used to calculate the residual block 205 based on the image block (or original block) 203 and the prediction block 265 (the prediction block 265 is introduced in detail later) in the following manner: for example, subtract the pixel values of the prediction block 265 from the pixel values of the image block 203 pixel by pixel (pixel by pixel) to obtain the residual block 205 in the pixel domain.

[0097] Transformation

[0098] The transformation processing unit 206 is used to perform a discrete cosine transform (DCT) or a discrete sine transform (DST), etc. on the pixel values of the residual block 205 to obtain the transform coefficients 207 in the transform domain. The transform coefficients 207 can also be referred to as transform residual coefficients, representing the residual block 205 in the transform domain.

[0099] The transformation processing unit 206 can be used to apply an integer approximation of DCT / DST, such as the transformation specified for H.265 / HEVC. Compared with the orthogonal DCT transform, this integer approximation is usually scaled by a certain factor. In order to maintain the norm of the residual block after forward and inverse transform processing, other scaling factors are used as part of the transform process. The scaling factors are usually selected according to certain constraints, such as the power of 2 used for shift operations, the bit depth of the transform coefficients, the trade-off between accuracy and implementation cost, etc. For example, specific scaling factors are specified for the inverse transform by the inverse transform processing unit 212 on the encoder 20 side (and for the corresponding inverse transform by, for example, the inverse transform processing unit 312 on the decoder 30 side), and correspondingly, the corresponding scaling factors can be specified for the forward transform by the transformation processing unit 206 on the encoder 20 side.

[0100] In one embodiment, the video encoder 20 (correspondingly, the transform processing unit 206) may be used to output transform parameters such as the type of one or more transforms, for example, output directly or after being encoded or compressed by the entropy encoding unit 270, such that the video decoder 30 can receive and use the transform parameters for decoding.

[0101] Quantization

[0102] The quantization unit 208 is used to quantize the transform coefficients 207 through, for example, scalar quantization or vector quantization to obtain quantized transform coefficients 209. The quantized transform coefficients 209 may also be referred to as quantized residual coefficients 209.

[0103] The quantization process can reduce the bit depth associated with some or all of the transform coefficients 207. For example, during quantization, an n-bit transform coefficient can be rounded down to an m-bit transform coefficient, where n is greater than m. The degree of quantization can be modified by adjusting the quantization parameter (QP). For example, for scalar quantization, different degrees of scaling can be applied to achieve finer or coarser quantization. A smaller quantization step corresponds to finer quantization, while a larger quantization step corresponds to coarser quantization. The appropriate quantization step can be indicated by the quantization parameter (QP). For example, the quantization parameter can be an index of a predefined set of appropriate quantization steps. For example, a smaller quantization parameter can correspond to fine quantization (smaller quantization step), and a larger quantization parameter can correspond to coarse quantization (larger quantization step), and vice versa. Quantization can include dividing by the quantization step, and the corresponding or inverse dequantization performed by the dequantization unit 210 etc. can include multiplying by the quantization step. Embodiments according to some standards such as HEVC can be used to determine the quantization step using the quantization parameter. Generally, the quantization step can be calculated using a fixed-point approximation of an equation containing division according to the quantization parameter. Other scaling factors can be introduced for quantization and dequantization to recover the norm of the residual block that may be modified due to the scaling used in the fixed-point approximation of the equations for the quantization step and the quantization parameter. In one exemplary implementation, the scaling of the inverse transform and dequantization can be combined. Alternatively, a custom quantization table can be used and indicated from the encoder to the decoder in the bitstream. Quantization is a lossy operation, where the larger the quantization step, the greater the loss.

[0104] In one embodiment, the video encoder 20 (correspondingly, the quantization unit 208) may be used to output the quantization parameter (QP), for example, output directly or after being encoded or compressed by the entropy encoding unit 270, such that the video decoder 30 can receive and use the quantization parameter for decoding.

[0105] Dequantization

[0106] The inverse quantization unit 210 is used to perform inverse quantization on the quantization coefficients of the quantization unit 208 to obtain dequantized coefficients 211. For example, the inverse quantization scheme of the quantization scheme performed by the quantization unit 208 is performed according to or using the same quantization step as the quantization unit 208. The dequantized coefficients 211 may also be referred to as dequantized residual coefficients 211, corresponding to the transform coefficients 207. However, due to the loss caused by quantization, the inverse quantization coefficients 211 are usually not exactly the same as the transform coefficients.

[0107] Inverse transform

[0108] The inverse transform processing unit 212 is used to perform the inverse transform of the transform performed by the transform processing unit 206, such as inverse discrete cosine transform (DCT) or inverse discrete sine transform (DST), to obtain a reconstructed residual block 213 (or corresponding dequantized coefficients 213) in the pixel domain. The reconstructed residual block 213 may also be referred to as a transform block 213.

[0109] Reconstruction

[0110] The reconstruction unit 214 (e.g., adder 214) is used to add the transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265 to obtain a reconstructed block 215 in the pixel domain. For example, the pixel point values of the reconstructed residual block 213 and the pixel point values of the prediction block 265 are added together.

[0111] Filtering

[0112] The loop filter unit 220 (or simply referred to as "loop filter" 220) is used to filter the reconstructed block 215 to obtain a filtered block 221, or is generally used to filter reconstructed pixel points to obtain filtered pixel point values. For example, the loop filter unit is used to smoothly perform pixel transitions or improve video quality. The loop filter unit 220 may include one or more loop filters, such as a deblocking filter, a sample - adaptive offset (SAO) filter, or one or more other filters, such as an adaptive loop filter (ALF), a noise suppression filter (NSF), or any combination. For example, the loop filter unit 220 may include a deblocking filter, an SAO filter, and an ALF filter. The order of the filtering process may be the deblocking filter, the SAO filter, and the ALF filter. For another example, a process called luma mapping with chroma scaling (LMCS) (i.e., an adaptive in - loop shaper) is added. This process is performed before deblocking. For another example, the deblocking filtering process may also be applied to internal sub - block edges, such as affine sub - block edges, ATMVP sub - block edges, sub - block transform (SBT) edges, and intra sub - partition (ISP) edges. Although the loop filter unit 220 is shown as a loop filter in Figure 2 it, in other configurations, the loop filter unit 220 may be implemented as a post - loop filter. The filtered block 221 may also be referred to as the filtered reconstructed block 221.

[0113] In one embodiment, the video encoder 20 (correspondingly, the loop filter unit 220) may be used to output loop filter parameters (such as SAO filtering parameters, ALF filtering parameters, or LMCS parameters), for example, directly output or output after entropy coding by the entropy coding unit 270, such that the decoder 30 can receive and use the same or different loop filter parameters for decoding.

[0114] Decoded picture buffer

[0115] The decoded picture buffer (DPB) 230 may be a reference picture memory that stores reference picture data for use by the video encoder 20 when encoding video data. The DPB 230 may be formed of any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of storage devices. The decoded picture buffer 230 can be used to store one or more filtered blocks 221. The decoded picture buffer 230 can also be used to store other previously filtered blocks of the same current picture or different pictures such as a previous reconstructed picture, e.g., previously reconstructed and filtered blocks 221, and can provide a complete previously reconstructed i.e., decoded picture (and corresponding reference blocks and pixels) and / or a partially reconstructed current picture (and corresponding reference blocks and pixels), e.g., for inter prediction. The decoded picture buffer 230 can also be used to store one or more unfiltered reconstructed blocks 215, or generally unfiltered reconstructed pixels, e.g., reconstructed blocks 215 that have not been filtered by the loop filter unit 220, or reconstructed blocks or reconstructed pixels that have not undergone any other processing.

[0116] Mode Selection (Partitioning and Prediction)

[0117] The mode selection unit 260 includes a partitioning unit 262, an inter prediction unit 244, and an intra prediction unit 254, and is configured to receive or obtain raw picture data such as the raw block 203 (the current block 203 of the current picture 17) and reconstructed picture data from the decoded picture buffer 230 or other buffers (e.g., a column buffer, Figure 2 not shown in the figure), e.g., filtered and / or unfiltered reconstructed pixels or reconstructed blocks of the same (current) picture and / or one or more previous decoded pictures. The reconstructed picture data is used as reference picture data required for prediction such as inter prediction or intra prediction to obtain a predicted block 265 or a predicted value 265.

[0118] The mode selection unit 260 can be used to determine or select a partitioning for the current block (including no partitioning) and a prediction mode (e.g., an intra or inter prediction mode), and generate a corresponding predicted block 265 for calculating the residual block 205 and reconstructing the reconstructed block 215.

[0119] In one embodiment, the mode selection unit 260 may be used to select a partitioning and prediction mode (e.g., from the prediction modes supported or available to the mode selection unit 260), where the prediction mode provides the best match or the smallest residual (the smallest residual means better compression in transmission or storage), or provides the smallest signaling overhead (the smallest signaling overhead means better compression in transmission or storage), or considers or balances both of the above. The mode selection unit 260 may be used to determine the partitioning and prediction mode according to rate distortion Optimization (RDO), i.e., select the prediction mode that provides the smallest rate distortion optimization. The terms "best", "lowest", "optimal", etc. in this document do not necessarily refer to the "best", "lowest", "optimal" overall, but may also refer to the situation that meets the termination or selection criteria. For example, values that exceed or are below a threshold or other limitations may result in a "sub-optimal selection", but will reduce complexity and processing time.

[0120] In other words, the partitioning unit 262 may be used to partition the images in the video sequence into a sequence of coding tree units (CTUs), and the CTU 203 may be further partitioned into smaller block portions or sub-blocks (again forming blocks), for example, by iteratively using quad-tree partitioning (QT), binary-tree partitioning (BT), triple-tree partitioning (TT), or any combination thereof, and used to perform prediction on, for example, each of the block portions or sub-blocks, where mode selection includes selecting the tree structure for partitioning the block 203 and selecting the prediction mode applied to each of the block portions or sub-blocks.

[0121] The partitioning (e.g., performed by the partitioning unit 262) and prediction processing (e.g., performed by the inter-frame prediction unit 244 and the intra-frame prediction unit 254) performed by the video encoder 20 will be described in detail below.

[0122] Partitioning

[0123] The splitting unit 262 may split (or divide) an image block (or CTU) 203 into smaller parts, such as small blocks in the shape of a square or a rectangle. For an image with an array of three pixel points, one CTU consists of an N×N block of luminance pixel points and two corresponding chrominance pixel point blocks. The maximum allowable size of the luminance block in the versatile video coding (VVC) standard under development is specified as 128×128, but it may be specified as a value different from 128×128 in the future, such as 256×256. The CTUs of an image may be grouped / concentrated into slices / coding tree units, coding tree blocks, or tiles. A coding tree block covers a rectangular area of an image, and a coding tree block may be divided into one or more tiles. A tile consists of multiple CTU rows within a coding tree block. A coding tree block that is not divided into multiple tiles may be called a tile. However, a tile is a true subset of a coding tree block and thus is not called a coding tree block. VVC supports two coding tree unit modes, namely the raster scan slice / coding tree unit mode and the rectangular slice mode. In the raster scan coding tree unit mode, a slice / coding tree unit contains a sequence of coding tree blocks in the raster scan of the coding tree blocks of an image. In the rectangular slice mode, a slice contains multiple tiles of an image, and these tiles together form a rectangular area of the image. The tiles within a rectangular slice are arranged in the tile raster scan order of the slice. These smaller blocks (which may also be called sub-blocks) may be further divided into even smaller parts. This is also called tree splitting or hierarchical tree splitting, where a root block at the root tree level 0 (hierarchical level 0, depth 0), etc., can be recursively split into two or more blocks at the next lower tree level, such as nodes at tree level 1 (hierarchical level 1, depth 1). These blocks can in turn be split into two or more blocks at the next lower level, such as tree level 2 (hierarchical level 2, depth 2), etc., until the splitting ends (because an end criterion is met, such as reaching the maximum tree depth or the minimum block size). Blocks that are not further split are also called leaf blocks or leaf nodes of the tree. A tree split into two parts is called a binary tree (BT), a tree split into three parts is called a ternary tree (TT), and a tree split into four parts is called a quadtree (QT).

[0124] For example, a coding tree unit (CTU) may be or include a CTB of luminance pixel points, two corresponding CTBs of chrominance pixel points of an image having three pixel point arrays, or a CTB of pixel points of a monochrome image or a CTB of pixel points of an image encoded using three independent color planes and a syntax structure (for encoding pixel points). Correspondingly, a coding tree block (CTB) may be an N×N pixel point block, where N may be set to a certain value such that the component is divided into CTBs, which is segmentation. A coding unit (CU) may be or include a coding block of luminance pixel points, two corresponding coding blocks of chrominance pixel points of an image having three pixel point arrays, or a coding block of pixel points of a monochrome image or a coding block of pixel points of an image encoded using three independent color planes and a syntax structure (for encoding pixel points). Correspondingly, a coding block (CB) may be an M×N pixel point block, where M and N may be set to a certain value such that the CTB is divided into coding blocks, which is segmentation.

[0125] For example, in an embodiment, according to HEVC, a coding tree unit (CTU) may be divided into multiple CUs by using a quadtree structure represented as a coding tree. A decision on whether to use inter-frame (temporal) prediction or intra-frame (spatial) prediction to encode an image region is made at the leaf CU level. Each leaf CU may be further divided into one, two, or four PUs according to the PU division type. The same prediction process is used within one PU, and relevant information is transmitted to the decoder in units of PUs. After obtaining a residual block by applying the prediction process according to the PU division type, the leaf CU may be segmented into transform units (TUs) according to another quadtree structure similar to the coding tree used for the CU.

[0126] For example, in an embodiment, according to the latest video coding standard currently under development (referred to as Versatile Video Coding (VVC)), a combined quadtree using nested multi-type trees (such as binary trees and ternary trees) is used to divide the segmentation structure for splitting coding tree units. In the coding tree structure within a coding tree unit, a CU can be square or rectangular. For example, a coding tree unit (CTU) is first divided by a quadtree structure. The quadtree leaf nodes are further divided by a multi-type tree structure. The multi-type tree structure has four division types: vertical binary tree division (SPLIT_BT_VER), horizontal binary tree division (SPLIT_BT_HOR), vertical ternary tree division (SPLIT_TT_VER), and horizontal ternary tree division (SPLIT_TT_HOR). The multi-type tree leaf nodes are called coding units (CUs), unless the CU is too large for the maximum transform length, and such segments are used for prediction and transform processing without any further splitting. In most cases, this means that the CU, PU, and TU have the same block size in the coding block structure of the quadtree nested multi-type tree. This exception occurs when the maximum supported transform length is less than the width or height of the color component of the CU. VVC has developed a unique signaling mechanism for the segmentation division information in the coding structure with a quadtree nested multi-type tree. In the signaling mechanism, a coding tree unit (CTU), as the root of the quadtree, is first divided by the quadtree structure. Then each quadtree leaf node (when large enough to be) is further divided into a multi-type tree structure. In the multi-type tree structure, it is indicated by a first identifier (mtt_split_cu_flag) whether the node is further divided. When the node is further divided, a second identifier (mtt_split_cu_vertical_flag) is first used to indicate the division direction, and then a third identifier (mtt_split_cu_binary_flag) is used to indicate whether the division is a binary tree division or a ternary tree division. According to the values of mtt_split_cu_vertical_flag and mtt_split_cu_binary_flag, the decoder can derive the multi-type tree division pattern (MttSplitMode) of the CU based on predefined rules or tables. It should be noted that for a certain design, such as the 64×64 luma block and 32×32 chroma pipeline design in a VVC hardware decoder, TT division is not allowed when the width or height of the luma coding block is greater than 64. TT division is also not allowed when the width or height of the chroma coding block is greater than 32. The pipeline design divides the image into multiple virtual pipeline data units (VPDUs), and each VPDU is defined as a non-overlapping unit in the image. In the hardware decoder, consecutive VPDUs are processed simultaneously in multiple pipeline stages. In most pipeline stages, the VPDU size is roughly proportional to the buffer size, so it is necessary to keep the VPDU small.In most hardware decoders, the VPDU size can be set to the maximum transform block (TB) size. However, in VVC, the splitting of the ternary tree (TT) and binary tree (BT) may increase the VPDU size.

[0127] In addition, it should be noted that when a part of the tree node block exceeds the bottom or the right boundary of the image, the tree node block is forced to be divided until all pixel points of each coded CU are within the image boundary.

[0128] For example, the above-mentioned intra sub-partitions (ISP) tool can vertically or horizontally divide the luma intra prediction block into two or four sub-parts according to the block size.

[0129] In one example, the mode selection unit 260 of the video encoder 20 can be used to perform any combination of the splitting techniques described above.

[0130] As described above, the video encoder 20 is used to determine or select the best or optimal prediction mode from a (predetermined) set of prediction modes. The set of prediction modes may include, for example, intra prediction modes and / or inter prediction modes.

[0131] Intra Prediction

[0132] The set of intra prediction modes may include 35 different intra prediction modes. For example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes defined as in HEVC, or may include 67 different intra prediction modes. For example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes defined in VVC. For example, several traditional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes for non-square blocks defined in VVC. Another example is that in order to avoid the division operation of DC prediction, only the longer side is used to calculate the average value of the non-square block. And, the intra prediction result of the planar mode can also be modified using the position-dependent intra prediction combination (PDPC) method.

[0133] The intra prediction unit 254 is used to generate an intra prediction block 265 by reconstructing pixel points using adjacent blocks of the same current image according to the intra prediction mode in the set of intra prediction modes.

[0134] The intra-frame prediction unit 254 (or generally the mode selection unit 260) is also used to output intra-frame prediction parameters (or generally information indicating the selected intra-frame prediction mode of the block) in the form of syntax elements 266 to the entropy coding unit 270 for inclusion in the encoded image data 21, so that the video decoder 30 can perform operations, such as receiving and using the prediction parameters for decoding.

[0135] The intra prediction modes in HEVC include DC prediction mode, plane prediction mode and 33 angle prediction modes, with a total of 35 candidate prediction modes. The current block can use the pixels of the reconstructed image blocks on the left and above as references for intra prediction. The image blocks in the surrounding area of ​​the current block used for intra prediction of the current block become reference blocks, and the pixels in the reference blocks are called reference pixels. Among the 35 candidate prediction modes, the DC prediction mode is applicable to the area with flat texture in the current block, and all pixels in this area use the average value of the reference pixels in the reference block as prediction; the plane prediction mode is applicable to image blocks with smoothly changing textures. The current block that meets this condition uses the reference pixels in the reference block for bilinear interpolation as the prediction of all pixels in the current block; the angle prediction mode uses the characteristics that the texture of the current block is highly correlated with the texture of the adjacent reconstructed image blocks, and copies the values ​​of the reference pixels in the corresponding reference block along a certain angle as the prediction of all pixels in the current block.

[0136] The HEVC encoder selects an optimal intra-frame prediction mode for the current block from 35 candidate prediction modes and writes the optimal intra-frame prediction mode into the video bitstream. To improve the coding efficiency of intra-frame prediction, the encoder / decoder derives three most likely modes from the optimal intra-frame prediction modes of the reconstructed image blocks in the surrounding area using intra-frame prediction. If the optimal intra-frame prediction mode selected for the current block is one of the three most likely modes, a first index is encoded to indicate that the selected optimal intra-frame prediction mode is one of the three most likely modes; if the selected optimal intra-frame prediction mode is not one of the three most likely modes, a second index is encoded to indicate that the selected optimal intra-frame prediction mode is one of the other 32 modes (other modes among the 35 candidate prediction modes except the aforementioned three most likely modes). The HEVC standard uses a 5-bit fixed-length code as the aforementioned second index.

[0137] The methods for the HEVC encoder to derive the three most probable modes include: selecting the optimal intra-prediction modes of the left adjacent picture block and the upper adjacent picture block of the current block and putting them into a set. If these two optimal intra-prediction modes are the same, only one of them needs to be retained in the set. If these two optimal intra-prediction modes are the same and both are angular prediction modes, then select two angular prediction modes adjacent to this angular direction and add them to the set; otherwise, sequentially select the planar prediction mode, the DC mode, and the vertical prediction mode and add them to the set until the number of modes in the set reaches 3.

[0138] After the HEVC decoder performs entropy decoding on the bitstream, it obtains the mode information of the current block. This mode information includes an indication flag indicating whether the optimal intra-prediction mode of the current block is among the three most probable modes, and the index of the optimal intra-prediction mode of the current block among the three most probable modes or the index of the optimal intra-prediction mode of the current block among the other 32 modes.

[0139] Inter-frame prediction

[0140] In a possible implementation, the inter-frame prediction mode set depends on the available reference images (i.e., for example, at least part of the previously decoded images stored in the DBP 230 as described above) and other inter-frame prediction parameters. For example, it depends on whether to use the entire reference image or only a part of the reference image, such as the search window area near the region of the current block, to search for the best matching reference block, and / or for example, it depends on whether to perform pixel interpolation such as half-pixel, quarter-pixel, and / or sixteenth-pixel interpolation.

[0141] In addition to the above prediction modes, a skip mode and / or a direct mode can also be adopted.

[0142] For example, for extended merge prediction, the merge candidate list for this mode consists of the following five candidate types in order: spatial MVP from spatially adjacent CUs, temporal MVP from collocated CUs, history-based MVP from the FIFO table, pairwise average MVP, and zero MV. A decoder side motion vector refinement (DMVR) based on bipartite matching can be used to increase the accuracy of the MV of the merge mode. The merge mode with MVD (MMVD) comes from the merge mode with motion vector difference. The MMVD flag is sent immediately after the skip flag and the merge flag to specify whether the CU uses the MMVD mode. A CU-level adaptive motion vector resolution (AMVR) scheme can be used. AMVR supports encoding the MVD of the CU with different precisions. The MVD of the current CU is adaptively selected according to the prediction mode of the current CU. When the CU is encoded in the merge mode, the combined inter / intra prediction (CIIP) mode can be applied to the current CU. The inter and intra prediction signals are weighted and averaged to obtain the CIIP prediction. For affine motion compensation prediction, the affine motion field of the block is described by the motion information of the motion vectors of 2 control points (4 parameters) or 3 control points (6 parameters). The subblock-based temporal motion vector prediction (SbTMVP) is similar to the temporal motion vector prediction (TMVP) in HEVC, but predicts the motion vectors of the sub-CUs within the current CU. The bi-directional optical flow (BDOF), previously called BIO, is a simplified version that reduces calculations, especially in terms of the number of multiplications and the size of the multipliers. In the triangular split mode, the CU is evenly split into two triangular parts in two split ways: diagonal split and anti-diagonal split. In addition, the bi-directional prediction mode is extended based on simple averaging to support weighted averaging of two prediction signals.

[0143] The inter prediction unit 244 may include a motion estimation (ME) unit and a motion compensation (MC) unit (both are in Figure 2(not shown in the figure). The motion estimation unit can be used to receive or obtain the image block 203 (the current image block 203 of the current image 17) and the decoded image 231, or at least one or more previously reconstructed blocks, for example, the reconstructed blocks of one or more other / different previously decoded images 231, to perform motion estimation. For example, the video sequence may include the current image and the previously decoded image 231, or in other words, the current image and the previously decoded image 231 may be part of the image sequence forming the video sequence or form the image sequence.

[0144] For example, the encoder 20 can be used to select a reference block from multiple reference blocks of the same or different images in multiple other images, and provide the offset (spatial offset) between the reference image (or reference image index) and / or the position (x, y coordinates) of the reference block and the position of the current block as an inter-frame prediction parameter to the motion estimation unit. This offset is also called a motion vector (MV).

[0145] The motion compensation unit is used to obtain, for example, receive, the inter-frame prediction parameter, and perform inter-frame prediction according to or using the inter-frame prediction parameter to obtain the inter-frame prediction block 246. The motion compensation performed by the motion compensation unit may include extracting or generating a prediction block according to the motion / block vector determined by motion estimation, and may also include performing interpolation with sub-pixel accuracy. The interpolation filter can generate pixel points of other pixels from the pixel points of known pixels, thereby potentially increasing the number of candidate prediction blocks available for encoding the image block. Once the motion vector corresponding to the PU of the current image block is received, the motion compensation unit can locate the prediction block pointed to by the motion vector in one of the reference image lists.

[0146] The motion compensation unit can also generate syntax elements related to the block and the video slice for use by the video decoder 30 when decoding the image blocks of the video slice. In addition, or as an alternative to the slice and the corresponding syntax elements, the coded block group and / or the coded block and the corresponding syntax elements can be generated or used.

[0147] In the process of obtaining the candidate motion vector list in the advanced motion vector prediction (AMVP) mode, the motion vectors (MVs) that can be added to the candidate motion vector list as an alternative include the MVs of the spatially adjacent and temporally adjacent image blocks of the current block, where the MVs of the spatially adjacent image blocks can include the MVs of the left candidate image block located on the left side of the current block and the MVs of the upper candidate image block located above the current block. Exemplarily, please refer to Figure 4 , Figure 4 which is an exemplary schematic diagram of the candidate image block provided by the embodiment of the present application, as Figure 4As shown, the set of left candidate image blocks includes {A0, A1}, the set of upper candidate image blocks includes {B0, B1, B2}, and the set of temporally adjacent candidate image blocks includes {C, T}. All three sets can be added as alternatives to the candidate motion vector list. However, according to the existing coding standard, the maximum length of the candidate motion vector list for AMVP is 2. Therefore, it is necessary to determine the MVs of up to two image blocks to be added to the candidate motion vector list from the three sets according to the specified order. This order can be to first consider the set of left candidate image blocks {A0, A1} of the current block (first consider A0, and if A0 is not available, then consider A1), secondly consider the set of upper candidate image blocks {B0, B1, B2} of the current block (first consider B0, if B0 is not available, then consider B1, and if B1 is not available, then consider B2), and finally consider the set of temporally adjacent candidate image blocks {C, T} of the current block (first consider T, and if T is not available, then consider C).

[0148] After obtaining the above candidate motion vector list, the optimal MV is determined from the candidate motion vector list through the rate distortion cost (RDcost), and the candidate motion vector with the minimum RD cost is used as the motion vector predictor (MVP) of the current block. The rate distortion cost is calculated by the following formula:

[0149] J = SAD + λR

[0150] Where J represents the RD cost, SAD is the sum of absolute differences (SAD) between the pixel values of the predicted block obtained by motion estimation using the candidate motion vector and the pixel values of the current block, R represents the bit rate, and λ represents the Lagrange multiplier.

[0151] The encoder transmits the index of the determined MVP in the candidate motion vector list to the decoder. Further, a motion search can be performed within the neighborhood centered on the MVP to obtain the actual motion vector of the current block. The encoder calculates the motion vector difference (MVD) between the MVP and the actual motion vector and also transmits the MVD to the decoder. The decoder parses the index, finds the corresponding MVP in the candidate motion vector list according to the index, parses the MVD, and adds the MVD and the MVP to obtain the actual motion vector of the current block.

[0152] In the process of obtaining the candidate motion information list in the Merge mode, the motion information that can be added to the candidate motion information list as an alternative includes the motion information of the spatially or temporally adjacent image blocks of the current block, where the spatially adjacent image blocks and the temporally adjacent image blocks can be referred to Figure 4 , the candidate motion information corresponding to the spatial domain in the candidate motion information list comes from 5 spatially adjacent blocks (A0, A1, B0, B1, and B2). If the spatially adjacent blocks are not available or are intra-frame predicted, their motion information is not added to the candidate motion information list. The candidate motion information in the temporal domain of the current block is obtained by scaling the MV of the corresponding block in the reference frame according to the picture order count (POC) of the reference frame and the current frame. First, it is determined whether the block at position T in the reference frame is available. If it is not available, the block at position C is selected. After obtaining the above candidate motion information list, the optimal motion information is determined from the candidate motion information list through the RD cost as the motion information of the current block. The encoding end transmits the index value of the position of the optimal motion information in the candidate motion information list (denoted as mergeindex) to the decoding end.

[0153] Entropy coding

[0154] The entropy coding unit 270 is used to apply an entropy coding algorithm or scheme (e.g., variable length coding (VLC) scheme, context adaptive VLC (CALVC), arithmetic coding scheme, binarization algorithm, context adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding, or other entropy coding methods or techniques) to the quantized residual coefficients 209, inter-frame prediction parameters, intra-frame prediction parameters, loop filter parameters, and / or other syntax elements to obtain coded image data 21 that can be output in the form of a coded bitstream 21, etc., through the output end 272, so that a video decoder 30, etc., can receive and use the parameters for decoding. The coded bitstream 21 can be transmitted to the video decoder 30 or stored in a memory for later transmission or retrieval by the video decoder 30.

[0155] Other structural variants of the video encoder 20 can be used to encode a video stream. For example, a non-transform-based encoder 20 can directly quantize the residual signal in the case where some blocks or frames do not have a transform processing unit 206. In another implementation, the encoder 20 can have a quantization unit 208 and an inverse quantization unit 210 combined into a single unit.

[0156] Decoder and decoding method

[0157] As Figure 3 shown, a video decoder 30 is used to receive encoded image data 21 (e.g., an encoded bitstream 21) encoded by, for example, the encoder 20, to obtain a decoded image 331. The encoded image data or bitstream includes information for decoding the above-mentioned encoded image data, such as data representing image blocks of an encoded video slice (and / or an encoded group of blocks or an encoded block) and related syntax elements.

[0158] In Figure 3 the example of, the decoder 30 includes an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314 (e.g., an adder 314), a loop filter 320, a decoded picture buffer (DBP) 330, a mode application unit 360, an inter prediction unit 344, and an intra prediction unit 354. The inter prediction unit 344 can be or include a motion compensation unit. In some examples, the video decoder 30 can perform a decoding process that is generally opposite to the encoding process described with reference to Figure 2 the video encoder 100.

[0159] As with the encoder 20 above, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the loop filter 220, the decoded picture buffer DPB 230, the inter prediction unit 344, and the intra prediction unit 354 also form the "built-in decoder" of the video encoder 20. Accordingly, the inverse quantization unit 310 can be functionally the same as the inverse quantization unit 110, the inverse transform processing unit 312 can be functionally the same as the inverse transform processing unit 122, the reconstruction unit 314 can be functionally the same as the reconstruction unit 214, the loop filter 320 can be functionally the same as the loop filter 220, and the decoded picture buffer 330 can be functionally the same as the decoded picture buffer 230. Therefore, the explanations of the corresponding units and functions of the video encoder 20 are correspondingly applicable to the corresponding units and functions of the video decoder 30.

[0160] Entropy decoding

[0161] The entropy decoding unit 304 is used to parse the bitstream 21 (or generally the encoded image data 21) and perform entropy decoding on the encoded image data 21 to obtain quantization coefficients 309 and / or decoded encoded parameters ( Figure 3not shown in [the figure], etc., such as any one or all of inter-frame prediction parameters (e.g., reference image index and motion vector), intra-frame prediction parameters (e.g., intra-frame prediction mode or index), transform parameters, quantization parameters, loop filter parameters, and / or other syntax elements. The entropy decoding unit 304 can be used to apply a decoding algorithm or scheme corresponding to the encoding scheme of the entropy encoding unit 270 of the encoder 20. The entropy decoding unit 304 can also be used to provide inter-frame prediction parameters, intra-frame prediction parameters, and / or other syntax elements to the mode application unit 360, and provide other parameters to other units of the decoder 30. The video decoder 30 can receive syntax elements at the video slice and / or video block level. Additionally, or as an alternative to the slice and corresponding syntax elements, coded block groups and / or coded blocks and corresponding syntax elements can be received or used.

[0162] Inverse quantization

[0163] The inverse quantization unit 310 can be used to receive a quantization parameter (QP) (or generally information related to inverse quantization) and quantization coefficients from the encoded image data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304), and inverse-quantize the decoded quantization coefficients 309 based on the above quantization parameter to obtain inverse-quantized coefficients 311. The inverse-quantized coefficients 311 can also be referred to as transform coefficients 311. The inverse quantization process can include using the quantization parameter calculated by the video encoder 20 for each video block in the video slice to determine the degree of quantization, and also determine the degree of inverse quantization to be performed.

[0164] Inverse transform

[0165] The inverse transform processing unit 312 can be used to receive the dequantized coefficients 311, also referred to as transform coefficients 311, and apply a transform to the dequantized coefficients 311 to obtain a reconstructed residual block 213 in the pixel domain. The reconstructed residual block 213 can also be referred to as a transform block 313. The transform can be an inverse transform, such as an inverse DCT, inverse DST, inverse integer transform, or a conceptually similar inverse transform process. The inverse transform processing unit 312 can also be used to receive transform parameters or corresponding information from the encoded image data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304) to determine the transform applied to the dequantized coefficients 311.

[0166] Reconstruction

[0167] The reconstruction unit 314 (e.g., the adder 314) is used to add the reconstructed residual block 313 to the prediction block 365 to obtain a reconstructed block 315 in the pixel domain. For example, the pixel point values of the reconstructed residual block 313 and the pixel point values of the prediction block 365 are added together.

[0168] Filtering

[0169] The loop filter unit 320 (in or after the encoding loop) is used to filter the reconstructed block 315 to obtain the filtered block 321, so as to smoothly perform pixel conversion or improve video quality, etc. The loop filter unit 320 may include one or more loop filters, such as a deblocking filter, a sample - adaptive offset (SAO) filter, or one or more other filters, such as an adaptive loop filter (ALF), a noise suppression filter (NSF), or any combination. For example, the loop filter unit 220 may include a deblocking filter, an SAO filter, and an ALF filter. The order of the filtering process may be a deblocking filter, an SAO filter, and an ALF filter. For another example, a process called luma mapping with chroma scaling (LMCS) (i.e., an adaptive in - loop shaper) is added. This process is performed before deblocking. For another example, the deblocking filtering process may also be applied to internal sub - block edges, such as affine sub - block edges, ATMVP sub - block edges, sub - block transform (SBT) edges, and intra sub - partition (ISP) edges. Although the loop filter unit 320 is shown as a loop filter in Figure 3 it may be implemented as a post - loop filter in other configurations.

[0170] Decoded picture buffer

[0171] Subsequently, the decoded video block 321 in an image is stored in the decoded picture buffer 330, and the decoded picture buffer 330 stores the decoded picture 331 as a reference picture, and the reference picture is used for subsequent motion compensation of other pictures and / or output for display separately.

[0172] The decoder 30 is used to output the decoded picture 311 through the output terminal 312, etc., for the user to display or view.

[0173] Prediction

[0174] The inter-frame prediction unit 344 may be functionally the same as the inter-frame prediction unit 244 (especially the motion compensation unit), and the intra-frame prediction unit 354 may be functionally the same as the inter-frame prediction unit 254, and determines division or segmentation and performs prediction based on the segmentation and / or prediction parameters or corresponding information received from the encoded image data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304). The mode application unit 360 may be used to perform prediction (intra-frame or inter-frame prediction) for each block according to the reconstructed image, block or corresponding pixel points (filtered or unfiltered), to obtain the predicted block 365.

[0175] When encoding a video slice as an intra-coded (I) slice, the intra-frame prediction unit 354 in the mode application unit 360 is used to generate the predicted block 365 for the image block of the current video slice according to the indicated intra-frame prediction mode and the data of the previously decoded blocks from the current image. When the video image is encoded as an inter-coded (i.e., B or P) slice, the inter-frame prediction unit 344 (e.g., the motion compensation unit) in the mode application unit 360 is used to generate the predicted block 365 for the video block of the current video slice according to the motion vector and other syntax elements received from the entropy decoding unit 304. For inter-frame prediction, these predicted blocks can be generated from one of the reference images in one of the reference image lists. The video decoder 30 may use the default construction technique to construct the reference frame list 0 and list 1 according to the reference images stored in the DPB 330. In addition to slices (e.g., video slices) or as an alternative to slices, the same or similar process may be applied to embodiments of coded block groups (e.g., video coded block groups) and / or coded blocks (e.g., video coded blocks), e.g., video can be encoded using I, P or B coded block groups and / or coded blocks.

[0176] The mode application unit 360 is used to determine the prediction information for the video block of the current video slice by parsing the motion vector and other syntax elements, and use the prediction information to generate the predicted block for the current video block being decoded. For example, the mode application unit 360 uses some received syntax elements to determine the prediction mode (e.g., intra-frame prediction or inter-frame prediction) for the video block of the encoded video slice, the inter-frame prediction slice type (e.g., B slice, P slice or GPB slice), the construction information for one or more reference image lists for the slice, the motion vector for each inter-frame coded video block of the slice, the inter-frame prediction state for each inter-frame coded video block of the slice, other information, to decode the video blocks within the current video slice. In addition to slices (e.g., video slices) or as an alternative to slices, the same or similar process may be applied to embodiments of coded block groups (e.g., video coded block groups) and / or coded blocks (e.g., video coded blocks), e.g., video can be encoded using I, P or B coded block groups and / or coded blocks.

[0177] In one embodiment, Figure 3The video encoder 30 can also be used to segment and / or decode an image using slices (also referred to as video slices), where the image can be segmented or decoded using one or more slices (usually non-overlapping). Each slice may include one or more blocks (e.g., CTUs) or one or more groups of blocks (e.g., coding tree units in the H.265 / HEVC / VVC standards and tiles in the VVC standard).

[0178] In one embodiment, Figure 3 the illustrated video decoder 30 can also be used to segment and / or decode an image using slice / coding tree unit groups (also referred to as video coding tree unit groups) and / or coding tree units (also referred to as video coding tree units), where the image can be segmented or decoded using one or more slice / coding tree unit groups (usually non-overlapping), each slice / coding tree unit group may include one or more blocks (e.g., CTUs) or one or more coding tree units, etc., where each coding tree unit can be in a shape such as a rectangle and may include one or more whole or partial blocks (e.g., CTUs).

[0179] Other variants of the video decoder 30 can be used to decode the encoded image data 21. For example, the decoder 30 can produce an output video stream without the loop filter unit 320. For example, a non-transform-based decoder 30 can directly dequantize the residual signal without the inverse transform processing unit 312 for some blocks or frames. In another implementation, the video decoder 30 can have the dequantization unit 310 and the inverse transform processing unit 312 combined into a single unit.

[0180] It should be understood that in the encoder 20 and the decoder 30, the processing result of the current step can be further processed and then output to the next step. For example, after interpolation filtering, motion vector derivation, or loop filtering, further operations such as clip or shift operations can be performed on the processing result of interpolation filtering, motion vector derivation, or loop filtering.

[0181] It should be noted that further operations can be performed on the derived motion vectors of the current block (including but not limited to the control point motion vectors in the affine mode, the sub-block motion vectors in the affine, planar, and ATMVP modes, the temporal motion vectors, etc.). For example, the value of the motion vector can be restricted to a predefined range according to the representation bits of the motion vector. If the representation bits of the motion vector are bitDepth, the range is from -2^(bitDepth - 1) to 2^(bitDepth - 1) - 1, where "^" represents exponentiation. For example, if bitDepth is set to 16, the range is from -32768 to 32767; if bitDepth is set to 18, the range is from -131072 to 131071. For example, the values of the derived motion vectors (such as the MVs of 4 4×4 sub-blocks in an 8×8 block) are restricted such that the maximum difference between the integer parts of the above 4 4×4 sub-block MVs does not exceed N pixels, for example, does not exceed 1 pixel. Two methods for restricting the motion vector according to bitDepth are provided here.

[0182] Although the above embodiments mainly describe video encoding and decoding, it should be noted that the embodiments of the decoding system 10, the encoder 20, and the decoder 30, as well as other embodiments described herein, can also be used for still image processing or encoding and decoding, that is, the processing or encoding and decoding of a single image independent of any previous or consecutive images in video encoding and decoding. Generally, if the image processing is limited to a single image 17, the inter-frame prediction units 244 (encoder) and 344 (decoder) may not be available. All other functions (also referred to as tools or techniques) of the video encoder 20 and the video decoder 30 can equally be used for static image processing, such as residual calculation 204 / 304, transformation 206, quantization 208, dequantization 210 / 310, (inverse) transformation 212 / 312, segmentation 262 / 362, intra-frame prediction 254 / 354, and / or loop filtering 220 / 320, entropy encoding 270, and entropy decoding 304.

[0183] Please refer to Figure 5 , Figure 5 which is an exemplary block diagram of the video decoding device 500 provided by the embodiments of the present application. The video decoding device 500 is suitable for implementing the disclosed embodiments described herein. In one embodiment, the video decoding device 500 can be a decoder, such as Figure 1a the video decoder 30 in Figure 1a , or it can be an encoder, such as

[0184] Video decoding device 500 includes: an input port 510 (or input port 510) for receiving data and a receiver unit (Rx) 520; a processor, logic unit, or central processing unit (CPU) 530 for processing data; for example, the processor 530 here can be a neural network processor 530; a transmitter unit (Tx) 540 and an output port 550 (or output port 550) for transmitting data; and a memory 560 for storing data. Video decoding device 500 may also include optical-to-electrical (OE) components and electrical-to-optical (EO) components coupled to the input port 510, the receiving unit 520, the transmitting unit 540, and the output port 550 for the exit or entry of optical or electrical signals.

[0185] Processor 530 is implemented by hardware and software. Processor 530 can be implemented as one or more processor chips, cores (e.g., multi-core processors), FPGAs, ASICs, and DSPs. Processor 530 communicates with the input port 510, the receiving unit 520, the transmitting unit 540, the output port 550, and the memory 560. Processor 530 includes a decoding module 570 (e.g., a neural network-based decoding module 570). Decoding module 570 implements the embodiments disclosed above. For example, decoding module 570 performs, processes, prepares, or provides various encoding operations. Therefore, the function of video decoding device 500 is substantially improved by decoding module 570, and the switching of video decoding device 500 to different states is affected. Alternatively, decoding module 570 is implemented by instructions stored in memory 560 and executed by processor 530.

[0186] Memory 560 includes one or more disks, tape drives, and solid-state drives, and can be used as an overflow data storage device for storing such programs when a selected program is to be executed, and storing instructions and data read during program execution. Memory 560 can be volatile and / or non-volatile, and can be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and / or static random-access memory (SRAM).

[0187] Please refer to Figure 6 , Figure 6An exemplary block diagram of the apparatus 600 provided by an embodiment of the present application. The apparatus 600 can be used as Figure 1a either or both of the source device 12 and the destination device 14 in

[0188] The processor 602 in the apparatus 600 can be a central processing unit. Alternatively, the processor 602 can be any other type of device or multiple devices that can manipulate or process information, existing or to be developed in the future. Although a single processor such as the processor 602 shown in the figure can be used to implement the disclosed implementation, using more than one processor is faster and more efficient.

[0189] In one implementation, the memory 604 in the apparatus 600 can be a read-only memory (ROM) device or a random access memory (RAM) device. Any other suitable type of storage device can be used as the memory 604. The memory 604 can include code and data 606 that can be accessed by the processor 602 via the bus 612. The memory 604 can also include an operating system 608 and application programs 610. The application programs 610 include at least one program that allows the processor 602 to execute the methods described above. For example, the application programs 610 can include applications 1 to N, and also include a video decoding application that executes the methods described above.

[0190] The apparatus 600 can also include one or more output devices, such as a display 618. In one example, the display 618 can be a touch-sensitive display that combines a display with a touch-sensitive element that can be used to sense touch inputs. The display 618 can be coupled to the processor 602 via the bus 612.

[0191] Although the bus 612 in the apparatus 600 is described herein as a single bus, the bus 612 can include multiple buses. In addition, the auxiliary storage can be directly coupled to other components of the apparatus 600 or accessed via a network, and can include a single integrated unit such as a memory card or multiple units such as multiple memory cards. Therefore, the apparatus 600 can have various configurations.

[0192] Combined with the above content, an adaptive correction filter is involved in the encoding and decoding process. Among them, the unit of the adaptive correction filter is an adaptive correction filter unit derived from the largest coding unit (LCU).

[0193] In one implementation, first determine the current largest coding unit, and derive the adaptive correction filter unit according to the current largest coding unit according to the following steps:

[0194] S1. Delete the part of the sample area where the current largest coding unit is located that exceeds the image boundary to obtain the sample area D.

[0195] S2. If the sample where the lower boundary of region D is located does not belong to the lower boundary of the image, shrink the lower boundary of the luminance component and chrominance component sample region D upward by four rows to obtain region E1; otherwise, let E1 be equal to D.

[0196] It can be understood that the last row of samples of the image is the lower boundary of the image, and the last row of samples of region D is the lower boundary of region D.

[0197] S3. If the sample where the upper boundary of region E1 is located belongs to the upper boundary of the image, or belongs to the slice boundary and the value of CplfEnableFlag (cross-slice loop filter enable flag) is 0 (i.e., cross-slice filtering is not allowed), let E2 be equal to E1; otherwise, expand the upper boundary of the luminance component and chrominance component sample region E1 upward by four rows to obtain region E2.

[0198] It can be understood that the first row of samples of the image is the upper boundary of the image, and the first row of samples of region E1 is the upper boundary of region E1.

[0199] S4. Use region E2 as the current adaptive correction filter unit. Exemplarily, the adaptive correction filter unit can be a region where the upper boundary of the LCU is translated upward by a preset number of pixel counts, and the lower boundary of the LCU is translated upward by a preset number of pixel counts.

[0200] From the determination process of the above adaptive correction filter unit, it can be seen that the size of the adaptive correction filter unit may be larger than the maximum coding unit size, may also be smaller than the maximum coding unit size, or may be equal to the maximum coding unit size.

[0201] For an LCU, after the coding end completes the adaptive correction filtering, it can carry syntax elements related to the adaptive correction filtering in the bitstream. After the decoding end parses the bitstream, it obtains the syntax elements related to the adaptive correction filtering and performs filtering processing on the reconstructed image according to the syntax elements.

[0202] Among them, the syntax elements related to the adaptive correction filtering include:

[0203] 1. Maximum coding unit adaptive correction filter enable flag alf_lcu_enable_flag[compIndex][LcuIndex]

[0204] Binary variable. A value of '1' indicates that the samples of the compIndex component of the LcuIndex-th largest coding unit should use adaptive correction filtering; a value of '0' indicates that the samples of the compIndex component of the LcuIndex-th largest coding unit should not use adaptive correction filtering. The value of AlfLcuEnableFlag[compIndex][LcuIndex] is equal to the value of alf_lcu_enable_flag[compIndex][LcuIndex] (the flag bit carried in the bitstream).

[0205] 2. Cross-slice loop filter enable flag cross_patch_loop_filter_enable_flag

[0206] Binary variable. When the value is '1', it indicates that deblocking filtering, sample offset compensation, and adaptive correction filtering can be performed across slice boundaries; when the value is '0', it indicates that deblocking filtering, sample offset compensation, and adaptive correction filtering should not be performed across slice boundaries. The value of CplfEnableFlag is equal to the value of cross_patch_loop_filter_enable_flag (the flag bit carried in the bitstream).

[0207] 3. Enhanced adaptive correction filter enable flag ealf_enable_flag

[0208] Binary variable. A value of '1' indicates that enhanced adaptive correction filtering should be used; a value of '0' indicates that enhanced adaptive correction filtering should not be used. The value of EalfEnableFlag is equal to the value of ealf_enable_flag. If ealf_enable_flag does not exist in the bitstream, the value of EalfEnableFlag is 0.

[0209] It should be understood that when adaptive correction filtering needs to be performed on the current coding unit (which can be an LCU), for each sample (which can be understood as a pixel or a pixel point) in the current coding unit (an LCU), according to the preset adaptive correction filtering coefficient (which can be understood as the template used for filtering), the pixels (or samples) required for filtering the pixel to be filtered (or the sample to be filtered) are determined, and then the sample to be filtered is filtered according to the required samples, that is, the filtered sample corresponding to the sample to be filtered is determined.

[0210] Optionally, the adaptive correction filtering coefficient may include Figure 7 the 7×7 cross plus 3×3 square shown in Figure 8 and the filtering coefficient of the 7×7 cross plus 5×5 square shown in Figure 7, the sample to be filtered is C8, and the other samples are the samples used for filtering C8, that is, the filtered sample of C8 is determined according to the other samples. For Figure 8 , the sample to be filtered is C14, and the other samples are the samples used for filtering C8.

[0211] In the embodiments of the present application, referring to Figure 2 the description of the structure and encoding process of the encoder shown, when encoding the reconstructed sample (the reconstructed samples can form a reconstructed block or a reconstructed coding unit), it is necessary to consider whether to adaptively correct the filtering. Referring to Figure 3 the description of the structure and decoding process of the decoder shown, after decoding the reconstructed sample (the reconstructed samples can form a reconstructed block or a reconstructed coding unit), it is necessary to determine whether to adaptively correct the filtering according to the syntax elements related to adaptive correction filtering parsed from the bitstream (such as alf_lcu_enable_flag[compIndex][LcuIndex], etc.).

[0212] In some implementation manners, when the value of ealf_enable_flag (enhanced adaptive correction filtering enable flag) is 0 (that is, enhanced adaptive correction filtering is not used), the adaptive correction filtering coefficient selects Figure 7 the filtering coefficients of the 7×7 cross plus 3×3 square shown. When the value of ealf_enable_flag is 1 (that is, enhanced high adaptive correction filtering is used), the adaptive correction filtering coefficient selects Figure 8 the filtering coefficients of the 7×7 cross plus 5×5 square shown.

[0213] In the following embodiments, the process of encoding a coding unit to obtain a reconstructed coding unit and the process of decoding a coding unit to obtain a reconstructed coding unit are not described. Only the process of adaptive correction filtering after the coding end and the decoding end obtain the reconstructed coding unit (hereinafter referred to as the current coding unit) is described.

[0214] The image processing method provided by the embodiments of the present application can be applied to the scenario of privacy protection (or called permission protection). Privacy protection means that some content in the image is private content. It can be understood that each sample has a permission value, and the permission value is used to indicate whether the sample belongs to private content or non-private content. For example, a permission value of 1 indicates that the sample belongs to private content, and a permission value of 0 indicates that the sample belongs to non-privacy protected content. It can be understood that a coding unit corresponds to a permission value, that is, the permission values of all samples in a coding unit are the same and are the permission value of the coding unit.

[0215] When considering privacy protection, it is necessary to determine whether to skip filtering the pixel to be filtered (that is, to determine whether to perform filtering on the pixel to be filtered) according to the permission values of some pixels related to the pixel to be filtered (for example, other pixels within a preset window where the pixel to be filtered is located).

[0216] According to the above content, it can be known that the unit of adaptive correction filtering is an adaptive correction filtering unit derived from the largest coding unit. However, when using the permission value of an actual sample to determine whether to skip filtering in the prior art, the permission value of a sample outside the adaptive correction filtering unit may be used. And if the sample is outside the image boundary, or outside the slice boundary and cross-slice filtering is not allowed, the permission value of this sample cannot be obtained. This application proposes to use the permission value of the Padding sample of the adaptive correction filtering unit to replace the permission value of the sample outside the adaptive correction filtering unit. That is to say, the value of a certain sample within the adaptive correction filtering unit is used as the permission value of the sample outside the adaptive correction filtering unit (these samples located outside the adaptive filtering unit are samples used to determine whether to skip filtering the sample to be filtered).

[0217] Such as Figure 9 As shown, an embodiment of this application provides an image processing method, which can be used in the encoding process or the decoding process. This image processing method mainly involves image adaptive filtering. This method is a method that combines single-layer privacy protection encoding and adaptive correction filtering. This method includes S901 - S902.

[0218] S901. Determine the permission values of other pixels within a preset window where the pixel to be filtered in the current coding unit is located; if the first pixel is within the adaptive correction filtering unit corresponding to the current coding unit, obtain the permission value of the first pixel from the permission storage unit corresponding to the first pixel; if the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit, use the permission value of the pixel closest to the first pixel within the adaptive correction filtering unit as the permission value of the first pixel, or obtain the permission value of the first pixel from the permission storage unit corresponding to the first pixel.

[0219] Among them, the first pixel (or called the first sample) is any one of the other pixels within the preset window where the pixel to be filtered is located.

[0220] In the embodiment of this application, the above-mentioned preset window where the pixel to be filtered (that is, the sample to be filtered) is located can be a window centered on the pixel to be filtered. Exemplarily, as Figure 10 shown, this preset window can be a 7×7 window. Figure 11 Shows a schematic diagram of the privacy area, non-privacy area, and preset window in the image.

[0221] The above-mentioned first pixel is located outside the adaptive correction filtering unit corresponding to the current coding unit, including: the first pixel is located outside the image boundary where the current coding unit is located; or, the first pixel is located outside the boundary of the slice (referring to a segment of the image) to which the pixel to be filtered belongs, and the current coding unit does not support adaptive correction filtering across the slice boundary; or, the first pixel is located outside the upper boundary or the lower boundary of the adaptive correction filtering unit corresponding to the current coding unit.

[0222] Combined with Figure 10 For the preset window shown, if the sample to be filtered is the sample (x, y), then obtain the weight values of the samples (x + i, y + j) (where i, j = -3, -2, -1, 0, 1, 2, 3), that is, obtain the weight values of the other samples (samples other than the sample to be filtered) within the preset window. That is to say, the preset window includes the samples (x + i, y + j), where i, j = -3, -2, -1, 0, 1, 2, 3. When the sample (x + i, y + j) (where i, j = -3, -2, -1, 0, 1, 2, 3) is a sample within the adaptive correction filtering unit, directly use the weight value of the weight storage unit corresponding to the sample (x + i, y + j) as the weight value of the sample (x + i, y + j). When the sample (x + i, y + j) is not a sample within the adaptive correction filtering unit (i.e., the first pixel is located outside the adaptive correction filtering unit corresponding to the current coding unit), obtain the weight value of the sample (x + i, y + j) in the following manner:

[0223] a) If the sample is outside the image boundary, or outside the slice boundary and CplfEnableFlag is 0 (cross-slice filtering is not allowed), then use the weight value of the weight storage unit corresponding to the sample within the adaptive correction filtering unit that is closest to the sample as the weight value of the sample.

[0224] b) Otherwise, if the sample is outside the upper boundary or the lower boundary of the adaptive correction filtering unit, then use the weight value of the weight storage unit corresponding to the sample within the adaptive correction filtering unit that is closest to the sample as the weight value of the sample.

[0225] c) Otherwise, directly use the weight value of the weight storage unit corresponding to the sample as the weight value of the sample.

[0226] In summary, it can be seen that when the first pixel is located within the adaptive correction filtering unit corresponding to the current coding unit, the weight value of the first pixel can be obtained. Specifically, obtain the weight value of the first pixel from the weight storage unit corresponding to the first pixel.

[0227] The first pixel is outside the image boundary where the current coding unit is located; or, the first pixel is outside the boundary of the slice to which the pixel to be filtered belongs, and the current coding unit does not support adaptive correction filtering across the slice boundary; or, the first pixel is outside the upper or lower boundary of the adaptive correction filtering unit corresponding to the current coding unit. In these cases, the true permission value of the first pixel cannot be obtained or used. Therefore, the permission value of the pixel closest to the first pixel within the adaptive correction filtering unit is used as the permission value of the first pixel.

[0228] The above cases where the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit also include other cases. For example, the first pixel is outside the adaptive filtering unit but within the image boundary, or outside the slice but supports adaptive filtering across the slice boundary, etc. In these cases, the permission value of the first pixel can be obtained, that is, the permission value of the first pixel is obtained from the permission storage unit corresponding to the first pixel.

[0229] Reference Figure 12 , taking the first row pixels of the adaptive correction filtering unit as an example, the permission values of the samples in the upper three rows of the adaptive correction filtering unit need to be obtained. However, when actually performing filtering, padding needs to be performed on the adaptive correction filtering unit (that is, using the permission value of the permission storage unit corresponding to the sample closest to this sample within the adaptive correction filtering unit as the permission value of this sample), and then filtering is performed using the padded samples. Therefore, when calculating whether the current sample (i.e., the sample to be filtered) skips filtering, the permission value of the padded sample should be used. Similarly, when at the left boundary of the slice and CplfEnableFlag is 0, the samples in the left three columns need to be obtained. At this time, padding is performed on the adaptive correction filtering unit, and then filtering is performed using the padded samples.

[0230] For example, referring to Figure 12 , the sample to be filtered is P1, and the sample P0 within the preset window where it is located is a sample outside the adaptive correction filtering unit. At this time, a sample closest to the sample P0 is found within the adaptive correction filtering unit. For example, the closest sample is the sample P1, then the permission value of the sample P1 is used as the permission value of the sample P0, that is, the sample P1 is used as the padding sample of the sample P0.

[0231] Currently, in the prior art, the permission value of the actual sample at this position is used for judgment, without considering the slice boundary or the upper and lower boundaries of the adaptive correction filtering unit. Moreover, it is necessary to cache the permission values of the samples outside the adaptive correction filtering unit, occupying the cache. In the embodiments of the present application, the permission value of the permission storage unit corresponding to the sample (the first sample) closest to this sample within the adaptive correction filtering unit is used as the permission value of this sample, without the need to cache the true permission value of the first sample. And in the case where it is at the left boundary of the slice and CplfEnableFlag is 0 or at the right boundary of the slice and CplfEnableFlag is 0, it is also possible to use the permission value of the permission storage unit corresponding to the sample (the first sample) closest to this sample within the adaptive correction filtering unit as the permission value of this sample, so as to determine whether the sample to be filtered needs to skip filtering based on the permission value.

[0232] S902. Determine whether the pixel to be filtered needs to skip filtering based on the permission values of other pixels and the permission value of the pixel to be filtered.

[0233] The above determination of whether to filter the sample to be filtered based on the permission values of other samples and the permission value of the sample to be filtered includes: if there is a pixel among other pixels whose permission value is greater than the permission value of the pixel to be filtered, determine to skip filtering the pixel to be filtered (that is, determine not to filter the pixel to be filtered); otherwise, determine that the pixel to be filtered needs to be filtered.

[0234] If AlfLcuEnableFlag[compIndex][LcuIndex] is equal to 1, perform adaptive correction filtering on the compIndex (indicating the component index, used to indicate a component of the image) component (i.e.); otherwise, do not perform adaptive correction filtering.

[0235] When the sample used during the adaptive correction filtering process (i.e., Figure 7 or Figure 8 the sample corresponding to the shown filtering coefficient) is a sample within the adaptive correction filtering unit, directly use this sample for filtering; when the sample used during the adaptive correction filtering process is not a sample within the adaptive correction filtering unit, filter it in the following manner:

[0236] a1) If this sample is outside the image boundary, or outside the slice boundary and CplfEnableFlag is 0 (deblocking filtering, sample offset compensation, and adaptive correction filtering should not cross the slice boundary), then use the sample closest to this sample within the adaptive correction filtering unit to replace this sample for filtering.

[0237] b1) Otherwise, if this sample is outside the upper or lower boundary of the adaptive correction filtering unit, then use the sample closest to this sample within the adaptive correction filtering unit to replace this sample for filtering.

[0238] c1) Otherwise, directly use this sample for filtering.

[0239] If EalfEnableFlag is equal to 0 (adaptive enhanced correction filtering should not be used), if there exists a permission value of the sample (x + i, y + j) (where i, j = -3, -2, -1, 0, 1, 2, 3) greater than the permission value of (x, y) (where (x, y) is the coordinate of the sample to be filtered), then p'(x, y) is equal to p(x, y), where p'(x, y) is the value of the filtered sample (i.e., pixel value), and p(x, y) represents the value of the sample before filtering. That is to say, skip the adaptive correction filtering for this sample (do not filter); otherwise, filter the sample.

[0240] In the embodiments of the present application, when EalfEnableFlag is equal to 0, select the Figure 7 shown filtering coefficients and corresponding samples for filtering. Taking the filtering of the luminance component as an example, the adaptive correction filtering operation of the luminance component of the adaptive correction filtering unit is as follows:

[0241] ptmp = AlfCoeffLuma[filterIndex][8] * p(x, y)

[0242] for (j = 0; j < 8; j++) {

[0243] ptmp += AlfCoeffLuma[filterIndex][j] * (p(x - Hor[j], y - Ver[j]) + p(x + Hor[j], y + Ver[j])

[0244] }

[0245] ptmp = (ptmp + 32) >> 6

[0246] p'(x, y) = Clip3(0, (1 << BitDepth) – 1, ptmp)

[0247] Among them, p(x, y) is the offset sample, p'(x, y) is the reconstructed sample, and Hor[j] and Ver[j] (j = 0 to 7) are shown in Table 1.

[0248] The adaptive correction filtering operation of the chrominance component of the adaptive correction filtering unit is as follows:

[0249] ptmp = AlfCoeffChroma[i][8] * p(x, y)

[0250] for (j = 0; j < 8; j++) {

[0251] ptmp += AlfCoeffChroma[i][j] * (p(x - Hor[j], y - Ver[j]) + p(x + Hor[j], y + Ver[j])

[0252] }

[0253] ptmp = (ptmp + 32) >> 6

[0254] p'(x, y) = Clip3(0, (1 << BitDepth) – 1, ptmp)

[0255] Where p(x, y) is the offset sample (i.e., the sample before filtering), p'(x, y) is the reconstructed sample (i.e., the sample after filtering), and Hor[j] and Ver[j] (j = 0 to 7) are shown in Table 1.

[0256] Table 1. Coordinate offset values for sample compensation filtering

[0257]

[0258]

[0259] If EalfEnableFlag is equal to 1 (enhanced adaptive correction filtering should be used), if there exists a sample (x + i, y + j) (where i, j = -3, -2, -1, 0, 1, 2, 3) whose weight value is greater than that of (x, y), then p'(x, y) is equal to p(x, y); otherwise, the sample is filtered.

[0260] In the embodiment of this application, when EalfEnableFlag is equal to 1, the above Figure 8 shown filtering coefficients and corresponding samples are selected for filtering. Taking the adaptive correction filtering operation of the luminance component by the adaptive correction filtering unit as an example, it is as follows:

[0261] ptmp = AlfCoeffLuma[filterIndex]

[14] * p(x, y)

[0262] offset = 1 << (AlfLumaShift[filterIndex] - 1)

[0263] for (j = 0; j < 14; j++) {

[0264] ptmp += AlfCoeffLuma[filterIndex][j] * (p(x - Hor[j], y - Ver[j]) + p(x + Hor[j], y + Ver[j])

[0265] }

[0266] ptmp = (ptmp + offset) >> AlfLumaShift[filterIndex]

[0267] p'(x, y) = Clip3(0, (1 << BitDepth) – 1, ptmp)

[0268] Among them, p(x, y) is the offset sample, p'(x, y) is the reconstructed sample, and Hor[j] and Ver[j] (j = 0 to 13) are shown in Table 2.

[0269] The adaptive correction filtering operation of the chrominance component of the adaptive correction filtering unit is as follows:

[0270] ptmp = AlfCoeffChroma[i]

[14] * p(x, y)

[0271] offset = 1 << (AlfChromaShift[i] - 1)

[0272] for (j = 0; j < 14; j++) {

[0273] ptmp += AlfCoeffChroma[i][j] * (p(x - Hor[j], y - Ver[j]) + p(x + Hor[j], y + Ver[j])

[0274] }

[0275] ptmp = (ptmp + offset) >> AlfChromaShift[i]

[0276] p'(x, y) = Clip3(0, (1 << BitDepth) – 1, ptmp)

[0277] Among them, p(x, y) is the offset sample, p'(x, y) is the reconstructed sample, and Hor[j] and Ver[j] (j = 0 to 13) are shown in Table 2.

[0278] Table 2. Coordinate offset values of sample compensation filtering

[0279] The value of j The value of Hor[j] The value of Ver[j] 0 0 3 1 2 2 2 1 2 3 0 2 4 1 -2 5 2 -2 6 2 1 7 1 1 8 0 1 9 1 -1 10 2 -1 11 3 0 12 2 0 13 1 0

[0280] Regarding the process of adaptive filtering of the chrominance component, it can refer to the prior art materials, and this application will not elaborate further.

[0281] In summary, in the image processing method provided in the embodiments of the present application, in a privacy protection scenario, for the pixels to be filtered in the current coding unit, it can be determined whether to skip filtering according to the permission values of other pixels in the preset window where the pixels to be filtered are located. Among them, for other samples in the adaptive correction filtering unit and other samples outside the adaptive correction filtering unit corresponding to the current coding unit, the present application provides a solution for determining their permission values, which can perform adaptive filtering in combination with the user's permissions during the image encoding and decoding process. Moreover, it can save cache and there is no need to cache the true permission values of other samples outside the adaptive correction filtering unit. And when other samples are off-chip and cross-slice filtering is not supported, the permission values of other samples can also be estimated through this method for determining whether to skip filtering the samples to be filtered.

[0282] It can be understood that in order to implement the above functions, the image processing device includes the corresponding hardware and / or software modules for executing each function. Combining the algorithm steps of each example described in the embodiments disclosed in this article, the embodiments of the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in combination with the embodiments, but such implementation should not be considered to exceed the scope of the embodiments of the present application.

[0283] In the embodiments of the present application, the image processing device can be an encoding device or a decoding device. The image processing device can perform functional module division according to the above method examples. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware. It should be noted that the division of modules in this embodiment is illustrative, only a logical function division, and there can be other division methods in actual implementation.

[0284] In the case of dividing each functional module corresponding to each function, Figure 13 A possible schematic diagram of the composition of the image processing device involved in the above embodiments is shown, as Figure 13 shown. The image processing device 1300 may include: a determination unit 1301 and a processing unit 1302.

[0285] The determination unit 1301 and the processing unit 1302 cooperate to execute S901-S902 and more steps in the above method embodiments.

[0286] The embodiments of the present application also provide a chip. Figure 14The structural schematic diagram of a chip 1400 is shown. The chip 1400 includes one or more processors 1401 and an interface circuit 1402. Optionally, the above-mentioned chip 1400 may further include a bus 1403.

[0287] The processor 1401 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above image processing method can be completed by the integrated logic circuit in the hardware of the processor 1401 or the instructions in software form.

[0288] Optionally, the above-mentioned processor 1401 may be a general-purpose processor, a digital signal processing (DSP) processor, an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods and steps disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0289] The interface circuit 1402 can be used for sending or receiving data, instructions, or information. The processor 1401 can use the data, instructions, or other information received by the interface circuit 1402 for processing, and can send the processed information through the interface circuit 1402.

[0290] Optionally, the chip further includes a memory. The memory may include a read-only memory and a random access memory, and provides operation instructions and data to the processor. A part of the memory may also include a non-volatile random access memory (NVRAM).

[0291] Optionally, the memory stores executable software modules or data structures. The processor can execute corresponding operations by calling the operation instructions stored in the memory (the operation instructions can be stored in the operating system).

[0292] Optionally, the chip can be used in the image processing device involved in the embodiments of the present application. Optionally, the interface circuit 1402 can be used to output the execution result of the processor 1401. For the image processing method provided by one or more embodiments of the present application, reference can be made to the foregoing various embodiments, and details are not described herein again.

[0293] It should be noted that the functions corresponding to the processor 1401 and the interface circuit 1402 can be implemented through hardware design, software design, or a combination of both, and there is no limitation here.

[0294] Figure 15 FIG. is a schematic structural diagram of an electronic device provided by an embodiment of the present application. The electronic device 1500 can be a processor, a chip, or a functional module in a processor. As Figure 15 shown, the electronic device 1500 includes a processor 1501, a transceiver 1502, and a communication line 1503.

[0295] Among them, the processor 1501 is used to execute any step in the image processing method provided by the embodiment of the present application, and during the execution of any step in the image processing method provided by the embodiment of the present application, the transceiver 1502 and the communication line 1503 can be selectively called to complete corresponding operations.

[0296] Furthermore, the electronic device 1500 may further include a memory 1504. Among them, the processor 1501, the memory 1504, and the transceiver 1502 can be connected through the communication line 1503.

[0297] Among them, the processor 1501 is a processor, a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 1501 may also be other devices with processing functions, such as circuits, devices, or software modules, without limitation.

[0298] The transceiver 1502 is used to communicate with other devices or other communication networks. The other communication networks may be an Ethernet, a radio access network (RAN), a wireless local area network (WLAN), etc. The transceiver 1502 may be a module, a circuit, a transceiver, or any device capable of implementing communication.

[0299] The transceiver 1502 is mainly used for sending and receiving commands, information, etc., and may include a transmitter and a receiver for sending and receiving commands, information, etc. respectively; operations other than sending and receiving commands, information, etc. are implemented by the processor.

[0300] The communication line 1503 is used to transmit information between the components included in the electronic device 1500.

[0301] In one design, the processor can be regarded as a logic circuit and the transceiver as an interface circuit.

[0302] A memory 1504 for storing instructions. Among them, the instructions can be computer programs.

[0303] Among them, the memory 1504 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchlink dynamic random access memory (SLDRAM), and direct rambus random access memory (DRRAM). The memory 1504 can also be a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage media, or other magnetic storage devices, etc. It should be noted that the memories of the systems and methods described herein are intended to include but not be limited to these and any other suitable types of memories.

[0304] It should be noted that the memory 1504 can exist independently of the processor 1501 or can be integrated with the processor 1501. The memory 1504 can be used to store instructions or program codes or some data, etc. The memory 1504 can be located inside the electronic device 1500 or outside the electronic device 1500, without limitation. The processor 1501 is used to execute the instructions stored in the memory 1504 to implement the method provided in the above embodiments of the present application.

[0305] In one example, the processor 1501 may include one or more processors, such as Figure 15 the processor 0 (CPU0) and the processor 1 (CPU1) in

[0306] As an alternative implementation, the electronic device 1500 includes multiple processors. For example, in addition to Figure 15 the processor 1501 in

[0307] As an alternative implementation, the electronic device 1500 further includes an output device 1505 and an input device 1506. Exemplarily, the input device 1506 is a device such as a keyboard, a mouse, a microphone, or a joystick, and the output device 1505 is a device such as a display screen or a speaker.

[0308] It should be noted that the electronic device 1500 may be a chip system or a device with a Figure 15 similar structure in Figure 15 Among them, the chip system may be composed of chips or may include chips and other discrete devices. Actions, terms, etc. involved among the embodiments of the present application may refer to each other without limitation. The message names or parameter names in the messages for interaction between devices in the embodiments of the present application are only examples, and other names may also be used in specific implementations without limitation. In addition, Figure 15 the composition structure shown in Figure 15 does not constitute a limitation on the electronic device 1500. In addition to

[0309] The processors and transceivers described in this application can be implemented on integrated circuits (ICs), analog ICs, radio frequency integrated circuits, mixed-signal ICs, application specific integrated circuits (ASICs), printed circuit boards (PCBs), electronic devices, etc. The processors and transceivers can also be fabricated using various IC process technologies, such as complementary metal oxide semiconductor (CMOS), n-metal-oxide-semiconductor (NMOS), positive channel metal oxide semiconductor (PMOS), bipolar junction transistor (BJT), BiCMOS, silicon germanium (SiGe), gallium arsenide (GaAs), etc.

[0310] Figure 16 FIG. is a schematic structural diagram of an image processing apparatus provided for an embodiment of this application. The image processing apparatus can be applied to the scenarios shown in the above method embodiments. For ease of description, Figure 16 only the main components of the image processing apparatus are shown, including a processor 1601, a memory 1602, a control circuit 1603, and an input / output device 1604. The processor 1601 is mainly used for processing communication protocols and communication data, executing software programs, and processing data of software programs. The memory 1602 is mainly used for storing software programs and data. The control circuit 1603 is mainly used for power supply and transmission of various electrical signals. The input / output device 1604 is mainly used for receiving data input by users and outputting data to users.

[0311] When the image processing device is the processor 1601, the control circuit 1603 can be the main board. The memory 1602 includes media with storage functions such as hard disks, RAM, and ROM. The processor 1601 can include a baseband processor 1601 and a central processing unit. The baseband processor is mainly used to process communication protocols and communication data, and the central processing unit is mainly used to control the entire image processing device, execute software programs, and process data of software programs. The input / output device 1604 includes a display screen, a keyboard, a mouse, etc. The control circuit 1603 can further include or be connected to a transceiver circuit or transceiver, such as a network cable interface, etc., for sending or receiving data or signals, such as performing data transmission and communication with other devices. Further, it can also include an antenna for wireless signal transceiver for data / signal transmission with other devices.

[0312] An embodiment of the present application also provides an image processing device, which includes: at least one processor, when the above at least one processor executes program code or instructions, the above related method steps are implemented to implement the image processing method in the above embodiment.

[0313] Optionally, the device may further include at least one memory for storing the program code or instructions.

[0314] An embodiment of the present application also provides a computer storage medium, in which computer instructions are stored. When the computer instructions run on the image processing device, the image processing device is enabled to execute the above related method steps to implement the image processing method in the above embodiment.

[0315] An embodiment of the present application also provides a computer program product. When the computer program product runs on a computer, the computer is enabled to execute the above related steps to implement the image processing method in the above embodiment.

[0316] An embodiment of the present application also provides an image processing device, which can specifically be a chip, an integrated circuit, a component, or a module. Specifically, the device may include a processor connected to a memory for storing instructions, or the device includes at least one processor for obtaining instructions from an external memory. When the device runs, the processor can execute the instructions to enable the chip to execute the image processing method in each of the above method embodiments.

[0317] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the processes or functions in the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wirelessly (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more integrated available media. The available medium can be a magnetic medium (such as a floppy disk, a magnetic disk, a magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as a solid state drive (SSD)), etc.

[0318] Through the description of the above embodiments, those skilled in the art can clearly understand that, for the convenience and conciseness of description, only the above division of each functional module is used as an example. In actual applications, the above functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0319] In several embodiments provided by the present application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there can be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the couplings or direct couplings or communication connections shown or discussed with each other can be through some interfaces, and the indirect couplings or communication connections of the devices or units can be in electrical, mechanical, or other forms.

[0320] The unit described as a separation component may or may not be physically separated. The component shown as a unit may or may not be a physical unit, that is, it may be located in one place or distributed across multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0321] In addition, each functional unit in various embodiments of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0322] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the methods described in various embodiments of the present application. The aforementioned storage medium includes: flash memory, mobile hard disk, read-only memory, random access memory, magnetic disk, or optical disk, etc., all kinds of media that can store program codes.

[0323] As described above, only the specific implementation manners of the present application are provided, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claimed rights.

Claims

1. An image processing method, characterized in that, Including: Determine the permission values of other samples within a preset window where the sample to be filtered in the current coding unit is located; wherein, if the first sample is within the adaptive correction filtering unit corresponding to the current coding unit, obtain the permission value of the first sample from the permission storage unit corresponding to the first sample; if the first sample is outside the adaptive correction filtering unit corresponding to the current coding unit, use the permission value of the sample closest to the first sample within the adaptive correction filtering unit as the permission value of the first sample, or obtain the permission value of the first sample from the permission storage unit corresponding to the first sample; the first sample is any one of the other samples; Based on the permission values of the other samples and the permission value of the sample to be filtered, determine whether to skip filtering the sample to be filtered.

2. The method according to claim 1, wherein The determining whether to skip filtering the sample to be filtered based on the permission values of the other samples and the permission value of the sample to be filtered includes: If there is a sample among the other samples whose permission value is greater than the permission value of the sample to be filtered, determine to skip filtering the sample to be filtered; otherwise, determine that filtering of the sample to be filtered is required.

3. The method according to claim 1 or 2, characterized in that, The first sample being outside the adaptive correction filtering unit corresponding to the current coding unit includes: The first sample is outside the image boundary where the current coding unit is located; or, The first sample is outside the boundary of the slice to which the sample to be filtered belongs, and the current coding unit does not support adaptive correction filtering across slice boundaries; or, The first sample is outside the upper boundary or the lower boundary of the adaptive correction filtering unit corresponding to the current coding unit.

4. The method according to any one of claims 1 to 3, wherein The preset window includes samples (x + i, y + j); wherein, (x, y) represents the sample to be filtered; i, j = -3, -2, -1, 0, 1, 2, 3.

5. An image processing apparatus, comprising at least one processor and a memory, characterized in that, The at least one processor executes a program or instructions stored in the memory so that the image processing device implements the method according to any one of claims 1 to 4 above.

6. A computer-readable storage medium for storing a computer program, characterized in that, When the computer program runs on a computer or a processor, the computer or the processor implements the method according to any one of claims 1 to 4 above.

7. A computer program product, comprising instructions, characterized in that, When the instructions run on a computer or a processor, the computer or the processor implements the method according to any one of claims 1 to 4 above.

8. A chip, comprising at least one processor and a memory, characterized in that, The at least one processor executes a program or instructions stored in the memory so that the chip implements the method according to any one of claims 1 to 4 above.

Images