Multi-core-layer circuit board lamination structure and lamination method
The laminating structure with symmetrical buffer boards and controlled lamination process effectively addresses layer misalignment and warping in multiple core layer circuit boards, enhancing alignment accuracy and structural integrity.
Patent Information
- Application Number
- CN202510527184.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-25
- Publication Date
- 2025-07-15
AI Technical Summary
During the pressing process, multi-core layer circuit boards are prone to problems such as layer deviation, disassembly and poor shrinkage, and the existing technology is difficult to effectively solve.
The buffer plate body structure is adopted with a symmetrically arranged, and the buffer plate body is stacked in sequence from the outside to the inside to form a sandwich structure. The buffer layer absorbs the stress generated by the contact between the rivets and the steel plate, and combines gradient pressing and precise rivet positioning technology to ensure interlayer alignment and structural stability.
Effectively reduce layer deviation and dislocation phenomena, improve the alignment between pressed layers to 98%, ensure the structural stability and electrical performance of the circuit board, and improve functional integration and signal transmission quality.
Smart Images

Figure CN120321872A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of circuit boards, and more particularly, to a multi-core layer circuit board lamination structure and a lamination method. Background Art
[0002] A multi-core layer circuit board refers to a special structure method that adopts a multi-core layer structure in the design of a multi-layer board. The core layer is the basic structure of the multi-layer board, usually composed of an insulating substrate and double-sided copper foil. Inner layer circuits are formed through processes such as drilling, copper plating, and etching. It has advantages such as high mechanical strength and more complete signal transmission. Due to high-density circuit design and differences in copper thickness on both sides, problems such as layer shift, misalignment, and shrinkage and swelling defects are likely to occur during the lamination process. In related technologies, these problems are usually improved by adjusting the lamination temperature, pressure, and using auxiliary materials such as rivets. However, in the actual production process, there are still problems such as stress generated by the direct contact between the rivet and the steel plate, resulting in layer shift after lamination and abnormal production. Summary of the Invention
[0003] In view of this, the present invention provides a multi-core layer circuit board lamination structure and a lamination method that can effectively improve problems such as layer shift and misalignment.
[0004] The object of the present invention is achieved through the following technical solutions: On the one hand, a multi-core layer circuit board lamination structure is provided, including: a multi-layer board main body, and two groups of buffer plate bodies symmetrically laminated on the upper and lower surfaces of the multi-layer board main body; the buffer plate body includes a first copper foil layer, an elastic buffer layer, and a second copper foil layer laminated in sequence from the outside to the inside; the elastic buffer layer is two or more first prepregs laminated together, or a combination of a silica gel pad, a release film, and a resin barrier film laminated in sequence from the inside to the outside.
[0005] In the above technical solution, through the buffer plate bodies symmetrically arranged on the opposite two surfaces of the multi-layer board main body, the lamination structure forms a "sandwich" structure. The elastic buffer layer in the buffer plate body can effectively buffer the pressure received by the multi-layer board main body. When the multi-layer board main body is laminated, the buffer plate body can effectively absorb the stress generated by the contact between the rivet and the steel plate in the multi-layer board main body, thereby avoiding the rigid contact between the rivet and the steel plate, effectively reducing problems such as layer shift and misalignment during the lamination of the multi-layer board main body, and making the shrinkage and swelling stable within 3 mils, and the lamination layer alignment yield is increased to 98%.
[0006] Among them, when the elastic buffer layer is two or more first prepregs, it can evenly disperse the lamination stress and reduce the deformation of the core board. When the elastic buffer layer is a combination of a silica gel pad, a release film, and a resin barrier film, the silica gel pad can provide elastic support, the release film can prevent adhesion, and the resin barrier film can improve the layer alignment accuracy.
[0007] Optionally, in a possible implementation, the multi-layer board body includes more than three core board layers, each core board layer includes an insulating substrate and circuit layers provided on opposite two surfaces of the insulating substrate, and adjacent two core board layers are press-fitted and connected through a second prepreg.
[0008] In the above technical solution, since the multi-layer board body includes more than three core board layers and each core board layer is provided with a circuit layer, the number of wiring layers of the circuit board can be increased in this way. In complex electronic circuit designs, more wiring layers mean that more circuit connections can be accommodated, making the functional integration of electronic devices higher. In addition, the press-fitting connection between multiple core board layers through the second prepreg is beneficial to isolate different types of signals and improve the structural strength at the same time.
[0009] Optionally, in a possible implementation, a plurality of rivet holes are provided on each core board layer, and the diameter tolerance of each corresponding rivet hole is ≤0.02 mm.
[0010] In the above technical solution, the smaller diameter tolerance ensures the height adaptability between the rivet and the rivet hole. During the assembly process, the rivet can be accurately inserted into the rivet hole, reducing the assembly difficulty caused by size mismatch. And when the rivet is inserted into the rivet hole, it can realize the preliminary positioning of multiple core board layers, avoiding excessive layer deviation during subsequent press-fitting and resulting in unqualified products.
[0011] Optionally, in a possible implementation, the first prepreg uses a 106-type PP sheet or a 1080-type PP sheet.
[0012] In the above technical solution, the 106-type and 1080-type PP sheets have excellent bonding properties. In the laminated structure, as the first prepreg, it can firmly bond the first copper foil layer and the second copper foil layer together, contributing to the construction of a stable buffer board structure. And the 106-type and 1080-type PP sheets have a specific thickness range, which can provide good flexibility while meeting the thickness requirements of the buffer board.
[0013] Optionally, in a possible implementation, the thickness of the silica gel pad is 0.075 mm - 0.11 mm, and the total thickness of the release film and the resist film does not exceed 0.05 mm.
[0014] In the above technical solution, the silica gel pad, the release film and the resist film can provide an effective buffering function within a specific thickness range. They will neither lose the buffering ability due to being too thin nor occupy too much space or increase unnecessary costs due to being too thick. When the circuit board is subjected to external impact force or vibration, the silica gel pad can effectively absorb and disperse energy within this thickness range according to its own elastic characteristics, protecting the circuit board body and the internal circuit components therein.
[0015] On the other hand, a lamination method for a multi-core layer circuit board is provided, including the following steps: S1. Core board pretreatment: Perform plasma cleaning on each core board layer, and control the surface roughness within the range of 0.3 - 0.5 μm; S2. Pre-bonding and positioning: Fuse each core board layer and the second semi-cured sheet to form a multi-layer board body, and insert rivets into the rivet holes. The diameter of the rivets is 0.01 - 0.03 mm smaller than the diameter of the rivet holes; S3. Lamination structure stacking: Stack in the order of the buffer plate body, the multi-layer board body, the buffer plate body, and the steel plate in sequence; S4. Pressing: Place the stacked lamination structure in step S3 into a pressing device for heating and pressing; S4: Cooling and demolding: Cool the pressed lamination structure, and separate the steel plate and the two groups of buffer plate bodies after cooling from the multi-layer board body after pressing.
[0016] In the above technical solution, through plasma cleaning, pollutants and oxides on the surface of the core board layer can be removed, improving the connection strength of subsequent fusion; during the pre-bonding process, the insertion of rivets can achieve the positioning function, helping to maintain the relative position stability between each core board layer and preventing the core board layer from shifting during subsequent lamination and use; in addition, stacking in the order of the buffer plate body, the multi-layer board body, the buffer plate body, and the steel plate forms a symmetric structure, which helps to evenly apply pressure during lamination, enabling the multi-layer board body and the buffer plate body to be uniformly stressed in the vertical direction, and the buffer plate body can effectively prevent the rivets from contacting the workbench or the steel plate and generating rigid stress. In addition, the cooling and demolding process gradually cools the pressed lamination structure, which helps to stabilize the structure of the circuit board. During the cooling process, the internal stress of the circuit board is reasonably released, avoiding internal stress concentration caused by rapid cooling. Therefore, the lamination method of the present invention can effectively reduce the layer deviation amount during the lamination of multiple core boards and improve the processing quality of the product.
[0017] Optionally, in a possible implementation manner, in step S4, the lamination structure is pressed by using a gradient pressing method.
[0018] In the above technical solution, the gradient pressing method can gradually apply pressure according to the characteristics and requirements of different layers in the laminated structure, which helps to ensure that each layer of the multi-layer board body can be evenly compacted.
[0019] Optionally, in a possible implementation, the gradient pressing includes the following three stages: The first stage: apply a pressure of 2 - 3 MPa at a temperature of 120 - 140 °C, and the pressing time is 30 - 40 minutes; The second stage: apply a pressure of 5 - 6 MPa at a temperature of 160 - 180 °C, and the pressing time is 20 - 30 minutes; The third stage: apply a pressure of 8 - 10 MPa at a temperature ≥ 190 °C, and the pressing time is 10 - 15 minutes.
[0020] In the above technical solution, the staged gradient pressing method can effectively reduce defects between layers. Since the temperature, pressure, and time of each stage are set according to the material characteristics and lamination requirements, it can avoid problems such as internal stress concentration in the material, bubbles between layers, or delamination that may be caused by a single high-temperature and high-pressure condition.
[0021] Optionally, in a possible implementation, it further includes a post-treatment step: S6. Perform X-ray detection on the laminated multi-layer board, and the detected alignment accuracy error between layers ≤ 75 μm; S7. Perform secondary curing under a nitrogen protection environment, with the temperature controlled at 150 - 160 °C and the time of 30 - 45 minutes.
[0022] In the above technical solution, controlling the alignment accuracy error between layers ≤ 75 μm can ensure the precise alignment of the circuits and components between the layers of the circuit board. And early detection of the alignment accuracy between layers can screen out unqualified products. Detecting and removing multi-layer boards with interlayer alignment problems in a timely manner during the production process helps to improve the overall product quality. The nitrogen environment can prevent the resin in the prepreg from being oxidized during the curing process to further improve the electrical performance of the circuit board.
[0023] Optionally, in a possible implementation, the buffer plate body completely covers the upper surface or the lower surface of the multi-layer board body, and the steel plate completely covers the buffer plate body.
[0024] In the above technical solution, the buffer plate body completely covering the upper surface or the lower surface of the multi-layer board body can provide comprehensive protection for the multi-layer board body. The steel plate completely covering the buffer plate body can ensure that the pressure is evenly transmitted to the buffer plate body and the multi-layer board body during the lamination process. And due to the high flatness and large hardness of the steel plate, it can evenly disperse the pressure applied by the lamination equipment to the entire surface of the buffer plate body. Description of the Drawings
[0025] To more clearly illustrate the technical solutions of the embodiments of the present application, the accompanying drawings required for the embodiments will be briefly introduced below. It should be understood that the following accompanying drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related accompanying drawings can also be obtained based on these drawings.
[0026] Figure 1 Schematic diagram of the overall structure of an embodiment Reference numerals: 1 - multi-layer board body; 2 - buffer board body; 21 - first copper foil layer; 22 - elastic buffer layer; 23 - second copper foil layer; 3 - core board layer; 31 - insulating substrate; 32 - circuit layer; 4 - second semi-cured sheet; 5 - steel plate. Specific embodiments
[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Usually, the components of the embodiments of the present application described and shown in the accompanying drawings here can be arranged and designed in various different configurations.
[0028] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application to be protected, but merely represents the selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.
[0029] Please refer to Figure 1 , on the one hand, this embodiment provides a multi-core layer printed circuit board lamination structure, including: a multi-layer board body 1, and two groups of buffer board bodies 2 symmetrically laminated on the upper and lower surfaces of the multi-layer board body 1; the buffer board body 2 includes a first copper foil layer 21, an elastic buffer layer 22, and a second copper foil layer 23 laminated in sequence from the outside to the inside; the elastic buffer layer 22 is two or more first semi-cured sheets laminated, or a silica gel pad, a release film, and a resist film compounded in sequence from the inside to the outside. The elastic buffer layer 22 is selected from one of the two layer structures, and the two layer structures have similar buffer effects. The first copper foil layer 21 and the second copper foil layer 23 are provided to isolate the contact between the multi-layer board body 1 and the steel plate 5, and prevent the first semi-cured sheet or the silica gel pad from bleeding onto the steel plate 5.
[0030] In this embodiment, buffer plates 2 are symmetrically arranged on two opposite surfaces of the multi-layer board body 1, so that the laminated structure forms a "sandwich" structure. The elastic buffer layer 22 in the buffer plate 2 can effectively buffer the pressure received by the multi-layer board body 1. When the multi-layer board body 1 is being laminated, the buffer plate 2 can effectively absorb the stress generated by the contact between the rivets and the steel plate 5 in the multi-layer board body 1, thereby avoiding the rigid contact between the rivets and the steel plate 5, effectively reducing problems such as layer deviation and misalignment in the lamination of the multi-layer board body 1, and making the expansion and contraction stable within 3 mils, and the yield rate of the lamination layer alignment accuracy is increased to 98%.
[0031] Among them, when the elastic buffer layer 22 is two or more first prepregs, it can evenly disperse the lamination stress and reduce the deformation of the core board. When the elastic buffer layer 22 is a three-in-one bulk material of a silica gel pad, a release film, and a resist film, the silica gel pad therein can provide elastic support, the release film can prevent adhesion, and the resist film can improve the layer alignment accuracy. The above-mentioned elastic buffer layer 22 can effectively absorb the stress received during rivet lamination, evenly disperse its pressure, and prevent the rivets from moving while pulling the core board layer 3 to cause layer deviation.
[0032] In this embodiment, the multi-layer board body 1 includes three or more core board layers 3. Each core board layer 3 includes an insulating substrate 31 and circuit layers 32 provided on two opposite surfaces of the insulating substrate 31. The insulating substrate 31 is a plate-like structure, and copper layers are covered on its upper and lower opposite surfaces. The copper layers are formed into circuit layers 32 through processes such as circuit design, exposure, and development. Adjacent two core board layers 3 are laminated and connected through a second prepreg 4.
[0033] Since the multi-layer board body 1 includes three or more core board layers 3, and each core board layer 3 is provided with a circuit layer 32, the number of wiring layers of the circuit board can be increased in this way. In complex electronic circuit designs, more wiring layers mean that more circuit connections can be accommodated, making the functional integration of electronic devices higher. In addition, the lamination connection between multiple core board layers 3 through the second prepreg 4 is beneficial to isolate different types of signals and improve the structural strength at the same time.
[0034] It should be noted that a number of rivet holes are provided on each core board layer 3, and the diameter tolerance of each corresponding rivet hole ≤ 0.02 mm. The rivet holes are arranged in a matrix, and an antioxidant coating with a thickness of 0.5 - 1 μm is provided on the inner wall of the holes. The rivet holes play a role in alignment and facilitate the alignment during the lamination of the multi-layer board body 1.
[0035] A smaller diameter tolerance ensures a high degree of fit between the rivets and the rivet holes. During the assembly process, the rivets can be inserted into the rivet holes accurately without error, reducing assembly difficulties caused by size mismatches. When the rivets are inserted into the rivet holes, they can achieve preliminary positioning of multiple core board layers 3, avoiding excessive layer misalignment during subsequent lamination, which may lead to product disqualification. In addition, precise rivet holes contribute to maintaining the structural integrity of the circuit board. When the rivets are accurately installed in the rivet holes, it can prevent deformation of the circuit board or local stress concentration caused by improper assembly, thereby reducing the impact on the circuit layer 32.
[0036] As one implementation of the elastic buffer layer 22, the first prepreg uses a 106-type PP sheet or a 1080-type PP sheet. The 106-type and 1080-type PP sheets have excellent bonding properties. In the laminated structure, as the first prepreg, it can firmly bond the first copper foil layer 21 and the second copper foil layer 23 together, contributing to the construction of a stable buffer board body 2 structure. And the 106-type and 1080-type PP sheets have a specific thickness range, which can provide good flexibility while meeting the thickness requirements of the buffer board body 2.
[0037] In addition, these two types of PP sheets usually have a low dielectric constant. In a circuit, a low dielectric constant helps reduce delays and attenuation during signal transmission.
[0038] As another implementation of the elastic buffer layer 22, the thickness of the silica gel pad is 0.075 mm - 0.11 mm, and the total thickness of the release film and the resist film does not exceed 0.05 mm.
[0039] The silica gel pad, release film, and resist film can provide an effective buffer function within a specific thickness range. They will neither lose the buffer capacity due to being too thin nor occupy too much space or increase unnecessary costs due to being too thick. When the circuit board is subjected to external impact or vibration, the silica gel pad can effectively absorb and disperse energy within this thickness range according to its elastic characteristics, protecting the circuit board body and its internal circuit components.
[0040] On the other hand, this embodiment also provides a lamination method for a multi-core layer circuit board, including the following steps: S1. Core board pretreatment: Perform plasma cleaning on each core board layer 3, and control the surface roughness Ra value within the range of 0.3 - 0.5 μm; S2. Pre-bonding and positioning: Fuse each core board layer 3 and the second prepreg 4 at high temperature to form a multi-layer board body 1, and insert the rivets into the rivet holes. The diameter of the rivets is 0.01 - 0.03 mm smaller than the diameter of the rivet holes, and a slight interference fit can be formed between the rivets and the rivet holes; S3. Stack the laminated structure in the order of the buffer plate body 2, the multi-layer board main body 1, the buffer plate body 2, and the steel plate 5 in sequence; S4. Press: Place the laminated structure stacked in step S3 into a pressing device for heating and pressing; S4: Cool and remove the plate. Cool the laminated structure after pressing, and separate the steel plate 5 and the two groups of buffer plate bodies 2 after cooling from the multi-layer board main body 1 after pressing is completed.
[0041] In this embodiment, plasma cleaning can remove the contaminants and oxides on the surface of the core board layer 3, enabling better intermolecular contact between the core board layer 3 and the second semi-cured sheet 4 during the subsequent fusion process, thereby improving the connection strength. During the pre-bonding process, the insertion of the rivets can achieve the positioning function, helping to maintain the relative positions of the core board layers 3 stable, and preventing the core board layer 3 from shifting during the subsequent lamination and use processes; moreover, the rivet connection can effectively disperse the stress inside the multi-layer board main body 1. When the circuit board is subjected to external pressure or temperature changes to generate stress, the rivets can evenly distribute the stress on the multi-layer board main body 1, reducing the possibility of stress concentration in a certain local area.
[0042] In addition, stacking in the order of the buffer plate body 2, the multi-layer board main body 1, the buffer plate body 2, and the steel plate 5 forms a symmetric structure, which helps to evenly apply pressure during the lamination process, enabling the multi-layer board main body 1 and the buffer plate body 2 to receive uniform forces in the vertical direction. During the pressing process, problems such as insufficient interlayer bonding or local deformation caused by uneven pressure can be avoided, improving the quality of the laminated structure, and the buffer plate body 2 can effectively prevent the rivets from contacting the workbench or the steel plate 5 to generate rigid stress.
[0043] Furthermore, the cooling and de-plating process gradually cools the laminated structure after pressing, which helps to stabilize the structure of the circuit board. During the cooling process, the stress inside the circuit board is reasonably released, avoiding internal stress concentration caused by rapid cooling. Therefore, the lamination method of this embodiment can effectively reduce the layer deviation amount during the lamination of multiple core board layers 3 and improve the processing quality of the product.
[0044] In step S4 of this embodiment, the laminated structure is pressed in a gradient pressing manner. The gradient pressing method can gradually apply pressure according to the characteristics and requirements of different layers in the laminated structure, helping to ensure that each layer of the multi-layer board main body 1 can be evenly compacted. And different layers may have different thicknesses, material hardnesses, etc. characteristics. The gradient pressing can adjust the magnitude and application order of the pressure according to these differences, avoiding adverse effects on layers with different characteristics caused by a unified pressure and reducing the interlayer differences.
[0045] Specifically, the gradient pressing includes the following three stages. The first stage: apply a pressure of 2 - 3 MPa at a temperature of 120 - 140 °C, and the pressing time is 30 - 40 minutes; the relatively low starting conditions of temperature and pressure enable a gentle initial compaction process for each layer of material in the laminated structure. This helps the materials to initially adjust their positions under relatively low stress, avoiding damage to the internal structure of the materials or misalignment between layers caused by suddenly applying a large pressure.
[0046] The second stage: apply a pressure of 5 - 6 MPa at a temperature of 160 - 180 °C, and the pressing time is 20 - 30 minutes; the increase in temperature and pressure promotes further compaction and fusion of the materials. The higher temperature increases the fluidity of materials such as prepregs, and under a pressure of 5 - 6 MPa, it can fill the tiny voids that may exist in the first stage, enhancing the intermolecular bonding force between layers.
[0047] The third stage: apply a pressure of 8 - 10 MPa at a temperature ≥ 190 °C, and the pressing time is 10 - 15 minutes; the final stage of high temperature and high pressure ensures a high degree of densification of the laminated structure. This stage can eliminate any tiny voids that may remain in the previous two stages, enabling a nearly perfect bonding state between each layer.
[0048] The staged gradient pressing method in this embodiment can effectively reduce the defects between layers. Since the temperature, pressure, and time of each stage are set according to the material properties and lamination requirements, it can avoid problems such as internal stress concentration in the materials, interlayer bubbles, or delamination that may be caused by a single high - temperature and high - pressure condition.
[0049] This embodiment also includes post - treatment steps: S6. Perform X - ray detection on the pressed multi - layer board, and the detected interlayer alignment accuracy error ≤ 75 μm; S7. Perform secondary curing under a nitrogen - protecting environment, with the temperature controlled at 150 - 160 °C and the time being 30 - 45 minutes.
[0050] By controlling the interlayer alignment accuracy error ≤ 75 μm, it can ensure the precise alignment of the circuits and components between each layer of the circuit board. And early detection of the interlayer alignment accuracy can screen out unqualified products. Detecting and removing multi - layer boards with interlayer alignment problems in a timely manner during the production process helps to improve the overall product quality. The nitrogen environment can prevent the resin in the prepreg from being oxidized during the curing process, further improving the electrical performance of the circuit board.
[0051] It should be noted that the buffer plate body 2 in this embodiment completely covers the upper surface or the lower surface of the multi - layer board body 1, and the steel plate 5 completely covers the buffer plate body 2.
[0052] The buffer plate body 2 completely covers the upper surface or the lower surface of the multilayer board body 1, and can provide comprehensive protection for the multilayer board body 1. The steel plate 5 completely covers the buffer plate body 2, and can ensure that the pressure is evenly transmitted to the buffer plate body 2 and the multilayer board body 1 during the lamination process. Moreover, due to the high flatness and large hardness of the steel plate 5, it can evenly disperse the pressure applied by the laminating equipment to the entire surface of the buffer plate body 2.
[0053] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by terms such as "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be understood as a limitation to the present invention.
[0054] In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, the meaning of "a plurality" is two or more, unless otherwise specifically defined.
[0055] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. A multi-core layer printed circuit board lamination structure, characterized in that, Comprising: A multi-layer board body, and two groups of buffer board bodies symmetrically laminated on the upper and lower surfaces of the multi-layer board body; the buffer board bodies include a first copper foil layer, an elastic buffer layer, and a second copper foil layer laminated in sequence from the outside to the inside; the elastic buffer layer is two or more first prepreg sheets laminated together, or a silica gel pad, a release film, and a resist film compounded in sequence from the inside to the outside.
2. The multi-core layer circuit board lamination structure according to claim 1, characterized in that The multi-layer board body includes three or more core board layers, each core board layer includes an insulating substrate and circuit layers provided on the two opposite surfaces of the insulating substrate, and adjacent core board layers are press-fitted and connected through a second prepreg.
3. The multi-core layer printed circuit board lamination structure according to claim 2, wherein A plurality of rivet holes are provided on each core board layer, and the diameter tolerance of each corresponding rivet hole is ≤0.02 mm.
4. The multi-core layer circuit board lamination structure according to claim 1, wherein The first prepreg uses a 106-type PP sheet or a 1080-type PP sheet.
5. The multi-core layer circuit board lamination structure according to claim 1, characterized in that, The thickness of the silica gel pad is 0.075 mm - 0.11 mm, and the total thickness of the release film and the resist film does not exceed 0.05 mm.
6. A lamination method for a multi-core layer circuit board according to any one of claims 1-5, characterized in that, Including the following steps: S1. Core board pretreatment: Plasma clean each core board layer to control the surface roughness within the range of 0.3 - 0.5 μm; S2. Pre-bonding and positioning: Fuse each core board layer and the second prepreg to form a multi-layer board body, and insert rivets into the rivet holes. The diameter of the rivets is 0.01 - 0.03 mm smaller than the diameter of the rivet holes; S3. Laminated structure stacking, stacking in the order of buffer board body, multi-layer board body, buffer board body, and steel plate in sequence; S4. Press-fitting: Place the laminated structure stacked in step S3 into a press-fitting device for heating and press-fitting; S4: Cooling and demolding, cool the press-fitted laminated structure, and separate the steel plate and the two groups of buffer board bodies after cooling from the multi-layer board body after press-fitting.
7. The lamination method of the multi-core layer circuit board according to claim 6, wherein, In step S4, the laminated structure is press-fitted by means of gradient press-fitting.
8. The lamination method of the multi-core layer circuit board according to claim 7, characterized in that, The gradient press-fitting includes the following three stages: The first stage: Apply a pressure of 2 - 3 MPa at a temperature of 120 - 140 °C, and the press-fitting time is 30 - 40 minutes; The second stage: Apply a pressure of 5 - 6 MPa at a temperature of 160 - 180 °C, and the press-fitting time is 20 - 30 minutes; The third stage: Apply a pressure of 8 - 10 MPa at a temperature ≥190 °C, and the press-fitting time is 10 - 15 minutes.
9. The lamination method of the multi-core layer circuit board according to claim 6, characterized in that It also includes a post-treatment step: S6. Perform X-ray detection on the press-fitted multi-layer board, and the detection layer alignment accuracy error is ≤75 μm; S7. Perform secondary curing in a nitrogen protection environment, with the temperature controlled at 150 - 160 °C and the time of 30 - 45 minutes.
10. The multi-core layer circuit board lamination structure according to claim 6, characterized in that, The buffer board body completely covers the upper surface or the lower surface of the multi-layer board body, and the steel plate completely covers the buffer board body.