PCIe device starting determination method and computing device

Abstract

The embodiment of the invention discloses a PCI e device starting determination method. The PCI e equipment starting determination method comprises the following steps: acquiring a hit time interval; wherein the hit time interval is used for representing a time interval to which the PCIe equipment belongs when the PCIe equipment successfully starts query last time; the hit time interval comprises starting time and ending time; the starting time is the total query time before successful starting in the previous PCIe equipment starting process; the termination time is the total query time when the PCIe device is successfully started in the previous PCIe device starting process; determining a query time sequence according to the hit time interval, the maximum allowable query times and the maximum allowable waiting time; and determining the starting state of the PCIe equipment according to the query time sequence. According to the starting time interval of the PCIe device in the at least one starting process of the server, the query time sequence of the BIOS for querying the starting state of the PCIe device in the starting process is determined, generation of invalid query commands in the starting process of the server is reduced, and CPU resources are saved.

Description

Technical Field

[0001] This application relates to the field of computer technologies, and in particular, to a method for determining the startup of a PCIe device and a computing device. Background Art

[0002] With the development of data centers, the network, storage, and security functions of servers have become increasingly large and complex. To enable servers to focus more on running critical applications and operating systems more effectively, a high-speed serial computer expansion bus standard device (peripheral component interconnect express, PCIe), such as a smart network card, can be introduced. A smart network card is made up of a network controller and a multi-core central processing unit (CPU), and has both network and computing capabilities. It can offload the network, security, and storage functions of the host server to the smart network card, thereby releasing valuable processing power. Therefore, it is very important for the server to cooperate with the smart network card to boot up.

[0003] When the server initializes the physical link of the smart network card on the host side and allocates resources, it needs to wait for the PCIe device to complete startup before proceeding. As the functions of PCIe devices become more powerful, the startup time of PCIe devices becomes longer, and the time for the server to wait for the PCIe device to complete startup also becomes longer. Moreover, the time required for different PCIe devices to complete startup is different, and a server needs to wait for different times to adapt to different PCIe devices. Therefore, how to optimize the time for the server to wait for the PCIe device to start up has become an urgent problem to be solved currently. Summary of the Invention

[0004] Embodiments of this application provide a method for determining the startup of a PCIe device and a computing device, which reduces the generation of invalid query commands during the server startup process and saves CPU resources.

[0005] In a first aspect, an embodiment of the present application provides a method for determining the startup of a PCIe device, which is applied to a computing device and implemented based on the Basic Input / Output System (BIOS). The method includes: obtaining a hit time interval, where the hit time interval is used to represent the time interval to which the total query time for the previous successful startup query of the PCIe device belongs; the hit time interval includes a start time and an end time; the start time is the total query time before the previous PCIe device startup process is successfully started, or the end time is the total query time when the previous PCIe device startup process is successfully started; determining a query time sequence according to the hit time interval, the maximum allowable number of queries, and the maximum allowable waiting time, where the maximum allowable number of queries is the number of queries allowed to be executed during the PCIe device startup process; the maximum allowable waiting time is the time allowed to wait during the PCIe device startup process; the query time sequence is used to represent the time that needs to be waited before each query of the PCIe device startup status; determining the startup status of the PCIe device according to the query time sequence.

[0006] In this way, according to the query time when the BIOS queries that the PCIe device has completed startup during at least one previous startup process of the server, the query time sequence of the BIOS during the current startup process of the server is obtained. The number of queries of the BIOS for the startup status of the PCIe device is reduced, that is, the useless PCIe device status query instructions are reduced, the CPU power consumption is saved, and the occupation of the layer command channel is reduced. At the same time, the startup time of the entire server is saved, and the application efficiency of the server is improved.

[0007] In a possible implementation manner, determining the query time sequence according to the hit time interval, the maximum allowable number of queries, and the maximum allowable waiting time includes: determining the first query time in the query time sequence according to the first start time and the end time; the first query time is the time that needs to be waited before the first query of the PCIe device startup status; obtaining an average query time according to the maximum allowable number of queries and the maximum allowable waiting time; determining the second query time in the query time sequence according to the first query time and the average query time; the sum of the second query time and the first query time is an integer multiple of the average query time; using the average query time as the query time for other queries in the query time sequence except the first query time and the second query time. In this way, since the first query time for the BIOS to query the PCIe device startup status is adjusted according to the hit time interval, after multiple adjustments, the BIOS can query that the PCIe startup status is started during the first query. The generation of useless query instructions when the BIOS queries the PCIe device startup status is reduced, the CPU power consumption is saved, and the startup time of the entire server is saved, and the application efficiency of the server is improved.

[0008] In a possible implementation, determining the first query time in the query time series according to the first start time and end time includes: when the difference between the start time and the end time of the hit time interval is greater than a preset value, taking the midpoint of the hit time interval as the first query time. In this way, since the idea similar to the dichotomy method is adopted when calculating the first query time (that is, the first query time is the midpoint of the hit time interval), half of the invalid query times can be excluded each time of calculation, enabling the BIOS to obtain the optimal query time for querying the PCIe device after fewer iterations of calculation (for example, the BIOS can query that the PCIe device has been started after one query).

[0009] In a possible implementation, determining the first query time in the query time series according to the first start time and end time includes: when the difference between the start time and the end time of the hit time interval is less than or equal to a preset value, taking the end time as the first query time.

[0010] In a possible implementation, updating the hit time interval according to the total query time before the successful start of the PCIe device during the current startup process and the total query time when the PCIe device is successfully started during the current startup process. In this way, after the BIOS successfully queries the startup status of the PCIe device each time, it saves the time characteristics of the successful startup of the PCIe device in the server, so that when the server starts up next time, it can adjust the time to wait before the BIOS queries the startup status of the PCIe device based on the time characteristics of the successful startup of the PCIe device, so as to reduce the number of times the BIOS queries the startup status of the PCIe device.

[0011] In a possible implementation, based on the total query time before the successful startup of the PCIe device during the current startup process and the total query time when the PCIe device starts up successfully during the current startup process, the hit time interval is updated, including: when the hit time interval is a valid time interval and the start time of the hit time interval is less than the total query time before the successful startup of the PCIe device, updating the start time of the hit time interval to the total query time before the successful startup of the PCIe device; where the valid time interval means that at least one of the start time and the end time of the hit time interval is not 0; when the hit time interval is a valid time interval and the end time of the hit time interval is greater than the total query time when the PCIe device starts up successfully, updating the end time of the hit time interval to the total query time when the PCIe device starts up successfully. In this way, based on the total query time before the successful startup of the PCIe device and the total query time when the PCIe device starts up successfully during the current startup process, the hit time interval of the PCIe device is updated. When including the time when the startup of the PCIe device is completed, the range of the updated hit time interval is smaller, that is, the updated first time interval describes the startup time of the PCIe device more accurately.

[0012] In a possible implementation, the method further includes: when the difference between the start time and the end time of the hit time interval is less than or equal to a preset difference, stopping the adjustment of the hit time interval. In this way, when the difference between the start time and the end time of the hit time interval is less than or equal to a preset value, it indicates that the hit time interval is already a better time interval for describing the startup time of the PCIe device. At this time, there is no need to adjust the hit time interval anymore to save system resources.

[0013] In a possible implementation, before obtaining the hit time interval based on the BIOS from the flash, it further includes: determining whether the computing device is a cold start; obtaining the hit time interval based on the basic BIOS from the flash, including: when the computing device is a cold start, setting the start time and the end time to 0. In this way, since the hit time interval of the successful startup of the PCIe device has no reference value for the current startup process of the PCIe device when the computing device is a cold start, by setting the start time and the end time of the hit time interval to 0, the influence of the hit time interval of the successful startup of the PCIe device on the waiting time sequence for querying the startup state of the PCIe device is avoided.

[0014] In a possible implementation, the method further includes: when the computing device is not cold-started, obtaining the hit time interval from the flash based on the BIOS. In this way, when the computing device is not cold-started, the previous startup success time of the PCIe device is of reference value. Therefore, the hit time interval of the previous successful startup of the PCIe can be obtained from the flash for reference.

[0015] In a second aspect, an embodiment of the present application provides a computing device, which includes: a memory and a processor;

[0016] The memory is used to store the Basic Input / Output System (BIOS);

[0017] The processor is used to call the BIOS to execute the method described in the first aspect or any possible implementation of the first aspect.

[0018] In a third aspect, an embodiment of the present application provides a computer storage medium, in which instructions are stored. When the instructions run on a computer, the computer is caused to execute the method described in the first aspect or any possible implementation of the first aspect.

[0019] In a fourth aspect, an embodiment of the present application provides a computer program product containing instructions. When the instructions run on a computer, the computer is caused to execute the method described in the first aspect or any possible implementation of the first aspect.

[0020] It can be understood that the beneficial effects of the above second aspect to the fourth aspect can refer to the relevant descriptions in the first aspect above, and will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0022] Figure 1 It is a schematic hardware structure diagram of a server provided by an embodiment of the present application;

[0023] Figure 2 It is a schematic system architecture diagram of a server provided by an embodiment of the present application;

[0024] Figure 3 It is a schematic startup process diagram of a server provided by an embodiment of the present application;

[0025] Figure 4A schematic diagram of the query time series during the startup process of a PCIe device provided by an embodiment of the present application;

[0026] Figure 5 A schematic flowchart of a method for determining the startup of a PCIe device provided by an embodiment of the present application;

[0027] Figure 6 A schematic diagram of the process of obtaining the hit time interval of a PCIe device provided by an embodiment of the present application;

[0028] Figure 7 A schematic diagram of the process of determining the query time series provided by an embodiment of the present application;

[0029] Figure 8 A schematic diagram of the process of updating the hit time interval stored in the flash provided by an embodiment of the present application;

[0030] Figure 9 A schematic diagram of the structure of a computing device provided by an embodiment of the present application. Detailed implementation manners

[0031] In order to make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

[0032] In the description of the embodiments of the present application, any embodiment or design solution with "exemplary", "for example", or "for instance" should not be understood as being more preferred or having more advantages than other embodiments or design solutions. Specifically, the use of words such as "exemplary", "for example", or "for instance" is intended to present relevant concepts in a specific manner.

[0033] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the technical features indicated. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. The terms "include", "comprise", "have" and their variants all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0034] Before introducing this solution, the technical terms in this solution will be introduced first.

[0035] (1) PCIe Root Complex

[0036] The PCIe Root Complex is the starting point of the PCIe bus. It is a hardware component, usually integrated in the chipset of the motherboard. The Root Complex is responsible for managing and controlling the entire PCIe bus architecture and is the bridge between the host processor and all PCIe devices.

[0037] The PCIe root complex is the core component of the PCIe bus architecture, responsible for managing and controlling the connection, initialization, and data transfer of PCIe devices. It plays a crucial role in the system startup process, ensuring that the system can correctly identify and use all connected PCIe devices.

[0038] (2) Cold start / Warm start

[0039] A cold start refers to the process of restarting the server after a complete power-off. In this case, both the hardware and software of the server are initialized from the initial state.

[0040] A warm start refers to the process of restarting the system through software or hardware instructions while the server is already powered on and running. A warm start usually does not fully reset the hardware but skips part of the initialization process.

[0041] (3) Hard coding of the basic input output system (BIOS)

[0042] Hard coding means directly embedding certain fixed parameters, settings, or instructions in the code of the BIOS firmware. These contents are pre-written in the BIOS program and are usually determined during the BIOS development phase.

[0043] Next, this solution will be introduced.

[0044] After the server is powered on, the BIOS starts first. After the BIOS starts, it will detect the core hardware (such as CPU, memory, motherboard, etc.) to ensure that the basic hardware functions properly. After the hardware self-check is completed, the BIOS starts to initialize the PCIe root complex. The PCIe root complex is the starting point of the PCIe bus and is responsible for managing and controlling all PCIe devices. After the PCIe root complex initialization is completed, the BIOS scans all connected PCIe devices through the PCIe root complex and allocates system resources to the PCIe devices connected to the server. After the resource allocation is completed, the PCIe devices are initialized according to the resources allocated by the BIOS. Usually, the initialization of PCIe devices is completed by the firmware of the PCIe devices. During the initialization process of PCIe devices, the BIOS will detect in real time whether the PCIe devices are initialized. When the BIOS detects that all PCIe devices are initialized, the BIOS will continue to execute the subsequent startup process. For example, detecting the startup device, selecting the startup order, and loading the operating system, etc.

[0045] However, with the development of technology, many PCIe devices have become very complex, integrating their own processors, memories, and firmware internally, similar to a small embedded system. These PCIe devices need to complete a series of internal initialization operations during startup (such as hardware initialization, firmware startup, resource allocation, etc.). Therefore, during the server startup process, to ensure that PCIe devices can be initialized normally, the BIOS must wait for the PCIe devices to complete startup before starting subsequent operations such as initializing the PCIe root complex. Usually, to ensure the normal startup of the server and the PCIe devices connected to the server, the BIOS settings in the server can be modified to set a single query delay and a maximum waiting delay in the BIOS. Among them, the single query delay refers to the time that the BIOS needs to wait each time it queries the startup status of the PCIe device, and the maximum waiting delay can be used to limit the maximum number of queries for the BIOS to query the startup status of the PCIe device. Among them, the maximum number of queries = maximum waiting delay / single waiting delay. If the number of times the BIOS queries the startup status of the PCIe device reaches the maximum number of queries and the BIOS still does not detect the successful startup of the PCIe device, at this time, the BIOS can task that the PCIe device has timed out during startup, and the BIOS can continue to execute the subsequent server startup process. Next, this application will take the PCIe device as a data processing unit (DPU) as an example to introduce each solution.

[0046] In view of this, an embodiment of this application provides a method for determining the startup of a PCIE device, which solves the problem of power consumption waste of a computing device caused by the inability of the BIOS to adapt to the startup waiting time of the PCIe device during the startup process of the computing device.

[0047] Exemplarily, taking the computing device as a server as an example, Figure 1 shows a schematic internal structure diagram of a server provided by an embodiment of this application. As Figure 1 shown, the server may include a power supply 121 and a motherboard 110. The power supply 121 is electrically connected to the motherboard 110 and is used to supply power to the components on the motherboard 110. The motherboard 110 includes a CPU 111, a memory 112, a programmable logic device (PLD) 113, a baseboard management controller (BMC) 114, a PCIe slot 115, a network card 122, a hard disk 123, and a fan 124.

[0048] Among them, the memory 112 is inserted into the memory slot and serves as an external cache. Exemplarily, the memory 112 can be a random access memory (RAM). By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchlink dynamic random access memory (SLDRAM), and direct rambus random access memory (DRRAM).

[0049] The PCIe slot 115 is suitable for expanding at least one of a graphics processing unit (GPU) card, a network card, a video capture card, an HBA (Host Bus Adapter) card, a RAID (redundant arrays of independent disks) card, an SSD (solid state disk or solid state drive), and a smart network card, and can also support the expansion of various types of adapter cards, etc.

[0050] Among them, the programmable logic device 113 can be a complex programmable logic device (CPLD, a digital integrated circuit in which users can construct logic functions according to their respective needs), or a field programmable gate array (FPGA).

[0051] The BMC 114 has a BMC interface.

[0052] The hard disk 123 is classified according to the protocol used by the interface, and there are SAS (serial attached SCSI), SATA (serial advanced technology attachment), and NVMe (non-volatile memory express) hard disks. Classified according to the hard disk medium, there are hard disk drives (HDD) and solid state disks (SolidState Disk or Solid State Drive, SSD). Among them, HDD often uses SATA and SAS interfaces. The SSD solid state disk is composed of a control unit and a storage unit (FLASH chip, DRAM chip), and can adopt SATA, SAS, PCIe interfaces and M.2 interfaces. Among them, the M.2 interface mainly uses the NVMe interface protocol.

[0053] Based on Figure 1 the server described above, the system architecture of the server will be introduced next. Exemplarily, Figure 2 FIG. shows a schematic diagram of the system architecture of a server provided by an embodiment of the present application. As Figure 2 shown, the server can be divided into: a hardware layer (Hardware), a firmware layer (Firmware), and an operating system (operating system, OS) layer from bottom to top.

[0054] The hardware layer is the foundation of the server and includes all physical devices and components. For example, CPU, BIOS chip, BMC chip, PCIE devices (such as DPU), etc. Among them, the BIOS chip may include a flash memory, and the BIOS firmware may be stored in the flash memory. The BIOS chip can communicate with the CPU through the system bus. For example, when the server starts up, the firmware in the BIOS chip runs first and communicates with the CPU through the system bus to complete hardware initialization and operating system loading. The BIOS chip can also communicate with the BMC chip through the IPMI protocol, and the BIOS chip can also communicate with the DPU through the PCIe bus.

[0055] The BMC chip can communicate with the CPU through the PCIe interface. The BMC chip can also communicate with the DPU through the inter-integrated circuit (I2C) bus. The DPU can communicate with the CPU through the PCIe interface. Among them, when the BMC chip communicates with the CPU, it can transmit the temperature, alarm information, real-time operating status, and other relevant hardware status information of the CPU. When the BMC chip communicates with the DPU through the I2C bus, it can transmit the identification information, status information, operating information, configuration information, and other sensor data of the DPU device. When the DPU communicates with the CPU through the PCIe interface, it can transmit configuration information, data, status and monitoring information, interrupts and events, and control instructions.

[0056] The firmware layer is the middle layer between the hardware and the operating system, mainly responsible for the initialization and management of the hardware. Firmware is usually stored in the non-volatile memory of the hardware device, such as flash memory. The firmware layer of the server can include: BIOS, BMC in the server host (hereinafter referred to as the first BMC), and PCIe device firmware (such as BMC in the DPU (hereinafter referred to as the second BMC)).

[0057] Among them, as the core part of the firmware in the server, BIOS is responsible for the initialization, power-on self-test (POST), device enumeration, and boot device selection of the hardware in the server. The first BMC is a small management subsystem independent of the host system, mainly used for monitoring the hardware in the server and providing remote management and maintenance functions for the server. Among them, the first BMC can interact with the BIOS through the intelligent platform management interface (IPMI) protocol. For example, the first BMC can read the hardware status information, BIOS configuration information, system event log, firmware version information, etc. from the BIOS through the IPMI bus. The first BMC can also communicate with the second BMC through the I2C bus to obtain the dynamic information of the DPU device, such as sensor data of temperature, pressure, etc.

[0058] The OS layer is the layer where users directly interact, responsible for managing hardware resources, providing user interfaces, and running applications. Among them, the operating system can include: kernel, drivers, user space, services, and daemons. Among them, the kernel is the core part of the operating system, responsible for hardware abstraction, process management, memory management, file system management, etc. The operating system communicates with hardware devices through drivers and manages the advanced functions of the devices. The user space provides user interfaces and application running environments, such as desktop environments, command-line interfaces, applications, etc. Services and daemons provide system services, such as network services, printing services, security services, etc.

[0059] It can be understood that the PCIe device in the embodiments of the present application can be a smart network card, DPU, graphic processing unit (GPU), etc., which can communicate with the CPU using the PCIe interface and whose startup state can be determined by the CPU. In the embodiments of the present application, the type of the PCIe device is not limited.

[0060] Next, based on Figure 2 the system architecture of the server shown, taking the PCIe device as a DPU as an example, the server startup process in the embodiments of the present application will be introduced. Among them, the server startup process is as Figure 3 shown, including the following steps:

[0061] (1) The server is powered on, and the CPU loads and executes the initial boot code of the BIOS.

[0062] In the embodiments of the present application, powering on the server means that the server is connected to the power supply. After the server is connected to the power supply, the hardware circuits in the server will perform a reset operation, placing all hardware components (such as the CPU, memory, motherboard, etc.) in an initial state. After the CPU is reset, the CPU starts executing instructions from a fixed address (usually called the reset vector) and loads the BIOS. For example, the CPU loads and executes the initial boot code of the BIOS from the reset vector address. The BIOS code is usually stored in the flash memory on the motherboard.

[0063] In a possible example, in a server with an x86 architecture, the reset vector address can be 0xFFFFFFF0.

[0064] (2) The BIOS calculates the query time series based on the hit time interval of the DPU stored in the flash, and queries the startup state of the DPU based on the query time series.

[0065] After the BIOS starts up, the BIOS needs to detect and initialize core hardware components, scan and initialize PCIe devices (such as DPU devices), detect boot devices, etc. Among them, before scanning and initializing the DPU, the BIOS needs to determine whether the DPU has completed startup.

[0066] It can be understood that DPU startup refers to the process in which the firmware and operating system (OS) in the DPU complete initialization. The DPU is usually a complex system with its own processor, memory, and operating system inside. When the server starts up, the DPU also starts up simultaneously. Its internal firmware will perform hardware initialization, configure the PCIe interface, set network parameters, etc. Only when the internal initialization of the DPU is completed can the DPU respond to the configuration requests of the host.

[0067] In the BIOS startup stage, the BIOS can calculate the query time sequence for querying the DPU startup status based on the hit time interval [TS, TE] of the DPU stored in the flash memory. Then, the BIOS uses the time in the query time sequence as the waiting time before each query of the DPU startup status to query the startup status of the DPU. Among them, the start time TS of the DPU's hit time interval is determined based on the total query time before the BIOS queries the successful startup of the DPU during at least one startup process of the server, and the end time TE of the DPU's hit time interval is determined based on the total query time when the BIOS queries the successful startup of the PCIe device during at least one startup process of the server.

[0068] In a possible example, when the server starts up for the first time, the hit time interval of the DPU can be [0, 0].

[0069] In a possible example, the process of the BIOS querying the DPU startup status can refer to Figure 3 Steps 201 - 208 in.

[0070] In step 201, the BIOS determines whether the server's current startup is a cold startup. If it is a cold startup, step 203 is executed; otherwise, step 202 is executed. The startup methods of the server can include: cold startup and warm startup. During the BIOS startup process, the BIOS can judge the startup method of the server through the system log. For example, in the Linux system, the BIOS can view the startup record by using the last reboot command. If the record shows reboot, the server may be a cold startup. In the Windows system, the BIOS can view the startup events in the system log through the Event Viewer (eventvwr.msc). Cold startups usually record events related to hardware initialization and system boot.

[0071] In step 202, read the hit time interval [TS, TE] when the DPU was last started from the flash. When the server is in a warm start, the hardware and software of the server are not completely re-initialized, but are partially restarted and the current state is retained. At this time, the hit time interval of the DPU stored in the flash has reference value. Therefore, during this startup process, the BIOS can calculate the query time sequence for querying the startup state of the DPU based on the hit time interval of the DPU stored in the flash.

[0072] In step 203, initialize the hit time interval [TS, TE] of the DPU stored in the flash to [0, 0]. When the server is in a cold start, both the hardware and software of the server need to be re-initialized. At this time, the startup completion time of the DPU during the previous server startup process no longer has reference value. Therefore, it is necessary to initialize both the start time and the end time of the hit time interval of the DPU stored in the flash to 0.

[0073] In step 204, calculate the query time sequence. When calculating the query time sequence for querying the startup state of the DPU, in addition to obtaining the hit time interval [TS, TE] of the DPU stored in the flash, the maximum allowable query times (sumMaxCount) and the maximum allowable waiting time (SumMaxTime) of the BIOS can also be obtained. Among them, sumMaxCount and SumMaxTime are used to limit the maximum waiting time for the BIOS to wait for the DPU to start, to prevent the BIOS from waiting indefinitely for the DPU to start. For example, during the process of the BIOS querying the startup state of the DPU, if either the number of times the BIOS queries the startup state of the DPU or the total waiting time for the BIOS to query the startup state of the DPU reaches the pre-set threshold (i.e., sumMaxCount, SumMaxTime), and the BIOS has not detected that the DPU startup is completed, the BIOS can consider that the DPU startup has timed out. At this time, the BIOS can continue to execute the server startup process.

[0074] In a possible example, sumMaxCount and SumMaxTime can be written as static parameters into the hard coding of the BIOS, or sumMaxCount and SumMaxTime can be written into the configuration file of the BIOS, and a BIOS menu can be provided for customers to select and adjust.

[0075] Next, based on sumMaxCount, SumMaxTime, and the hit time interval [TS, TE] of the DPU stored in the flash, calculate the query time sequence for the BIOS to query the startup state of the DPU during this server startup process.

[0076] First, the BIOS determines the average query time Tavg that needs to be waited for each query of the DPU startup status according to sumMaxCount and SumMaxTime. Among them, Tavg = SumMaxTime / (sumMaxCount - 1).

[0077] Then, the BIOS calculates the waiting time T1 (i.e., the first query time) for the BIOS to query the DPU startup status for the first time according to the hit time interval [TS, TE] of the DPU obtained from the flash. Among them, T1 = (TS + TE) / 2. If the difference between TS and TE is less than or equal to 1, TE can be directly taken as T1.

[0078] When the BIOS calculates the time T2 (i.e., the second query time) that needs to be waited for the second query of the DPU startup status, it needs to make the total waiting time of the BIOS (i.e., T1 + T2) up to an integer multiple of the average query time (Tavg). That is, T2 = 9Tavg - (T1 % Tavg). For example, if Tavg is 10S and T1 is 5S, then T2 is 5S.

[0079] The BIOS uses the average query time Tavg as the query time for other queries in the query time series except the first query time T1 and the second query time T2. That is, the other query times Ti = Tavg; where 3 ≤ i ≤ max. In the case of a cold start of the server, the number of times the BIOS queries the DPU startup status is less than or equal to sumMaxCount, that is, max = sumMaxCount. In the case of a non-cold start of the server, the total waiting time for the BIOS to query the DPU startup status is less than or equal to SumMaxTime, that is, T1 + T2 + Tavg * (max - 2) = SumMaxTime, and max = ((SumMaxTime - (T1 + T2)) / Tavg) + 2.

[0080] In step 205, based on the waiting times in the query time series, the startup status of the DPU is queried. After the BIOS obtains the query time series {T1, T2... Ti}, the BIOS can query the startup status of the DPU based on this query time series.

[0081] In step 206, it is determined whether the DPU has completed startup. If the startup is not completed, step 207 is executed; otherwise, step 208 is executed. When the BIOS detects whether the DPU has completed startup, the BIOS can identify whether the DPU exists by reading device identifiers (such as Vendor ID, Device ID, etc.) in the PCIe configuration space of the DPU. If the DPU starts successfully, some status bits or registers in the PCIe configuration space of the DPU may be set to specific values, and the BIOS can use these flags to determine whether the DPU has started.

[0082] In step 207, it is determined whether the maximum number of queries has been reached. If not, step 205 is executed; otherwise, step 208 is executed. When the DPU has not completed startup and the number of times the BIOS queries the current DPU startup status has not reached the maximum allowed number of queries (sumMaxCount), the BIOS can continue to query the DPU startup status according to the waiting time in the query time series. When the DPU has not completed startup and the number of times the BIOS queries the current DPU startup status has reached the maximum allowed number of queries, the BIOS can consider that the DPU has timed out and not started, and the BIOS can continue to execute the server startup process.

[0083] In step 208, based on the hit time interval of the DPU, the TS and TE in the flash are updated. After the BIOS queries that the DPU has completed startup, the BIOS can also update the hit time interval [TS, TE] of the DPU stored in the flash according to the total query time before the BIOS queries that the DPU has started successfully during this server startup process, and the total query time when the BIOS queries that the DPU has started successfully during this startup process. The process of updating the hit time interval [TS, TE] of the DPU stored in the flash is as follows:

[0084] When the BIOS queries for the nth time and finds that the DPU has started, the hit time interval of the DPU is [TS(m), TE(m)]. Among them, [TS(m), TE(m)] = [SUMn - Tn, SUMn], where SUMn represents the total waiting time of the BIOS at the nth query; Tn is the time to wait at the nth query, that is, the time interval between the nth query and the (n - 1)th query.

[0085] Then, the BIOS updates the hit time interval [TS, TE] of the DPU stored in the flash according to the hit time interval [TS(m), TE(m)] of the DPU. Among them, updating the hit time interval [TS, TE] of the DPU stored in the flash includes two cases. In the first case, when the hit time interval [TS, TE] of the DPU stored in the flash is a valid time interval, the interval endpoints of [TS(m), TE(m)] and [TS, TE] are compared, and the smaller value of TS(m) and TS is taken as the updated TS, and the larger value of TE(m) and TE is taken as the updated TE. That is,

[0086] TS = Max(TS(m), TS);

[0087] TE = Min(TE(m), TE);

[0088] It can be understood that the valid time interval means that at least one of the start time (TS) and the end time (TE) of the interval is not 0.

[0089] In the second case, when the hit time interval [TS, TE] of the DPU stored in the flash is not a valid time interval, [TS, TE] can be directly updated to [TS(m), TE(m)]. For example, if the hit time interval of the DPU stored in the flash is [0, 0], then it can be considered that this hit time interval is an invalid time interval.

[0090] During the process of updating the hit time interval of the DPU stored in the flash, if the difference between TS and TE in the updated hit time interval [TS, TE] of the DPU is less than or equal to 1, it indicates that the updated hit time interval of the DPU has been the optimal hit time interval, and during the subsequent server startup process, there is no need to update the hit time interval [TS, TE] of the DPU stored in the flash.

[0091] In the embodiment of the present application, each time the server is started, the time feature of the successful start of the DPU (i.e., the hit time interval of the DPU) is stored in the flash, which is used to iteratively calculate the query time when the BIOS first queries the DPU start status at the next server startup. After a small number of iterative calculations, the BIOS can query the successful start of the DPU at the first query. That is, reduce the useless DPU status query instructions, save CPU power consumption, underlying command channel power consumption and memory occupancy, and save log record space. Secondly, when the BIOS calculates the query time for the BIOS to first query the DPU start status according to the hit time interval stored in the flash, it adopts the idea similar to the dichotomy method (the first query time of the BIOS is the midpoint of the hit time interval), and each time it can exclude half of the invalid query times, so that the BIOS can query the successful start of the DPU at the first query after a small number of (usually about 3 times) iterative calculations.

[0092] Next, a specific example is used to illustrate the specific process of the BIOS querying the DPU start status. Among them, the server is starting for the first time (i.e., cold start), the DPU start completion time is 66S, the preset maximum allowable query times sumMaxCount = 11, the maximum allowable waiting time sumMaxTime = 100S, and the average query time Tavg = 100 / (11 - 1) = 10s. Each time the server starts, the query time sequence of the BIOS querying the DPU start status and the hit time interval of the DPU are as Figure 4 shown.

[0093] Referring to Figure 4 , when the server is started for the first time, the BIOS obtains the hit time interval [TS, TE] of the DPU stored in the flash as [0, 0]. Then, according to the hit time interval of the DPU, the average query time Tavg, sumMaxCount and SumMaxTime, the BIOS calculates the query time sequence for the BIOS to query the DPU start status, T1 = 0S, T2 = 10 - (0 % 10) = 10S, T3 = 10S, T4 = 10S, T5 = 10S, T6 = 10S, T7 = 10S, T8 = 10S, T9 = 10S, T10 = 10S, T11 = 10S. Since the DPU start completion time is 66S. Therefore, based on the query time sequence, the BIOS can query the completion of the DPU start at the 8th query. That is, when the server is started for the first time, the hit time interval corresponding to the DPU is [60, 70]. Since the hit time interval [0, 0] stored in the flash is an invalid hit time interval, the BIOS can directly use [60, 70] to replace the hit time interval stored in the flash.

[0094] When the server starts for the second time, the BIOS can calculate the query time series for the BIOS to query the DPU startup status based on the hit time interval [60, 70], average query time Tavg, sumMaxCount, and SumMaxTime stored in the flash by the server. T1 = (TS + TE) / 2 = 65S, T2 = 10 - (65 % 10) = 5S, T3 = 10S, T4 = 10S, T5 = 10S. Since the pre-set maximum allowable waiting time sumMaxTime = 100S, and during the second startup of the server, the total query time for the BIOS to query the DPU startup status for the first 5 times has reached 100S. Therefore, during the second startup of the server, the BIOS can query the DPU startup status at most 5 times. Since the DPU startup completion time is 66S. Therefore, based on the query time series, the BIOS can query that the DPU startup is completed at the second query. That is, when the server starts for the second time, the hit time interval corresponding to the DPU is [65, 70]. After the BIOS obtains the hit time interval [65, 70] of the DPU, it can also update the hit time interval [60, 70] of the DPU stored in the flash to [65, 70] according to the hit time interval {65, 70} of the DPU.

[0095] When the server starts for the third time, the BIOS can calculate the query time series for the BIOS to query the DPU startup status based on the hit time interval [65, 70], average query time Tavg, sumMaxCount, and SumMaxTime stored in the flash by the server, T2 = 10 - (67 % 10) = 3S, T3 = 10S, T4 = 10S, T5 = 10S. Since the pre-set maximum allowable waiting time sumMaxTime = 100S, and during the third startup of the server, the total query time for the BIOS to query the DPU startup status for the first 5 times has reached 100S. Therefore, during the third startup of the server, the BIOS can query the DPU startup status at most 5 times. Since the DPU startup completion time is 66S. Therefore, based on the query time series, the BIOS can query that the DPU startup is completed at the first query. That is, the hit time interval corresponding to the third startup of the server is [67, 67]. After the BIOS obtains the hit time interval [67, 67] of the DPU, it can also update the hit time interval [65, 70] of the DPU stored in the flash to [65, 67] according to the hit time interval [67, 67] of the DPU.

[0096] When the server starts for the 4th time, the BIOS can calculate the query time series for the BIOS to query the DPU startup status according to the hit time interval [65, 67], average query time Tavg, sumMaxCount, and SumMaxTime stored in the flash of the server. T1 = (65 + 67) / 2 = 66S, T2 = 10 - (67 % 10) = 4S, T3 = 10S, T4 = 10S, T5 = 10S. Since the pre-set maximum allowable waiting time sumMaxTime = 100S, and during the 4th startup of the server, the total query time for the BIOS to query the DPU startup status for the first 5 times has reached 100S. Therefore, during the 4th startup of the server, the BIOS can query the DPU startup status at most 5 times. Since the DPU startup completion time is 66S. Therefore, based on the query time series, it can be queried that the DPU has completed startup at the first query. That is, the hit time interval corresponding to the 4th startup of the server is [66, 66]. After the BIOS obtains the DPU hit time interval [66, 66], it can also update the DPU hit time interval [65, 67] stored in the flash to [65, 66] according to the DPU hit time interval [66, 66]. Since the difference between TS and TE in the updated hit time interval is less than 1, it indicates that the current hit time interval is already the optimal hit time interval, and during subsequent server warm startups, there is no need to update the DPU hit time interval [TS, TE] stored in the flash.

[0097] In the embodiment of the present application, during the server startup process, the time characteristics (i.e., the DPU hit time interval) when the BIOS detects the successful startup of the DPU each time are recorded in the flash. Then, when the server starts up next time, the optimal query time for the BIOS to wait for the successful startup inside the DPU device is calculated based on this time characteristic. Among them, the optimal query time of the BIOS is mainly the first query time for the BIOS to detect the DPU startup status. The optimal query time can refer to that when the BIOS queries the DPU status for the first time, it can query that the DPU has started up normally. The optimal query time is the necessary waiting duration. Less than this optimal query time, the BIOS will not be able to detect the completion of the DPU startup.

[0098] (3) In the case where the DPU startup is completed or the DPU startup times out, the BIOS continues to boot the OS. After the OS boots up, the control of the system is handed over to the OS.

[0099] After the BIOS finishes detecting the startup status of the DPU, the BIOS continues to execute the server startup process. For example, the BIOS reads the bootloader from the hard disk or other storage devices and loads it into the memory. Then, the BIOS hands over the control to the bootloader. The bootloader is responsible for loading the kernel of the operating system and necessary driver programs and booting the operating system.

[0100] Next, based on the content described above, a method for determining the startup of a PCIe device provided in an embodiment of the present application will be introduced.

[0101] Exemplarily, Figure 5 FIG. shows a flowchart of a method for determining the startup of a PCIe device provided in an embodiment of the present application. This method can be applied to a computing device and implemented based on the BIOS in the computing device. Taking the computing device as a server as an example, as Figure 5 shown, the method includes:

[0102] Step 501, obtain a hit time interval, where the hit time interval is used to represent the time interval to which the total query time for the previous successful startup of the PCIe device belongs. The hit time interval includes a start time and an end time. The start time is the total query time before the previous successful startup of the PCIe device during the previous startup process of the PCIe device, or the end time is the total query time for the previous successful startup of the PCIe device during the previous startup process of the PCIe device.

[0103] In this embodiment, after the server starts up, the BIOS can obtain the hit time interval from the flash memory of the server. Among them, the hit time interval can represent the hit time interval of the PCIe device. The hit time interval can be adaptively adjusted according to the total query time when the BIOS queries the successful startup of the PCIe device during each startup process of the server. Among them, the total query time when the BIOS queries the successful startup of the PCIe device includes: the total query time before the BIOS queries the successful startup of the PCIe device and the total query time when the BIOS queries the successful startup of the PCIe device. The hit time interval can refer to the hit time interval of the DPU stored in the flash memory as described above.

[0104] During the server startup process, the BIOS can also adjust the hit time interval according to the startup mode of the server. Generally, the startup mode of the server can be divided into: cold startup and warm startup.

[0105] In a possible example, when the server is in cold start, the BIOS obtains the hit time interval from the flash, including setting the start time and end time of the hit time interval stored in the flash to 0. Since, when the server is in cold start, both the hardware and software of the server need to be re-initialized. That is, during the previous startup process of the server, the hit time interval adjusted according to the total query time when the PCIe device was successfully started by querying the BIOS is no longer valuable for the current startup of the PCIe device. Therefore, it is necessary to set the start time and end time of the hit time interval stored in the flash to 0. Exemplarily, as Figure 6 shown, in the initial state, the hit time interval stored in the flash memory is [60, 70]. When it is determined that the server is in cold start, the BIOS can initialize the hit time interval in the flash memory to [0, 0], and then the BIOS obtains the initialized hit time interval [0, 0].

[0106] In another possible example, when the server is not in cold start (for example, warm start), the BIOS can directly obtain the hit time interval from the flash. Since, when the server is not in cold start, the hardware and software of the server are not completely re-initialized, but are partially restarted and the current state is retained. That is, during the previous startup process of the server, the hit time interval adjusted according to the total query time when the PCIe device was successfully started by querying the BIOS is valuable for the current startup of the PCIe device. Therefore, the BIOS can directly obtain the hit time interval from the flash without modifying the hit time interval. Exemplarily, as Figure 6 shown, in the initial state, the hit time interval stored in the flash memory is [60, 70]. When it is determined that the server is not in cold start, the BIOS can directly obtain the hit time interval [60, 70] stored in the flash memory.

[0107] Step 502, determine the query time sequence according to the hit time interval, the maximum allowable query times, and the maximum allowable waiting time, where the maximum allowable query times is the number of queries allowed during the startup process of the PCIe device, the maximum allowable waiting time is the time allowed to wait during the startup process of the PCIe device, and the query time sequence is used to represent the time that needs to be waited before each query of the startup state of the PCIe device.

[0108] In this embodiment, the maximum allowable query times sumMaxCount of the BIOS and the maximum allowable waiting time sumMaxTime of the BIOS can be preset. For example, sumMaxCount and sumMaxTime can be written into the hard coding of the BIOS as static parameters. Alternatively, sumMaxCount and sumMaxTime can be written into the configuration file of the BIOS, and a BIOS menu can be provided for customers to select and adjust.

[0109] In a possible example, when the BIOS determines the query time series according to the first time interval, sumMaxCount, and sumMaxTime, the BIOS can determine the first query time T1 in the query time series according to the start time and end time of the hit time interval. For example, when the difference between the start time and end time of the hit time interval is less than or equal to a preset value, the BIOS can use the end time of the hit time interval as the first query time T1. When the difference between the start time and end time of the hit time interval is greater than the preset value, the BIOS can use the midpoint of the hit time interval as the first query time T1. Exemplarily, as Figure 7 shown, the hit time interval stored in the flash memory is [60, 70], the preset sumMaxCount is 11, the sumMaxTime is 100, and the preset value can be 1. Since the difference between the start time and end time of the hit time interval is greater than 1, the midpoint of the hit time interval [60, 70] can be used as the first query time T1 in the query time series, that is, T1 = (60 + 70) / 2 = 65.

[0110] The BIOS can also calculate the average query time Tavg of the BIOS according to sumMaxCount and sumMaxTime. Wherein, Tavg = sumMaxTime / (sumMaxCount - 1). Then, the BIOS can calculate the second query time T2 in the query time series according to the calculated T1 and Tavg, where T2 + T1 is an integer multiple of Tavg. For example, T2 = 9Tavg - (T1 % Tavg)). Exemplarily, as Figure 7 shown, the BIOS obtains the average query time Tavg = 100 / (11 - 1) = 10 according to sumMaxCount and sumMaxTime. Since T2 + T1 is an integer multiple of Tavg, T2 = 5 can be obtained.

[0111] For other query times Ti in the query time series except T1 and T2, Ti can be set to Tavg. Among them, 3 ≤ i ≤ max. When the server is in cold start, the number of times the BIOS queries the BPU startup status is less than or equal to sumMaxCount, that is, max = sumMaxCount. When the server is not in cold start, the total waiting time for the BIOS to query the BPU startup status is less than or equal to SumMaxTime, that is, T1 + T2 + Tavg * (max - 2) = SumMaxTime, and max = ((SumMaxTime - (T1 + T2)) / Tavg) + 2. Exemplarily, as Figure 7 shown, the maximum number of queries of the BIOS is 11 times, the maximum allowable waiting time of the BIOS is 100S, the first query time T1 of the BIOS = 65S, and T2 = 5S. Each waiting time Ti except T1 and T2 is 10S, that is, T3 = 10S, T4 = 10S, T5 = 10S. Since the total waiting time of the BIOS reaches 100S, which is the maximum allowable time of the BIOS, after the BIOS queries the status of the PCIe device for the fifth time. Therefore, in the current startup process, the query time series for the BIOS to query the startup status of the PCIe device is: 65, 5, 10, 10, 10.

[0112] The specific process for the BIOS to calculate the query time series according to the hit time interval, the preset maximum allowable query times of the BIOS, and the preset maximum allowable waiting time of the BIOS can refer to step 205 in the above embodiment, and will not be elaborated here.

[0113] Step 503, query the startup status of the PCIe device based on the query time series.

[0114] In this embodiment, after the BIOS calculates the query time series, the BIOS can query the startup status of the PCIe device based on the query time series. For example, the BIOS can determine whether the startup inside the PCIe device is completed by obtaining status information such as the temperature and voltage of the PCIe device.

[0115] In a possible example, after the BIOS queries that the PCIe device has started based on the query time series, the BIOS can also update the hit time interval according to the total query time before the BIOS queries that the PCIe device has started successfully during the current startup process, and the total query time when the BIOS queries that the PCIe device has started successfully during the current startup process.

[0116] In a possible example, before updating the hit time interval based on the total query time before the BIOS queries that the PCIe device has successfully started during the current startup process and the total query time when the BIOS queries that the PCIe device has successfully started during the current startup process, the BIOS can also determine whether the hit time interval is a valid time interval. Here, a valid time interval means that at least one of the start time and the end time of the hit time interval is not 0.

[0117] In the case where the hit time interval is not a valid time interval, the BIOS updates the start time in the hit time interval to the total query time before the PCIe device has successfully started, and updates the end time in the hit time interval to the total query time when the PCIe device has successfully started. In the case where the hit time interval is a valid time interval and the start time of the hit time interval is less than the total query time before the PCIe device has successfully started, the BIOS updates the start time of the hit time interval to the total query time before the PCIe device has successfully started. In the case where the hit time interval is a valid time interval and the end time of the hit time interval is greater than the total query time when the PCIe device has successfully started, the end time of the hit time interval is updated to the total query time when the PCIe device has successfully started. Exemplarily, as Figure 8 shown, in this startup, the hit interval of the PCIe device is [65, 70]. When updating the hit time interval [60, 70] stored in the flash according to the hit interval [65, 70], the larger start time 65 in (60, 65) can be used as the start time of the updated hit time interval. Since the end time of the hit interval of the PCIe device in this startup is the same as the end time of the hit time interval stored in the flash, 70 is continued to be used as the end time of the updated hit time interval.

[0118] In a possible example, before updating the hit time interval based on the total query time before the BIOS queries that the PCIe device has successfully started during the current startup process and the total query time when the BIOS queries that the PCIe device has successfully started during the current startup process, the BIOS can also determine whether the difference between the start time and the end time of the hit time interval is less than or equal to 1. In the case where the difference between the start time and the end time of the hit time interval is less than or equal to 1, it indicates that the hit time interval is already the optimal time interval for the BIOS to wait for the PCIe device to start. At this time, the BIOS stops adjusting the hit time interval. As Figure 8As shown in the figure, after the BIOS obtains the hit time interval of the PCIe device for this startup, it first determines that the difference between the start time and the end time of the hit time interval of the PCIe device stored in the flash is 10, which is greater than 1. Then, the BIOS updates the hit time interval of the PCIe device stored in the flash according to the hit time interval of the PCIe device for this startup.

[0119] In the embodiment of the present application, by recording the hit time interval of the PCIe device in the flash, during the server startup process, the BIOS can calculate the waiting time for the BIOS to wait for the PCIe device to complete startup during this startup process based on the time interval when the PCIe device completed the previous startup. This reduces the number of times the BIOS queries the startup status of the PCIe device, that is, reduces the useless PCIe device status query instructions, saves the CPU power consumption and the occupation of the layer command channel, and also saves the startup time of the entire server, improving the application efficiency of the server.

[0120] It can be understood that the PCIe device startup determination method provided in the embodiment of the present application can be applied to the server startup process including PCIe devices such as smart network cards and DPUs, and can also be applied to application scenarios including other PCIe devices (such as a graphics processing unit (GPU)) that require the server host to start up to a certain state. Further, the PCIe device startup determination method provided in the embodiment of the present application can also be applied to scenarios where there are two systems and a handshake is required during the startup process of each system.

[0121] It can be understood that the magnitudes of the sequence numbers of the steps in the above embodiments do not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. In addition, the above-described various embodiments and the technical features in each embodiment can be combined according to the actual situation, and the combined solution is still within the protection scope of the present application.

[0122] Exemplarily, the embodiment of the present application also provides a computing device. As Figure 9 shown, the computing device 900 includes: a BIOS chip 910, a processor 920, and a PCIe device 930. Among them, the processor 910 is respectively coupled to the BIOS chip 910 and the PCIe device 930; the BIOS chip 910 is used to store the BIOS program; the processor 920 calls the BIOS program from the BIOS chip 910 to implement the startup determination of the PCIe device 930; specifically, the startup determination method can be the PCIe device startup determination method involved in the above various embodiments.

[0123] It should be noted that the computing device may further include other components, such as components like memory or hard disk. This application makes no limitations in this regard.

[0124] Based on the method in the above embodiments, an embodiment of this application provides a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program runs on a processor, the processor is caused to execute the method in the above embodiments.

[0125] Based on the method in the above embodiments, an embodiment of this application provides a computer program product, characterized in that when the computer program product runs on a processor, the processor is caused to execute the method in the above embodiments.

[0126] Based on the method in the above embodiments, an embodiment of this application provides a computing device. The computing device includes a motherboard and a chip. Among them, the chip is integrated on the motherboard. The chip includes at least one memory for storing programs; and at least one processor for executing the programs stored in the memory. When the programs stored in the memory are executed, the processor is used to execute the method in the above embodiments. In the embodiment of this application, the computing device may be a network device such as a server.

[0127] The method steps in the embodiments of this application can be implemented in a hardware manner or by a processor executing software instructions. The software instructions may be composed of corresponding software modules. The software modules may be stored in a random access memory (RAM), flash memory, read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), registers, hard disk, removable hard disk, CD-ROM, or any other form of storage medium well-known in the art. An exemplary storage medium is coupled to the processor, so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may be located in an ASIC.

[0128] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions according to the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted through a computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or a wireless manner (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or a data center that includes one or more integrated available media. The available medium can be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (SSD)), etc.

[0129] It can be understood that the various numerical numbers involved in the embodiments of the present application are only for the convenience of description and are not used to limit the scope of the embodiments of the present application.

Claims

1. A method for determining the startup of a PCIe device, a high-speed serial computer expansion bus standard, characterized in that, The method is applied to a computing device and implemented based on the Basic Input / Output System (BIOS). The method includes: Obtaining a hit time interval; wherein, the hit time interval is used to represent the time interval to which the total query time taken before the previous successful startup of the PCIe device belongs; the hit time interval includes a start time and an end time; the start time is the total query time before the previous successful startup during the startup process of the PCIe device, or the end time is the total query time when the previous PCIe device starts up successfully; Determining a query time sequence according to the hit time interval, the maximum allowable number of queries, and the maximum allowable waiting time; Wherein, the maximum allowable number of queries is the number of queries allowed during the startup process of the PCIe device; The maximum allowable waiting time is the time allowed to wait during the startup process of the PCIe device; The query time sequence is used to represent the time to wait before each query of the startup status of the PCIe device; Determining the startup status of the PCIe device according to the query time sequence.

2. The method according to claim 1, wherein The determining the query time sequence according to the hit time interval, the maximum allowable number of queries, and the maximum allowable waiting time includes: Determining the first query time in the query time sequence according to the start time and the end time of the hit time interval; the first query time is the time to wait before the first query of the startup status of the PCIe device; Obtaining an average query time according to the maximum allowable number of queries and the maximum allowable waiting time; Determining the second query time in the query time sequence according to the first query time and the average query time; the sum of the second query time and the first query time is an integer multiple of the average query time; Using the average query time as the query time for other queries in the query time sequence except the first query time and the second query time.

3. The method according to claim 2, characterized in that The determining the first query time in the query time sequence according to the start time and the end time of the hit time interval includes: In the case where the difference between the start time and the end time of the hit time interval is greater than a preset value, using the midpoint of the hit time interval as the first query time.

4. The method according to claim 3, wherein The determining the first query time in the query time sequence according to the first start time and the end time includes: In the case where the difference between the start time and the end time of the hit time interval is less than or equal to the preset value, using the end time as the first query time.

5. The method according to any one of claims 1-4, characterized in that, After determining the startup status of the PCIe device based on the query time sequence, the method further includes: Updating the hit time interval according to the total query time before the PCIe device starts up successfully during the current startup process and the total query time when the PCIe device starts up successfully during the current startup process.

6. The method according to claim 5, characterized in that, Updating the hit time interval according to the total query time before the successful startup of the PCIe device in the current startup process and the total query time when the PCIe device starts up successfully in the current startup process includes: When the hit time interval is a valid time interval and the start time of the hit time interval is less than the total query time before the successful startup of the PCIe device, updating the start time of the hit time interval to the total query time before the successful startup of the PCIe device; wherein, the valid time interval means that at least one of the start time and the end time of the hit time interval is not 0; When the hit time interval is a valid time interval and the end time of the hit time interval is greater than the total query time when the PCIe device starts up successfully, updating the end time of the hit time interval to the total query time when the PCIe device starts up successfully.

7. The method according to claim 5 or 6, characterized in that, The method includes: When the difference between the start time and the end time of the hit time interval is less than or equal to a preset difference, stopping adjusting the hit time interval.

8. The method according to claim 1, wherein Before obtaining the hit time interval from the flash based on the BIOS, it further includes: Determining whether the computing device is a cold start; Obtaining the hit time interval from the flash based on the BIOS includes: When the computing device is a cold start, setting the start time and the end time to 0.

9. The method according to claim 8, wherein The method further includes: When the computing device is not a cold start, obtaining the hit time interval from the flash based on the BIOS.

10. A computing device, characterized in that, The computing device includes: a memory and a processor; The memory is used for storing the basic input / output system BIOS; The processor is used for calling the BIOS to execute the method according to any one of claims 1-9.

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