Method for reducing diffusion damage of extended wavelength InGaAs detector

Abstract

The invention discloses a method for reducing diffusion damage of an extended wavelength InGaAs detector, which is characterized in that after zinc atoms are thermally diffused on the surface layer of an epitaxial material of the detector to form a PN junction, dislocation defects generated by lattice mismatch in an active region of the material are further transmitted under the driving of thermal stress to cause increase of lattice damage, and periodic treatment is introduced after diffusion, so that the diffusion damage of the InGaAs detector is reduced. And a specific temperature-time curve is adopted to cause evolution annihilation of dislocation defects, so that lattice damage caused by diffusion is effectively reduced. The method has the beneficial effects that the process is simple, the dark current of the prepared extended wavelength InGaAs detector can be remarkably reduced, the method is particularly suitable for preparing a large-area-array infrared focal plane photosensitive chip with higher requirement on uniformity, and the dark current and signal response non-uniformity of the focal plane are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor optoelectronic detection chip manufacturing, and particularly relates to a heat treatment process after diffusion, which can fabricate InGaAs photodetectors with less thermal damage, and reduce the dark current and signal non-uniformity of focal plane devices. Background Art

[0002] Short-wave infrared photodetectors in the 1-3μm atmospheric window band have extensive and important applications in fields such as meteorological monitoring, earth resource observation, and hyperspectral earth remote sensing imaging. Among several commercially available detectors currently available in the short-wave infrared range, InGaAs photodetectors are highly regarded for their relatively high operating temperature and detectivity. Compared with InP lattice-matched In 0.53 Ga 0.47 As with a cut-off wavelength of 1.7μm, as the indium composition increases, for extended wavelength In 1-x Ga x As (x>0.53, cut-off wavelength of 1.9-2.6μm), there is a significant lattice mismatch with the InP substrate, resulting in defects and strain in the In 1-x Ga x As layer, which has a great impact on the dark current level and uniformity of the focal plane array. At home and abroad, there has always been extensive attention to the material defect problems caused by the lattice mismatch of extended wavelength In x Ga 1-x As. Reducing material defects plays a key role in improving device performance. Effects such as non-radiative recombination centers and traps caused by defects will affect the density, mobility, and lifetime of charge carriers. Especially in heteroepitaxial optoelectronic devices, lattice mismatch is accompanied by pre-existing threading dislocations, and the threading dislocations propagate into the epitaxial layer until they reach the surface through the entire thickness of the structure, which will significantly reduce the performance and reliability of optoelectronic devices.

[0003] In the field of semiconductor optoelectronics, in order to make the In 1-x Ga x As absorption layer better match the InP substrate, researchers usually carefully design and grow a buffer layer with specific lattice change characteristics between the two. Common buffer layer materials are In x Al 1-x As or InAs y P 1-y . The introduction of such a buffer layer can, to a certain extent, alleviate the stress problem caused by lattice constant mismatch, thereby laying a foundation for the growth of subsequent high-quality epitaxial layers.

[0004] After successfully constructing an optimized epitaxial layer material structure, the researchers did not stop there. Instead, they further expanded their research horizons and actively explored various advanced process methods to comprehensively improve the comprehensive performance of extended wavelength In 1-x Ga x As photodetectors. Among them, surface passivation technology has been widely studied as an effective means. Materials such as HfO2 and SiN x :H have been carefully studied and verified and are proven to be promising passivation materials. They can form a dense and uniform passivation layer on the surface of In 1-x Ga x As, effectively isolating the influence of the external environment on the device, such as the erosion of moisture, oxygen, etc. At the same time, they can capture electrons or holes on the surface, reduce the surface state density, further reduce surface recombination, and enable photo-generated carriers to remain active for a longer time, thereby significantly improving the performance of In 1-x Ga x As photodetectors, including improving detection sensitivity, reducing dark current, enhancing stability and other indicators, making it show more excellent performance in various complex application scenarios.

[0005] In addition to surface treatment and surface passivation technology, thermal annealing processes also play a key role in improving the performance of In 1-x Ga x As photodetectors. Two different thermal annealing methods, external rapid thermal processing and in-situ thermal annealing, have been proven through a large number of experiments to be able to significantly improve the performance of extended wavelength In 1-x Ga x As devices. For example, rapid thermal annealing can effectively remove defects and dislocations introduced during the growth process, improve the crystal quality of the material, thereby enhancing the carrier mobility and reducing non-radiative recombination, and further improving the response speed and quantum efficiency of the photodetector. Through this adjustment of the process sequence, the researchers can more comprehensively control and optimize the performance of In 1-x Ga x As photodetectors, making it show higher performance and reliability in practical applications.

[0006] In the preparation process of planar InGaAs photodetectors, zinc diffusion is a key process for forming a pn junction with a specific morphology. This process introduces zinc atoms from the diffusion window and makes them diffuse into the InGaAs photosensitive layer, thereby forming a P+ region and completing the construction of the pn junction. However, the zinc diffusion process is usually accompanied by damage to the material, which can cause an increase in material defects and dislocations, thereby affecting the performance and reliability of the device. With the development of extended wavelength In 1-x Ga xThe performance requirements for As detectors continue to increase, and reducing diffusion damage has become one of the key challenges in research. Summary of the invention

[0007] The present invention provides a method for reducing diffusion damage of an extended wavelength InGaAs detector. After the zinc diffusion source is thermally diffused, the material (herein, "material" refers to Figure 1 The chip is provided with an InP substrate (1), an InAlAs / InAsP buffer layer 2, an InGaAs absorption layer 3, an InAlAs / InAsP cap layer 4 and a silicon nitride or silicon oxide dielectric film layer 5 in an overall structure) and a temperature change cycle damage repair process to control the thermal damage of the material during the diffusion process, reduce the damage to the wafer material during the diffusion process, and realize the production of a focal plane with low dark current and low signal non-uniformity. The chip is provided with an InP substrate (1), a buffer layer, an absorption layer, a cap layer and a dielectric film layer in sequence from bottom to top, and the main steps are:

[0008] Step 1, depositing a dielectric film layer;

[0009] Step 2, coating photoresist on the dielectric film layer and generating a contact hole pattern on the photoresist; forming contact holes on the photoresist according to the contact hole pattern, so as to facilitate forming diffusion holes on the dielectric film layer through the contact holes in the subsequent step 3.

[0010] Step 3, etching and removing the dielectric film in the dielectric film layer in the contact hole, and removing the photoresist, forming a diffusion hole on the dielectric film layer; the diffusion hole is in step 4, which facilitates the zinc diffusion source to diffuse to the cap layer through the diffusion hole, and forms a diffusion area in the cap layer.

[0011] Step 4, using specific temperature diffusion parameters to perform thermal diffusion of the zinc diffusion source through the diffusion hole to form a diffusion zone in the cap layer;

[0012] Step 5: Material testing before damage repair;

[0013] Step 6: lattice damage repair treatment by temperature cycle after diffusion;

[0014] Step 7: Material testing after damage repair.

[0015] Furthermore, in the step 1), the dielectric film deposited as the dielectric film layer is silicon nitride or silicon oxide, and the film thickness is 100-500 nm, which is used to produce a mask of uniform material on the chip surface.

[0016] Furthermore, in the step 2), an ultraviolet photolithography process is adopted, the photoresist can be positive or negative photoresist, the contact hole shape can be circular, square, polygonal, etc., and the contact hole pattern is generated on the photoresist by mask exposure and development.

[0017] Further, in the step 3), the dielectric film etching adopts a plasma dry etching process based on etchants such as SF4 / Ar, including radio frequency ion beam etching or reactive ion etching / inductive coupled plasma etching, etc.; at the same time, it combines a wet etching process based on hydrofluoric acid solution, including hydrofluoric acid-ammonium fluoride buffer solution / hydrofluoric acid-water dilution solution, etc. Through etching, the dielectric film of the dielectric film layer in the contact hole in the above step 2) is removed. According to the type of photoresist used in step 2), the corresponding photoresist removing reagent is used to dissolve and remove the photoresist, and then cleaning is carried out to produce the structure of the diffusion hole.

[0018] Further, in the step 4), a closed-tube diffusion process is adopted, and the dielectric film with diffusion holes formed in step 3) is used as a mask. The zinc diffusion parameters are set according to the sufficient diffusion source conditions, and zinc diffusion source diffusion is carried out at 400-600 °C and the corresponding time to form a diffusion region in the capping layer to reach the target depth.

[0019] Further, in the step 5), a non-contact and non-destructive method is adopted to test and record the mass of the material before diffusion, which can be tested and recorded by photoluminescence spectroscopy or X-ray diffraction technology, etc.

[0020] Further, in the step 6), a damage repair treatment with a temperature change cycle is adopted. The range of the highest temperature is between 450-650 °C, the value range of the cycle number n is 1-10, and each cycle can include multi-stage heating. The value range of the number of stages x is 2-5. The total duration of temperature stabilization in each cycle is in the range of 15-45 s, and the environmental protection gas used is nitrogen.

[0021] More specifically, if the temperature is lower than 450 °C, it is not sufficient to support the atomic recombination process driven by thermodynamics. If the temperature is higher than 650 °C, it is easy to cause thermal decomposition or phase change of the material; increasing the number of cycle times can release stress gradually, but after more than 10 times, the stress is completely released, and increasing the number of cycle times further cannot improve the material quality; multi-stage heating can assist in preheating the chip to avoid sudden thermal stress mutation of the material due to sudden high temperature. The number of heating stages can be increased according to the selected temperature requirements. For the temperature range mentioned in this patent, the number of stages within 5 (including) can meet the requirements; if the total duration of temperature stabilization is less than 15 s, it will cause insufficient defect slip or climb to complete defect repair. If the total duration of temperature stabilization is higher than 45 s, it will cause excessive secondary diffusion of Zn atoms, resulting in the shift of the PN junction region.

[0022] Further, in the step 7), a non-contact and non-destructive method corresponding to that in step 5) is adopted to test and record the mass of the material after diffusion, which can be tested and recorded by photoluminescence spectroscopy or X-ray diffraction technology, etc. See Figure 4 and Figure 5, after repair, if the epitaxial peak shifts to the left and the angle relative to the substrate peak becomes larger, it indicates that the stress in the epitaxial material is released and the dislocation density decreases accordingly; if the epitaxial peak shifts to the right and the angle relative to the substrate peak becomes smaller, it indicates that the stress in the epitaxial material continues to increase, resulting in more defects caused by lattice distortion. In severe cases, a large number of aggregated macroscopic defects can be observed with the naked eye. Generally, the degree of stress release can be judged according to the degree of the increase in the angle of the epitaxial peak relative to the substrate peak.

[0023] Further, the indium component in the material of the absorption layer of the extended wavelength InGaAs detector is between 0.53 and 1, and the material of the cap layer of the extended wavelength InGaAs detector is InAlAs or InAsP.

[0024] After the above process steps are completed, by comparing and analyzing the test results before and after the damage repair treatment, the change trend of material defects can be obtained, and the thermal cycle parameters that can maximize the suppression of diffusion damage can be analyzed to meet the wafer processing requirements of the same batch of materials with the same specifications, and to achieve lower dark current and better signal non-uniformity of the focal plane device.

[0025] Beneficial effects

[0026] (1) By performing damage repair treatment on the temperature change cycle of the material after diffusion, the present invention can effectively control the thermal damage of the material during the diffusion process. It effectively solves the problems of increased chip defect density and decreased material quality caused by diffusion damage, thereby improving the uniformity and consistency of the material and the performance of the device.

[0027] (2) The present invention is particularly suitable for the fabrication of large-area high-uniformity focal plane arrays, improving the process tolerance, repeatability and reliability. In the fabrication of large-area infrared focal plane detectors, uniformity is a very critical parameter because it directly affects the imaging quality and signal stability of the detector. Through the damage repair treatment, the material defects and performance differences caused by diffusion damage can be reduced, making the detectors produced in the same batch more consistent in performance and improving the reliability and stability of the detectors.

[0028] (3) A method for reducing the diffusion damage of an extended-wavelength InGaAs detector according to the present invention. Before and after damage repair, the material is tested by photoluminescence spectroscopy or X-ray diffraction and other non-contact and non-destructive tests. This step can ensure that during the subsequent damage repair process of temperature change cycles, the characteristics of the material can be effectively controlled and optimized under the condition of introducing additional influences. This method for reducing diffusion damage is completely compatible with existing general semiconductor processes such as ultraviolet lithography, dielectric film deposition, and etching, and has the advantages of high process feasibility and high equipment compatibility, without the need for large-scale equipment transformation or process adjustment. In addition, this process adopts an adjustable temperature range, heating curve, and number of cycles. This flexible parameter adjustment method enables the process to adapt to different material characteristics and application requirements. For example, under different temperature and time conditions, the damage repair process can be optimized to meet the production requirements of InGaAs photodetectors with different specifications and performance requirements.

[0029] (4) The present invention discloses a method for reducing the diffusion damage of an extended-wavelength InGaAs detector. After zinc atoms are thermally diffused on the surface layer of the detector epitaxial material to form a PN junction, dislocation defects generated by lattice mismatch in the active region of the material are further transmitted under the drive of thermal stress, causing an increase in lattice damage. By introducing periodic treatment after diffusion and adopting a specific temperature-time curve, the evolution and annihilation of dislocation defects are caused, effectively reducing the lattice damage caused by diffusion. The beneficial effects of the present invention are that the process is simple, and the dark current of the prepared extended-wavelength InGaAs detector can be significantly reduced, especially suitable for the preparation of large-area infrared focal plane photosensitive chips with higher uniformity requirements, and improving the dark current and signal response non-uniformity of the focal plane. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a schematic flow chart of a method for reducing the diffusion damage of an extended-wavelength InGaAs detector according to the present invention.

[0031] They are, in sequence, depositing a dielectric film layer, coating a photoresist on the chip and generating a pattern of contact holes on the photoresist, etching to remove the dielectric film in the contact holes and removing the photoresist, performing zinc diffusion source diffusion with diffusion parameters of a specific temperature and time, testing before damage repair, damage repair cycle, and testing after damage repair.

[0032] In the figure:

[0033] 1 - InP substrate;

[0034] 2 - InAlAs / InAsP buffer layer;

[0035] 3 - InGaAs absorption layer;

[0036] 4 - InAlAs / InAsP cap layer;

[0037] 5—Silicon nitride or silicon oxide dielectric film layer;

[0038] 6—Positive or negative photoresist.

[0039] Figure 2 It is a schematic diagram of the temperature cycle in the damage repair process of a method for reducing the diffusion damage of an extended wavelength InGaAs detector according to the present invention.

[0040] In the figure:

[0041] The interval where the highest temperature corresponding to the ordinate T is located is 450 - 650 °C;

[0042] The value range of the number of cycle periods n is 1 - 10;

[0043] The value range of the number of stages x of the multi-stage heating included in each period is 2 - 5;

[0044] The interval of the total stable temperature duration in each period corresponding to the abscissa t is 15 - 45 s.

[0045] Figure 3 It is a schematic diagram of the temperature cycle in the damage repair process of a method for reducing the diffusion damage of an extended wavelength InGaAs detector in Specific Example 1.

[0046] Figure 4 It is a schematic diagram of the X-ray diffraction test result in Specific Example 1.

[0047] Figure 5 It is a schematic diagram of the temperature cycle in the damage repair process of a method for reducing the diffusion damage of an extended wavelength InGaAs detector in Specific Example 2.

[0048] Figure 6 It is a schematic diagram of the X-ray diffraction test result in Specific Example 2. Detailed implementation mode

[0049] The present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and not to limit the scope of the present invention. It should be understood here that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms also fall within the scope defined by the appended claims of this application.

[0050] Example 1

[0051] The purpose of this example is for a short-wave infrared In with a pixel area of 400 μm 2 Ga 0.75 Ga 0.25As focal plane photosensor chip, adopts the method of reducing diffusion damage of extended wavelength InGaAs detector disclosed in the present invention, reduces the damage of the diffusion process to the wafer material, and verifies the feasibility of the present invention.

[0052] The extended wavelength In grown on an InP substrate 0.75 Ga 0.25 As epitaxial chip is used as the basis and the following steps are performed to manufacture it:

[0053] (1) Use plasma enhanced chemical vapor deposition equipment (such as PlasmaPro 100PECVD) to deposit SiN x Thin film, thickness 100nm.

[0054] (2) Using AZ1500 positive photoresist, through ultraviolet exposure and development, a square contact hole pattern is produced in the center of the pixel. The side length of the hole is 20 microns.

[0055] (3) Reactive ion etching equipment (such as DISC-RIE-601) is used, and SF4 gas is used as an etchant to etch and remove the SiNx film layer (i.e., dielectric film layer) in the contact hole of the previous step. Then, acetone is used to soak, dissolve and remove the photoresist, and then clean to produce a SiNx diffusion hole structure, i.e., a diffusion hole on the dielectric film layer serving as a passivation film.

[0056] (4) The zinc diffusion source was diffused using the diffusion parameters of 400°C for 20 min.

[0057] (5) Use X-ray diffraction technology to test material properties, such as testing the material properties in the diffusion zone.

[0058] (6) The temperature is raised uniformly from 20°C to 200°C in 18 seconds, stabilized at 200°C for 5 seconds, the temperature is raised uniformly from 200°C to 450°C in 25 seconds, stabilized at 450°C for 10 seconds, and the temperature is accelerated to 20°C from 450°C by air cooling. The number of cycles is 1. Figure 3 .

[0059] (7) Use X-ray diffraction technology to re-test material properties, such as re-testing the material properties in the diffusion zone. The X-ray diffraction test results are as follows: Figure 4 ,After the repair, the epitaxial peak shifts (e.g. to the left), and the angle relative to the substrate peak becomes larger, which ,can indicate that the stress in the epitaxial material is released and the ,dislocation density is reduced.

[0060] After the previous process step is completed, the diffusion damage of the material under this condition is repaired. The use of this parameter makes the chip tape-out results of the same batch and specification more consistent, achieving the requirements for improving the reliability and stability of the detector, and meeting the needs of large-array focal plane detectors with higher uniformity requirements and lower dark current and signal non-uniformity.

[0061] Example 2

[0062] The purpose of this example is to target a short-wave infrared In 2 Ga 0.75 As focal plane photosensitive chip with a pixel area of 900 μm 0.25 and adopt the method disclosed in the present invention to reduce the diffusion damage of the extended-wavelength InGaAs detector, so as to reduce the damage to the wafer material during the diffusion process and verify the feasibility of the present invention.

[0063] Based on the extended-wavelength In 0.75 Ga 0.25 As epitaxial chip grown on an InP substrate, the following steps are carried out for manufacturing:

[0064] (1) Use a plasma-enhanced chemical vapor deposition equipment (such as PlasmaPro 100 PECVD) to deposit a SiN x film with a thickness of 500 nm.

[0065] (2) Use AZ1500 series positive photoresist, and through ultraviolet exposure and development, generate a pattern of square contact holes at the exact center of the pixel. The side length of the hole is 30 microns.

[0066] (3) Use a reactive ion etching equipment (such as DISC-RIE-601), use SF4 gas as the etchant, etch and remove the SiNx film layer (i.e., the dielectric film layer) in the contact holes in the previous step. And soak in acetone to dissolve and remove the photoresist, and clean to generate a SiNx diffusion hole structure, that is, the diffusion holes on the dielectric film layer used as the passivation film.

[0067] (4) Carry out zinc diffusion source diffusion with diffusion parameters of 600 °C for 5 min.

[0068] (5) Use X-ray diffraction technology to test the material properties, such as detecting the material properties in the diffusion zone.

[0069] (6) Use 23 s to uniformly heat the temperature from 20 °C to 250 °C at a constant speed, stabilize at 250 °C for 5 s, use 10 s to uniformly heat the temperature from 250 °C to 350 °C at a constant speed, stabilize at 350 °C for 5 s, use 10 s to uniformly heat the temperature from 350 °C to 450 °C at a constant speed, stabilize at 450 °C for 5 s, use 10 s to uniformly heat the temperature from 450 °C to 550 °C at a constant speed, stabilize at 550 °C for 5 s, use 10 s to uniformly heat the temperature from 550 °C to 650 °C at a constant speed, stabilize at 650 °C for 25 s, and use air cooling to rapidly cool the temperature from 650 °C to 20 °C. The number of cycles is 10 times, as Figure 5 .

[0070] (7) Use X-ray diffraction technology to re-test material properties, such as re-testing the material properties in the diffusion zone. The X-ray diffraction test results are as follows: Figure 6 ,After the repair, the epitaxial peak shifts (e.g. to the left), and the angle relative to the substrate peak becomes larger, which ,can indicate that the stress in the epitaxial material is released and the ,dislocation density is reduced.

[0071] After the previous process step is completed, the diffusion damage of the material under this condition is repaired. The use of this parameter makes the chip tape-out results of the same batch and specification more consistent, achieving the requirements for improving the reliability and stability of the detector, and meeting the needs of large-array focal plane detectors with higher uniformity requirements and lower dark current and signal non-uniformity.

Claims

1. A method for reducing diffusion damage of an extended-wavelength InGaAs detector, characterized in that: After the thermal diffusion of the zinc diffusion source, a damage repair treatment for the cyclic change of the material temperature is carried out to control the thermal damage of the material during the diffusion process.

2. A method for reducing the diffusion damage of an extended wavelength InGaAs detector according to claim 1, wherein an InP substrate (1), a buffer layer, an absorption layer, a cap layer, and a dielectric film layer are sequentially arranged on the chip from bottom to top. The main steps are as follows: Step 1, depositing a dielectric film layer; Step 2, coating a photoresist on the dielectric film layer, generating a pattern of contact holes on the photoresist, and opening holes according to the pattern of the contact holes on the photoresist to form contact holes; Step 3, etching to remove the dielectric film of the dielectric film layer inside the contact holes and removing the photoresist to form diffusion holes on the dielectric film layer; Step 4, performing thermal diffusion of the zinc diffusion source through the diffusion holes by using specific temperature diffusion parameters to form a diffusion region on the cap layer; Step 5, material testing before damage repair; Step 6, lattice damage repair treatment for the temperature cycle after diffusion; Step 7, material testing after damage repair.

3. A method for reducing the diffusion damage of an extended wavelength InGaAs detector according to claim 2, characterized in that: The indium component in the material of the absorption layer of the extended wavelength InGaAs detector is between 0.53 and 1, and the material of the cap layer of the extended wavelength InGaAs detector is InAlAs or InAsP.

4. A method for reducing diffusion damage of an extended-wavelength InGaAs detector according to claim 2, characterized in that: In the said Step 6, a damage repair treatment with a cyclic change of temperature is adopted. The interval where the highest temperature is located is between 450 - 650 °C, the number of cycles n ranges from 1 to 10, and each cycle may include multi-stage heating. The number of stages x ranges from 2 to 5. The total duration of temperature stabilization for each cycle is in the interval of 15 - 45 s, and the environmental protection gas used is nitrogen.

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