Package structure and manufacturing method thereof
By setting a half-ring groove between the first surface and the side surface of the seal member to form a shielding space, the problem of metal residue accumulation during the formation of the heat dissipation layer is solved, and the quality and yield of the packaging structure are improved.
Patent Information
- Application Number
- CN202410158173.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-01-22
- Filing Date
- 2024-02-04
- Publication Date
- 2025-07-22
AI Technical Summary
When the heat dissipation layer is formed, metal residues accumulate in the gap between the seal and the carrier, resulting in a decrease in the quality and yield of the packaging structure.
A half-ring groove is provided between the first surface and the side surface of the seal to form a shielding space to avoid accumulation of metal residues through which a heat dissipation layer is formed on the second surface of the sealing space.
Effectively prevent metal residues from contaminating the chip and improving the quality and yield of the packaging structure.
Smart Images
Figure CN120356869A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a packaging structure and a manufacturing method thereof, in particular to a packaging structure and a manufacturing method for forming a heat dissipation layer on the surface of a sealant. Background Art
[0002] Please refer to Figure 10 , a manufacturing method of a packaging structure 10, wherein a plurality of sealed bodies 10A each containing a chip 11 and a sealant 12 are attached to a carrier 20. The sealed body 10A is attached to the carrier 20 with the active surface 11a of the chip 11 and the first surface 12a of the sealant 12, and a heat dissipation layer 13 is formed on the second surface 12b of the sealant 12 by a sputtering process to constitute the packaging structure 10.
[0003] When the heat dissipation layer 13 is formed on the second surface 12b by the sputtering process, due to the physical properties of the chip 11, the sealant 12, and the carrier 20 and / or the process environment (such as temperature), a gap 30 is generated between the sealant 12 and the carrier 20. In the sputtering process and other processes, atoms of the sputtered target material will accumulate on the carrier 20 and in the gap 30 to form a plurality of metal residues 40. The plurality of metal residues 40 will contaminate the chip 11 and affect the quality and yield of the packaging structure 10. Summary of the Invention
[0004] The main object of the present invention is to provide a packaging structure and a manufacturing method thereof, which, when forming a heat dissipation layer on a sealant, avoid a plurality of metal residues from accumulating in the gap between the sealant and the carrier, thereby affecting the quality and yield of the packaging structure.
[0005] A packaging structure of the present invention includes a chip, a sealant, and a heat dissipation layer. The sealant wraps the chip. The sealant has a first surface, a second surface, a side surface, and a semi-circular groove. The semi-circular groove surrounds the first surface and is located between the first surface and the side surface. The semi-circular groove has a first edge adjacent to the first surface and a second edge adjacent to the side surface. The heat dissipation layer covers the second surface.
[0006] Preferably, the second surface exposes the back surface of the chip, and the heat dissipation layer covers the back surface.
[0007] Preferably, a first axis extends along the first surface, the first axis passes through the first edge, a second axis extends along the side surface, the second axis passes through the second edge, there is a first distance between the first edge and the second axis, the first distance is not less than 3 μm and not more than 10 μm, there is a second distance between the second edge and the first axis, the second distance is not less than 5 μm and not more than 120 μm, and the ratio of the second distance to the first distance is not less than 0.5 and not more than 40.
[0008] Preferably, the semi-circular groove has a groove side surface and a groove bottom surface, the groove bottom surface includes the second edge, the groove side surface is an arc surface, and the groove side surface connects the groove bottom surface.
[0009] Preferably, the semi-circular groove has a groove side surface and a groove bottom surface, the groove bottom surface includes the second edge, the groove side surface includes the first edge, the groove side surface connects the first surface and the groove bottom surface, and there is an included angle between the groove side surface and the groove bottom surface, and the included angle is not less than 90 degrees.
[0010] Preferably, the semi-circular groove has a groove side surface, the groove side surface is an inclined surface, the groove side surface connects the first surface and the side surface, and the groove side surface includes the first edge and the second edge.
[0011] A manufacturing method of a packaging structure of the present invention includes attaching at least one packaging unit to a third carrier, the packaging unit having a chip and a sealant, the sealant covering the chip, the sealant having a first surface, a second surface, a side surface and a semi-circular groove, the semi-circular groove surrounding the first surface and located between the first surface and the side surface, the semi-circular groove having a first edge adjacent to the first surface and a second edge adjacent to the side surface, attaching the packaging unit to the third carrier with the first surface of the sealant, so that the semi-circular groove forms a shielding space between the sealant and the third carrier; and forming a heat dissipation layer on the second surface to form a plurality of packaging structures.
[0012] Preferably, it further includes a packaging process of attaching the active surfaces of a plurality of chips to a first carrier and covering the chips with the sealant to form a sealed body, the sealed body including a plurality of unseparated packaging units, then attaching the sealant to a second carrier, attaching the sealed body to the second carrier with the second surface of the sealant, then removing the first carrier to expose the first surface of the sealant, then forming a ring groove on the first surface, the ring groove surrounding the first surface, the ring groove having a bottom surface and two opposite first edges, then cutting the sealed body along the bottom surface of the ring groove to separate the plurality of packaging units and expose the side surface of the sealant, and making the ring groove form the semi-circular groove surrounding the first surface and located between the first surface and the side surface, then attaching the plurality of packaging units to the third carrier and removing the second carrier to expose the second surface.
[0013] Preferably, after the sealant wraps the plurality of chips, the sealant is thinned.
[0014] Preferably, there is a spacing between the sides of two adjacent packaging units attached to the third carrier, and the spacing is not less than 20 μm and not greater than 1 mm.
[0015] Preferably, a first axis is extended along the first surface, the first axis passes through the first edge, a second axis is extended along the side surface, the second axis passes through the second edge, there is a first distance between the first edge and the second axis, the first distance is not less than 3 μm and not greater than 10 μm, there is a second distance between the second edge and the first axis, the second distance is not less than 5 μm and not greater than 120 μm, and the ratio of the second distance to the first distance is not less than 0.5 and not greater than 40.
[0016] Preferably, in the step of forming the annular groove, the annular groove has two opposite groove side surfaces, the groove side surfaces are arc surfaces, the groove side surfaces are connected to the bottom surface, in the step of separating the plurality of packaging units, the bottom surface is formed into two groove bottom surfaces, the groove bottom surfaces include the second edge, the groove side surfaces are connected to the groove bottom surfaces, and the groove side surfaces are located between the groove bottom surfaces and the first surface.
[0017] Preferably, the groove side surface is connected to the first surface, and the groove side surface includes the first edge.
[0018] Preferably, in the step of forming the annular groove, the annular groove has two opposite groove side surfaces, the groove side surfaces include the first edge, the groove side surfaces are connected to the first surface and the bottom surface, and there is an included angle between the groove side surfaces and the bottom surface, the included angle is not less than 90 degrees, in the step of separating the plurality of packaging units, the bottom surface is formed into two groove bottom surfaces, the groove side surfaces are connected to the first surface and the groove bottom surfaces, the groove bottom surfaces include the second edge, and there is the included angle between the groove side surfaces and the groove bottom surfaces.
[0019] Preferably, in the step of forming the annular groove, the annular groove has two opposite groove side surfaces, the groove side surfaces include the first edge, the groove side surfaces are connected to the bottom surface, and there is an included angle between the groove side surfaces and the bottom surface, the included angle is greater than 90 degrees, in the step of separating the plurality of packaging units, the bottom surface is removed, the groove side surfaces are retained in the semi-annular groove, and the groove side surfaces are connected to the first surface and the side surface.
[0020] With the shielding space formed by the semi-annular groove surrounding the first surface and located between the first surface and the side surface, when forming the heat dissipation layer on the second surface of the sealant, it is possible to avoid the accumulation of a plurality of metal residues in the gap between the first surface and the carrier, thereby contaminating the chip. Description of the Drawings
[0021] Figures 1 to 8D : Schematic diagram of the manufacturing method of the encapsulation structure of the present invention.
[0022] Figures 9A to 9D : Cross-sectional view of the encapsulation structure of the present invention.
[0023] Figure 10 : Schematic diagram of the manufacturing method of the conventional encapsulation structure.
[0024]
Description of Main Component Symbols
[0025] 10: Encapsulation structure 10A: Sealing body
[0026] 11: Chip 11a: Active surface
[0027] 12: Sealing member 12a: First surface
[0028] 12b: Second surface 13: Heat dissipation layer
[0029] 20: Carrier 30: Gap
[0030] 40: Metal residue 100: Sealing body
[0031] 100A: Encapsulation unit 100B: Encapsulation structure
[0032] 110: Chip 111: Active surface
[0033] 112: Back surface 120: Sealing member
[0034] 121: First surface 122: Second surface
[0035] 123: Side surface 124: Ring groove
[0036] 124a: Bottom surface 124b: First edge
[0037] 124c: Second edge 124d: Groove side surface
[0038] 124e: Groove bottom surface 125: Half-ring groove
[0039] 130: Heat dissipation layer 150: Electronic component
[0040] A: Included angle B: Shielding space
[0041] G: Spacing S1: First distance
[0042] S2: Second distance T1: First carrier
[0043] T2: Second carrier T3: Third carrier
[0044] X: First axis Y: Second axis Detailed implementation manners
[0045] Please refer to Figures 9A to 9D , a packaging structure 100B of the present invention includes a chip 110, a seal 120 and a heat dissipation layer 130. In this embodiment, the packaging structure 100B further includes at least one electronic component 150 (such as another chip, passive component, etc.). The chip 110 has an active surface 111 and a back surface 112. The seal 120 covers the chip 110 and the electronic component 150. The seal 120 has a first surface 121, a second surface 122, a side surface 123 and a semi-circular groove 125. The first surface 121 exposes the active surface 111. In different embodiments, a redistribution layer (Redistribution Layer; RDL, not shown in the figure) is provided on the active surface 111, or a redistribution layer (Redistribution Layer; RDL, not shown in the figure) is provided on the active surface 111 and the first surface 121. The semi-circular groove 125 surrounds the first surface 121, and the semi-circular groove 125 is located between the first surface 121 and the side surface 123. The semi-circular groove 125 has a first edge 124b adjacent to the first surface 121 and a second edge 124c adjacent to the side surface 123. The heat dissipation layer 130 covers the second surface 122. In different embodiments, the second surface 122 exposes the back surface 112. The heat dissipation layer 130 further covers the back surface 112 of the chip 110 exposed on the second surface 122. Preferably, the heat dissipation layer 130 covers the side surface 123.
[0046] Please refer to Figures 9A to 9D , extend a first axis X along the first surface 121. The first axis X passes through the first edge 124b. Extend a second axis Y along the side surface 123. The second axis Y passes through the second edge 124c. There is a first distance S1 between the first edge 124b and the second axis Y. The first distance S1 is not less than 3 μm and not greater than 10 μm. There is a second distance S2 between the second edge 124c and the first axis X. The second distance S2 is not less than 5 μm and not greater than 120 μm. The ratio (S2 / S1) of the second distance S2 to the first distance S1 is not less than 0.5 and not greater than 40.
[0047] Please refer to Figures 9A to 9D , the difference of the packaging structure 100B lies in the shape of the semi-circular groove 125 surrounding the first surface 121.
[0048] Please refer to Figure 9A, the semi-circular groove 125 has a groove side surface 124d and a groove bottom surface 124e. The groove bottom surface 124e includes the second edge 124c. The groove side surface 124d is an arc surface. The groove side surface 124d connects to the groove bottom surface 124e. In this embodiment, the groove side surface 124d includes the first edge 124b and connects to the first surface 121.
[0049] Please refer to Figure 9B and Figure 9C , the groove side surface 124d connects the first surface 121 and the bottom surface 124a, and its difference from Figure 9A the semi-circular groove 125 is that there is an included angle A between the groove side surface 124d and the groove bottom surface 124e. The included angle A is not less than 90 degrees. Please refer to Figure 9B , the groove side surface 124D is approximately perpendicular to the groove bottom surface 124e, and the included angle A is approximately 90 degrees. Please refer to Figure 9C , and its difference from Figure 9B is that the included angle A is greater than 90 degrees.
[0050] Please refer to Figure 9D , and its difference from Figure 9A , Figure 9B and Figure 9C is that the semi-circular groove 125 does not have the groove bottom surface 124e. The groove side surface 124d is an inclined surface. The groove side surface 124d connects the first surface 121 and the side surface 123. The groove side surface 124d includes the first edge 124b and the second edge 124c.
[0051] Please refer to Figures 1 to 8D , which is a manufacturing method of the encapsulation structure 100B.
[0052] Please refer to Figures 1 to 3 , first, perform the encapsulation process. Please refer to Figure 1 , attach the active surface 111 of multiple chips 110 to the first carrier T1. The first carrier T1 can be selected from adhesive tapes, glass substrates, silicon substrates, etc. In this embodiment, multiple electronic components 150 (such as another chip, passive components, etc.) are also attached to the first carrier T1, but it is not limited thereto.
[0053] Next, please refer to Figure 2 , cover the multiple chips 110 and the multiple electronic components 150 with the sealant 120 to form a sealed body 100. The sealed body 100 includes multiple unseparated encapsulation units 100A. The encapsulation unit 100A has the chip 110, the electronic component 150, and the sealant 120.
[0054] Next, please refer to Figure 3, in this embodiment, after the seal 120 wraps the plurality of chips 110 and the plurality of electronic components 150, the seal 120 is thinned. The thinned seal 120 may or may not expose the back surface 112 of the chip 110. In another embodiment, when the seal 120 is thinned, the chip 110 is thinned simultaneously, and the back surface 112 is exposed.
[0055] Next, please refer to Figure 3 and Figure 4 , the sealed body 100 is attached to the second carrier T2. The second carrier T2 can be selected from adhesive tapes, glass substrates, silicon substrates, etc. The sealed body 100 is attached to the second carrier T2 with the second surface 122 of the seal 120. Then, the first carrier T1 is removed to expose the first surface 121 and the active surface 111.
[0056] Next, please refer to Figures 5A to 5D , a ring groove 124 is formed on the first surface 121. The ring groove 124 surrounds the first surface 121. The ring groove 124 has a bottom surface 124a and two opposite first edges 124b. The first edge 124b is adjacent to the first surface 121.
[0057] Please refer to Figures 5A to 5D , which is different in the shape of the ring groove 124 surrounding the first surface 121.
[0058] Please refer to Figure 5A , in the step of forming the ring groove 124, the ring groove 124 has two opposite groove side surfaces 124d. The groove side surface 124d is an arc surface. The groove side surface 124d connects the bottom surface 124a. In this embodiment, the groove side surface 124d connects the first surface 121. The groove side surface 124d includes the first edge 124b.
[0059] Please refer to Figure 5B , Figure 5C and Figure 5D , which is different from the ring groove 124 of Figure 5A in that there is an angle A between the groove side surface 124d and the bottom surface 124a. The angle A is not less than 90 degrees. Please refer to Figure 5B , the groove side surface 124d is approximately perpendicular to the bottom surface 124a. The angle A is approximately 90 degrees. Please refer to Figure 5C and Figure 5D , which is different from Figure 5B in that the angle A is greater than 90 degrees.
[0060] Next, please refer to Figures 6A to 6D, the sealing body 100 is cut along the bottom surface 124a of the annular groove 124 to separate the plurality of packaging units 100A, and the side surface 123 of the seal 120 is exposed, and the annular groove 124 is formed as a semi-annular groove 125 that surrounds the first surface 121 and is located between the first surface 121 and the side surface 123. The semi-annular groove 125 has a first edge 124b adjacent to the first surface 121 and a second edge 124c adjacent to the side surface 123.
[0061] Please refer to Figures 6A to 6D , for the separated plurality of packaging units 100A, a first axis X extends along the first surface 121, the first axis X passes through the first edge 124b, a second axis Y extends along the side surface 123, the second axis Y passes through the second edge 124c. There is a first distance S1 between the first edge 124b and the second axis Y. The first distance S1 is not less than 3μm and not more than 10μm. There is a second distance S2 between the second edge 124c and the first axis X. The second distance S2 is not less than 5μm and not more than 120μm. The ratio (S2 / S1) of the second distance S2 to the first distance S1 is not less than 0.5 and not more than 40.
[0062] Please refer to Figures 6A to 6D , which is different in the shape of the semi-annular groove 125 that surrounds the first surface 121.
[0063] Please refer to Figure 6A , in the step of separating the plurality of packaging units 100A, the bottom surface 124a is formed into two groove bottom surfaces 124e, the groove bottom surfaces 124e include the second edge 124c, the groove side surface 124d is an arc surface and connects the groove bottom surfaces 124e. The groove side surface 124d is located between the groove bottom surfaces 124e and the first surface 121. In this embodiment, the groove side surface 124d connects the first surface 121 and the groove bottom surfaces 124e, and the groove side surface 124d includes the first edge 124b.
[0064] Please refer to Figure 6B and Figure 6C , which is different from Figure 6A in that the groove side surface 124d connects the first surface 121 and the groove bottom surfaces 124e, and there is an included angle A between the groove side surface 124d and the groove bottom surfaces 124e. The included angle A is not less than 90 degrees. Please refer to Figure 6B , the groove side surface 124d is approximately perpendicular to the groove bottom surfaces 124e, and the included angle A is approximately 90 degrees. Please refer to Figure 6C , which is different from Figure 6B in that the included angle A is greater than 90 degrees.
[0065] Please refer to Figure 6D, in the step of separating the plurality of encapsulation units 100A, the bottom surface 124a is removed, and the groove side surface 124d is retained in the semi-circular groove 125. Please refer to Figure 6D , which is different from Figure 6B and Figure 6C in that the groove side surface 124d connects the first surface 121 and the side surface 123, and the groove side surface 124d includes the second edge 124c.
[0066] Next, please refer to Figures 7A to 7D , the plurality of encapsulation units 100A are attached to the third carrier T3. The third carrier T3 can be selected from adhesive tapes, glass substrates, silicon substrates, etc. The encapsulation unit 100A is attached to the third carrier T3 with the first surface 121, so that the semi-circular groove 125 forms a shielding space B between the seal 120 and the third carrier T3. There is a spacing G between two adjacent encapsulation units 100A. The spacing G is not less than 20 μm and not more than 1 mm. Then, the second carrier T2 is removed to expose the second surface 122. Or, in different embodiments, the second surface 122 exposes the back surface 112.
[0067] Next, please refer to Figures 8A to 8D , a heat dissipation layer 130 is formed on the second surface 122 to form a plurality of encapsulation structures 100B. In different embodiments, the heat dissipation layer 130 also covers the back surface 112 of the chip 110 exposed on the second surface 122. Preferably, the heat dissipation layer 130 covers the side surface 123. The method of forming the heat dissipation layer 130 is selected from sputtering and other methods. When forming the heat dissipation layer 130, due to the shielding space B between the seal 120 and the third carrier T3, preferably, further due to the spacing G between two adjacent encapsulation units 100A being not less than 20 μm and not more than 1 mm, the first distance S1 being not less than 3 μm and not more than 10 μm, the second distance S2 being not less than 5 μm and not more than 120 μm, and the ratio (S2 / S1) of the second distance S2 to the first distance S1 being not less than 0.5 and not more than 40, the atoms of the sputtered target (not shown in the figure) will not be sputtered and accumulated in the gap (not shown in the figure) between the third carrier T3 and the first surface 121.
[0068] Next, please refer to Figures 9A to 9D , a pick-and-place process is performed with a pick-and-place device (not shown in the figure) to separate the plurality of encapsulation structures 100B from the third carrier T3.
[0069] Before separating the plurality of encapsulation units 100A, a ring groove 124 surrounding the first surface 121 is pre-formed on the first surface 121. After separating the plurality of encapsulation units 100A, the ring groove 124 is formed into a semi-ring groove 125 that surrounds the first surface 121 and is located between the first surface 121 and the side surface 123. When forming the heat dissipation layer 130, the shielding space B formed by the semi-ring groove 125 is located between the seal 120 and the third carrier T3, so that atoms of the sputtered target material (not shown in the figure) will not be sputtered and accumulated in the gap (not shown in the figure) between the third carrier T3 and the first surface 121 of the seal 120, and metal residues (not shown in the figure) that contaminate the chip 110 are not formed.
[0070] The above are only preferred embodiments of the present invention and do not impose any formal limitations on the present invention. Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some changes or modifications to the above-disclosed technical content to form equivalent embodiments with equivalent changes within the scope of the technical solution of the present invention. However, as long as it does not depart from the technical solution of the present invention, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention still fall within the scope of the technical solution of the present invention.
Claims
1. An encapsulation structure, characterized in that, Comprising: a chip; a seal covering the chip, the seal having a first surface, a second surface, a side surface and a semi-circular groove, the semi-circular groove surrounding the first surface and being located between the first surface and the side surface, the semi-circular groove having a first edge adjacent to the first surface and a second edge adjacent to the side surface; and a heat dissipation layer covering the second surface.
2. The encapsulation structure according to claim 1, wherein, The second surface exposes the back surface of the chip, and the heat dissipation layer covers the back surface.
3. The encapsulation structure according to claim 1, characterized in that A first axis extends along the first surface, the first axis passing through the first edge, a second axis extends along the side surface, the second axis passing through the second edge, there is a first distance between the first edge and the second axis, the first distance is not less than 3 μm and not more than 10 μm, there is a second distance between the second edge and the first axis, the second distance is not less than 5 μm and not more than 120 μm, and the ratio of the second distance to the first distance is not less than 0.5 and not more than 40.
4. The encapsulation structure according to claim 1, wherein The semi-circular groove has a groove side surface and a groove bottom surface, the groove bottom surface includes the second edge, the groove side surface is an arc surface, and the groove side surface connects the groove bottom surface.
5. The encapsulation structure according to claim 1, wherein The semi-circular groove has a groove side surface and a groove bottom surface, the groove bottom surface includes the second edge, the groove side surface includes the first edge, the groove side surface connects the first surface and the groove bottom surface, and there is an included angle between the groove side surface and the groove bottom surface, the included angle is not less than 90 degrees.
6. The encapsulation structure according to claim 1, wherein The semi-circular groove has a groove side surface, the groove side surface is an inclined surface, the groove side surface connects the first surface and the side surface, and the groove side surface includes the first edge and the second edge.
7. A manufacturing method of a packaging structure, characterized in that Comprising: attaching at least one encapsulation unit to a third carrier, the encapsulation unit having a chip and a seal, the seal covering the chip, the seal having a first surface, a second surface, a side surface and a semi-circular groove, the semi-circular groove surrounding the first surface and being located between the first surface and the side surface, the semi-circular groove having the first edge adjacent to the first surface and a second edge adjacent to the side surface, the encapsulation unit being attached to the third carrier with the first surface of the seal, so that the semi-circular groove forms a shielding space between the seal and the third carrier; and forming a heat dissipation layer on the second surface to form a plurality of encapsulation structures.
8. The manufacturing method of the encapsulation structure according to claim 7, characterized in that, Further comprising an encapsulation process of attaching the active surfaces of a plurality of chips to a first carrier and covering the chips with the seal to form a sealed body, the sealed body including a plurality of unseparated encapsulation units, then attaching the seal to a second carrier, the sealed body being attached to the second carrier with the second surface of the seal, then removing the first carrier to expose the first surface of the seal, then forming a ring groove on the first surface, the ring groove surrounding the first surface, the ring groove having a bottom surface and two opposite first edges, then cutting the sealed body along the bottom surface of the ring groove to separate the plurality of encapsulation units and expose the side surface of the seal, and making the ring groove form the semi-circular groove surrounding the first surface and located between the first surface and the side surface, then attaching the plurality of encapsulation units to the third carrier and removing the second carrier to expose the second surface.
9. The manufacturing method of the encapsulation structure according to claim 8, characterized in that, After covering the plurality of chips with the seal, thinning the seal.
10. The manufacturing method of the encapsulation structure according to claim 8, characterized in that, There is a spacing between the sides of two adjacent encapsulation units attached to the third carrier, and the spacing is not less than 20 μm and not greater than 1 mm.
11. The manufacturing method of the encapsulation structure according to claim 7 or 10, characterized in that, A first axis extends along the first surface, the first axis passes through the first edge, a second axis extends along the side surface, the second axis passes through the second edge, there is a first distance between the first edge and the second axis, the first distance is not less than 3 μm and not greater than 10 μm, there is a second distance between the second edge and the first axis, the second distance is not less than 5 μm and not greater than 120 μm, and the ratio of the second distance to the first distance is not less than 0.5 and not greater than 40.
12. The manufacturing method of the encapsulation structure according to claim 8, characterized in that, In the step of forming the annular groove, the annular groove has two opposite groove side surfaces, the groove side surfaces are arc-shaped, the groove side surfaces are connected to the bottom surface, and in the step of separating the plurality of encapsulation units, the bottom surface is formed into two groove bottom surfaces, the groove bottom surfaces include the second edge, the groove side surfaces are connected to the groove bottom surfaces, and the groove side surfaces are located between the groove bottom surfaces and the first surface.
13. The manufacturing method of the encapsulation structure according to claim 12, characterized in that, The groove side surface is connected to the first surface, and the groove side surface includes the first edge.
14. The manufacturing method of the encapsulation structure according to claim 8, characterized in that, In the step of forming the annular groove, the annular groove has two opposite groove side surfaces, the groove side surfaces include the first edge, the groove side surfaces are connected to the first surface and the bottom surface, there is an included angle between the groove side surfaces and the bottom surface, the included angle is not less than 90 degrees, and in the step of separating the plurality of encapsulation units, the bottom surface is formed into two groove bottom surfaces, the groove side surfaces are connected to the first surface and the groove bottom surfaces, the groove bottom surfaces include the second edge, and there is the included angle between the groove side surfaces and the groove bottom surfaces.
15. The manufacturing method of the encapsulation structure according to claim 8, characterized in that, In the step of forming the annular groove, the annular groove has two opposite groove side surfaces, the groove side surfaces include the first edge, the groove side surfaces are connected to the bottom surface, there is an included angle between the groove side surfaces and the bottom surface, the included angle is greater than 90 degrees, and in the step of separating the plurality of encapsulation units, the bottom surface is removed, the groove side surfaces are retained in the semi-annular groove, and the groove side surfaces are connected to the first surface and the side surface.