Signal transmission method, device, chip system, storage medium and program product

Abstract

Embodiments of the present application provide a signal transmission method, device, chip system, storage medium, and program product, relating to the field of communication technology. The method includes: determining a first message; sending the first message via a first time domain resource; wherein the first time domain resource includes a first time unit, and the first time unit corresponds to multiple data chips and parity check chips; when the first data chip and the last data chip in the multiple data chips have the same level state, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit. In this way, the efficiency of data transmission can be significantly improved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to signal transmission methods, devices, chip systems, storage media and program products. Background Art

[0002] Currently, communication between readers and ambient internet of things (AIoT) devices can use a combination of orthogonal frequency division multiplexing (OFDM) and on-off keying (OOK) to modulate signals. For example, an OFDM symbol can correspond to multiple OOK chips and one or more parity-check chips. The parity-check chips can be used to transmit parity-check codes to detect and correct errors during transmission. Furthermore, OFDM symbols are typically preceded by a cyclic prefix (CP) to reduce inter-symbol interference (ISI).

[0003] However, in some scenarios, the number of payload bits for transmitting actual data through OOK chips is low, resulting in low data transmission efficiency. Summary of the Invention

[0004] The present application provides a signal transmission method, device, chip system, storage medium, and program product for use in the field of terminal technology. The present application provides a signal transmission method in which, in an OFDM symbol, when the first OOK chip and the last OOK chip have the same level, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is greater than or equal to the CP length. This significantly improves data transmission efficiency.

[0005] In a first aspect, an embodiment of the present application provides a signal transmission method. The method includes: determining a first message; sending the first message in a first time domain resource; wherein the first time domain resource includes a first time unit, and the first time unit corresponds to multiple data chips and parity check chips; when the first data chip and the last data chip in the multiple data chips have the same level state, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0006] In one possible implementation, the method is performed by a first communication device. The first communication device can be understood as a reader. The first communication device can be the reader itself or a component used in the reader (e.g., a chip, a chip system, a circuit, a software and / or hardware module, etc.).

[0007] The first message can be understood as information or signals transmitted between the reader and the AIoT device, and can also be referred to as an R2D message or R2D transmission. The first time domain resource can be understood as a time domain resource used to transmit the first message, and the time domain resource can be divided into multiple time units. Each time unit is used to transmit part of the first message. A time unit can be, for example, an OFDM symbol as described below. A data chip can also be referred to as an OOK chip or an OOK data chip.

[0008] The signal transmission method of the present application sets the chip length of the last OOK chip and the chip length of the parity check chip to be greater than or equal to the CP length when the first OOK chip and the last OOK chip have the same level in a time unit (such as an OFDM symbol). This reduces the proportion of parity check chips in an OFDM symbol, thereby reducing the transmission overhead of redundant data and effectively improving data transmission efficiency.

[0009] In a possible implementation, when the first data chip and the last data chip have different level states, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

[0010] In this way, since CP is obtained by copying the sequence carried by the parity code chip, the level state of CP is the same as that of the parity code chip, and the level state of the parity code chip is the same as that of the first OOK code chip, then during the CP duration, a level state is maintained between CP and the first OOK code chip, thereby simplifying the signal processing process at the receiving end (AIoT device).

[0011] In one possible implementation, when the first data chip and the last data chip have the same level state, and on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip length of multiple data chips is set to the maximum value.

[0012] In this way, more valid data can be transmitted through data chips within the same bandwidth and time (or OFDM symbol), thereby improving the efficiency of signal transmission.

[0013] In a possible implementation, the level state of the cyclic prefix is ​​the same as the level state of the parity check chip; and the level state of the parity check chip is the same as the level state of the first data chip.

[0014] In this way, the CP and the first OOK chip maintain a consistent level state, which can reduce the number of signal switching times, thereby reducing the complexity of signal processing and power consumption.

[0015] Furthermore, no level jump occurs during the CP duration or between the CP and the first OOK chip. This simplifies the signal processing at the receiving end because the receiving end does not need to deal with the complex signal correction issues caused by level jumps.

[0016] In a possible implementation, the first message includes first information, where the first information is used to indicate a chip length of each data chip and / or a chip length of a parity check chip in a plurality of data chips.

[0017] In this way, through the first information, the receiving end can determine the chip length of each data chip and the chip length of the parity chip based on the chip length of each data chip and / or the chip length of the parity chip.

[0018] In a possible implementation, the first message includes a preamble, and the first information is carried in the preamble.

[0019] In this way, by accurately indicating the chip length, AIoT devices can synchronize and decode signals more accurately, reducing the bit error rate and improving communication reliability.

[0020] Moreover, since the receiving end can usually receive the information in the preamble code earlier, the receiving end can determine the code length of each data code piece and / or the code length of the parity code piece in multiple data code pieces earlier, thereby facilitating the receiving end to correctly receive the first message.

[0021] In a possible implementation, the number of the plurality of data chips is an even number; and / or the number of the parity check chips is one.

[0022] In this way, an even number of data chips helps to distribute spectrum resources more evenly, reduce spectrum waste, and improve spectrum utilization. A single parity check chip can simplify the signal processing process, reducing system complexity and computational burden.

[0023] In a second aspect, embodiments of the present application provide a signal transmission method. The method comprises: receiving a first message in a first time domain resource; wherein the first time domain resource comprises a first time unit, the first time unit corresponding to a plurality of data chips and a parity check chip; and when the first data chip and the last data chip of the plurality of data chips have the same level state, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0024] In one possible implementation, the method may be performed by a second communication device, which can be understood as an AIoT device. The second communication device may be the AIoT device itself, or a component used in the AIoT device (e.g., a chip, a chip system, a circuit, a software and / or hardware module, etc.).

[0025] In a possible implementation, when the first data chip and the last data chip have different level states, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

[0026] In one possible implementation, when the first data chip and the last data chip have the same level state, and on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip length of multiple data chips is set to the maximum value.

[0027] In a possible implementation, the level state of the cyclic prefix is ​​the same as the level state of the parity check chip; and the level state of the parity check chip is the same as the level state of the first data chip.

[0028] In a possible implementation, the first message includes first information, where the first information is used to indicate a chip length of each data chip and / or a chip length of a parity check chip in a plurality of data chips.

[0029] In a possible implementation, the first message includes a preamble, and the first information is carried in the preamble.

[0030] In a possible implementation, the number of the plurality of data chips is an even number; and / or the number of the parity check chips is one.

[0031] In a third aspect, a communication device is provided. The communication device can be used in the first communication device of the first aspect, and the communication device can be a reader, or a device in the reader (for example, a chip, or a chip system, or a circuit, such as a circuit or chip in the reader responsible for communication functions (such as a modem chip, also known as a baseband chip, or a system on chip (SoC) chip or system in package (SIP) chip containing a modem core), etc.), or a device that can be used with an AIoT device, or a logic module or software that can implement all or part of the reader's functions. Alternatively, the communication device can be used in the second communication device of the second aspect, and the communication device can be an AIoT device, or a device in an AIoT device (for example, a chip, or a chip system, or a circuit), or a device that can be used with a reader, or a logic module or software that can implement all or part of the AIoT device's functions.

[0032] In one possible implementation, the communication device may include a module or unit that executes the method / operation / step / action described in any aspect of the first aspect, or the method / operation / step / action described in any aspect of the second aspect. The module or unit may be a hardware circuit, software, or a combination of hardware circuit and software.

[0033] In one possible implementation, the communication device is used for the first communication device of the first aspect, and the communication device may include a processing unit and a transceiver unit. The processing unit is used to determine a first message; the transceiver unit is used to send the first message in a first time domain resource.

[0034] Alternatively, the communication device is used in the second communication device of the second aspect, and the communication device may include a transceiver unit. The transceiver unit is configured to receive a first message in a first time domain resource.

[0035] In a fourth aspect, an embodiment of the present application provides an electronic device comprising a processor and a memory, the memory being used to store code instructions, and the processor being used to run the code instructions to execute the first aspect or any possible implementation of the first aspect, or to execute the method described in the second aspect or any possible implementation of the second aspect.

[0036] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, in which a computer program or instruction is stored. When the computer program or instruction is run on a computer, the computer executes the first aspect or any possible implementation of the first aspect, or executes the method described in the second aspect or any possible implementation of the second aspect.

[0037] In a sixth aspect, an embodiment of the present application provides a computer program product comprising a computer program, which, when the computer program runs on a computer, enables the computer to execute the first aspect or any possible implementation of the first aspect, or execute the method described in the second aspect or any possible implementation of the second aspect.

[0038] In a seventh aspect, the present application provides a chip or chip system, which includes at least one processor and a communication interface, the communication interface and the at least one processor being interconnected by a line, and the at least one processor being configured to run a computer program or instruction to execute the first aspect or any possible implementation of the first aspect, or to execute the method described in the second aspect or any possible implementation of the second aspect. The communication interface in the chip may be an input / output interface, a pin, or a circuit, etc.

[0039] In one possible implementation, the chip or chip system described above in this application further includes at least one memory, wherein instructions are stored in the at least one memory. The memory may be a storage unit within the chip, such as a register or cache, or a storage unit of the chip (such as a read-only memory or random access memory).

[0040] It should be understood that the second to seventh aspects of the present application correspond to the technical solutions of the first aspect of the present application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation methods are similar and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 A schematic diagram of a first communication system used in an embodiment of the present application;

[0042] Figure 2 A schematic diagram of a second communication system used in an embodiment of the present application;

[0043] Figure 3 A schematic diagram of an OFDM symbol provided in an embodiment of the present application;

[0044] Figure 4 A schematic diagram of a signal transmission method;

[0045] Figure 5 is a schematic diagram of another signal transmission method;

[0046] Figure 6 is a schematic diagram of another signal transmission method;

[0047] Figure 7 A schematic diagram of a signal transmission method provided in an embodiment of the present application;

[0048] Figure 8 Schematic diagram of another signal transmission method provided by an embodiment of the present application;

[0049] Figure 9 Interaction schematic diagram between a reader and an AIoT device provided by an embodiment of the present application;

[0050] Figure 10 Schematic block diagram of a signal transmission device provided by an embodiment of the present application;

[0051] Figure 11 Schematic block diagram of another signal transmission device provided by an embodiment of the present application. Detailed implementation manners

[0052] The technical solutions in the present application will be described below in conjunction with the accompanying drawings.

[0053] In the embodiments of the present application, terms such as "first" and "second" are used to distinguish identical or similar items with basically the same functions and effects. For example, the first value and the second value are only used to distinguish different values, and do not limit their order. Those skilled in the art can understand that terms such as "first" and "second" do not limit the quantity and execution order, and terms such as "first" and "second" do not necessarily limit being different.

[0054] It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the present application should not be construed as being more preferred or more advantageous than other embodiments or design solutions. Exactly speaking, using words such as "exemplary" or "for example" aims to present relevant concepts in a specific manner.

[0055] In the embodiments of the present application, "at least one" means one or more, and "multiple" means two or more. "And / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone, where A and B can be singular or plural. The character " / " generally means that the associated objects before and after are in an "or" relationship. "At least one (item)" or its similar expressions refer to any combination of these items, including any combination of single item (item) or plural items (items). For example, at least one (item) of a, b, or c can represent: a, b, c, a - b, a - c, b - c, or a - b - c, where a, b, c can be single or multiple.

[0056] The technical solutions of the embodiments of the present application can be applied to various communication systems, such as: long term evolution (LTE) system, LTE frequency division duplex (FDD) system, LTE time division duplex (TDD) system, universal mobile telecommunication system (UMTS), world-wide interoperability for microwave access (WiMAX) communication system, fifth generation (5G) system or new radio (NR), and future evolved communication systems.

[0057] The electronic device in the embodiments of the present application may also be referred to as: user equipment (UE), mobile station (MS), mobile terminal (MT), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent or user device, etc.

[0058] The electronic device may be a device that provides voice / data connectivity to a user, for example, a handheld device or a vehicle-mounted device with a wireless connection function. Currently, some examples of electronic devices include: mobile phones, tablets, laptops, PDAs, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, in-vehicle devices, wearable devices, electronic devices in 5G networks or future evolved public land mobile communication networks. electronic equipment in network (PLMN), etc., and this application is not limited to this.

[0059] By way of example and not limitation, in this application, an electronic device may be an electronic device in the Internet of Things (IoT) system. The IoT is an important component of future information technology development. Its primary technical feature is connecting objects to the Internet through communication technologies, thereby realizing an intelligent network that interconnects humans and machines, and objects and things. For example, the electronic device in the embodiments of this application may be a wearable device. Wearable devices, also known as wearable smart devices, are a general term for wearable devices that utilize wearable technology to intelligently design and develop wearable devices, such as glasses, gloves, watches, clothing, and shoes. Wearable devices are portable devices that can be worn directly on the body or integrated into a user's clothing or accessories. Wearable devices are not merely hardware devices; they can also achieve powerful functionality through software support, data interaction, and cloud-based interaction. Broadly speaking, wearable smart devices include devices that are fully functional, large in size, and can function independently of a smartphone, either in full or in part, such as smart watches or smart glasses, as well as devices that focus on a specific application function and require integration with other devices, such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0060] As an example and not a limitation, in an embodiment of the present application, the electronic device may also be an electronic device in machine type communication (MTC). In addition, the electronic device may also be an on-board module, on-board module, on-board component, on-board chip or on-board unit built into the vehicle as one or more components or units. The vehicle may implement the method provided in the present application through the built-in on-board module, on-board module, on-board component, on-board chip or on-board unit. Therefore, the embodiment of the present application may also be applied to the Internet of Vehicles, such as vehicle to everything (V2X), long term evolution-vehicle (LTE-V), vehicle-to-vehicle (V2V) technology, etc.

[0061] The network device involved in this application can be a device that communicates with an electronic device. The network device can also be called an access network device or a wireless access network device. It can be a transmission reception point (TRP), an evolved NodeB (eNB or eNodeB) in an LTE system, a home base station (for example, home evolved NodeB, or home Node B, HNB), a base band unit (BBU), or a wireless controller in a cloud radio access network (CRAN) scenario, or the network device can be a relay station, an access point, a vehicle-mounted device, a wearable device, a network device in a 5G network, or a network device in a future evolved PLMN network, etc. It can also be an access point (AP) in a WLAN, or a gNB in ​​an NR system. The above-mentioned network devices can also be urban base stations, micro base stations, micro-micro base stations, femto-micro base stations, etc., and this application does not limit this.

[0062] To facilitate understanding, some technical terms involved in this application are first introduced.

[0063] 1. Ambient internet of things (AIoT)

[0064] It is an Internet of Things (IoT) technology that can integrate various IoT devices into our daily environment.

[0065] 2. AIoT devices

[0066] An AIoT device is a device composed of coupling components and chips. Each AIoT device has a unique identifier, such as an electronic code, which allows each AIoT device to be independently identified and managed within the network.

[0067] It should be understood that AIoT devices may also be referred to as A-IoT devices, tags, electronic AIoT devices, AIoT tags, smart AIoT devices, transponders, data carriers, or devices, etc., and this application does not specifically limit these terms. For ease of understanding, the following description uses AIoT devices as an example.

[0068] According to different functions and applications, AIoT devices can be divided into two types: Type 1 AIoT devices and Type 2 AIoT devices.

[0069] 3. Type 1 AIoT devices

[0070] Type 1 AIoT devices are extremely low-power devices, with an output power consumption of approximately 1 microwatt (μW). They transmit information to other devices by reflecting an externally provided carrier wave (CW). This method of transmitting information to other devices is also called backscatter.

[0071] It should be understood that type 1 AIoT device can also be referred to as AIoT device 1 or device 1, etc., and this application does not make any specific limitations on this.

[0072] 4. Type 2 AIoT devices

[0073] Type 2 AIoT devices typically consume no more than a few hundred μW of output power. They can amplify downlink and / or uplink power and have a wide frequency modulation range, making signal transmission more flexible and efficient.

[0074] Type 2 AIoT devices can generate and transmit signals in two ways. Device 2a devices, which transmit signals by reflecting an externally provided carrier wave, utilize backscattering technology to send information and are suitable for scenarios requiring low power consumption and efficient energy utilization. Device 2b devices, which can internally generate signals, possess active signal generation capabilities and are suitable for applications requiring higher signal strength and a wider transmission range.

[0075] It should be understood that device 2a may also be referred to as AIoT device 2a or an AIoT device of type 2a, and device 2b may also be referred to as AIoT device 2b or an AIoT device of type 2b, etc. This application does not specifically limit the names of these types of AIoT devices.

[0076] 5. Reader

[0077] Typically used to read (and sometimes write) information from AIoT devices. They exchange data with AIoT devices via wireless communication to obtain information from them or, in other cases, write new data to them. Common readers include handheld and fixed types.

[0078] It should be understood that a reader may also be referred to as a readout device, scanner, reader, communicator, or reader / writer, etc., depending on its function and application scenario. For example, if a device supports wireless data rewriting, it may be called a reader / writer. This application does not impose specific restrictions on this.

[0079] 6. R2D

[0080] It is a communication method in which a reader sends information to an AIoT device, which can also be understood as downlink communication.

[0081] 7. D2R

[0082] It is a communication method in which an AIoT device sends information to a reader, which can also be understood as uplink communication.

[0083] 8. Orthogonal frequency division multiplexing (OFDM)

[0084] OFDM is a digital multi-carrier modulation technique widely used in communication systems. OFDM divides the available spectrum into multiple narrowband subcarriers, each of which is orthogonal to the others in the frequency domain.

[0085] 9. Cyclic prefix (CP)

[0086] The CP is a replica of the first time domain in each OFDM symbol, and is obtained by replicating the tail of the symbol.

[0087] 10. On-off keying (OOK)

[0088] OOK is a digital modulation technology and a form of amplitude shift keying (ASK). OOK represents binary data by switching the signal on and off.

[0089] In OOK, a binary "1" indicates the presence of a carrier signal, while a binary "0" indicates its absence. That is, when a "1" is transmitted, the carrier signal is modulated and transmitted; when a "0" is transmitted, the signal path is closed, and no carrier signal is transmitted. Therefore, OOK is suitable for low-power, low-cost wireless communication systems.

[0090] 11. Preamble

[0091] It is a specific bit sequence located at the beginning of a data frame or data packet. Its main function is to provide synchronization information for the receiving end so that the receiving end can correctly identify and decode subsequent data.

[0092] 12. Clock-acquisition part (CAP)

[0093] Refers to a stage or component used for clock acquisition and synchronization, whose main function is to enable the receiving device to accurately synchronize the clock signal of the sending device.

[0094] In order to facilitate understanding of the embodiments of the present application, Figure 1 and Figure 2 A detailed description is given of a communication system (AIoT system) including AIoT devices.

[0095] Figure 1 This is a schematic diagram of a first communication system 100 used in an embodiment of the present application. The communication system 100 includes at least one reader, such as Figure 1 The network device 110 shown in FIG; The communication system 100 may also include at least one AIoT device, such as Figure 1 The AIoT device 120 shown in FIG, AIoT device 120 can be device 1 or device 2a, that is, AIoT device 120 transmits signals in a backscattering manner, and the specific selection depends on the application scenario and requirements; In addition, the communication system 100 can also include at least one CW device (or CW node), such as Figure 1 The electronic device 130 shown in FIG.

[0096] The network device 110 and the electronic device 130 may communicate with each other via a wireless link. The wireless link may utilize various wireless communication technologies, such as Wi-Fi, Bluetooth, or other protocols suitable for specific application scenarios.

[0097] In one possible scenario, the network device 110 may serve as a transmitter and the electronic device 130 may serve as a receiver, with the network device 110 transmitting a downlink signal to the electronic device 130. In another possible scenario, the electronic device 130 may serve as a transmitter and the network device 110 may serve as a receiver, with the electronic device 130 transmitting an uplink signal to the network device 110.

[0098] It is understood that in communication system 100, network device 110 can be understood as a device operating within a small range. This small-range operating mode is generally used to provide wireless coverage in a local area to achieve efficient communication services. Electronic device 130 can be understood as an auxiliary electronic device or auxiliary UE of network device 110. Therefore, electronic device 130 can transmit a carrier based on the instruction of network device 110.

[0099] In communication system 100, network device 110 and AIoT device 120 can also communicate with each other. In one possible scenario, electronic device 130 transmits a carrier signal to AIoT device 120. After receiving the carrier signal, AIoT device 120 reflects the carrier signal and transmits an uplink signal (or reflected signal) to network device 110. In another possible scenario, network device 110 can act as the transmitter and AIoT device 120 can act as the receiver, with network device 110 transmitting a downlink signal to AIoT device 120.

[0100] Figure 2 This is a schematic diagram of a second communication system 200 used in an embodiment of the present application. The communication system 200 includes at least one reader, such as Figure 2 The network device 210 shown in FIG; The communication system 200 may also include at least one AIoT device, such as Figure 2 In the AIoT device 220 shown in FIG, the AIoT device 220 may be device 2b, that is, the AIoT device 220 may generate a signal internally.

[0101] Data can be transmitted between network device 210 and AIoT device 220 via a wireless link. In one possible scenario, network device 210 can act as a transmitter and AIoT device 220 can act as a receiver, with network device 210 transmitting downlink signals to AIoT device 220. In another possible scenario, AIoT device 220 can act as a transmitter and network device 210 can act as a receiver, with AIoT device 220 transmitting uplink signals to network device 210.

[0102] It should be understood that in the communication system 100 and the communication system 200, the communication method between one reader and one AIoT device is exemplarily shown. Optionally, the communication system 100 and the communication system 200 may also include multiple readers and / or multiple AIoT devices, which is not specifically limited in the embodiments of the present application.

[0103] Furthermore, each communication device in the aforementioned communication system can be configured with multiple antennas, including at least one transmit antenna for signal transmission and one receive antenna for signal reception. Each communication device can also be equipped with a transmitter chain and a receiver chain. Those skilled in the art will appreciate that each of these chains may include multiple components related to signal transmission and reception, such as processors, modulators, multiplexers, demodulators, demultiplexers, or antennas. Therefore, communication devices can communicate with each other using multi-antenna technology.

[0104] Optionally, the communication system 100 and the communication system 200 may further include other network entities such as a network controller and a mobility management entity, which is not specifically limited in the embodiments of the present application.

[0105] It should be understood that the method provided in the embodiments of the present application is applicable to a variety of communication systems, including 5G NR systems and 5.5G systems. Figure 1 and Figure 2 The communication systems shown are merely examples, and this application does not limit the specific architecture of the applicable system, nor does it limit the number and form of various devices in each communication system.

[0106] The AIoT communication system has the characteristic of low power consumption. In order to take into account both high spectrum efficiency and ultra-low power reception requirements, the AIoT communication system can use a combination of OFDM and OOK to modulate the signal.

[0107] When combining OFDM and OOK modulation, the multiple subcarriers in an OFDM symbol can be considered an OOK chip. That is, an OOK chip can contain multiple carrier signals. Each subcarrier in an OOK chip can be modulated using OOK. An OOK chip is also called a data chip.

[0108] For example, Figure 3 As shown, taking the example of one OFDM symbol corresponding to four OOK chips, since data can be transmitted via multiple subcarriers within the duration of one OFDM symbol, such as 128 or 256, which can be determined based on the subcarrier spacing, one OOK chip corresponds to multiple subcarriers. For example, if data can be transmitted via 128 subcarriers within the duration of one OFDM symbol, one OOK chip corresponds to 32 subcarriers. The subcarrier data corresponding to one OOK chip can also be understood as the length of the OOK chip, such as the chip length or data chip length.

[0109] It can be understood that the level state of the OOK chip can determine the actual data bits to be transmitted. Figure 3 , 4 OOK chips correspond to "0110". When the four level states of "0110" are used to represent data bits, assuming no other encoding method is used, the "0" in "0110" represents bit 0, and the "1" in "0110" represents bit 1. However, if other encoding methods are used, such as Manchester encoding, the "01" in "0110" represents bit 0, and the "10" in "0110" represents bit 1.

[0110] It should be noted that in actual application scenarios, whether to use a coding method and what coding method to use depends on the specific situation. Here, "0110" only represents the level state and is not limited to bits. This embodiment of the application does not make specific limitations on this.

[0111] However, when OFDM is combined with OOK for communication, signals reach the receiver via multiple paths, each of which may introduce different delays. This delay difference may cause signals to overlap during reception, leading to inter-symbol interference (ISI). Introducing CP within OFDM symbols can maintain video synchronization and significantly reduce the impact of this interference.

[0112] In current communication technologies that combine OFDM and OOK, there are two types of methods for processing the CP in OFDM symbols: Type 1 method (Method Type 1) and Type 2 method (Method Type 2).

[0113] Method Type 1: For R2D transmission, the CP is removed at the AIoT device (receiver), and there is no specific requirement for the reader (sender). However, in this method, the initial sampling frequency offset of the AIoT devices (device 1, device 2a, and device 2b) usually needs to be within 10 4 to 10 5 ppm. This requires the AIoT device to have precise time and frequency synchronization capabilities, and the A-IOT device needs to calculate the sampling rate of the received signal so that it can process it before detecting the timing information. Since AIoT devices are generally low-power and low-complexity devices, this method requires too much computing power and power consumption for the AIoT device.

[0114] Method Type 2: Processing is performed on the reader side. For example, the reader sets the CP in the transmitted signal so that the CP does not cause an erroneous level change between the last OOK code chip of the previous OFDM symbol and the first OOK code chip of the next OFDM symbol.

[0115] Incorrect level changes can also be understood as incorrect rising / falling edges, or as false edges or false edges. These incorrect level changes can refer to incorrect OOK switch state judgments caused by channel multipath and timing issues between OFDM symbols. For example, if the last OOK chip of the previous OFDM symbol corresponds to a high-level state "1," and the first OOK chip of the next OFDM symbol corresponds to a low-level state "0," then due to channel multipath, the energy (or power, etc.) of the last OOK chip of the previous OFDM symbol arrives at the receiver with a delay, potentially leaking into the time window corresponding to the first OOK chip of the next OFDM symbol. This can cause the AIoT device (receiver) to mistakenly interpret the first OOK chip of the next OFDM symbol, which corresponds to a low-level state "0," as a high-level state "1." Inserting a CP between two OFDM symbols can reduce these incorrect level changes.

[0116] This approach reduces the requirements for the time and frequency synchronization capabilities of AIoT devices and is more suitable for AIoT communication systems.

[0117] It is understood that OOK chips can also be called data chips, chips, spread spectrum chips, or pseudo-random chips. In wireless communication systems, spread spectrum technology transmits data by spreading the signal over a spectrum wider than the original bandwidth, and the data chip is the basic unit for achieving this spreading.

[0118] Method Type2 includes two methods: Method 1 (Alt1) and Method 2 (Alt2).

[0119] Alt1 requires maintaining subcarrier orthogonality. This means that the CP is formed by replicating the end of the OFDM symbol. This prevents interference between subcarriers in the frequency domain, even if they are closely adjacent in the spectrum. Alt2, however, does not maintain subcarrier orthogonality, disrupting the hybrid modulation process of discrete Fourier transform (DFT) and OFDM. This can lead to interference between subcarriers in the frequency domain.

[0120] For Alt1, there are two ways to implement it, namely Alt1-1 and Alt1-2.

[0121] In Alt1-1, at least one parity-check chip is added after the OOK chips corresponding to the OFDM symbol, allowing one OFDM symbol to correspond to multiple OOK chips and at least one parity-check chip at the end. However, Alt1-2 does not add a parity-check chip. This approach may introduce level jumps, while Alt1-1 does not. The reasons are as follows.

[0122] To facilitate understanding, it's important to first explain that the CP is obtained by replicating the sample sequence at the end of the symbol. That is, the CP has the same level as the last chip in the OFDM symbol. In Alt1-1, the last chip in the OFDM symbol is a parity-check chip. By aligning this parity-check chip with the first OOK chip in the OFDM symbol, the CP obtained by replicating the parity-check chip has the same level as the first OOK chip in the OFDM symbol.

[0123] For example, an OFDM symbol consists of four OOK chips and one parity-check chip. The first OOK chip has a high-level state of "1." The parity-check chip has the same high-level state as the first OOK chip. The CP, obtained by replicating the parity-check chip, has a high-level state of "1." This eliminates any level jumps between the CP and the first OOK chip, reducing spectrum leakage and improving orthogonality. This allows the CP to effectively reduce inter-symbol interference (ISI) and improve data transmission efficiency.

[0124] It is understood that the parity check code chip can also be called parity check bit, check bit or redundant bit, etc., and can be used to carry or transmit parity check code. Parity check is a basic error detection method that can ensure that data remains intact and error-free during transmission.

[0125] In Alt1-2, however, no parity check chips are introduced, and one OFDM symbol corresponds to multiple OOK chips. If the level of the first OOK chip differs from the level of the last OOK chip, then since the CP is obtained by copying the sample corresponding to the last OOK chip, the CP and the last OOK chip have the same level, while the CP and the first OOK chip have different levels, resulting in a level jump between the CP and the first OOK chip.

[0126] Therefore, in the AIoT system, R2D transmission can be performed using the Alt1-1 method. Currently, the following schemes exist. The following example describes an OFDM symbol corresponding to M OOK chips and N parity check chips.

[0127] Wherein, M is a positive integer, and M can usually be an even number; N is a positive integer.

[0128] In one case, when M is less than or equal to 8, N can be set to 1.

[0129] For example, Figure 4As shown in FIG, when M is 4 and N is 1, when the length of an OFDM symbol is 128, the length of the CP is usually 9 or 10. In addition, since the CP is obtained by replicating the parity check code carried by the parity check code chip, the chip length of the parity check code chip is usually greater than or equal to the length of the CP. Therefore, when the length of the CP is 9 (or 10), the chip length of the parity check code chip is usually greater than or equal to 9 (or 10).

[0130] The OFDM symbol length of 128 can also be understood as one OFDM symbol consisting of 128 sampling points, that is, including 128 samples, and the 128 samples can be sampled at a sampling rate of 1.92 MHz. It is understood that in actual application scenarios, the OFDM symbol length can also be replaced with other lengths, and the embodiments of the present application do not specifically limit this.

[0131] Normally, OOK code chips correspond to the effective information that is actually required to be transmitted. In order to increase the number of payload bits of the actual data transmitted and improve data transmission efficiency, the chip length of the OOK code chip can be made as long as possible, provided that the chip length of the parity check code chip is greater than or equal to the length of the CP.

[0132] Since the number of OOK chips is 4 and the chip length of the parity-check chip must be greater than or equal to the CP length, the chip length of an OOK chip must be less than (128 - CP length) / 4. Therefore, the chip length of the OOK chip can be 29. In this case, the chip length of the parity-check chip is 128 - 29 × 4 = 12, and the chip length of the parity-check chip is greater than the CP length (9 or 10).

[0133] In addition, Figure 4 (a) or Figure 4 In the OFDM symbol shown in (b), the first OOK chip is at 0, and therefore the parity chip is also at 0. Since the CP is derived by replicating the sequence corresponding to the parity chip, the CP and parity chip levels remain consistent. This prevents level jumps between the CP duration and the first OOK chip of the OFDM symbol, simplifying synchronization and signal processing at the receiver and reducing interference.

[0134] In this way, no matter whether the level states corresponding to the first OOK chip and the last OOK chip in the four OOK chips are the same, since the level state of the CP is the same as the level state of the parity check chip, the level state of the CP is the same as that of the first OOK chip, and there is no level jump. Figure 4In (a), the level state corresponding to the four OOK code chips is "0101", and the level state corresponding to the first OOK code chip is different from that of the last OOK code chip; Figure 4 In (b), the level states corresponding to the four OOK code chips are "0110", and the level states corresponding to the first OOK code chip and the last OOK code chip are the same; in both implementations, the level state of the CP is the same as the level state of the parity code chip.

[0135] In another case, when M is greater than 8, the value of N can be greater than 1, for example, 2.

[0136] For example, Figure 5 As shown, when M is equal to 14 and N is equal to 2, the chip length of two parity check chips is twice the length of one OOK chip, and the chip length of the last parity check chip is greater than or equal to the length of the CP.

[0137] like Figure 5 As shown in (a) in the figure, when the length of an OFDM symbol is 128, the CP length is usually 9 or 10. Since the number of OOK chips is 14, and the total length of two parity-check chips is twice the length of an OOK chip, the length of the entire OFDM symbol needs to be greater than or equal to the chip length of 16 OOK chips. The chip length (x) of the OOK chip satisfies: 128-16×x≥0, so the chip length of the OOK chip can be 8.

[0138] Because the CP replicates the sample sequence at the end of the OFDM symbol and no level transition should be introduced between the CP and the first OOK chip, the level states of the CP and the last parity-check chip are high "1." If the chip length of the second parity-check chip is greater than or equal to 10, the chip length of the last parity-check chip can be, for example, 10, and the chip length of the first parity-check chip is 16-10=6.

[0139] It should be understood that the chip lengths of the two parity check chips are only examples. The chip length of the last parity check chip may also be 11, and the chip length of the first parity check chip is 5. This embodiment of the present application does not specifically limit this.

[0140] It is understood that the level states of the CP and the last parity check chip are the same as the level state of the first OOK chip, both of which are high level state "1". The level state of the first parity check chip can be different from the level state of the last OOK chip to distinguish the OOK chip from the parity check chip.

[0141] like Figure 5As shown in (b), the length of the OFDM symbol is 128, and the chip lengths of its CP, OOK code chips and parity check code chips are the same as Figure 5 The parity check code and CP level setting method can refer to Figure 5 The level setting method shown in (a) will not be repeated here.

[0142] Figure 5 Figures (a) and (b) show the frame structure of an OFDM symbol containing two parity chips. Compared to an OFDM symbol containing one parity chip, a communication system requires more complex algorithms and more computing resources when processing two parity chips, which increases the system's implementation complexity and power consumption.

[0143] In order to reduce the decoding difficulty, reduce the system complexity, and reduce the power consumption of the receiving end, when M is equal to 14, N can also be set to 1, and the chip length of the parity check code is greater than or equal to the length of the CP.

[0144] like Figure 6 As shown in the figure, when the length of an OFDM symbol is 128, the CP length is usually 9 or 10. Since the number of OOK chips is 14 and the chip length of the parity-check chip must be greater than or equal to the CP length, the chip length of an OOK chip must be less than (128-CP length) / 14. In this way, the chip length of the OOK chip can be 8, and the chip length of the parity-check chip is 128-8×14=16.

[0145] exist Figure 6 In the OFDM symbol shown, the level state of the first OOK code chip is 0, so the level state of the parity code chip is also 0. Since the CP is obtained by copying the sequence corresponding to the parity code chip, the level state of the CP is the same as the level state of the parity code chip.

[0146] and Figure 5 Compared with the OFDM symbols shown in (a) and (b), Figure 6 The OFDM symbol shown contains only one parity check chip, which allows the communication system to simplify the encoding and decoding processes when processing, thereby reducing the implementation complexity and power consumption of the system.

[0147] Understandably, Figure 4 In the OFDM symbols shown in (a) and (b), the parity check chip length is 12, which accounts for 9.4% of the length of an OFDM symbol. Figure 5 (a) and (b) in Figure 6 In the OFDM symbol shown, the chip length of the parity check chips is increased to 16, accounting for 12.5% ​​of the length of one OFDM symbol.

[0148] Since the actual effective data to be transmitted is transmitted through OOK chips, Figures 5 and 6 In the several OFDM symbol frame structures shown, parity check chips occupy a large proportion of the OFDM symbol length. This means that more time domain resources are used to transmit this redundant information within the OFDM symbol duration. Consequently, the amount of data that can be transmitted within the same bandwidth and time is reduced, resulting in lower transmission efficiency of actual data (or valid data). This situation is not conducive to data transmission in applications requiring high data rates, such as high-definition video streaming or high-speed data downloads.

[0149] Secondly, processing these relatively large parity chips can require longer encoding and decoding times. This is because the parity chips must not only be generated at the transmitter but also verified and corrected at the receiver. This complexity increases latency in the communication system, impacting the performance of real-time applications such as online gaming and video conferencing.

[0150] In addition, Figure 5 In the OFDM symbols shown in (a) and (b), the number of parity chips is 2. This configuration requires the communication system to use more complex algorithms and computing resources to process multiple parity chips, which not only increases system implementation complexity but also may result in higher power consumption. For battery-powered electronic devices such as smartphones and IoT devices, the number of parity chips can directly affect the battery life of the device.

[0151] In view of this, an embodiment of the present application provides a signal transmission method. In an OFDM symbol, when the first OOK chip and the last OOK chip have the same level state, the sum of the chip length of the last OOK chip and the chip length of the parity chip is greater than or equal to the length of the CP. In this way, compared to making the chip length of the parity chip greater than the length of the CP, the proportion of parity chips in an OFDM symbol can be reduced, thereby reducing the transmission overhead of redundant data. By reducing unnecessary parity bits, more time domain resources can be used for the transmission of valid data, which can improve data transmission efficiency.

[0152] Furthermore, by including a parity check chip within an OFDM symbol, there are no level transitions during the parity check chip duration, nor during the CP duration or between the CP and the first OOK chip. This simplifies signal processing at the receiver, as the receiver does not have to deal with the complex signal correction issues caused by level transitions. This simplified signal processing not only improves processing speed and efficiency at the receiver, but also reduces system complexity and power consumption.

[0153] This signal transmission method enables the communication system to maintain efficient data transmission while reducing hardware resource consumption and extending the life of the equipment. Through this design, the system achieves a good balance between performance and resource utilization.

[0154] For example, Figure 7 and Figure 8 A schematic diagram of a signal transmission method provided in an embodiment of the present application. Figure 7 and Figure 8 In the illustrated method, an OFDM symbol includes one parity check chip, and when the level state of the first OOK chip in the OFDM symbol is the same as the level state of the last OOK chip, the proportion of the parity check chip is small.

[0155] Specifically, in an OFDM symbol, when the first OOK chip and the last OOK chip have the same level state, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is greater than or equal to the length of the CP; when the first OOK chip and the last OOK chip have different level states, the chip length of the parity check chip is greater than or equal to the length of the CP.

[0156] Exemplarily, taking M equal to 4 as an example, when the level of the first OOK code chip in the OFDM symbol is consistent with the level of the last OOK code chip, the chip length of the last OOK code chip plus the parity code chip is greater than or equal to the length of the CP.

[0157] like Figure 7 As shown in (a) in Figure 1, when the length of an OFDM symbol is 128, the CP length is usually 9 or 10. Since one OFDM symbol corresponds to 4 OOK chips and 1 parity check chip, to make the length greater than 0, the chip length of an OOK chip satisfies: (128 - 4 × chip length of OOK chip) > 0, and the chip length of the OOK chip is less than 32.

[0158] Because the level of the first OOK chip in an OFDM symbol is the same as the level of the last OOK chip, the chip length of the last OOK chip plus the parity check chip must be greater than or equal to the CP length. To increase the chip length of the OOK chip and thus improve the transmission efficiency of valid data, the chip length of the OOK chip can be a maximum integer less than 32. In this case, the chip length of the OOK chip can be 31, and the chip length of the parity check chip is 128-31×4=4.

[0159] exist Figure 7In the OFDM symbol shown in (a), since the CP is obtained by replicating the parity check chip and the last OOK chip carrying sequence, the parity check chip and the last OOK chip have the same level state to prevent level jumps during the CP duration. Since the CP is obtained by replicating the parity check chip and the last OOK chip carrying sequence, the CP, parity check chip, and last OOK chip have the same level state. Since the last OOK chip and the first OOK chip have the same level state, the CP and the first OOK chip have the same level state, eliminating level jumps between the CP and the first OOK chip.

[0160] It is understandable that, in theory, Figure 7 The OOK chip length in the OFDM symbol shown in (a) can also be less than 31, but the corresponding parity chip length is greater than 4. In this way, compared with the parity chip length of 4, its overhead is greater, thereby reducing the number of payload bits used to transmit actual data and reducing spectrum efficiency.

[0161] The above describes the process of determining the chip length and level state of the CP, OOK code chip and parity code chip when the level state of the first OOK code chip in the OFDM symbol is the same as the level state of the last OOK code chip. The following describes the process of determining the chip length and level state of the CP, OOK code chip and parity code chip when the level state of the first OOK code chip in the OFDM symbol is different from the level state of the last OOK code chip.

[0162] For example, Figure 7 As shown in (b), the length of the OFDM symbol is 128, and the chip lengths of its CP, OOK code chips and parity check code chips are the same as Figure 4 The OFDM symbols shown in (a) and (b) are the same. The parity check code and CP level setting method can be referred to Figure 5 The level setting method shown in (a) will not be repeated here.

[0163] The above describes the process of determining the chip length and level status of the CP, OOK code chip and parity code chip when M is equal to 4. The following describes the process of determining the chip length and level status of the CP, OOK code chip and parity code chip when M is equal to 14.

[0164] For example, Figure 8 As shown in (a), when the length of an OFDM symbol is 128, the length of the CP is usually 9 or 10.

[0165] Since one OFDM symbol corresponds to 14 OOK chips and one parity check chip, in order to make the length greater than 0, the chip length of an OOK chip satisfies: (128-14×chip length of OOK chip)>0, then the chip length of the OOK chip is less than 9.14, that is, the chip length of the OOK chip is less than or equal to 9.

[0166] Since the number of OOK chips is 14, and the level of the first OOK chip in the OFDM symbol is the same as the level of the last OOK chip, the sum of the chip length of an OOK chip and the chip length of the parity check chip must be greater than or equal to the CP length. To increase the chip length of the OOK chip and thus improve the transmission efficiency of valid data, the chip length of the OOK chip can be 9, and the chip length of the parity check chip can be 128-9×14=2.

[0167] exist Figure 8 In the OFDM symbol shown in (a), since the CP is obtained by replicating the parity check chip and the last OOK chip carrying sequence, the parity check chip and the last OOK chip have the same level state to prevent level jumps during the CP duration. Since the CP is obtained by replicating the parity check chip and the last OOK chip carrying sequence, the CP, parity check chip, and last OOK chip have the same level state. Since the last OOK chip and the first OOK chip have the same level state, the CP and the first OOK chip have the same level state, eliminating level jumps between the CP and the first OOK chip.

[0168] It is understandable that, in theory, Figure 8 The OOK chip length in the OFDM symbol shown in (a) can also be less than 9, but the corresponding parity chip length is greater than 2. In this way, compared with the parity chip length of 2, its overhead is greater, thereby reducing the number of payload bits used to transmit actual data and reducing spectrum efficiency.

[0169] When M is equal to 14, and the level state of the first OOK chip in the OFDM symbol is different from the level state of the last OOK chip, the chip length of the parity check chip is greater than or equal to the length of the CP.

[0170] like Figure 8 As shown in (b), the length of the OFDM symbol is 128, and the chip lengths of its CP, OOK code chips and parity check code chips are the same as Figure 6 The OFDM symbols shown are the same. The parity check code and CP level setting method can refer to Figure 5 The level setting method shown in (a) will not be repeated here.

[0171] In a communication system, the reader can indicate the chip length of the OOK code and / or the chip length of the parity code to the AIoT device through the clock-acquisition part (CAP) in the preamble. Correspondingly, the device can obtain the chip length of the OOK code and / or the chip length of the parity code through the CAP.

[0172] In this way, since the AIoT device can receive the CAP in the preamble at an earlier time when receiving the signal from the reader, the AIoT device can determine the chip length of the OOK code chip and / or the chip length of the parity code chip earlier, thereby being able to receive the information carried in the OOK code chip and the parity code chip based on the chip length of the OOK code chip and / or the chip length of the parity code chip.

[0173] Example 1: The CAP includes a synchronization sequence with a specific repetitive pattern (such as a pseudo-random code or a specific bit combination).

[0174] The chip length of the OOK chips and / or the chip length of the parity chips are determined based on the number of repetitions of the synchronization sequence or the length of the synchronization sequence.

[0175] For example, the chip length of the OOK code chip and / or the chip length of the parity check code chip may be: the number of repetitions of the synchronization sequence or the length of the synchronization sequence itself.

[0176] Alternatively, the chip length of the OOK chip and / or the chip length of the parity check chip and the number of repetitions of the synchronization sequence or the length of the synchronization sequence satisfy conversion relationship 1, such as the chip length of the OOK chip is N times the number of repetitions of the synchronization sequence. Conversion relationship 1 can be predefined by the protocol or indicated to the AIoT device by the reader through signaling.

[0177] Example 2: A specific field can be reserved in the CAP to indicate the chip length of the OOK code and / or the chip length of the parity check code to the AIoT device. For example, several bits can be inserted at fixed positions in the CAP to indicate the chip length of the OOK code and / or the chip length of the parity check code in binary form. At the receiving end, the chip length of the OOK code and / or the chip length of the parity check code can be obtained by parsing this field.

[0178] It should be noted that the above reader's method of using the clock-acquisition part (CAP) in the preamble to indicate the OOK chip length is only an example. In actual application scenarios, other methods can also be used to indicate the chip length of the OOK chip. This embodiment of the application does not specifically limit this.

[0179] Understandably, Figure 7 In the OFDM symbol shown in (a), when M is equal to 4 and the level state of the first OOK chip in the OFDM symbol is the same as the level state of the last OOK chip, the chip length of the parity check chip is 4, which accounts for 3.1% of the OFDM symbol length. In contrast, Figure 4 In the OFDM symbol shown in (b), the chip length of the parity check chip accounts for 9.3% of the OFDM symbol length.

[0180] exist Figure 8 In the OFDM symbol shown in (a), when M is equal to 14 and the level state of the first OOK chip in the OFDM symbol is the same as the level state of the last OOK chip, the chip length of the parity check chip is 2, which accounts for 1.6% of the OFDM symbol length. In contrast, Figure 6 In the OFDM symbol shown, the chip length of the parity check chip accounts for 12.5% ​​of the OFDM symbol length.

[0181] As can be seen from the above description, when the level of the first OOK chip in an OFDM symbol is the same as the level of the last OOK chip, there is no level jump between the CP duration and the first OOK chip of the OFDM symbol, and the proportion of parity chips in the OFDM symbol is significantly reduced. This optimization reduces the resource overhead of transmitting redundant data and improves data transmission efficiency.

[0182] In addition, Figure 8 The OFDM symbols shown in (a) and (b) contain a parity check chip. Figure 5 The OFDM symbols shown in (a) and (b) above contain two parity chips. Reducing the number of parity chips helps reduce the implementation complexity of communication systems. This simplification not only makes synchronization and signal processing more efficient at the receiver, but also reduces system power consumption and extends the life of the device.

[0183] The following combination Figure 9 The information transmission method provided in the embodiment of the present application is described in detail. Figure 9 As shown, the method includes the following steps:

[0184] S901: The reader determines the first message.

[0185] Among them, the first message can be understood as the information transmitted between the reader and the AIoT device, or as the message or signal sent by the reader to the AIoT device. It can also be called R2D transmission, downlink transmission, downlink signal or downlink message.

[0186] S902: The reader sends a first message to the AIoT device in a first time domain resource. Correspondingly, the AIoT device receives the first message from the reader. The first time domain resource includes a first time unit, which corresponds to multiple data chips and parity check chips. When the first and last data chips in the multiple data chips have the same level state, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0187] The first time domain resource can be understood as a time domain resource used to transmit the first message, and the time domain resource can include one or more time units. A time unit can be, for example, an OFDM symbol as described above. The first time unit can be understood as any time unit in the first time domain resource, such as any OFDM symbol. The data code chip can be the OOK code chip described above. The cyclic prefix corresponding to the first time unit can be understood as the CP preceding the first time unit.

[0188] An OFDM symbol contains (or corresponds to) multiple OOK chips and one parity check chip, and when the first OOK chip and the last OOK chip in the multiple OOK chips have the same level state, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is greater than or equal to the CP length. For example, Figure 7 (a) and Figure 8 The OFDM symbol shown in (a).

[0189] exist Figure 7 In the OFDM symbol shown in (a), the chip length of the OOK code chip is 31, the sum of the chip length of the last OOK code chip and the chip length of the parity check code chip is 35, and the CP length is 9 or 10.

[0190] exist Figure 8 In the OFDM symbol shown in (a), the chip length of the OOK code chip is 9, the sum of the chip length of the last OOK code chip and the chip length of the parity check code chip is 11, and the length of the CP is 9 or 10.

[0191] Based on multiple OFDM symbols, that is, through the first time domain resources, the reader can send a first message to the AIoT device.

[0192] The signal transmission method of the present application sets the chip length of the last OOK chip and the chip length of the parity check chip to be greater than or equal to the length of the CP when the first OOK chip and the last OOK chip in an OFDM symbol have the same level state. In this way, compared to setting the chip length of the parity check chip to be greater than or equal to the length of the CP, the proportion of the parity check chip in an OFDM symbol can be reduced, thereby reducing the transmission overhead of redundant data and effectively improving data transmission efficiency.

[0193] Furthermore, this method uses a parity check chip within an OFDM symbol. Level transitions do not occur during the parity check chip duration, nor do they occur during the CP duration or between the CP and the first OOK chip. This simplifies signal processing at the receiver because the receiver does not need to deal with the complex signal correction issues caused by level transitions.

[0194] The above describes the signal transmission process between the reader and the AIoT device. The following analyzes an OFDM symbol from the reader side.

[0195] In an OFDM symbol, there are two cases: the first is that the level state of the first OOK chip is the same as that of the last OOK chip. The second is that their level states are different (i.e., the level state of the first OOK chip is different from that of the last OOK chip). In the second case, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix. For example, Figure 7 (b) and Figure 8 The OFDM symbol shown in (b).

[0196] For example, in Figure 7 In the OFDM symbol shown in (b), the chip length of the parity check chip is 12, and the length of the CP is 9 or 10. Figure 8 In the OFDM symbol shown in (b), the chip length of the parity check code is 16, and the length of the CP is 9 or 10.

[0197] When the level states of the first OOK chip and the last OOK chip are different, the proportion of parity check chips in the OFDM symbol is slightly higher than when the level states are the same.

[0198] In this way, a level state is maintained between CP and the first OOK code chip during the CP duration, thereby simplifying the signal processing process at the receiving end (AIoT device).

[0199] In addition, when the level state of the first data code chip is the same as that of the last data code chip, and on the premise that the sum of the code chip length of the last data code chip and the code chip length of the parity code chip is greater than or equal to the length of the cyclic prefix, the code chip length of multiple data code chips is set to the maximum value.

[0200] For example, in Figure 7 In the OFDM symbol shown in (a), the chip length of the OOK chip needs to be less than 32. In order to reduce the overhead of the parity check chip, the chip length of the OOK chip can take the maximum value, that is, 31. Figure 8 In the OFDM symbol shown in (a), the chip length of the OOK code chip is less than 9.14, that is, the chip length of the OOK code chip is less than or equal to 9. In order to reduce the overhead of the parity check code chip, the chip length of the OOK code chip can take the maximum value, that is, 9.

[0201] In this way, more valid data can be transmitted within the same bandwidth and time (or OFDM symbol), which can reduce the resource overhead of transmitting parity check codes.

[0202] Based on the above embodiment, in order to ensure that there is no level jump during the CP duration and between the CP and the first OOK code chip, the level state of the CP is the same as the level state of the parity code chip; the level state of the parity code chip is the same as the level state of the first data code chip.

[0203] For example, in Figure 7 In the OFDM symbol shown in (a), the level state of the parity code chip is the same as the level state of the first data code chip, both are low level state "0", and the level state of the CP is the same as the level state of the parity code chip, both are low level state "0".

[0204] exist Figure 8 In the OFDM symbol shown in (a), the level state of the parity code chip is the same as the level state of the first data code chip, both are high level state "1", and the level state of the CP is the same as the level state of the parity code chip, both are high level state "1".

[0205] In this way, by maintaining a consistent level state between the CP and the first OOK chip, the number of signal switching times can be reduced, thereby reducing the complexity of signal processing and power consumption.

[0206] It should be noted that the first message includes first information, which is used to indicate the chip length of each data chip and / or the chip length of the parity check chip in the multiple data chips. Exemplarily, the first information includes a preamble, and the first information is carried in the preamble.

[0207] The first information is, for example, the CAP in the preamble. The reader can indicate the chip length of the OOK chip and / or the chip length of the parity check chip to the AIoT device through the CAP. Correspondingly, the device can obtain the chip length of the OOK chip and / or the chip length of the parity check chip through the CAP.

[0208] In this way, by accurately indicating the chip length, AIoT devices can synchronize and decode signals more accurately, reducing the bit error rate and improving communication reliability.

[0209] In addition, in one OFDM symbol, the number of data chips is an even number; and / or the number of parity chips is one.

[0210] For example, in Figure 7 In the OFDM symbol shown in (a), the number of OOK chips is 4 and the number of parity check chips is 1. Figure 8 In the OFDM symbol shown in (a) in FIG, the number of OOK chips is 14 and the number of parity-check chips is 1.

[0211] In this way, an even number of data chips helps to distribute spectrum resources more evenly, reduce spectrum waste, and improve spectrum utilization. A single parity check chip can simplify the signal processing process, reducing system complexity and computational burden.

[0212] Combined with the above Figures 7 to 9 , describes in detail the signal transmission method of the embodiment of the present application, and the following is combined with Figure 10 and Figure 11 , describes in detail the signal transmission device of an embodiment of the present application.

[0213] It should be noted that the module names involved in the embodiments of the present application can be defined as other names as long as the functions of each module can be achieved, and there is no specific restriction on the names of the modules.

[0214] Figure 10 Schematic diagram of the structure of a signal transmission device 1000 provided in an embodiment of the present application. Figure 10 As shown, the device 1000 includes: a processing module 1001 and a transceiver module 1002.

[0215] In one possible implementation, the device 1000 is used to implement the steps performed by the reader in the above method embodiment.

[0216] For example, in Figure 7 and / or Figure 8In the method shown, the processing module 1001 can be used to indicate the chip length of the OOK chip and / or the chip length of the parity check chip to the AIoT device through the CAP at the reader end, or Figure 9 In the method shown, the processing module 1001 may be used to determine a first message.

[0217] exist Figure 7 and / or Figure 8 In the method shown, the transceiver module 1002 can be used to receive information indicating the chip length of the OOK chip and / or the chip length of the parity check chip to the AIoT device, or Figure 9 In the method shown, the transceiver module 1002 can be used by the reader to send a first message to the AIoT device.

[0218] A processing module 1001 is used to determine a first message; a transceiver module 1002 is used to send the first message in a first time domain resource; wherein the first time domain resource includes a first time unit, and the first time unit corresponds to multiple data code chips and parity code chips; when the first data code chip and the last data code chip in the multiple data code chips have the same level state, the sum of the code chip length of the last data code chip and the code chip length of the parity code chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0219] In another possible implementation, the device 1000 is used to implement the steps performed by the AIoT device in the above method embodiment.

[0220] The transceiver module 1002 is used to receive a first message in a first time domain resource; wherein the first time domain resource includes a first time unit, and the first time unit corresponds to multiple data code chips and parity code chips; when the first data code chip and the last data code chip in the multiple data code chips have the same level state, the sum of the code chip length of the last data code chip and the code chip length of the parity code chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0221] In the two possible implementations described above, the apparatus 1000 may further implement the following solution.

[0222] Optionally, when the first data chip and the last data chip have different level states, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

[0223] Optionally, when the first data chip and the last data chip have the same level state, and on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip length of multiple data chips is set to the maximum value.

[0224] Optionally, the level state of the cyclic prefix is ​​the same as the level state of the parity check code chip; the level state of the parity check code chip is the same as the level state of the first data code chip.

[0225] Optionally, the first message includes first information, and the first information is used to indicate the chip length of each data chip and / or the chip length of a parity check chip in the multiple data chips.

[0226] Optionally, the first message includes a preamble code, and the first information is carried in the preamble code.

[0227] Optionally, the number of the plurality of data chips is an even number; and / or the number of the parity check chips is one.

[0228] It should be understood that the device 1000 here is embodied in the form of a functional module. The term "module" here can refer to an application specific integrated circuit (ASIC), an electronic circuit, a processor (such as a shared processor, a dedicated processor or a group processor, etc.) and memory for executing one or more software or firmware programs, a combined logic circuit and / or other suitable components that support the described functions. In an optional example, those skilled in the art will understand that the device 1000 can be specifically the reader or AIoT device in the above embodiment, and the device 1000 can be used to execute the various processes and / or steps corresponding to the reader or AIoT device in the above method embodiment. To avoid repetition, they will not be described here.

[0229] The apparatus 1000 has the function of implementing the corresponding steps performed by the reader or AIoT device in the above method; the above functions can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0230] In the embodiments of this application, Figure 10 The device 1000 in the embodiment may also be a chip, such as a SOC. Correspondingly, the transceiver module 1002 may be a transceiver circuit of the chip, which is not limited here.

[0231] Figure 11 1 shows a schematic structural diagram of an apparatus 1100 provided in an embodiment of the present application. The apparatus 1100 includes a processor 1101, a transceiver 1102, and a memory 1103. The processor 1101, the transceiver 1102, and the memory 1103 communicate with each other via an internal connection path. The memory 1103 is used to store instructions, and the processor 1101 is used to execute the instructions stored in the memory 1103 to control the transceiver 1102 to send and / or receive signals.

[0232] It should be understood that the device 1100 can be specifically the reader or AIoT device in the above-mentioned embodiment, and can be used to execute the various steps and / or processes corresponding to the reader or AIoT device in the above-mentioned method embodiment. Optionally, the memory 1103 may include a read-only memory and a random access memory, and provide instructions and data to the processor. A portion of the memory may also include a non-volatile random access memory. For example, the memory may also store information about the device type. The processor 1101 can be used to execute instructions stored in the memory, and when the processor 1101 executes the instructions stored in the memory, the processor 1101 is used to execute the various steps and / or processes of the above-mentioned method embodiment. The transceiver 1102 may include a transmitter and a receiver, the transmitter can be used to implement the various steps and / or processes corresponding to the above-mentioned transceiver for performing the sending action, and the receiver can be used to implement the various steps and / or processes corresponding to the above-mentioned transceiver for performing the receiving action.

[0233] It should be understood that in the embodiments of the present application, the processor may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0234] During implementation, each step of the above method can be completed by an integrated logic circuit of hardware in a processor or by instructions in the form of software. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly embodied as being executed by a hardware processor, or can be executed by a combination of hardware and software modules in the processor. The software module can be located in a storage medium mature in the art, such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor executes the instructions in the memory, and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it will not be described in detail here.

[0235] The signal transmission method provided in the embodiments of the present application can be applied to a reader or AIoT device with communication functions. The specific device form of the reader or AIoT device can refer to the above-mentioned relevant description and will not be repeated here.

[0236] An embodiment of the present application provides an electronic device, which includes: a processor and a memory; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory, so that the electronic device performs the above method.

[0237] The present embodiment provides a chip. The chip includes a processor configured to invoke a computer program stored in a memory to execute the technical solution of the above embodiment. The implementation principles and technical effects are similar to those of the above-mentioned related embodiments and will not be further described here.

[0238] The embodiments of the present application also provide a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the above-mentioned method is implemented. The methods described in the above embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. If implemented in software, the functions can be stored as one or more instructions or codes on a computer-readable medium or transmitted on a computer-readable medium. Computer-readable media can include computer storage media and communication media, and can also include any medium that can transfer a computer program from one place to another. The storage medium can be any target medium that can be accessed by a computer.

[0239] In one possible implementation, computer-readable media may include RAM, ROM, compact disc read-only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium designed to carry or store the desired program code in the form of instructions or data structures and accessible by a computer. Furthermore, any connection is appropriately termed a computer-readable medium. For example, if software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, include optical disc, laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray disc, where disks typically reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of the above are also intended to be included within the scope of computer-readable media.

[0240] An embodiment of the present application provides a computer program product, which includes a computer program. When the computer program is executed, the computer executes the above method.

[0241] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable device to produce a machine, so that the instructions executed by the processing unit of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0242] The above specific implementation methods further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent replacements, improvements, etc. made on the basis of the technical solutions of the present invention should be included in the scope of protection of the present invention.

Claims

1. A signal transmission method, characterized in that: include: confirming the first message; Sending the first message in a first time domain resource; Among them, the first time domain resource includes a first time unit, and the first time unit corresponds to multiple data code chips and parity code chips; when the first data code chip and the last data code chip in the multiple data code chips have the same level state, the sum of the code chip length of the last data code chip and the code chip length of the parity code chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

2. The method according to claim 1, characterized in that In a case where the first data chip and the last data chip have different level states, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

3. The method according to claim 1, characterized in that When the first data chip and the last data chip have the same level state, and on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip length of the multiple data chips is set to a maximum value.

4. The method according to claim 1, wherein The level state of the cyclic prefix is ​​the same as the level state of the parity check code chip; the level state of the parity check code chip is the same as the level state of the first data code chip.

5. The method according to any one of claims 1 to 4, characterized in that The first message includes first information, where the first information is used to indicate a chip length of each data chip in the plurality of data chips and / or a chip length of the parity chip.

6. The method according to claim 5, characterized in that The first message includes a preamble, and the first information is carried in the preamble.

7. The method according to any one of claims 1 to 4, characterized in that The number of the plurality of data chips is an even number; and / or the number of the parity check chips is one.

8. A signal transmission method, characterized in that: include: receiving a first message in a first time domain resource; Among them, the first time domain resource includes a first time unit, and the first time unit corresponds to multiple data code chips and parity code chips; when the first data code chip and the last data code chip in the multiple data code chips have the same level state, the sum of the code chip length of the last data code chip and the code chip length of the parity code chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

9. The method according to claim 8, characterized in that In a case where the first data chip and the last data chip have different level states, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

10. The method according to claim 8, characterized in that When the first data chip and the last data chip have the same level state, and on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip length of the multiple data chips is set to a maximum value.

11. The method according to claim 8, characterized in that The level state of the cyclic prefix is ​​the same as the level state of the parity check code chip; the level state of the parity check code chip is the same as the level state of the first data code chip.

12. The method according to any one of claims 8 to 11, characterized in that The first message includes first information, where the first information is used to indicate a chip length of each data chip in the plurality of data chips and / or a chip length of the parity chip.

13. The method according to claim 12, characterized in that The first message includes a preamble, and the first information is carried in the preamble.

14. The method according to any one of claims 8 to 11, characterized in that The number of the plurality of data chips is an even number; and / or the number of the parity check chips is one.

15. An electronic device, characterized in that: include: processor and memory; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory, so that the electronic device performs the method according to any one of claims 1 to 14.

16. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 14 is implemented.

17. A chip system, characterized in that: The system comprises at least one processor and a communication interface, wherein the communication interface and the at least one processor are interconnected via a line, and the at least one processor is configured to run a computer program or instruction to execute the method according to any one of claims 1 to 14.

18. A computer program product, characterized in that The method comprises a computer program which, when being executed, causes a computer to execute the method according to any one of claims 1 to 14.

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