Video signal transmission device, relay device, and transmission / reception system

Abstract

The present invention addresses the problem of providing a video signal transmission device, a video signal relay device, and a video signal transmission / reception system in which image quality degradation is suppressed when analog transmission is performed on a video signal acquired by an imaging element. A video signal transmission device includes: a YC conversion unit into which RAW data output from an imaging element by performing imaging is inputted, and which converts the RAW data into YC data including luminance data, first color difference data, and second color difference data and outputs the YC data; a digital-to-analog conversion unit that converts the YC data output from the YC conversion unit into an analog signal and outputs the analog signal; and an analog transmission unit that transmits the analog signal converted by the digital-analog conversion unit to the outside.

Description

Technical Field

[0001] The present disclosure relates to a video signal transmission device, a video signal relay device, and a video signal transceiver system. Background Art

[0002] In Patent Document 1, a photographing device is described that digitally transmits RAW (raw) data output from a photographing element to an external device.

[0003] [Prior Art Document]

[0004] [Patent Document]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2021-150791 Summary of the Invention

[0006] [Problems to be Solved by the Invention]

[0007] There is a requirement to transmit a video signal obtained by a photographing element to an external device by analog transmission, which is less expensive than digital transmission.

[0008] However, in recent years, due to the progress of high-resolution of photographing elements and the increase in the amount of video signal data, there is a problem that it is difficult to perform analog transmission of a video signal without deteriorating the image quality of the video signal obtained by the photographing element.

[0009] Based on the above circumstances, an object of the present disclosure is to provide a video signal transmission device, a video signal relay device, and a video signal transceiver system that suppress image quality deterioration when performing analog transmission of a video signal obtained by a photographing element.

[0010] [Means for Solving the Problems]

[0011] The video signal transmission device of the present disclosure includes: a YC (luminance / chrominance) conversion unit that is input with RAW data output from a photographing element by shooting, converts the RAW data into YC data including luminance data, first chrominance data, and second chrominance data, and outputs the YC data; a digital-to-analog conversion unit that converts the YC data output from the YC conversion unit into an analog signal and outputs the analog signal; and an analog transmission unit that transmits the analog signal converted by the digital-to-analog conversion unit to the outside.

[0012] The video signal relay device of the present disclosure includes: a receiving unit that receives an analog signal transmitted from the video signal transmitting device of the present disclosure; an analog-to-digital conversion unit that converts the analog signal received by the receiving unit into YC data and outputs it; and a RAW conversion unit that converts the YC data output from the analog-to-digital conversion unit into RAW data and outputs it.

[0013] The video signal transceiver system of the present disclosure includes: a camera having the imaging element; the video signal transmitting device of the present disclosure; the video signal relay device of the present disclosure; and a display device that displays a video based on a signal output from the video signal relay device. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a diagram showing a schematic configuration of a video signal transceiver system according to a first embodiment of the present disclosure.

[0015] Figure 2 It is a diagram showing a schematic configuration of the imaging element.

[0016] Figure 3 It is a diagram showing signal formats of respective parts of the video signal transmitting device and the video signal relay device.

[0017] Figure 4 It is a diagram showing a functional configuration of a YC conversion unit of the video signal transmitting device according to the first embodiment.

[0018] Figure 5 It is a diagram for explaining YC conversion processing.

[0019] Figure 6 It is a diagram for explaining RAW conversion processing.

[0020] Figure 7A It is a diagram showing a state of change in signal format when a video signal is transmitted from a video signal transmitting device of a comparative example to a video signal relay device. Figure 7B It is a diagram showing a state of change in signal format when a video signal is transmitted from the video signal transmitting device of the present embodiment to a video signal relay device.

[0021] Figure 8A It is a diagram showing a state of change in signal format when a video signal is transmitted from a video signal transmitting device of a comparative example to a video signal relay device. Figure 8B It is a diagram showing a state of change in signal format when a video signal is transmitted from a video signal transmitting device of a modified example of the present embodiment to a video signal relay device.

[0022] Figure 9AIt is a diagram showing the state of the change in the signal format when a video signal is transmitted from the video signal transmitting device of the comparative example to the video signal relay device. Figure 9B It is a diagram showing the state of the change in the signal format when a video signal is transmitted from the video signal transmitting device of the modified example of the present embodiment to the video signal relay device.

[0023] Figure 10 It is a diagram for explaining the signal degradation during analog transmission of the video signal transceiver system of the first embodiment.

[0024] Figure 11 It is a diagram showing the functional structure of the YC conversion unit of the video signal transmitting device of the second embodiment.

[0025] Figure 12 It is a diagram showing the functional structure of the RAW conversion unit of the video signal transmitting device of the second embodiment.

[0026] Figure 13 It is a diagram showing the state of the change in the signal state when a video signal is transmitted from the video signal transmitting device of the second embodiment to the video signal relay device.

[0027] Figure 14 It is a diagram for explaining the sorting process of the YC data of the video signal transceiver system of the third embodiment.

[0028] Figure 15 It is a diagram showing a modified example of the video signal relay device.

[0029] Figure 16 It is a diagram showing a modified example of the video signal transceiver system.

[0030] Figure 17 It is a diagram showing a modified example of the display module device.

[0031] Figure 18 It is a diagram showing the hardware structure of the YC conversion unit of the video signal transmitting device of the first embodiment.

[0032] Figure 19 It is a timing diagram for explaining the processing of the YC conversion unit.

[0033] Figure 20 It is a timing diagram for explaining the processing of the YC conversion unit.

[0034] Figure 21 It is a timing diagram for explaining the processing of the YC conversion unit.

[0035] Figure 22 It is Figure 21 A partial enlarged view of the shown timing diagram.

[0036] Figure 23 This is a diagram showing the hardware structure of the RAW conversion section of the video signal relay device according to the first embodiment.

[0037] Figure 24 This is a timing diagram for explaining the processing of the RAW conversion section.

[0038] Figure 25 This is a timing diagram for explaining the processing of the RAW conversion section.

[0039] Figure 26 This is a timing diagram for explaining the processing of the RAW conversion section.

[0040] [Description of symbols]

[0041] 1: Video signal transceiver system

[0042] 10: Video signal transmission device

[0043] 11: YC conversion section

[0044] 12: DAC

[0045] 13: Transmission section

[0046] 20: Video signal relay device

[0047] 21: Reception section

[0048] 22: ADC

[0049] 23: RAW conversion section

[0050] 24: RGB conversion section

[0051] 30: Camera

[0052] 31: Imaging element

[0053] 40: Display device

[0054] 41: Storage medium

[0055] 50: Camera module device

[0056] 60: Display module device Detailed implementation manners

[0057] [First embodiment]

[0058] Next, embodiments of the present disclosure will be described based on the accompanying drawings. Figure 1 This is a diagram showing the schematic structure of the video signal transceiver system 1 according to the first embodiment of the present disclosure. Figure 2 This is a diagram showing the schematic structure of the imaging element.

[0059] As shown Figure 1 in FIG. 1, the video signal transceiver system 1 of the first embodiment includes: a video signal transmitting device 10; a video signal relay device 20; a camera 30; and a display device 40 that displays a video based on a signal output from the video signal relay device 20.

[0060] The camera 30 includes: an imaging element 31 and an imaging lens (not shown), etc. The imaging element 31 outputs RAW data generated by shooting. As shown Figure 2 in FIG. 2, the imaging element 31 of the present embodiment arranges pixels of three colors, namely, red (R) pixels, green (G) pixels, and blue (B) pixels, in a Bayer arrangement. In addition, hereinafter, the red pixels may sometimes be referred to as pixels R, the green pixels as pixels G, and the blue pixels as pixels B.

[0061] One cycle in either the horizontal or vertical direction of the Bayer arrangement is two pixels, and one cycle in the other direction is two pixels. A unit of one cycle amount of the Bayer arrangement is formed by four pixels, namely, pixel G and pixel R in the first row in the horizontal direction and pixel B and pixel G in the second row in the horizontal direction. The imaging element 31 presents a Bayer arrangement in which the units are continuously arranged in the vertical and horizontal directions.

[0062] In addition, there is no particular limitation on the data amount of each pixel, and according to the specifications of the imaging element 31, it can be set to any data amount. In the present embodiment, as an example, the data amount of each pixel is set to 8 bits.

[0063] Returning to Figure 1 FIG. 1, the video signal transmitting device 10 includes: a YC conversion unit 11, a DAC (Digital to Analog Converter) 12, and a transmitting unit 13. In addition, the DAC 12 is an example of the digital-to-analog conversion unit in the technology of the present disclosure.

[0064] The YC conversion unit 11 converts the RAW data output from the imaging element 31 into YC data and outputs it. There is no particular limitation on the form of the YC conversion performed by the YC conversion unit 11, and it can be set to any form such as YC444 conversion, YC422 conversion, or YC411 conversion. In the present embodiment, as an example, it is assumed that the YC conversion unit 11 performs YC422 conversion.

[0065] The DAC 12 converts the YC data output from the YC conversion unit 11 into an analog signal and outputs it. The transmitting unit 13 transmits the analog signal converted by the DAC 12.

[0066] The video signal relay device 20 includes: a receiving unit 21, an ADC (Analog to Digital Converter) 22, a RAW conversion unit 23, and an RGB (Red-Green-Blue) conversion unit 24. The ADC 22 is an example of the analog-to-digital conversion unit in the technology of the present disclosure.

[0067] The receiving unit 21 receives the analog signal transmitted from the video signal transmitting device 10. The ADC 22 converts the analog signal received by the receiving unit 21 into digital data and outputs it. The RAW conversion unit 23 converts the digital data output from the ADC 22 into RAW data by performing a process opposite to that of the YC conversion unit 11 of the video signal transmitting device 10 and outputs it. The RGB conversion unit 24 performs RGB conversion on the RAW data output from the RAW conversion unit 23 to obtain RGB data.

[0068] Next, the processing of the video signal transmitting device 10 of the video signal transceiver system 1 in the present embodiment during analog signal transmission will be described. Figure 3 It is a diagram showing the signal formats of the respective parts of the video signal transmitting device 10 and the video signal relay device 20. Figure 18 It is a diagram showing the hardware structure of the YC conversion unit 11. Figure 19 、 Figure 20 、 Figure 21 It is a timing diagram for explaining the processing of the YC conversion unit 11. Figure 22 is Figure 21 A partial enlarged view of the timing diagram shown. Figure 4 It is a diagram showing the functional structure of the YC conversion unit 11 of the video signal transmitting device 10 in the present embodiment. Figure 5 It is a diagram for explaining the YC conversion process. Figure 6 It is a diagram for explaining the RAW conversion process. Figure 23 It is a diagram showing the hardware structure of the RAW conversion unit 23. Figure 24 、 Figure 25 、 Figure 26 It is a timing diagram for explaining the processing of the RAW conversion unit 23.

[0069] As Figure 3 shown, the video signal transmitting device 10 in the present embodiment uses the YC conversion unit 11 to convert the RAW data output from the imaging element 31 into YC data, uses the DAC 12 to convert the converted YC data into an analog signal, and transmits it as an analog signal from the transmitting unit 13.

[0070] The data amount of one pixel of the RAW data output from the imaging element 31 is 8 bits, and the data amount of one unit amount corresponding to one cycle of the Bayer arrangement is 32 bits.

[0071] As Figure 4 shown, the YC conversion unit 11 includes an arithmetic processing unit 11a. As an example, the YC conversion unit 11 is implemented by the following hardware structure.

[0072] As Figure 18 shown, the YC conversion unit 11 includes: a frequency division unit 70, a synchronization signal generation unit 71, an output timing generation unit 72, a memory 73, a memory write control unit 74, a memory read control unit 75, and a processor 76.

[0073] The frequency division unit 70 divides the RAW clock signal clk_raw corresponding to the RAW data raw input from the outside of the YC conversion unit 11 by a frequency of 1 / 2 to generate a YC clock signal clk_yc corresponding to the YC data.

[0074] Based on the vertical synchronization signal vs_raw, horizontal synchronization signal hs_raw, and display period signal de_raw of the RAW data raw input from the outside of the YC conversion unit 11, and the RAW clock signal clk_raw, the synchronization signal generation unit 71 generates an internal processing vertical synchronization signal vs_org and horizontal synchronization signal hs_org, and outputs them to the output timing generation unit 72 and the memory write control unit 74.

[0075] Based on the vertical synchronization signal vs_org and horizontal synchronization signal hs_org, the output timing generation unit 72 generates a virtual vertical synchronization signal vs_yct and a virtual horizontal synchronization signal hs_yct of the YC data dy / dc / cr, and outputs them to the memory read control unit 75 and the processor 76.

[0076] The memory 73 stores the RAW data raw input from the outside of the YC conversion unit 11.

[0077] The memory write control unit 74 controls the writing of the RAW data raw to the memory 73.

[0078] The memory read control unit 75 controls the reading of the RAW data raw from the memory 73.

[0079] The processor 76 converts the RAW data raw into YC data dy / dc / cr, and outputs it to the outside together with the vertical synchronization signal vs_yc, horizontal synchronization signal hs_yc, and display period signal de_yc of the YC data dy / dc / cr.

[0080] Next, the processing of the YC conversion unit 11 will be described.

[0081] First, as Figure 19As shown, the synchronization signal generation unit 71 doubles the pulse width and pulse period of the vertical synchronization signal vs_raw of the RAW data raw in synchronization with the RAW clock signal clk_raw to generate a vertical synchronization signal vs_org. In addition, the synchronization signal generation unit 71 doubles the pulse period of the horizontal synchronization signal hs_raw of the RAW data raw in synchronization with the RAW clock signal clk_raw to generate a horizontal synchronization signal hs_org.

[0082] Next, the output timing generation unit 72 adjusts the timing of the vertical synchronization signal vs_org in synchronization with the YC clock signal clk_yc to generate a virtual vertical synchronization signal vs_yct for the YC data. In addition, the output timing generation unit 72 adjusts the timing of the horizontal synchronization signal hs_org in synchronization with the YC clock signal clk_yc and doubles the pulse width to generate a virtual horizontal synchronization signal hs_yct for the YC data.

[0083] Next, as Figure 20 shown, the memory write control unit 74 writes the RAW data raw into the memory 73 in synchronization with the RAW clock signal clk_raw.

[0084] Specifically, regarding the RAW data raw, as data lines in the horizontal direction, the data lines of GR and the data lines of BG are alternately arranged. In addition, the memory 73 has a recording area of four lines, namely mem1, mem2, mem3, and mem4.

[0085] The memory write control unit 74 writes the data line of GR, which is the first one among the four data lines in the horizontal direction, into mem1, writes the data line of BG, which is the second one, into mem2, writes the data line of GR, which is the third one, into mem3, and writes the data line of BG, which is the fourth one, into mem4.

[0086] The data line of GR written into mem1, the data line of BG written into mem2, the data line of GR written into mem3, and the data line of BG written into mem4 are held until the writing of the next four data lines starts.

[0087] Next, the memory write control unit 74 reads out the RAW data raw from the memory 73 in synchronization with the YC clock signal clk_yc.

[0088] Specifically, the memory write control unit 74 combines the data lines of GR written to mem1 and the data lines of BG written to mem2, and reads out RAW data raw1 and RAW data raw2 for two rows in the horizontal direction from the memory 73. In addition, the memory write control unit 74 combines the data lines of GR written to mem3 and the data lines of BG written to mem4, and reads out RAW data raw1 and RAW data raw2 for two rows in the horizontal direction from the memory 73.

[0089] Next, as Figure 21 shown, the processor 76 synchronizes with the clock signal clk_yc of YC and converts RAW data raw1 and RAW data raw2 for two rows in the horizontal direction into YC data dy / dc / cr.

[0090] Specifically, as Figure 22 shown, the processor 76 converts each of the data of the units including one cycle amount of the Bayer array of GRBG in RAW data raw1 and RAW data raw2 for two rows in the horizontal direction into YC data dy / dc / cr. In addition, the details of the conversion process will be described in detail later.

[0091] The processor 76 outputs the converted YC data dy / dc / cr, together with the vertical synchronization signal vs_yc, horizontal synchronization signal hs_yc, and display period signal de_yc of the YC data dy / dc / cr, to the outside.

[0092] As described above, RAW data is input to the YC conversion unit 11, and YC422 conversion is performed on the input RAW data in the arithmetic processing unit 11a to generate YC data, which is separated into Y data (i.e., luminance data) and CbCr data (i.e., chrominance data) and output.

[0093] Specifically, as Figure 5 shown, the YC conversion unit 11 converts each unit including four pixels of two pixels in the horizontal direction × two pixels in the vertical direction in the RAW data into YC data through YC422 conversion, and obtains YC data of two pixel amounts arranged in the horizontal direction. The YC data of two pixel amounts arranged in the horizontal direction includes the Y data of the first pixel and the Y data of the second pixel in sequence from the head in one of the two rows in the horizontal direction, and the Cb data and Cr data shared by the first pixel and the second pixel in the other row of the two rows in the horizontal direction, these four signals.

[0094] The data volume of one pixel amount in the YC data converted from a unit amount of RAW data is 16 bits, and the data volume of two pixel amounts equivalent to a unit amount in the Bayer arrangement is 32 bits.

[0095] Regarding the method of YC422 conversion at this time, there is no particular limitation. For example, any method such as various existing conversion formulas or the following simple conversion formula can be used. In this embodiment, as an example, it is assumed that YC422 conversion is performed using the following simple conversion formula.

[0096] Y0 = G0

[0097] Y1 = G1

[0098] G = (G0 + G1) / 2

[0099] Y = (5G + 2R + B) / 8

[0100] Cb = B - Y

[0101] Cr = R - Y

[0102] As described above, since the data volume of four pixel amounts equivalent to a unit amount in the Bayer arrangement in the RAW data is 32 bits, and the data volume of two pixel amounts equivalent to a unit amount in the Bayer arrangement in the YC data is 32 bits, the data volume does not change before and after performing YC422 conversion on the RAW data. That is, data degradation does not occur due to the YC422 conversion of the YC conversion unit 11.

[0103] Return to Figure 3 , the video signal relay device 20 of this embodiment receives the analog signal transmitted from the video signal transmission device 10 by the receiving unit 21, converts the received analog signal into digital data by the ADC 22, converts the converted digital data into RAW data by the RAW conversion unit 23, and performs RGB conversion on the converted RAW data by the RGB conversion unit 24 to obtain RGB data.

[0104] The RAW conversion unit 23 converts the digital data output from the ADC 22 into RAW data by performing the reverse process of the YC conversion unit 11 of the video signal transmission device 10. As an example, the RAW conversion unit 23 is implemented by the following hardware structure.

[0105] As Figure 23 shown, the RAW conversion unit 23 includes: a frequency division unit 80, a processor 81, a memory 82, a memory write control unit 83, a memory read control unit 84, and an output timing generation unit 85.

[0106] The frequency divider 80 divides the RAW clock signal clk_raw corresponding to the RAW data raw externally input from the RAW conversion unit 23 by a factor of 2 to generate a YC clock signal clk_yc corresponding to the YC data.

[0107] The processor 81 converts the YC data dy / dc / cr into RAW data raw based on the YC data dy / dc / cr, the vertical synchronization signal vs_yc, the horizontal synchronization signal hs_yc, and the display period signal de_yc of the YC data dy / dc / cr, and the YC clock signal clk_yc, and generates a virtual vertical synchronization signal vs_rawt and a virtual horizontal synchronization signal hs_rawt of the RAW data raw, and outputs them to the memory write control unit 83 and the output timing generation unit 85.

[0108] The memory 82 stores the RAW data raw input from the processor 81.

[0109] The memory write control unit 83 controls the writing of the RAW data raw to the memory 82.

[0110] The memory read control unit 84 controls the reading of the RAW data raw from the memory 82.

[0111] The output timing generation unit 85 generates a vertical synchronization signal vs_raw and a horizontal synchronization signal hs_raw of the RAW data raw based on the virtual vertical synchronization signal vs_rawt and the virtual horizontal synchronization signal hs_rawt of the RAW data raw, and outputs them externally.

[0112] Next, the processing of the RAW conversion unit 23 will be described.

[0113] First, as Figure 24 shown, the processor 81 synchronizes with the YC clock signal clk_yc to convert the YC data dy / dc / cr into two rows of RAW data raw1 and RAW data raw2 in the horizontal direction. In addition, the details of the conversion process will be described in detail later.

[0114] The processor 81 generates a virtual vertical synchronization signal vs_rawt, a virtual horizontal synchronization signal hs_rawt, and a virtual display period signal de_rawt of the two rows of RAW data raw1 and RAW data raw2 obtained by conversion, and outputs these together with the RAW data raw1 and RAW data raw2 to the memory write control unit 83 and the output timing generation unit 85.

[0115] Next, as Figure 25As shown, the output timing generation unit 85 synchronizes the timing of the virtual vertical synchronization signal vs_rawt with the RAW clock signal clk_raw, and sets the pulse width and pulse period to 1 / 2 times, generating the vertical synchronization signal vs_raw of the RAW data raw. In addition, the output timing generation unit 85 synchronizes the timing of the virtual horizontal synchronization signal hs_rawt with the RAW clock signal clk_raw, and sets the pulse width and pulse period to 1 / 2 times, generating the horizontal synchronization signal hs_raw of the RAW data raw.

[0116] Next, as Figure 26 shown, the memory write control unit 83 writes the RAW data raw1 and RAW data raw2 of two rows in the horizontal direction into the memory 82 synchronously with the YC clock signal clk_yc.

[0117] Specifically, the memory 82 has a recording area of four lines, namely mem1, mem2, mem3, and mem4.

[0118] For each combination of two data among the RAW data raw1 and RAW data raw2 of two rows in the horizontal direction, the memory write control unit 83 writes the data line of GR of the first data combination into mem1, writes the data line of BG of the first data combination into mem2, writes the data line of GR of the second data combination into mem3, and writes the data line of BG of the second data combination into mem4.

[0119] The data line of GR written into mem1, the data line of BG written into mem2, the data line of GR written into mem3, and the data line of BG written into mem4 are held until the writing of the next two data combinations starts.

[0120] Next, the memory read control unit 84 reads out the RAW data raw1 and RAW data raw2 of two rows in the horizontal direction from the memory 82 synchronously with the RAW clock signal clk_raw.

[0121] Specifically, the memory read control unit 84 sequentially reads out the data line of GR written into mem1 and the data line of BG written into mem2, and converts them into the RAW data raw of one row in the horizontal direction. In addition, the memory read control unit 84 sequentially reads out the data line of GR written into mem3 and the data line of BG written into mem4, and converts them into the RAW data raw of one row in the horizontal direction.

[0122] As described above, the RAW conversion unit 23 generates four-pixel RAW data from two-pixel YC data for each unit.

[0123] In the present embodiment, since YC422 conversion is performed using the simple conversion formula in the YC conversion unit 11 of the video signal transmission device 10, the following simple inverse conversion formula can be used to convert it into RAW data in the RAW conversion unit 23.

[0124] G0 = Y0

[0125] G1 = Y1

[0126] G = (G0 + G1) / 2

[0127] Y = (5G + 2R + B) / 8

[0128] B = Cb - Y

[0129] R = Cr - Y

[0130] In the video signal relay device 20, the data amount of two pixel amounts corresponding to one cycle amount of the Bayer arrangement in the YC data is 32 bits, and the data amount of four pixel amounts corresponding to one cycle amount of the Bayer arrangement in the RAW data is 32 bits, which is the same as the data amount of each data of the video signal transmission device 10.

[0131] After the video signal relay device 20 acquires the RAW data, the RGB conversion unit 24 performs RGB conversion on the RAW data to obtain RGB data. In the video signal relay device 20 of the present embodiment, when the RGB conversion unit 24 performs RGB conversion on the RAW data, a demosaic process is performed together. The demosaic process is a process of supplementing pixels by referring to the color information of pixels adjacent to each pixel.

[0132] Specifically, for each pixel of the RAW data in the RGB conversion, interpolation is performed on the data starting from the surrounding pixels to generate 8-bit R data, G data, and B data respectively. Thus, in the RGB data, R data, G data, and B data are included within one pixel.

[0133] Therefore, the data amount of one pixel amount in the RGB data obtained through RGB conversion increases to 24 bits, and the data amount of four pixel amounts corresponding to one unit amount of the Bayer arrangement becomes 96 bits.

[0134] Next, the effects of the video signal transceiver system 1 of the present embodiment will be described. Figure 7A It is a diagram showing the state of the change in the signal format when the video signal is transmitted from the video signal transmission device of the comparative example to the video signal relay device. Figure 7B It is a diagram showing the state of the change in the signal format when the video signal is transmitted from the video signal transmission device 10 of the present embodiment to the video signal relay device 20.

[0135] First, as a comparative example, a general video signal transceiver system for analog transmission will be described. As Figure 7A shown, the video signal transmitting device of the video signal transceiver system of the comparative example converts RAW data into RGB data through RGB conversion, performs YC422 conversion on the converted RGB data to generate YC data, and converts the generated YC data into an analog signal for analog transmission.

[0136] Here, the data volume of four pixel amounts corresponding to one unit amount of the Bayer arrangement in the RAW data is 32 bits, the data volume of four pixel amounts corresponding to one unit amount of the Bayer arrangement in the RGB data is 96 bits, and the data volume of four pixel amounts corresponding to one unit amount of the Bayer arrangement in the YC data is 64 bits.

[0137] In addition, the video signal relay device of the video signal transceiver system of the comparative example performs digital conversion on the received analog signal to obtain YC data, and performs RGB conversion on the obtained YC data to obtain RGB data.

[0138] Here, the data volume of four pixel amounts corresponding to one unit amount of the Bayer arrangement in the YC data is 64 bits, and the data volume of four pixel amounts corresponding to one unit amount of the Bayer arrangement in the RGB data is 96 bits.

[0139] Next, the video signal transceiver system 1 of the present embodiment will be described. As Figure 7B shown, the video signal transmitting device 10 of the video signal transceiver system 1 of the present embodiment performs YC422 conversion on RAW data to generate YC data, and converts the generated YC data into an analog signal for analog transmission.

[0140] Here, the data volume of four pixel amounts corresponding to one unit amount of the Bayer arrangement in the RAW data is 32 bits, and as described before, the data volume of two pixel amounts corresponding to one unit amount of the Bayer arrangement in the YC data is 32 bits.

[0141] In addition, the video signal relay device 20 of the video signal transceiver system 1 of the present embodiment performs digital conversion on the received analog signal to obtain YC data, performs RAW conversion on the obtained YC data to obtain RAW data, and converts the obtained RAW data into RGB data through RGB conversion.

[0142] Here, the data volume of two pixel amounts equivalent to one unit amount of the Bayer arrangement in the YC data is 32 bits, the data volume of four pixel amounts equivalent to one unit amount of the Bayer arrangement in the RAW data is 32 bits, and the data volume of four pixel amounts equivalent to one unit amount of the Bayer arrangement in the RGB data is 96 bits.

[0143] If the video signal transceiver system 1 of the present embodiment is compared with the video signal transceiver system of the comparative example, the data volume of four pixel amounts equivalent to one unit amount of the Bayer arrangement in the RGB data finally obtained in the video signal relay device 20 of the video signal transceiver system 1 of the present embodiment is the same as the data volume of four pixel amounts equivalent to one unit amount of the Bayer arrangement in the RGB data finally obtained in the video signal relay device 20 of the video signal transceiver system of the comparative example, which is 96 bits.

[0144] However, in the video signal transmitting device 10 of the video signal transceiver system 1 of the present embodiment, the data volume of two pixel amounts equivalent to one unit amount of the Bayer arrangement in the YC data immediately before conversion to an analog signal is 32 bits, and in the video signal transmitting device of the video signal transceiver system of the comparative example, the data volume of four pixel amounts equivalent to one unit amount of the Bayer arrangement in the YC data immediately before conversion to an analog signal is 64 bits.

[0145] That is, according to the video signal transceiver system 1 of the present embodiment, when transmitting a video signal with the same data volume as that of the video signal transceiver system of the comparative example, the data volume of the analog signal transmitted from the video signal transmitting device 10 can be made half of that of the video signal transceiver system of the comparative example.

[0146] Therefore, according to the video signal transceiver system 1 of the present embodiment, in the case of analog transmission of a video signal, it is possible to perform transmission and reception while suppressing image quality degradation.

[0147] In addition, according to the video signal transmitting device 10 of the present embodiment, in the case of analog transmission of a video signal, it is possible to perform transmission while suppressing image quality degradation.

[0148] In addition, according to the video signal relay device 20 of the present embodiment, in the case of analog transmission of a video signal, it is possible to receive an analog signal with suppressed image quality degradation.

[0149] In addition, in the above embodiment, the YC conversion unit 11 of the video signal transmitting device 10 is set to perform YC422 conversion, but as Figure 8A and Figure 8B shown, it may also be set to perform YC411 conversion.

[0150] Even when performing YC411 conversion, when transmitting a video signal with the same data volume as that of the video signal transceiver system in the comparative example, the data volume of the analog signal transmitted from the video signal transmitting device 10 can be made half of that of the video signal transceiver system in the comparative example.

[0151] In addition, when performing YC411 conversion, compared with the case of performing YC422 conversion, although the image quality deteriorates, the data volume of the analog signal transmitted from the video signal transmitting device 10 can be reduced to 24 bits.

[0152] In addition, regarding the YC conversion unit 11 of the video signal transmitting device 10, as Figure 9A and Figure 9B shown, it can also be set to perform YC444 conversion.

[0153] Even when performing YC444 conversion, when transmitting a video signal with the same data volume as that of the video signal transceiver system in the comparative example, the data volume of the analog signal transmitted from the video signal transmitting device 10 can be made half of that of the video signal transceiver system in the comparative example.

[0154] In addition, when performing YC444 conversion, compared with the case of performing YC422 conversion, although the data volume of the analog signal transmitted from the video signal transmitting device 10 increases to 48 bits, the image quality can be improved.

[0155] In addition, regarding the mode of YC conversion performed by the YC conversion unit 11, it can also be set to a mode other than the YC444 conversion, YC422 conversion, or YC411 conversion.

[0156] [Second Embodiment]

[0157] Next, the video signal transceiver system of the second embodiment will be described. The video signal transceiver system of this embodiment is different from the video signal transceiver system 1 of the first embodiment in the following aspects: the processing of the YC conversion unit 11 of the video signal transmitting device 10 and the processing of the RAW conversion unit 23 of the video signal relay device 20. In the video signal transceiver system of this embodiment, the same reference numerals are assigned to the same components as those in the video signal transceiver system 1 of the first embodiment, and the description will be omitted as long as there is no particular need.

[0158] Figure 10 It is a diagram for explaining signal degradation during analog transmission of the video signal transceiver system of the first embodiment.

[0159] When the RAW data generated by the Bayer - arranged imaging element 31 is YC - converted into YC data and analog - transmitted, as Figure 10As shown, if the luminance difference between the luminance of a line in a certain horizontal direction in the RAW data and the luminance of a line in the horizontal direction adjacent to the line in the vertical direction is large, a steep change in luminance is continuously generated in the YC data.

[0160] The reason for this phenomenon is that the green pixels with a high contribution to luminance are arranged in a staggered manner across two rows in the horizontal direction.

[0161] In the video signal transmitting device 10, if the YC data with such a continuously generated steep change in luminance is converted into an analog signal by the DAC 12, signal degradation is likely to occur. In addition, in the video signal relay device 20, when the analog signal with such a continuously generated steep change in luminance is converted into digital data by the ADC 22 to obtain YC data, signal degradation is also likely to occur.

[0162] As a result, in the video signal relay device 20, when RAW conversion is performed on the YC data to obtain RAW data, problems such as edge blurring and color bleeding at the boundary part may occur.

[0163] The video signal transceiver system of this embodiment has a structure for eliminating such problems. Figure 11 It is a diagram showing the functional structure of the YC conversion unit 11 of the video signal transmitting device 10 of this embodiment. The hardware structure of the YC conversion unit 11 is the same as that of the first embodiment. In addition, in the first embodiment, the YC conversion unit 11 only has the function of the arithmetic processing unit 11a, and the processing of the data order sorting unit 11b, which is a newly added function in this embodiment, is executed by the processor 76.

[0164] The YC conversion unit 11 of the video signal transmitting device 10 of this embodiment separates, for each of a plurality of units arranged adjacent to each other in the horizontal direction, into a first pixel Y data group in which the Y data of the first pixel of each of the plurality of units are continuously arranged, and a second pixel Y data group in which the Y data of the second pixel of each of the plurality of units are continuously arranged, and outputs them continuously in order as a signal in the horizontal direction starting from either Y data group. In addition, in this embodiment, as an example, the case where the above processing is performed for each of two units arranged adjacent to each other in the horizontal direction is described.

[0165] Specifically, as Figure 11 shown, the YC conversion unit 11 includes: an arithmetic processing unit 11a and a data order sorting unit 11b. For the YC conversion unit 11, RAW data is input in units of two rows in the horizontal direction.

[0166] The arithmetic processing unit 11a performs YC422 conversion on the input RAW data and generates YC data. Specifically, the YC conversion unit 11 converts each pixel block of the RAW data containing eight pixels of four pixels in the horizontal direction × two pixels in the vertical direction into YC data through YC422 conversion, and obtains YC data of four pixel amounts arranged in the horizontal direction. The YC data of four pixel amounts arranged in the horizontal direction includes the Y data of the first pixel (Y00 in the figure), the Y data of the second pixel (Y01 in the figure), the Y data of the third pixel (Y10 in the figure), and the Y data of the fourth pixel (Y11 in the figure) in one of the two rows in the horizontal direction in sequence from the head, and the Cb data (Cb0 in the figure) and Cr data (Cr0 in the figure) shared by the first pixel and the second pixel in the other row in the horizontal direction, and the Cb data (Cb1 in the figure) and Cr data (Cr1 in the figure) shared by the third pixel and the fourth pixel, these eight signals.

[0167] Regarding the method of YC422 conversion at this time, there is no particular limitation. For example, any method such as various existing conversion formulas or the following simple conversion formula can be used. In this embodiment, as an example, it is assumed that YC422 conversion is performed using the following simple conversion formula.

[0168] Y00 = G00

[0169] Y01 = G01

[0170] Y10 = G10

[0171] Y11 = G11

[0172] G0 = (G00 + G01) / 2

[0173] G1 = (G10 + G11) / 2

[0174] Y0 = (5G0 + 2R0 + B0) / 8

[0175] Y1 = (5G1 + 2R1 + B1) / 8

[0176] Cb0 = B0 - Y0

[0177] Cb1 = B1 - Y1

[0178] Cr0 = R0 - Y0

[0179] Cr1 = R1 - Y1

[0180] The data sequence sorting processing unit 11b separates the YC data generated by the arithmetic processing unit 11a into a Y data group of the first pixels of each of the multiple units arranged continuously (Y00 and Y10 in the figure) and a Y data group of the second pixels of each of the multiple units arranged continuously (Y01 and Y11 in the figure). These two Y data groups are output successively and continuously as the signal of one row in the horizontal direction starting from either of the Y data groups.

[0181] In addition, the data sequence sorting processing unit 11b does not sort the CbCr data but outputs it as the signal of another row in the horizontal direction.

[0182] The RAW conversion unit 23 of the video signal relay device 20 converts the digital data, i.e., YC data, output from the ADC 22 into RAW data by performing the reverse process of the YC conversion unit 11 of the video signal transmission device 10. Figure 12 It is a diagram showing the functional structure of the RAW conversion unit 23 of the video signal relay device 20 of the present embodiment. The hardware structure of the RAW conversion unit 23 is the same as that of the first embodiment. In addition, in the first embodiment, the RAW conversion unit 23 only has the function of the arithmetic processing unit 23b, and the processing of the data sequence reverse sorting processing unit 23a, which is a newly added function in the present embodiment, is executed by the processor 81.

[0183] As Figure 12 shown, the RAW conversion unit 23 includes: a data sequence reverse sorting processing unit 23a and an arithmetic processing unit 23b. The data sequence reverse sorting processing unit 23a performs a reverse sorting process on the input YC data, which is the opposite of the sorting process performed by the data sequence sorting processing unit 11b of the YC conversion unit 11. Next, the arithmetic processing unit 23b performs a conversion process on the YC data that has undergone the reverse sorting process, which is the opposite of the YC conversion process performed by the arithmetic processing unit 11a of the YC conversion unit 11, to obtain RAW data.

[0184] Next, the effects of the video signal transceiver system of the present embodiment will be described. Figure 13 It is a diagram showing the change state of the signal state when the video signal transmission device 10 of the present embodiment transmits a video signal to the video signal relay device 20.

[0185] As Figure 13As shown, in the video signal transceiver system of the present embodiment, data is sorted so that for each of two units arranged adjacent to each other in the horizontal direction in YC data, it is separated into a Y data group of the first pixels of each of the multiple units arranged continuously and a Y data group of the second pixels of each of the multiple units arranged continuously. These two Y data groups are then output successively and continuously as signals in the horizontal direction starting from either one of the Y data groups.

[0186] As a result, the number of steep changes in luminance is reduced, and the high-frequency components of the Y data are reduced. Therefore, in the digital-to-analog conversion performed by the DAC 12 of the video signal transmitting device 10 and the analog-to-digital conversion performed by the ADC 22 of the video signal relay device 20, signal degradation is less likely to occur.

[0187] As a result, in the video signal relay device 20, when RAW data is obtained by performing RAW conversion on YC data, blurring of edges and bleeding at the boundary portion can be suppressed, thereby improving the image quality.

[0188] In addition, in the present embodiment, as an example, the YC conversion unit 11 and the RAW conversion unit 23 perform the above processing for each of two units arranged adjacent to each other in the horizontal direction, but the data sorting process and the reverse sorting process may also be performed for each of three or more multiple units arranged adjacent to each other in the horizontal direction.

[0189] [Third Embodiment]

[0190] Next, the video signal transceiver system of the third embodiment will be described. The video signal transceiver system of the present embodiment is different from the video signal transceiver system 1 of the second embodiment in the following aspects: In the processing of the YC conversion unit 11 of the video signal transmitting device 10 and the processing of the RAW conversion unit 23 of the video signal relay device 20, data sorting processing and reverse sorting processing are performed for each of all the units arranged adjacent to each other in the horizontal direction of the YC data.

[0191] In the video signal transceiver system of the present embodiment, the same reference numerals are assigned to the same components as those in the video signal transceiver system 1 of the second embodiment, and the description thereof will be omitted as long as there is no particular need.

[0192] Hereinafter, the data sorting process of the YC data of the video signal transceiver system of the present embodiment will be described. Figure 14 This is a diagram for explaining the data sorting process of the YC data of the video signal transceiver system of the present embodiment.

[0193] For each of all the units arranged adjacent to each other in the horizontal direction, the YC conversion unit 11 of the video signal transmission device 10 according to this embodiment separates into two Y data groups: a Y data group of the first pixels in which the Y data of the respective first pixels of the multiple units are continuously arranged, and a Y data group of the second pixels in which the Y data of the respective second pixels of the multiple units are continuously arranged, and sequentially outputs the data continuously as a signal in the horizontal direction starting from any one of the Y data groups.

[0194] Specifically, the YC conversion unit 11 includes: an arithmetic processing unit 11a and a data order sorting processing unit 11b. For the YC conversion unit 11, RAW data is input in units of two rows in the horizontal direction.

[0195] The arithmetic processing unit 11a performs YC422 conversion on the input RAW data to generate YC data. Regarding the method of YC422 conversion at this time, there is no particular limitation. For example, any method such as various existing conversion formulas or the following simple conversion formula can be used. In this embodiment, as an example, it is assumed that YC422 conversion is performed using the following simple conversion formula. In addition, "n" is the total number of all the units arranged adjacent to each other in the horizontal direction.

[0196] Y00 = G00

[0197] Y01 = G01

[0198] G0 = (G00 + G01) / 2

[0199] Y0 = (5G0 + 2R0 + B0) / 8

[0200] Cb0 = B0 - Y0

[0201] Cr0 = R0 - Y0

[0202] ·

[0203] ·

[0204] ·

[0205] Yn0 = Gn0

[0206] Yn1 = Gn1

[0207] Gn = (Gn0 + Gn1) / 2

[0208] Yn = (5Gn + 2Rn + Bn) / 8

[0209] Cbn = Bn - Yn

[0210] Crn = Rn - Yn

[0211] The data sequence sorting processing unit 11b separates the YC data generated by the arithmetic processing unit 11a into a Y data group of the first pixels (in the figure, Y00 to Yn0) in which the Y data of the respective first pixels of multiple units are continuously arranged, and a Y data group of the second pixels (in the figure, Y01 to Yn1) in which the Y data of the respective second pixels of multiple units are continuously arranged. These two Y data groups are output successively and continuously as a signal for one row in the horizontal direction starting from either of the Y data groups.

[0212] In addition, the data sequence sorting processing unit 11b does not sort the CbCr data, but outputs it as a signal for another row in the horizontal direction.

[0213] The RAW conversion unit 23 of the video signal relay device 20 converts the digital data output from the ADC 22 into RAW data by performing the reverse process of the YC conversion unit 11 of the video signal transmission device 10.

[0214] In this way, by performing data sorting processing and reverse sorting processing for each of all the units arranged adjacent to each other in the horizontal direction for YC data, compared with the case of performing data sorting processing and reverse sorting processing for each of a part of the units arranged adjacent to each other in the horizontal direction for YC data, the number of steep changes in luminance is further reduced, and the high-frequency components of the Y data are reduced. Therefore, in the digital-to-analog conversion performed by the DAC 12 of the video signal transmission device 10 and the analog-to-digital conversion performed by the ADC 22 of the video signal relay device 20, it is more difficult for signal degradation to occur.

[0215] As a result, in the video signal relay device 20, when converting YC data to obtain RAW data, it is possible to further suppress edge blurring and color bleeding at the boundary part, thereby further improving the image quality.

[0216] [Modification Example]

[0217] Above, the video signal transceiver system 1 of the embodiment of the present disclosure has been described. However, the present disclosure is not limited to the above-described embodiment. In addition to the above content, within the scope not departing from the technical gist of the present disclosure, the above-described recorded content and illustrated content can be appropriately changed by deleting unnecessary parts, adding new elements, or performing replacements, etc.

[0218] For example, in the RGB conversion unit 24 of the video signal relay device 20, when performing RGB conversion on RAW data, RGB conversion may be performed without performing demosaicing processing.

[0219] In addition, as Figure 15As shown, in the video signal relay device 20, the RGB conversion unit 24 may also be constituted by an integrated circuit IC2 different from the integrated circuit IC1 constituting the receiving unit 21, the ADC 22, and the RAW conversion unit 23.

[0220] In addition, as Figure 16 shown, the video signal transceiver system 1 may also include: a camera module device 50 formed by integrating the camera 30 and the video signal transmission device 10; and a display module device 60 formed by integrating the video signal relay device 20 and the display device 40.

[0221] In addition, as Figure 17 shown, the display module device 60 may also output the signal output from the video signal relay device 20 to the display device 40 and the storage medium 41. In addition, the display module device 60 may also output the signal output from the video signal relay device 20 only to the storage medium 41.

[0222] As the storage medium 41, for example, any medium such as a read only memory (ROM), a random access memory (RAM), a flash memory, a universal serial bus (USB) memory, a solid state drive (SSD), or a hard disk drive (HDD) may be used.

[0223] [Supplementary Note]

[0224] Hereinafter, preferred embodiments of the present disclosure are noted.

[0225] (Supplementary Note 1)

[0226] A video signal transmission device includes:

[0227] a YC conversion unit, which is input with RAW data output from an imaging element by performing shooting, converts the RAW data into YC data including luminance data, first color difference data, and second color difference data, and outputs the YC data;

[0228] a digital-to-analog conversion unit, which converts the YC data output from the YC conversion unit into an analog signal and outputs the analog signal; and

[0229] an analog transmission unit, which transmits the analog signal converted by the digital-to-analog conversion unit to the outside.

[0230] (Supplementary Note 2)

[0231] The video signal transmission device according to Supplementary Note 1, wherein

[0232] The RAW data is video data in which one red pixel, one blue pixel, and two green pixels are set as one unit.

[0233] For each of the units, the YC conversion unit converts the input RAW data into first luminance data, second luminance data, first color difference data, and second color difference data, separates the converted data into a luminance data group and a color difference data group, and sequentially outputs the separated luminance data group and color difference data group as YC data to the digital-to-analog conversion unit.

[0234] (Supplementary Note 3)

[0235] The video signal transmitting device according to Supplementary Note 2, wherein

[0236] The YC conversion unit serializes and outputs the separated luminance data group and color difference data group respectively. The YC conversion unit includes a data sequence sorting processing unit, and the data sequence sorting processing unit sorts and serializes the data sequences of the first luminance data and the second luminance data between the specified units.

[0237] (Supplementary Note 4)

[0238] The video signal transmitting device according to any one of Supplementary Notes 1 to 3, wherein

[0239] The YC conversion unit converts the RAW data into YC data in YC422 format.

[0240] (Supplementary Note 5)

[0241] The video signal transmitting device according to any one of Supplementary Notes 1 to 4, wherein

[0242] The YC conversion unit uses the RAW clock corresponding to the signal interval of the RAW data and the YC clock with a frequency that is 1 / 2 times that of the RAW clock to convert the RAW data into YC data in YC422 format.

[0243] (Supplementary Note 6)

[0244] A video signal relay device, comprising:

[0245] A receiving unit that receives an analog signal transmitted from the video signal transmitting device according to Supplementary Note 1;

[0246] An analog-to-digital conversion unit that converts the analog signal received by the receiving unit into YC data and outputs it; and

[0247] A RAW conversion unit that converts the YC data output from the analog-to-digital conversion unit into RAW data and outputs it.

[0248] (Supplementary Note 7)

[0249] The video signal relay device according to Supplementary Note 6, wherein,

[0250] The RAW conversion unit includes a data order reverse sorting processing unit that rearranges the luminance data into the data order before sorting when the data order of the luminance data of the YC data is sorted, and converts the YC data rearranged by the data order reverse sorting processing unit into RAW data.

[0251] (Supplementary Note 8)

[0252] The video signal relay device according to Supplementary Note 6 or 7, wherein,

[0253] The RAW conversion unit converts the YC data output from the analog-to-digital conversion unit into RAW data and outputs it using the RAW clock corresponding to the signal pitch of the RAW data and the YC clock with a frequency that is 1 / 2 times that of the RAW clock.

[0254] (Supplementary Note 9)

[0255] The video signal relay device according to any one of Supplementary Notes 6 to 8 further includes an RGB conversion unit,

[0256] The RGB conversion unit converts the RAW data output from the RAW conversion unit into RGB data and outputs it.

[0257] (Supplementary Note 10)

[0258] The video signal relay device according to Supplementary Note 9, wherein,

[0259] The RGB conversion unit performs demosaicing processing when converting RAW data into RGB data.

[0260] (Supplementary Note 11)

[0261] The video signal relay device according to Supplementary Note 9 or 10, wherein,

[0262] When YC data in YC422 format is output from the analog-to-digital conversion unit,

[0263] The RAW conversion unit converts the YC data in YC422 format into RAW data in RAW8 format,

[0264] The RGB conversion unit converts the RAW data in RAW8 format into RGB data in RGB888 format.

[0265] (Supplementary Note 12)

[0266] The video signal relay device according to any one of Appendices 9 to 11, wherein,

[0267] The RGB conversion unit is constituted by an integrated circuit different from the integrated circuits constituting the receiving unit, the analog-digital conversion unit, and the RAW conversion unit.

[0268] (Appendix 13)

[0269] A video signal transceiver system, comprising:

[0270] A camera having the imaging element;

[0271] The video signal transmission device according to any one of Appendices 1 to 5;

[0272] The video signal relay device according to any one of Appendices 6 to 12; and

[0273] A display device that displays a video based on a signal output from the video signal relay device.

[0274] (Appendix 14)

[0275] The video signal transceiver system according to Appendix 13, comprising:

[0276] A camera module device formed by integrating the camera and the video signal transmission device; and

[0277] A display module device formed by integrating the video signal relay device and the display device.

[0278] (Appendix 15)

[0279] The video signal transceiver system according to Appendix 14, wherein,

[0280] The display module device outputs the signal output from the video signal relay device to a storage medium.

Claims

1. A video signal transmitting device, comprising: a YC conversion unit, which is input with RAW data output from an imaging element through shooting, converts the RAW data into YC data including luminance data, first color difference data, and second color difference data, and outputs the YC data; a digital-to-analog conversion unit, which converts the YC data output from the YC conversion unit into an analog signal and outputs the analog signal; and an analog transmission unit, which transmits the analog signal converted by the digital-to-analog conversion unit to the outside.

2. The video signal transmitting device according to claim 1, wherein the RAW data is video data in which one red pixel, one blue pixel, and two green pixels are set as one unit, the YC conversion unit converts the input RAW data into first luminance data, second luminance data, first color difference data, and second color difference data for each of the units, separates the converted data into a luminance data group and a color difference data group, and sequentially outputs the separated luminance data group and color difference data group as YC data to the digital-to-analog conversion unit.

3. The video signal transmitting device according to claim 2, wherein the YC conversion unit serializes and outputs the separated luminance data group and color difference data group respectively, and the YC conversion unit includes a data order sorting processing unit, which sorts and serializes the data order of the first luminance data and the second luminance data between the specified units.

4. The video signal transmitting device according to claim 1, wherein the YC conversion unit converts the RAW data into YC data in YC422 format.

5. The video signal transmitting device according to claim 1, wherein the YC conversion unit uses a RAW clock corresponding to the signal interval of the RAW data and a YC clock with a frequency that is 1 / 2 times that of the RAW clock to convert the RAW data into YC data in YC422 format.

6. A video signal relaying device, comprising: a receiving unit, which receives an analog signal transmitted from the video signal transmitting device according to claim 1; a analog-to-digital conversion unit, which converts the analog signal received by the receiving unit into YC data and outputs the YC data; and a RAW conversion unit, which converts the YC data output from the analog-to-digital conversion unit into RAW data and outputs the RAW data.

7. The video signal relaying device according to claim 6, wherein the RAW conversion unit includes a data order reverse sorting processing unit that rearranges the luminance data into the data order before sorting when the data order of the luminance data of the YC data is sorted, and converts the YC data rearranged by the data order reverse sorting processing unit into RAW data.

8. The video signal relaying device according to claim 6, wherein the RAW conversion unit uses a RAW clock corresponding to the signal interval of the RAW data and a YC clock with a frequency that is 1 / 2 times that of the RAW clock to convert the YC data output from the analog-to-digital conversion unit into RAW data and outputs the RAW data.

9. The video signal relay device according to claim 6 further includes an RGB conversion unit, wherein the RGB conversion unit converts the RAW data output from the RAW conversion unit into RGB data and outputs the RGB data.

10. The video signal relay device according to claim 9, wherein the RGB conversion unit performs demosaicing when converting RAW data into RGB data.

11. The video signal relay device according to claim 9, wherein when YC data in YC422 format is output from the analog-to-digital conversion unit, the RAW conversion unit converts the YC data in YC422 format into RAW data in RAW8 format, and the RGB conversion unit converts the RAW data in RAW8 format into RGB data in RGB888 format.

12. The video signal relay device according to claim 9, wherein the RGB conversion unit is constituted by an integrated circuit different from the integrated circuits constituting the receiving unit, the analog-to-digital conversion unit, and the RAW conversion unit.

13. A video signal transceiver system includes: a camera having an imaging element; the video signal transmitting device according to claim 1; the video signal relay device according to claim 6; and a display device that displays a video based on a signal output from the video signal relay device.

14. The video signal transceiver system according to claim 13 includes: a camera module device formed by integrating the camera and the video signal transmitting device; and a display module device formed by integrating the video signal relay device and the display device.

15. The video signal transceiver system according to claim 14, wherein the display module device outputs the signal output from the video signal relay device to a storage medium.

Images