Laminated ceramic electronic component

Abstract

Provided is a highly reliable laminated ceramic electronic component capable of suppressing the occurrence of cracks in a laminate of the laminated ceramic electronic component. A multilayer ceramic capacitor (1) is provided with an external electrode (40) having: a first external electrode (40A) having a first base electrode layer (50A), a first organic layer (70A), and a first plating layer (60A) from the lower layer; and a second external electrode (40B) having, from the lower layer, a second base electrode layer (50B), a second organic layer (70B), and a second plating layer (60B), the surface of the first organic layer (70A) being formed so as to expose a part of the surface of the first base electrode layer (50A), the surface of the second organic layer (70B) being formed so as to expose a part of the surface of the second base electrode layer (50B), and in the surface of the first organic layer (70A), the surface of the second organic layer (70B) being formed so as to expose a part of the surface of the second plating layer (60B). In the surface of the first organic layer (70A), the atomic percentage of the main component metal of the first base electrode layer (50A) is 4.0 atom% or less, and in the surface of the second organic layer (70B), the atomic percentage of the main component metal of the second base electrode layer (50B) is 4.0 atom% or less.

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic electronic component. Background Art

[0002] Conventionally, a multilayer ceramic capacitor as a multilayer ceramic electronic component has been known. Generally, a multilayer ceramic capacitor includes: a laminate in which a plurality of dielectric layers and internal electrode layers are alternately laminated; and external electrodes that are connected to the internal electrode layers and are provided on both end faces of the laminate. For example, Patent Document 1 discloses a multilayer ceramic capacitor having the above-described configuration, and a terminal electrode serving as an external electrode is composed of a metal component and an inorganic binder material, and a plurality of voids are formed therein.

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: Japanese Patent Laid-Open No. 5-3132 Summary of the Invention

[0006] Problems to be Solved by the Invention

[0007] In the multilayer ceramic capacitor of Patent Document 1, the terminal electrode has voids. Therefore, external stress can be alleviated, and generation of cracks inside the capacitor can be suppressed. Thereby, the reliability of the multilayer ceramic capacitor can be improved. However, in recent years, higher reliability has been required, and further countermeasures have been demanded.

[0008] An object of the present invention is to provide a highly reliable multilayer ceramic electronic component capable of suppressing generation of cracks in a laminate of the multilayer ceramic electronic component.

[0009] Means for Solving the Problems

[0010] The multilayer ceramic electronic component according to the present invention includes: a laminate including a plurality of ceramic layers and a plurality of internal conductor layers laminated alternately, and having a first main surface and a second main surface facing each other in a height direction, a first side surface and a second side surface facing each other in a width direction orthogonal to the height direction, and a first end surface and a second end surface facing each other in a length direction orthogonal to the height direction and the width direction; and external electrodes connected to the internal conductor layers, the external electrodes having a first external electrode disposed on the first end surface and a second external electrode disposed on the second end surface, the first external electrode having a first base electrode layer disposed on the first end surface, a first organic layer disposed on the first base electrode layer, and a first plating layer disposed on the first organic layer, the second external electrode having a second base electrode layer disposed on the second end surface, a second organic layer disposed on the second base electrode layer, and a second plating layer disposed on the second organic layer, the surface of the first organic layer being formed to expose a part of the first base electrode layer, the surface of the second organic layer being formed to expose a part of the second base electrode layer, in the surface of the first organic layer, the atomic percentage of the main component metal of the first base electrode layer being 4.0 atom% or less, and in the surface of the second organic layer, the atomic percentage of the main component metal of the second base electrode layer being 4.0 atom% or less.

[0011] Advantages of the Invention

[0012] According to the present invention, it is possible to provide a highly reliable multilayer ceramic electronic component capable of suppressing cracks from occurring in the laminate of the multilayer ceramic electronic component. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is an external perspective view of a multilayer ceramic capacitor according to a first embodiment.

[0014] Figure 2 is Figure 1 a cross-sectional view taken along line II-II of

[0015] Figure 3 is Figure 2 a cross-sectional view taken along line III-III of

[0016] Figure 4A is Figure 2 a cross-sectional view taken along line IVA-IVA of

[0017] Figure 4B is Figure 2 a cross-sectional view taken along line IVB-IVB of

[0018] Figure 5 is Figure 2An enlarged cross-sectional view of the portion shown by R.

[0019] Figure 6 It is a diagram showing a multilayer ceramic capacitor having a two-layer structure.

[0020] Figure 7 It is a diagram showing a multilayer ceramic capacitor having a three-layer structure.

[0021] Figure 8 It is a diagram showing a multilayer ceramic capacitor having a four-layer structure.

[0022] Figure 9 It is equivalent to that in the modified example Figure 2 Cross-sectional view.

[0023] Figure 10A It is equivalent to that in the modified example Figure 4A Cross-sectional view.

[0024] Figure 10B It is equivalent to that in the modified example Figure 4B Cross-sectional view.

[0025] Figure 11 It is an external perspective view of the multilayer ceramic capacitor according to the second embodiment.

[0026] Figure 12 It is equivalent to that in the second embodiment Figure 4A Cross-sectional view.

[0027] Figure 13 It is equivalent to that in the second embodiment Figure 4B Cross-sectional view. Detailed implementation mode

[0028] <First Embodiment>

[0029] Hereinafter, the multilayer ceramic capacitor 1 as a multilayer ceramic electronic component according to the first embodiment of the present disclosure will be described using Figures 1 to 5 is an external perspective view of the multilayer ceramic capacitor 1 according to the first embodiment. Figure 1 is Figure 2 is Figure 1 Cross-sectional view taken along line II-II. Figure 3 is Figure 2 Cross-sectional view taken along line III-III. Figure 4A is Figure 2 Cross-sectional view taken along line IVA-IVA. Figure 4B is Figure 2 Cross-sectional view taken along line IVB-IVB. Figure 5 is Figure 2 An enlarged cross-sectional view of the portion shown by R.

[0030] As Figure 1As shown, the multilayer ceramic capacitor 1 according to the first embodiment has a substantially rectangular parallelepiped shape. The multilayer ceramic capacitor 1 includes: a laminate 10 having a substantially rectangular parallelepiped shape; and a pair of external electrodes 40 separately disposed at both end portions of the laminate 10.

[0031] In Figure 1 , the arrow T indicates the lamination direction of the multilayer ceramic capacitor 1 and the laminate 10. This lamination direction T is also the thickness direction and the height direction of the multilayer ceramic capacitor 1 and the laminate 10. In Figure 1 , the arrow L indicates the length direction of the multilayer ceramic capacitor 1 and the laminate 10 that is orthogonal to the lamination direction T. In Figure 1 , the arrow W indicates the width direction of the multilayer ceramic capacitor 1 and the laminate 10 that is orthogonal to the lamination direction T and the length direction L. The pair of external electrodes 40 are respectively disposed at one end portion and the other end portion in the length direction L of the laminate 10.

[0032] In Figures 1 to 4B , an XYZ orthogonal coordinate system is shown. The length direction L of the multilayer ceramic capacitor 1 and the laminate 10 corresponds to the X direction. The width direction W of the multilayer ceramic capacitor 1 and the laminate 10 corresponds to the Y direction. The lamination direction T of the multilayer ceramic capacitor 1 and the laminate 10 corresponds to the Z direction. Here, Figure 2 The cross-section shown is also referred to as the LT cross-section. Figure 3 The cross-section shown is also referred to as the WT cross-section. Figure 4A And Figure 4B The cross-section shown is also referred to as the LW cross-section.

[0033] As Figures 1 to 4B shown, the laminate 10 includes a first main surface TS1 and a second main surface TS2 that are opposite in the lamination direction T, a first end surface LS1 and a second end surface LS2 that are opposite in the length direction L orthogonal to the lamination direction T, and a first side surface WS1 and a second side surface WS2 that are opposite in the width direction W orthogonal to the lamination direction T and the length direction L.

[0034] As Figure 1 shown, the laminate 10 has a substantially rectangular parallelepiped shape. In addition, the dimension in the length direction L of the laminate 10 is not necessarily required to be longer than the dimension in the width direction W. It is preferable to have rounded corners at the corners and ridge lines of the laminate 10. The corner is the part where three surfaces of the laminate intersect, and the ridge line is the part where two surfaces of the laminate intersect. In addition, unevenness or the like may be formed on a part or all of the surface constituting the laminate 10.

[0035] The size of the laminate 10 is not particularly limited. If the size in the length direction L of the laminate 10 is defined as the L dimension, the L dimension is preferably 0.2 mm or more and 10 mm or less. In addition, if the size in the stacking direction T of the laminate 10 is defined as the T dimension, the T dimension is preferably 0.1 mm or more and 10 mm or less. In addition, if the size in the width direction W of the laminate 10 is defined as the W dimension, the W dimension is preferably 0.1 mm or more and 10 mm or less.

[0036] As Figure 2 and Figure 3 shown, the laminate 10 has an inner layer portion 11, a first main surface side outer layer portion 12, and a second main surface side outer layer portion 13 that are arranged to sandwich the inner layer portion 11 in the stacking direction T.

[0037] The inner layer portion 11 includes a plurality of dielectric layers 20 as a plurality of ceramic layers and a plurality of internal electrode layers 30 as a plurality of internal conductor layers, which are alternately stacked in the stacking direction T. The inner layer portion 11 includes, in the stacking direction T, the internal electrode layer 30 located closest to the first main surface TS1 side to the internal electrode layer 30 located closest to the second main surface TS2 side. In the inner layer portion 11, the plurality of internal electrode layers 30 are arranged to face each other with the dielectric layer 20 interposed therebetween. The inner layer portion 11 is a portion that generates capacitance and substantially functions as a capacitor.

[0038] The plurality of dielectric layers 20 are made of a dielectric material. The dielectric material can be, for example, a dielectric ceramic containing components such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3. In addition, the dielectric material can also be a material in which auxiliary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, or Ni compounds are added to these main components. The dielectric material is particularly preferably a material containing BaTiO3 as the main component.

[0039] The thickness of the dielectric layer 20 is preferably 0.5 μm or more and 15 μm or less. The number of sheets of the stacked dielectric layers 20 is preferably 10 sheets or more and 700 sheets or less. In addition, the number of sheets of the dielectric layer 20 is the total number of the number of sheets of the dielectric layer 20 in the inner layer portion 11 and the number of sheets of the dielectric layer 20 in each of the first main surface side outer layer portion 12 and the second main surface side outer layer portion 13.

[0040] The plurality of internal electrode layers 30 include a plurality of first internal electrode layers 31 as the plurality of first internal conductor layers and a plurality of second internal electrode layers 32 as the plurality of second internal conductor layers. The first internal electrode layers 31 and the second internal electrode layers 32 are alternately arranged in the stacking direction T with the dielectric layer 20 interposed therebetween. The first internal electrode layer 31 is led out to the first end face LS1. The second internal electrode layer 32 is led out to the second end face LS2. In addition, hereinafter, when explaining without distinguishing between the first internal electrode layer 31 and the second internal electrode layer 32, the first internal electrode layer 31 and the second internal electrode layer 32 may be collectively referred to as the internal electrode layer 30.

[0041] As Figure 4A shown, the first internal electrode layer 31 has a first opposed portion 31A and a first lead-out portion 31B. The first opposed portion 31A is a region that opposes the second internal electrode layer 32 with the dielectric layer 20 interposed therebetween and is located inside the laminate 10. The first lead-out portion 31B is a portion that is led out from the first opposed portion 31A to the first end face LS1 and is exposed on the first end face LS1.

[0042] As Figure 4B shown, the second internal electrode layer 32 has a second opposed portion 32A and a second lead-out portion 32B. The second opposed portion 32A is a region that opposes the first internal electrode layer 31 with the dielectric layer 20 interposed therebetween and is located inside the laminate 10. The second lead-out portion 32B is a portion that is led out from the second opposed portion 32A to the second end face LS2 and is exposed on the second end face LS2.

[0043] In the present embodiment, the first opposed portion 31A and the second opposed portion 32A oppose each other with the dielectric layer 20 interposed therebetween, thereby forming a capacitance and exhibiting the characteristics of a capacitor.

[0044] The shapes of the first opposed portion 31A and the second opposed portion 32A are not particularly limited, but a rectangular shape is preferred. However, rounded corners may be formed at the corner portions of the rectangular shape, or the corner portions of the rectangular shape may be formed obliquely. The shapes of the first lead-out portion 31B and the second lead-out portion 32B are not particularly limited, but a rectangular shape is preferred. However, rounded corners may be formed at the corner portions of the rectangular shape, or the corner portions of the rectangular shape may be formed obliquely.

[0045] The dimensions of the first opposed portion 31A in the width direction W and the dimensions of the first lead-out portion 31B in the width direction W may be formed to have the same dimensions, or the dimensions of either one may be made smaller. The dimensions of the second opposed portion 32A in the width direction W and the dimensions of the second lead-out portion 32B in the width direction W may be formed to have the same dimensions, or the dimensions of either one may be made narrower.

[0046] The first internal electrode layer 31 and the second internal electrode layer 32 are made of a suitable conductive material such as metals like Ni, Cu, Ag, Pd, Au, or an alloy containing at least one of these metals. In the case of using an alloy, the first internal electrode layer 31 and the second internal electrode layer 32 may also be made of, for example, an Ag-Pd alloy or the like.

[0047] The thickness of each of the first internal electrode layer 31 and the second internal electrode layer 32 is preferably 0.2 μm or more and 2.0 μm or less. The total number of sheets of the first internal electrode layer 31 and the second internal electrode layer 32 is preferably 10 sheets or more and 700 sheets or less.

[0048] As Figure 2 and Figure 3 shown, the first main surface side outer layer portion 12 is located on the side of the first main surface TS1 of the laminate 10. The first main surface side outer layer portion 12 is an aggregate of a plurality of dielectric layers 20 located between the first main surface TS1 and the internal electrode layer 30 closest to the first main surface TS1. On the other hand, the second main surface side outer layer portion 13 is located on the side of the second main surface TS2 of the laminate 10. The second main surface side outer layer portion 13 is an aggregate of a plurality of dielectric layers 20 located between the second main surface TS2 and the internal electrode layer 30 closest to the second main surface TS2. The dielectric layers 20 used in the first main surface side outer layer portion 12 and the second main surface side outer layer portion 13 can be the same as the dielectric layers 20 used in the inner layer portion 11.

[0049] In addition, the laminate 10 has an opposed electrode portion 11E. The opposed electrode portion 11E is a portion where the first opposed portion 31A of the first internal electrode layer 31 and the second opposed portion 32A of the second internal electrode layer 32 are opposed. The opposed electrode portion 11E is configured as a part of the inner layer portion 11. In Figure 4A and Figure 4B , the ranges in the width direction W and the length direction L of the opposed electrode portion 11E are shown. In addition, the opposed electrode portion 11E is also referred to as a capacitor effective portion.

[0050] In addition, the laminate 10 has a side surface side outer layer portion. The side surface side outer layer portion has a first side surface side outer layer portion WG1 and a second side surface side outer layer portion WG2. The first side surface side outer layer portion WG1 is a portion containing the dielectric layer 20 located between the opposed electrode portion 11E and the first side surface WS1. The second side surface side outer layer portion WG2 is a portion containing the dielectric layer 20 located between the opposed electrode portion 11E and the second side surface WS2. In Figure 3 , Figure 4A and Figure 4B , the ranges in the width direction W of the first side surface side outer layer portion WG1 and the second side surface side outer layer portion WG2 are shown. In addition, the side surface side outer layer portion is also referred to as a W interval or a side interval.

[0051] In addition, the laminate 10 has an end face side outer layer portion. The end face side outer layer portion has a first end face side outer layer portion LG1 and a second end face side outer layer portion LG2. The first end face side outer layer portion LG1 is a portion located between the opposed electrode portion 11E and the first end face LS1, and includes the dielectric layer 20 and the first lead portion 31B. That is, the first end face side outer layer portion LG1 is an aggregate of the portions of the plurality of dielectric layers 20 on the first end face LS1 side and the plurality of first lead portions 31B. The second end face side outer layer portion LG2 is a portion located between the opposed electrode portion 11E and the second end face LS2, and includes the dielectric layer 20 and the second lead portion 32B. That is, the second end face side outer layer portion LG2 is an aggregate of the portions of the plurality of dielectric layers 20 on the second end face LS2 side and the plurality of second lead portions 32B. In Figure 2 , Figure 4A and Figure 4B , the ranges in the length direction L of the first end face side outer layer portion LG1 and the second end face side outer layer portion LG2 are shown. In addition, the end face side outer layer portion is also referred to as an L interval or an end interval.

[0052] As Figure 1 and Figure 2 shown, the external electrode 40 has a first external electrode 40A disposed on the first end face LS1 side of the laminate 10 and a second external electrode 40B disposed on the second end face LS2 side of the laminate 10.

[0053] In addition, the basic structures of the first external electrode 40A and the second external electrode 40B are the same. Further, the first external electrode 40A and the second external electrode 40B have a substantially mirror-symmetrical shape with respect to the WT cross-section at the center in the length direction L of the multilayer ceramic capacitor 1. Therefore, hereinafter, when explaining without distinguishing between the first external electrode 40A and the second external electrode 40B, the first external electrode 40A and the second external electrode 40B may be collectively referred to as the external electrode 40.

[0054] The first external electrode 40A is disposed on the first end face LS1. The first external electrode 40A is in contact with the first lead portions 31B of the plurality of first internal electrode layers 31 exposed on the first end face LS1. Thereby, the first external electrode 40A is electrically connected to the plurality of first internal electrode layers 31. The first external electrode 40A may also be disposed on a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2. In the present embodiment, the first external electrode 40A is formed to extend from the first end face LS1 to a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2.

[0055] The second external electrode 40B is disposed on the second end face LS2. The second external electrode 40B is in contact with the second lead portions 32B of the plurality of second internal electrode layers 32 exposed on the second end face LS2. Thereby, the second external electrode 40B is electrically connected to the plurality of second internal electrode layers 32. The second external electrode 40B may also be disposed on a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2. In the present embodiment, the second external electrode 40B is formed to extend from the second end face LS2 to a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2.

[0056] As described above, in the laminate 10, the first opposing portion 31A of the first internal electrode layer 31 and the second opposing portion 32A of the second internal electrode layer 32 oppose each other with the dielectric layer 20 therebetween, thereby forming a capacitor. Therefore, between the first external electrode 40A connected to the first internal electrode layer 31 and the second external electrode 40B connected to the second internal electrode layer 32, the characteristics of a capacitor are exhibited.

[0057] As Figure 2 , Figure 4A , Figure 4B shown, the first external electrode 40A includes a first base electrode layer 50A, a first organic layer 70A disposed on the first base electrode layer 50A, and a first plating layer 60A disposed on the first organic layer 70A. In addition, the second external electrode 40B includes a second base electrode layer 50B, a second organic layer 70B disposed on the second base electrode layer 50B, and a second plating layer 60B disposed on the second organic layer 70B.

[0058] The first base electrode layer 50A is disposed on the first end face LS1. The first base electrode layer 50A is connected to the first lead portions 31B of the plurality of first internal electrode layers 31 exposed on the first end face LS1. In the present embodiment, the first base electrode layer 50A is formed to extend from the first end face LS1 to a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2.

[0059] The second base electrode layer 50B is disposed on the second end face LS2. The second base electrode layer 50B is in contact with the second lead portions 32B of the plurality of second internal electrode layers 32 exposed on the second end face LS2. In the present embodiment, the second base electrode layer 50B is formed to extend from the second end face LS2 to a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2.

[0060] The first base electrode layer 50A and the second base electrode layer 50B of the present embodiment are sintered layers. The sintered layer preferably contains either a metal component and a glass component or a ceramic component, or contains both. The metal component, for example, contains at least one selected from Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The glass component, for example, contains at least one selected from B, Si, Ba, Mg, Al, Li, etc. The ceramic component can use the same type of ceramic material as the dielectric layer 20 or a different type of ceramic material from the dielectric layer 20. The ceramic component, for example, contains at least one selected from BaTiO3, CaTiO3, (Ba, Ca)TiO3, SrTiO3, CaZrO3, etc. The main component metal of the first base electrode layer 50A and the main component metal of the second base electrode layer 50B are preferably Cu.

[0061] The sintered layer is, for example, a sintered layer formed by applying a conductive paste containing glass and metal to the laminate 10 and sintering it. The sintered layer can be formed by simultaneously sintering the raw material of the laminate 10 having a plurality of internal electrodes and dielectric layers, that is, the laminate sheet before firing and the conductive paste applied to the laminate sheet. Alternatively, it can also be formed by applying a conductive paste to the laminate 10 after obtaining the laminate 10 by firing the laminate sheet and then sintering it. In addition, in the case of the above formation method, the sintered layer is preferably formed by sintering a paste in which a ceramic material is added instead of the glass component. In this case, as the added ceramic material, it is particularly preferable to use the same type of ceramic material as the dielectric layer 20. In addition, the sintered layer can also be a plurality of layers.

[0062] Regarding the thickness corresponding to the length direction L of the first base electrode layer 50A located on the first end face LS1, in the central portion in the stacking direction T and the width direction W of the first base electrode layer 50A, for example, it is preferably on the order of 2 μm or more and 220 μm or less.

[0063] Regarding the thickness corresponding to the length direction L of the second base electrode layer 50B located on the second end face LS2, in the central portion in the stacking direction T and the width direction W of the second base electrode layer 50B, for example, it is preferably on the order of 2 μm or more and 220 μm or less.

[0064] When the first base electrode layer 50A is also provided on a part of at least one of the first main surface TS1 and the second main surface TS2, regarding the thickness corresponding to the stacking direction T of the first base electrode layer 50A provided on this part, in the central portion in the length direction L and the width direction W of the first base electrode layer 50A provided on this part, for example, it is preferably on the order of 4 μm or more and 15 μm or less.

[0065] When a part of at least one of the first side surface WS1 and the second side surface WS2 is also provided with the first base electrode layer 50A, with respect to the thickness corresponding to the width direction W of the first base electrode layer 50A provided in this part, in the central part in the length direction L and the stacking direction T of the first base electrode layer 50A provided in this part, for example, it is preferably on the order of 4 μm or more and 15 μm or less.

[0066] When a part of at least one of the first main surface TS1 and the second main surface TS2 is also provided with the second base electrode layer 50B, with respect to the thickness corresponding to the stacking direction T of the second base electrode layer 50B provided in this part, in the central part in the length direction L and the width direction W of the second base electrode layer 50B provided in this part, for example, it is preferably on the order of 4 μm or more and 15 μm or less.

[0067] When a part of at least one of the first side surface WS1 and the second side surface WS2 is also provided with the second base electrode layer 50B, with respect to the thickness corresponding to the width direction W of the second base electrode layer 50B provided in this part, in the central part in the length direction L and the stacking direction T of the second base electrode layer 50B provided in this part, for example, it is preferably on the order of 4 μm or more and 15 μm or less.

[0068] The first organic layer 70A is arranged to cover the first base electrode layer 50A. Details of the first organic layer 70A will be described later.

[0069] The second organic layer 70B is arranged to cover the second base electrode layer 50B. Details of the second organic layer 70B will be described later.

[0070] The first plating layer 60A is arranged to cover the first organic layer 70A.

[0071] The second plating layer 60B is arranged to cover the second organic layer 70B.

[0072] The first plating layer 60A and the second plating layer 60B may also contain, for example, at least one selected from Cu, Ni, Sn, Ag, Pd, Ag-Pd alloy, Au, etc. The first plating layer 60A and the second plating layer 60B may also be formed of multiple layers respectively. The first plating layer 60A and the second plating layer 60B are preferably a two-layer structure in which a Sn plating layer is formed on a Ni plating layer.

[0073] The first plating layer 60A is arranged to cover the first organic layer 70A. In the present embodiment, the first plating layer 60A has a first Ni plating layer 61A and a first Sn plating layer 62A located on the first Ni plating layer 61A.

[0074] The second plating layer 60B is arranged to cover the second organic layer 70B. In the present embodiment, the second plating layer 60B has a second Ni plating layer 61B and a second Sn plating layer 62B located on the second Ni plating layer 61B.

[0075] The Ni plating layer prevents the first base electrode layer 50A and the second base electrode layer 50B from being eroded by solder when mounting the multilayer ceramic capacitor 1. In addition, the Sn plating layer improves the wettability of the solder when mounting the multilayer ceramic capacitor 1. Thus, the mounting of the multilayer ceramic capacitor 1 becomes easy. The thickness of each of the first Ni plating layer 61A, the first Sn plating layer 62A, the second Ni plating layer 61B, and the second Sn plating layer 62B is preferably 2 μm or more and 15 μm or less.

[0076] In addition, the external electrode 40 of the present embodiment may also have a conductive resin layer containing conductive particles and a thermosetting resin. The conductive resin layer may be arranged to cover the fired layer. When the conductive resin layer is arranged to cover the fired layer, the conductive resin layer is arranged between the fired layer and the organic layer 70 (the first organic layer 70A and the second organic layer 70B). The conductive resin layer may completely cover the fired layer or may cover a part of the fired layer.

[0077] The conductive resin layer containing a thermosetting resin is, for example, more flexible than a conductive layer composed of a fired product of a plating film and a conductive paste. Therefore, even when a physical impact or an impact caused by a thermal cycle is applied to the multilayer ceramic capacitor 1, the conductive resin layer functions as a buffer layer. Thus, the conductive resin layer suppresses the generation of cracks in the multilayer ceramic capacitor 1.

[0078] The metal constituting the conductive particles may also be Ag, Cu, Ni, Sn, Bi, or an alloy containing them. The conductive particles preferably contain Ag. The conductive particles are, for example, metal powder of Ag. Since Ag has the lowest specific resistance among metals, it is suitable for electrode materials. In addition, since Ag is a noble metal, it is not easily oxidized and has high weather resistance. Thus, the metal powder of Ag is preferred as the conductive particles.

[0079] In addition, the conductive particles may also be metal powder with a surface coated with Ag. When using metal powder with a surface coated with Ag, the metal powder is preferably Cu, Ni, Sn, Bi, or an alloy powder of them. In order to maintain the characteristics of Ag and make the base metal inexpensive, it is preferable to use metal powder coated with Ag.

[0080] Furthermore, the conductive particles may also be conductive particles that have been subjected to an anti-oxidation treatment on Cu and Ni. In addition, the conductive particles may also be metal powders coated with Sn, Ni, and Cu on the surface of the metal powder. When using metal powders coated with Sn, Ni, and Cu on the surface of the metal powder, the metal powder is preferably Ag, Cu, Ni, Sn, Bi, or an alloy powder thereof.

[0081] The shape of the conductive particles is not particularly limited. Conductive particles having a spherical shape, a flat shape, or the like can be used, but it is preferable to use a mixture of spherical metal powders and flat metal powders.

[0082] The conductive particles contained in the conductive resin layer mainly play a role in ensuring the electrical conductivity of the conductive resin layer. Specifically, by bringing a plurality of conductive particles into contact with each other, a current path is formed inside the conductive resin layer.

[0083] The resin constituting the conductive resin layer may, for example, also contain at least one selected from various known thermosetting resins such as epoxy resins, phenolic resins, polyurethane resins, silicone resins, and polyimide resins. Among them, in particular, an epoxy resin having excellent heat resistance, moisture resistance, adhesion, etc. is one of the most suitable resins. In addition, the resin of the conductive resin layer preferably contains a curing agent together with the thermosetting resin. When an epoxy resin is used as the base resin, the curing agent for the epoxy resin may also be various known compounds such as phenols, amines, acid anhydrides, imidazoles, active esters, and amide imides.

[0084] In addition, the conductive resin layer may also be formed of a plurality of layers. The thickness of the thickest part of the conductive resin layer is preferably 10 μm or more and 200 μm or less.

[0085] Next, use Figures 2 to 5 The organic layer 70 according to the present embodiment will be described. The organic layer 70 according to the present embodiment includes a first organic layer 70A and a second organic layer 70B.

[0086] The first organic layer 70A is disposed on the first base electrode layer 50A. A first plating layer 60A is disposed on the first organic layer 70A. In addition, the first organic layer 70A may also be disposed on a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2. In the present embodiment, the first organic layer 70A is formed to extend to approximately the center in the length direction L of the first main surface TS1 and the second main surface TS2 and approximately the center in the length direction L of the first side surface WS1 and the second side surface WS2.

[0087] The second organic layer 70B is disposed on the second base electrode layer 50B. A second plating layer 60B is disposed on the second organic layer 70B. Further, the second organic layer 70B may also be disposed on a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2. In the present embodiment, the second organic layer 70B is formed to extend to substantially the center in the length direction L of the first main surface TS1 and the second main surface TS2 and substantially the center in the length direction L of the first side surface WS1 and the second side surface WS2.

[0088] Therefore, the first organic layer 70A and the second organic layer 70B are integrally formed at substantially the center in the length direction L of the first main surface TS1 and the second main surface TS2 and at substantially the center in the length direction L of the first side surface WS1 and the second side surface WS2. In this way, the first organic layer 70A and the second organic layer 70B of the present embodiment are integrally formed so as to cover the entire portion of the surface of the laminate 10 that is exposed from the external electrode 40.

[0089] Use Figure 5 The state of the base electrode layer 50 covered by the organic layer 70 will be described.

[0090] Figure 5 Is Figure 2 An enlarged cross-sectional view of the portion shown by R. In addition, in Figure 5 Although the state of the first base electrode layer 50A covered by the first organic layer 70A is described, since the state of the second base electrode layer 50A covered by the second organic layer 70B is the same, the description thereof is omitted. As Figure 5 shown, the first organic layer 70A is formed between the first base electrode layer 50A formed on the dielectric layer 20 and the first Ni plating layer 61A.

[0091] The surface of the first organic layer 70A is formed to expose a part of the surface of the first base electrode layer 50A. That is, the first organic layer 70A has a plurality of voids as Figure 5 shown. In the surface of the first organic layer 70A, the atomic percentage of the main component metal of the first base electrode layer 50A is 4.0 atom% or less. In addition, in the surface of the first organic layer 70A, the atomic percentage of the main component metal of the first base electrode layer 50A is more preferably 3.0 atom% or less.

[0092] The surface of the second organic layer 70B is formed to expose a part of the surface of the second base electrode layer 50B. That is, the second organic layer 70B has a plurality of voids as Figure 5The figure shows multiple voids. In the surface of the second organic layer 70B, the atomic percentage of the main component metal of the second base electrode layer 50B is 4.0 atom% or less. Additionally, in the surface of the second organic layer 70B, the atomic percentage of the main component metal of the second base electrode layer 50B is more preferably 3.0 atom% or less.

[0093] In the surface of the first organic layer 70A, the atomic percentage of the main component metal of the first base electrode layer 50A is preferably 0.6 atom% or more. In the surface of the second organic layer 70B, the atomic percentage of the main component metal of the second base electrode layer 50B is preferably 0.6 atom% or more.

[0094] As described above, the main component metal of the first base electrode layer 50A and the main component metal of the second base electrode layer 50B are preferably Cu. However, the main component metal of the first base electrode layer 50A and the main component metal of the second base electrode layer 50B are not limited to Cu. For example, Ni, Ag, Pd, an Ag - Pd alloy, or Au can be used.

[0095] The first organic layer 70A and the second organic layer 70B contain an organosilicon compound. Thus, the first organic layer 70A and the second organic layer 70B are reliably formed on the surfaces of the laminate 10, the base electrode layer 50, etc., and thus the reliability is improved.

[0096] However, the compositions constituting the first organic layer 70A and the second organic layer 70B are not limited to this. Regarding the first organic layer 70A and the second organic layer 70B, for example, a fatty acid coating can be cited. The fatty acid coating is a layer formed by spreading fatty acids on the surface of the base electrode layer. When the fatty acid coating is applied as the first organic layer 70A and the second organic layer 70B, fatty acids are present at least on the surface of the base electrode layer. More specifically, fatty acids are present at least on the surface of the first base electrode layer 50A and on the surface of the second base electrode layer 50B. Thus, the carboxyl groups of the fatty acids are ionized, and thus they are adsorbed to the base electrode layer by ionic bonding force. At the adsorption part, the precipitation of the plating layer provided on the base electrode layer is hindered, and the bonding area between the base electrode layer and the plating layer can be reduced. Therefore, the adhesion force between the base electrode layer and the plating layer decreases, and thus the effect of promoting the peeling between the base electrode layer and the plating layer formed on the base electrode layer is exerted. Therefore, when an impact during dropping or an impact of thermal cycling is applied to the multilayer ceramic capacitor, stable peeling can occur between the base electrode layer and the plating layer, and stress can be released. As a result, cracks can be suppressed from occurring in the laminate of the multilayer ceramic capacitor.

[0097] In the surface of the first organic layer 70A, the total atomic percentage (atom%) of Si, C, N, and O is preferably 90 atom% or more. In the surface of the second organic layer 70B, the total atomic percentage (atom%) of Si, C, N, and O is preferably 90 atom% or more.

[0098] The thickness of the first organic layer 70A is preferably 5 nm or more and 500 nm or less. Further, the thickness of the first organic layer 70A is more preferably 100 nm or more and 200 nm or less. The thickness of the second organic layer 70B is preferably 5 nm or more and 500 nm or less. Further, the thickness of the second organic layer 70B is more preferably 100 nm or more and 200 nm or less.

[0099] The above is the basic structure of the multilayer ceramic capacitor 1 according to the embodiment. In addition, if the dimension in the length direction of the multilayer ceramic capacitor 1 including the laminate 10 and the external electrodes 40 is defined as the L dimension, the L dimension is preferably 0.2 mm or more and 10 mm or less. Further, if the dimension in the stacking direction of the multilayer ceramic capacitor 1 is defined as the T dimension, the T dimension is preferably 0.1 mm or more and 10 mm or less. Further, if the dimension in the width direction of the multilayer ceramic capacitor 1 is defined as the W dimension, the W dimension is preferably 0.1 mm or more and 10 mm or less.

[0100] <Atomic Percentage of Organic Layer Surface Composition>

[0101] Next, a method for measuring the atomic percentage of the organic layer surface composition in the present embodiment will be described. First, only one external electrode of the multilayer ceramic capacitor is mounted on the mounting substrate using solder, and the other external electrode is left in a floating state. Then, the floating other external electrode is pressed in the height direction from the lower surface, so that at one external electrode mounted on the mounting substrate side, peeling occurs between the base electrode layer and the plating layer, and the organic layer is exposed. Then, XPS analysis is performed on the multilayer ceramic capacitor 1 from which the plating layer has been peeled. First, X-rays are irradiated over the entire surface of the exposed organic layer. The acceleration voltage of the hot electrons at this time is set to 15 kV. Then, qualitative analysis of all elements is performed by wide scan, and then quantitative analysis of all elements is performed by narrow scan, so that the abundance ratio (atom%) of all elements on the surface of the organic layer can be calculated. In addition, in the present embodiment, the narrow scan spectrum is calculated for the elements detected from the wide scan spectrum, normalized so that the total of the detected elements becomes 100 atom%, and XPS analysis is performed. In addition, the abundance ratio (atom%) is the atomic percentage showing the ratio of atoms other than hydrogen and helium.

[0102] Next, a method for manufacturing the multilayer ceramic capacitor 1 of the present embodiment will be described. The manufacturing method of the multilayer ceramic capacitor 1 of the present embodiment is not limited as long as the above-mentioned requirements are satisfied. However, a preferred manufacturing method includes the following steps. Hereinafter, the details of each step will be described.

[0103] Prepare a dielectric sheet for the dielectric layer 20 and a conductive paste for the internal electrode layer 30. The dielectric sheet for the dielectric layer 20 and the conductive paste for the internal electrode layer 30 both contain a binder and a solvent. The binder and the solvent can be well-known binders and solvents. The paste containing a conductive material is, for example, a paste in which an organic binder and an organic solvent are added to metal powder.

[0104] For example, by screen printing, gravure printing, etc., using a printing plate designed to form the shape of the internal electrode layer 30 of the present embodiment, the conductive paste for the internal electrode layer 30 is printed on the dielectric sheet. Thereby, a dielectric sheet having a pattern of the first internal electrode layer 31 formed thereon and a dielectric sheet having a pattern of the second internal electrode layer 32 formed thereon are prepared.

[0105] Stack a given number of dielectric sheets having no printed pattern of the internal electrode layer 30, thereby forming a portion of the outer layer portion 12 on the first main surface TS1 side that becomes the first main surface side. On this, a dielectric sheet having a pattern of the first internal electrode layer 31 printed thereon and a dielectric sheet having a pattern of the second internal electrode layer 32 printed thereon are alternately stacked in sequence, thereby forming a portion that becomes the inner layer portion 11. A given number of dielectric sheets having no printed pattern of the internal electrode layer 30 are stacked on the portion that becomes the inner layer portion 11, thereby forming a portion of the outer layer portion 13 on the second main surface TS2 side that becomes the second main surface side. Thereby, a stacked sheet is obtained.

[0106] Next, the stacked sheet is pressed in the stacking direction by means such as isostatic pressing, thereby manufacturing a stacked block.

[0107] Next, the stacked block is cut into a given size to be separated into individual pieces, thereby obtaining a plurality of stacked small pieces. Then, the stacked small pieces can also be polished by means such as barrel polishing so that the corners and ridge lines have rounded corners.

[0108] Next, the stacked small pieces are fired to obtain a stacked body 10. Although the firing temperature at this time also depends on the materials of the dielectric layer 20 and the internal electrode layer 30, for example, it is preferably 900 °C or higher and 1400 °C or lower.

[0109] A conductive paste that becomes the base electrode layer 50 is applied to both end faces of the laminate 10. In the present embodiment, the base electrode layer 50 is a fired layer. The fired layer can be formed, for example, by applying a conductive paste containing a glass component and a metal to the laminate 10 by a method such as dipping and then performing a firing process. The temperature of the firing process at this time is preferably 700°C or higher and 900°C or lower.

[0110] Alternatively, the unfired laminate chips and the conductive paste applied to the laminate chips can be fired simultaneously. In this case, the fired layer is preferably formed by firing a paste in which a ceramic material is added in place of the glass component. At this time, as the added ceramic material, it is particularly preferable to use the same type of ceramic material as the dielectric layer 20. In this case, a conductive paste is applied to the unfired laminate chips, and the laminate chips and the conductive paste applied to the laminate chips are fired simultaneously, thereby forming the laminate 10 having the fired layer.

[0111] Next, an organic layer that sparsely covers the organic compound is formed on the base electrode layer. As a method of forming an organic layer that sparsely covers the organic compound on the base electrode layer, it can be formed by diluting the organic compound with an organic solvent and spraying it. Specifically, for example, a solution in which a silane coupling agent is diluted with IPA (2-propanol) is prepared. The laminate on which the base electrode layer is formed is put into a drum device, and the solution is sprayed onto the laminate on which the base electrode layer is formed. Then, it is taken out from the drum device and spread on filter paper, and heat treatment is performed in a heating furnace at 100°C to 200°C for a given time (30 minutes to 60 minutes), thereby curing the organic layer.

[0112] In addition, it can also be formed by, after preparing a solution by diluting the organic compound with an organic solvent, applying the solution to the laminate on which the base electrode layer is formed and thermally curing it. Here, as a method of applying the solution, it can be performed by dipping or the like.

[0113] Here, the target value of the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer and the thickness of the organic layer can be controlled by adjusting the solution concentration, coating method, coating time, and temperature during coating.

[0114] Next, a plating layer is formed on the surface of the organic layer 70. In the present embodiment, a first plating layer 60A is formed on the surface of the first organic layer 70A. In addition, a second plating layer 60B is formed on the surface of the second organic layer 70B. In the present embodiment, as the plating layer, a Ni plating layer and a Sn plating layer are formed. When performing the plating treatment, either electroplating or electroless plating can be employed. However, regarding electroless plating, pretreatment using a catalyst or the like is required to increase the deposition rate of the plating layer, so there is a drawback of complex processes. Therefore, electroplating is generally preferred. The Ni plating layer and the Sn plating layer are formed sequentially, for example, by barrel plating.

[0115] In addition, in the case where a conductive resin layer is provided, the conductive resin layer can also be configured to cover the sintered layer. In the case where a conductive resin layer is provided, a conductive resin paste containing a thermosetting resin and a metal component is applied on the sintered layer, and then heat treatment is performed at a temperature of 250 to 550 °C or higher. As a result, the thermosetting resin is thermally cured to form a conductive resin layer. The atmosphere during this heat treatment is preferably an N2 atmosphere. In addition, in order to prevent the resin from scattering and prevent the oxidation of various metal components, the oxygen concentration is preferably 100 ppm or less.

[0116] Through the above manufacturing process, the multilayer ceramic capacitor 1 can be manufactured.

[0117] In addition, the structure of the multilayer ceramic capacitor 1 is not limited to Figures 1 to 4B the structure shown. For example, the multilayer ceramic capacitor 1 can also be a multilayer ceramic capacitor with a two - unit structure, a three - unit structure, or a four - unit structure as Figures 6 to 8 shown.

[0118] Figure 6 The multilayer ceramic capacitor 1 shown is a multilayer ceramic capacitor 1 with a two - unit structure. As the internal electrode layer 30, in addition to the first internal electrode layer 33 and the second internal electrode layer 34, it also includes a floating internal electrode layer 35 that is not led out to either the first end face LS1 or the second end face LS2. Figure 7 The multilayer ceramic capacitor 1 shown is a multilayer ceramic capacitor 1 with a three - unit structure that includes a first floating internal electrode layer 35A and a second floating internal electrode layer 35B as the floating internal electrode layer 35. Figure 8The stacked ceramic capacitor 1 shown has a four - layer structure with a floating internal electrode layer 35 having a first floating internal electrode layer 35A, a second floating internal electrode layer 35B, and a third floating internal electrode layer 35C. In this way, by providing the floating internal electrode layer 35 as the internal electrode layer 30, the stacked ceramic capacitor 1 has a structure in which the opposed electrode portion is divided into multiple parts. As a result, a structure is formed in which a plurality of capacitor components are formed between the opposed internal electrode layers 30 and these capacitor components are connected in series. Therefore, the voltage applied to each capacitor component becomes lower, and the high voltage resistance of the stacked ceramic capacitor 1 can be achieved. In addition, it goes without saying that the stacked ceramic capacitor 1 of the present embodiment may have a multi - layer structure of four layers or more.

[0119] <Modification Example>

[0120] In addition, in the stacked ceramic capacitor 1 according to the above - described embodiment, the first organic layer 70A and the second organic layer 70B extend to approximately the center in the length direction L of the first main surface TS1 and the second main surface TS2 and approximately the center in the length direction L of the first side surface WS1 and the second side surface WS2, and are formed integrally so as to cover the entire portion of the surface of the stacked body 10 that is exposed from the external electrode 40. However, the structure of the first organic layer 70A and the second organic layer 70B is not limited to this.

[0121] Hereinafter, Figures 9 to 10B the stacked ceramic capacitor 1 according to the modification example will be described. Figure 9 is a cross - sectional view corresponding to Figure 2 in the modification example. Figure 10A is a cross - sectional view corresponding to Figure 4A in the modification example. Figure 10B is a cross - sectional view corresponding to Figure 4B in the modification example. In addition, for the same structures as those in the first embodiment, the same names are given, and detailed descriptions may sometimes be omitted.

[0122] As Figure 1 shown, the stacked ceramic capacitor 1 according to the modification example has a substantially rectangular parallelepiped shape. The stacked ceramic capacitor 1 includes: a stacked body 10 having a substantially rectangular parallelepiped shape; and a pair of external electrodes 40 separately disposed at both end portions of the stacked body 10.

[0123] As Figure 1 and Figure 9 shown, the external electrode 40 has a first external electrode 40A disposed on the first end surface LS1 side of the stacked body 10 and a second external electrode 40B disposed on the second end surface LS2 side of the stacked body 10.

[0124] As Figure 9 , Figure 10Aand Figure 10B As shown, the first external electrode 40A has a first base electrode layer 50A, a first organic layer 70bA disposed on the first base electrode layer 50A, and a first plating layer 60A disposed on the first organic layer 70bA. In addition, the second external electrode 40B has a second base electrode layer 50B, a second organic layer 70bB disposed on the second base electrode layer 50B, and a second plating layer 60B disposed on the second organic layer 70bB.

[0125] The organic layer 70b according to this modification includes a first organic layer 70bA and a second organic layer 70bB.

[0126] The first organic layer 70bA is disposed on the first base electrode layer 50A. A first plating layer 60A is disposed on the first organic layer 70bA. In addition, the first organic layer 70bA may also be disposed on a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2. In this modification, the first organic layer 70bA is formed to extend to a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2.

[0127] The second organic layer 70bB is disposed on the second base electrode layer 50B. A second plating layer 60B is disposed on the second organic layer 70bB. In addition, the second organic layer 70bB may also be disposed on a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2. In this modification, the second organic layer 70bB is formed to extend to a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2.

[0128] That is, in the multilayer ceramic capacitor 1 according to this modification, there is a part where the organic layer 70b does not exist between the first external electrode 40A and the second external electrode 40B. Therefore, the first organic layer 70bA and the second organic layer 70bB in this modification are not formed integrally, and a part of the surface of the laminate 10 is exposed. In this case, since an organic layer is formed at the end of the base electrode layer of the external electrode that becomes the starting point of the crack, the effect of suppressing the crack can be obtained.

[0129] <Second Embodiment>

[0130] In addition, the multilayer ceramic capacitor 1 according to the first embodiment is a two-terminal type multilayer ceramic capacitor having two external electrodes, but is not limited thereto, and may also be a multi-terminal type multilayer ceramic capacitor having a plurality of external electrodes.

[0131] Hereinafter, the multilayer ceramic capacitor 1 according to the second embodiment will be described. In the following description, detailed descriptions of the same structures as those in the first embodiment will be omitted. Figures 11 to 13 is an external perspective view of the multilayer ceramic capacitor according to the second embodiment. Figure 11 is a cross-sectional view corresponding to Figure 12 in the second embodiment. Figure 4A of the cross-sectional view. Figure 13 is a cross-sectional view corresponding to Figure 4B in the second embodiment.

[0132] In the multilayer ceramic capacitor 1 of the present embodiment, the internal electrode layer inside the laminate 10 and the external electrode 40 are different from those in the first embodiment.

[0133] As the plurality of internal electrode layers of the plurality of internal conductor layers, there are a plurality of first internal electrode layers 131 as the plurality of first internal conductor layers led out to the first end face LS1 and the second end face LS2, and a plurality of second internal electrode layers 132 as the plurality of second internal conductor layers led out to at least one of the first side face WS1 and the second side face WS2.

[0134] In the present embodiment, the plurality of internal electrode layers include a plurality of first internal electrode layers 131 led out to the first end face LS1 and the second end face LS2, and a plurality of second internal electrode layers 132 led out to the first side face WS1 and the second side face WS2. The plurality of first internal electrode layers 131 are disposed on the plurality of dielectric layers 20. The plurality of second internal electrode layers 132 are disposed on the plurality of dielectric layers 20. The plurality of first internal electrode layers 131 and the plurality of second internal electrode layers 132 are alternately disposed with the dielectric layer 20 interposed therebetween in the stacking direction T of the laminate 10. The first internal electrode layer 131 and the second internal electrode layer 132 are disposed so as to sandwich the dielectric layer 20.

[0135] The first internal electrode layer 131 is disposed on the dielectric layer 20 and extends from the first end surface LS1 to the second end surface LS2 so as to be exposed at the first end surface LS1 and the second end surface LS2. More specifically, the first internal electrode layer 131 has a first opposing portion 131A that opposes the second internal electrode layer 132, a first lead-out portion 131B that leads out from the first opposing portion 131A to the first end surface LS1, and a second lead-out portion 131C that leads out from the first opposing portion 131A to the second end surface LS2. The first opposing portion 131A is located at the central portion on the dielectric layer 20. The first lead-out portion 131B is exposed at the first end surface LS1. The second lead-out portion 131C is exposed at the second end surface LS2. The first internal electrode layer 131 is not exposed at the first side surface WS1 and the second side surface WS2. The shape of the first opposing portion 131A, the shape of the first lead-out portion 131B, and the shape of the second lead-out portion 131C of the first internal electrode layer 131 are not particularly limited.

[0136] The second internal electrode layer 132 is disposed on the dielectric layer 20 and is disposed so as not to be exposed at the first end surface LS1 and the second end surface LS2 but to be exposed at the first side surface WS1 and the second side surface WS2. Specifically, the second internal electrode layer 132 extends across between the first side surface WS1 and the second side surface WS2. More specifically, the second internal electrode layer 132 has a second opposing portion 132A that opposes the first internal electrode layer 131, a third lead-out portion 132B that leads out from the second opposing portion 132A to the first side surface WS1, and a fourth lead-out portion 132C that leads out from the second opposing portion 132A to the second side surface WS2. The second opposing portion 132A is located at the central portion on the dielectric layer 20. The second opposing portion 132A is formed in a rectangular shape so as to extend in the direction of the first end surface LS1 and the direction of the second end surface LS2. The third lead-out portion 132B is exposed at the first side surface WS1. The fourth lead-out portion 132C is exposed at the second side surface WS2. The second internal electrode layer 132 is not exposed at the first end surface LS1 and the second end surface LS2. The shape of the second opposing portion 132A, the shape of the third lead-out portion 132B, and the shape of the fourth lead-out portion 132C of the second internal electrode layer 132 are not particularly limited.

[0137] In the present embodiment, the first opposing portion 131A and the second opposing portion 132A oppose each other with the dielectric layer 20 therebetween, thereby forming a capacitance and exhibiting the characteristics of a capacitor.

[0138] The external electrode 40 has at least a first external electrode 40A, a second external electrode 40B, and a third external electrode 40C. In the present embodiment, the external electrode 40 has a first external electrode 40A, a second external electrode 40B, and a third external electrode 40C, and also has a fourth external electrode 40D.

[0139] The first external electrode 40A is disposed on the first end face LS1 and connected to the first internal electrode layer 131. In other words, the first external electrode 40A is connected to the first internal electrode layer 131 led out to the first end face LS1. More specifically, the first external electrode 40A is connected to the first lead portion 131B of the first internal electrode layer 131. In the present embodiment, the first external electrode 40A is formed to extend from the first end face LS1 to a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2.

[0140] The second external electrode 40B is disposed on the second end face LS2 and connected to the first internal electrode layer 131. In other words, the second external electrode 40B is connected to the first internal conductor layer 131 led out to the second end face LS2. More specifically, the second external electrode 40B is connected to the second lead portion 131C of the first internal electrode layer 131. In the present embodiment, the second external electrode 40B is formed to extend from the second end face LS2 to a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2.

[0141] The third external electrode 40C is disposed on the first side surface WS1 and connected to the second internal electrode layer 132. More specifically, the third external electrode 40C is connected to the third lead portion 132B of the second internal electrode layer 132. In the present embodiment, the third external electrode 40C is disposed to extend from the first side surface WS1 to a part of the first main surface TS1 and a part of the second main surface TS2.

[0142] The fourth external electrode 40D is disposed on the second side surface WS2 and connected to the second internal electrode layer 132. More specifically, the fourth external electrode 40D is connected to the fourth lead portion 132C of the second internal electrode layer 132. In the present embodiment, the fourth external electrode 40D is disposed to extend from the second side surface WS2 to a part of the first main surface TS1 and a part of the second main surface TS2.

[0143] In addition, as the layer structure of the external electrode 40 of the present embodiment, for example, various layer structures similar to those of the external electrode 40 of the first embodiment can be adopted.

[0144] For example, it may also be that the first external electrode 40A includes a first base electrode layer 50A, a first plating layer 60A, and a first organic layer 70A, and the first plating layer 60A includes a first Ni plating layer 61A and a first Sn plating layer 62A. It may also be that the second external electrode 40B includes a second base electrode layer 50B, a second plating layer 60B, and a second organic layer 70B, and the second plating layer 60B includes a second Ni plating layer 61B and a second Sn plating layer 62B. It may also be that the third external electrode 40C includes a third base electrode layer 50C, a third plating layer 60C, and a third organic layer 70C, and the third plating layer 60C includes a third Ni plating layer 61C and a third Sn plating layer 62C. It may also be that the fourth external electrode 40D includes a fourth base electrode layer 50D, a fourth plating layer 60D, and a fourth organic layer 70D, and the fourth plating layer 60D includes a fourth Ni plating layer 61D and a fourth Sn plating layer 62D. The first base electrode layer 50A, the second base electrode layer 50B, the third base electrode layer 50C, and the fourth base electrode layer 50D may also be, for example, sintered layers.

[0145] As described above, the use of Figure 12 , Figure 13 The organic layer 70 according to the described embodiment includes a first organic layer 70A, a second organic layer 70B, a third organic layer 70C, and a fourth organic layer 70D.

[0146] The first organic layer 70A is disposed on the first base electrode layer 50A. The first plating layer 60A is disposed on the first organic layer 70A. In addition, the first organic layer 70A may also be disposed on a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2 between the first external electrode 40A and the second external electrode 40B, the third external electrode 40C, and the fourth external electrode 40D in the length direction L.

[0147] The second organic layer 70B is disposed on the second base electrode layer 50B. The second plating layer 60B is disposed on the second organic layer 70B. In addition, the second organic layer 70B may also be disposed on a part of the first main surface TS1, a part of the second main surface TS2, a part of the first side surface WS1, and a part of the second side surface WS2 between the second external electrode 40B and the first external electrode 40A, the third external electrode 40C, and the fourth external electrode 40D in the length direction L.

[0148] The third organic layer 70C is disposed on the third base electrode layer 50C. A third plating layer 60C is disposed on the third organic layer 70C. In addition, the third organic layer 70C may also be disposed on a part of the first side surface WS1 between the third external electrode 40C and the first external electrode 40A in the longitudinal direction L and between the third external electrode 40C and the second external electrode 40B in the longitudinal direction L. In addition, the third organic layer 70C may also be disposed on a part of the first main surface TS1 and a part of the second main surface TS2.

[0149] The fourth organic layer 70D is disposed on the fourth base electrode layer 50D. A fourth plating layer 60D is disposed on the fourth organic layer 70D. In addition, the fourth organic layer 70D may also be disposed on a part of the second side surface WS2 between the fourth external electrode 40D and the first external electrode 40A in the longitudinal direction L and between the fourth external electrode 40D and the second external electrode 40B in the longitudinal direction L. In addition, the fourth organic layer 70D may also be disposed on a part of the first main surface TS1 and a part of the second main surface TS2.

[0150] Therefore, the first organic layer 70A, the second organic layer 70B, the third organic layer 70C, and the fourth organic layer 70D are formed integrally so as to cover the entire portion of the surface of the laminate 10 that is exposed from the external electrodes 40. In this way, even in the case of a multi-terminal type having a large number of external electrodes, since an organic layer is formed at the end of the base electrode layer of the external electrode that is the starting point of the crack, the effect of suppressing cracks can be obtained. In addition, in the case of such a multi-terminal type laminated ceramic electronic component, as the organic layer, it is preferable to include at least the first organic layer 70A and the second organic layer 70B.

[0151] In addition, in the above-described embodiment, as the laminated ceramic electronic component, a laminated ceramic capacitor in which a dielectric layer 20 made of dielectric ceramic is used as the ceramic layer is exemplified. However, the laminated ceramic electronic component of the present disclosure is not limited thereto. For example, the ceramic electronic component of the present disclosure can also be applied to various laminated ceramic electronic components such as a piezoelectric component using piezoelectric ceramic as the ceramic layer and a thermistor using semiconductor ceramic as the ceramic layer. Examples of the piezoelectric ceramic include PZT (lead zirconate titanate) type ceramics, and examples of the semiconductor ceramic include spinel type ceramics.

[0152] According to the laminated ceramic capacitor 1 according to the embodiment described above, the following effects are achieved.

[0153] The multilayer ceramic capacitor 1 according to the embodiment includes: a laminate 10 including a plurality of dielectric layers 20 (ceramic layers 20) and a plurality of internal electrode layers 30 (internal conductor layers 30) laminated alternately, and having a first main surface TS1 and a second main surface TS2 opposite to each other in the height direction T, a first side surface WS1 and a second side surface WS2 opposite to each other in the width direction W orthogonal to the height direction T, and a first end surface LS1 and a second end surface LS2 opposite to each other in the length direction L orthogonal to the height direction T and the width direction W; and external electrodes 40 connected to the internal electrode layers 30. The external electrodes 40 have a first external electrode 40A disposed on the first end surface LS1 and a second external electrode 40B disposed on the second end surface LS2. The first external electrode 40A has a first base electrode layer 50A disposed on the first end surface LS1, a first organic layer 70A disposed on the first base electrode layer 50A, and a first plating layer 60A disposed on the first organic layer 70A. The second external electrode 40B has a second base electrode layer 50B disposed on the second end surface LS2, a second organic layer 70B disposed on the second base electrode layer 50B, and a second plating layer 60B disposed on the second organic layer 70B. The surface of the first organic layer 70A is formed to expose a part of the first base electrode layer 50A, and the surface of the second organic layer 70B is formed to expose a part of the second base electrode layer 50B. In the surface of the first organic layer 70A, the atomic percentage of the main component metal of the first base electrode layer 50A is 4.0 atom% or less. In the surface of the second organic layer 70B, the atomic percentage of the main component metal of the second base electrode layer 50B is 4.0 atom% or less.

[0154] Thereby, it is possible to provide a highly reliable multilayer ceramic electronic component capable of suppressing cracks from occurring in the laminate 10 of the multilayer ceramic electronic component.

[0155] In the multilayer ceramic capacitor 1 according to the embodiment, in the surface of the first organic layer 70A, the atomic percentage of the main component metal of the first base electrode layer 50A is 0.6 atom% or more. In the surface of the second organic layer 70B, the atomic percentage of the main component metal of the second base electrode layer 50B is 0.6 atom% or more.

[0156] Thereby, it is possible to provide a highly reliable multilayer ceramic electronic component that can also suppress plating defects from occurring.

[0157] In the multilayer ceramic capacitor 1 according to the embodiment, the main component metal of the first base electrode layer 50A and the main component metal of the second base electrode layer 50B are Cu.

[0158] Accordingly, it is possible to provide a multilayer ceramic electronic component that can suppress the diffusion of hydrogen into the internal dielectric layer during manufacturing, can also prevent deterioration of the insulation resistance, can suppress manufacturing costs, and has high reliability.

[0159] In the multilayer ceramic capacitor 1 according to the embodiment, the first organic layer 70A and the second organic layer 70B are silicone compounds.

[0160] Accordingly, an organic layer is reliably formed on the surfaces of the laminate, the base electrode layer of the external electrode, etc., so the reliability is improved.

[0161] In the multilayer ceramic capacitor 1 according to the embodiment, the plurality of internal electrode layers 30 have a plurality of first internal electrode layers 31 led out to the first end face LS1 and a plurality of second internal electrode layers 32 led out to the second end face LS2. The first external electrode 40A is connected to the first internal electrode layer 31, and the second external electrode 40B is connected to the second internal electrode layer 32.

[0162] Accordingly, it is possible to provide a two-terminal type multilayer ceramic electronic component with high reliability and having two external electrodes.

[0163] In the multilayer ceramic capacitor 1 according to the embodiment, the external electrode 40 further has a third external electrode 40C (or a fourth external electrode 40D). The plurality of internal electrode layers 30 have a plurality of first internal electrode layers 131 led out to the first end face LS1 and the second end face LS2, and a plurality of second internal electrode layers 132 led out to at least one of the first side face WS1 or the second side face WS2. The first external electrode 40A is connected to the first internal electrode layer 131 led out to the first end face LS1, the second external electrode 40B is connected to the first internal electrode layer 131 led out to the second end face LS2, and the third external electrode 40C (or the fourth external electrode 40D) is connected to the second internal electrode layer 132.

[0164] Accordingly, it is possible to provide a multi-terminal type multilayer ceramic electronic component with high reliability and having many external electrodes.

[0165] The present invention is not limited to the structure of the above embodiment, and can be appropriately changed and applied within the scope of not changing the gist of the present invention. In addition, a structure in which two or more of the respective preferred structures described in the above embodiment are combined is also the present invention.

[0166] Experimental Example

[0167] Hereinafter, the experimental example will be described. The one manufactured using the manufacturing method described in the above embodiment Figures 1 to 5Stacked ceramic capacitors of the structure were used as specimens for the examples and comparative examples. Specifically, multiple batches of stacked ceramic capacitors were fabricated in which the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer was made to have different values, and these were used as specimens for Examples 1 to 7 and Comparative Examples 1 to 5.

[0168] Specimens of the same batch were fabricated under the same manufacturing conditions, and the specifications of the external electrodes became the same. For each batch (Examples 1 to 7 and Comparative Examples 1 to 5), 110 specimens were fabricated. For each batch, 100 of the 110 fabricated specimens were checked for plating defects, and then a flexural strength test was conducted. In addition, the remaining 10 specimens fabricated in the same batch were used to measure the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer. The atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer was measured by the aforementioned measurement method, and the average value of the 10 specimens was taken as the measurement result.

[0169] Using the manufacturing method according to the above-described embodiment, Figures 1 to 5 stacked ceramic capacitors of the structure shown below were fabricated.

[0170] · Dimensions of the stacked ceramic capacitor: L×W×T = 1.0 mm × 0.5 mm × 0.5 mm

[0171] · Main component of the dielectric layer material: BaTiO3

[0172] · Capacitance: 10 nF

[0173] · Internal electrode: Ni

[0174] · Structure of the external electrode

[0175] · Cu base electrode layer: A base electrode layer containing Cu and glass

[0176] Thickness (thickness at the center of the end face) at the center in the height direction of the first end face and the second end face in the cross section of the laminate at the 1 / 2W position: 28 μm

[0177] Thickness at the center in the length direction on the first main face, the second main face, the first side face, and the second side face in the cross section of the laminate at the 1 / 2W position: 10 μm

[0178] · Organic layer: A liquid obtained by diluting a silane coupling agent with 2-propanol was sprayed onto the laminate on which the base electrode layer was formed, then the chips were spread out on an aluminum tray, and heat treatment was performed in a heating furnace at 150 °C for 30 minutes to cure it.

[0179] The position of the organic layer is set: the exposed surface in the laminate and the surface on the base electrode layer

[0180] · Plating layer: Formed by two layers, a Ni plating layer is formed on the base electrode layer with fatty acid, and a Sn plating layer is formed on the Ni plating layer.

[0181] Thickness of the Ni coating: 4.0 μm

[0182] Thickness of the Sn coating: 4.0 μm

[0183] <Method for confirming cracks based on flexural strength test>

[0184] First, the multilayer ceramic capacitor is mounted on a mounting substrate with a thickness of 1.6 mm using solder paste. Then, the substrate is bent from the back of the substrate without the multilayer ceramic capacitor mounted using a pressing bar with a curvature radius of 1 μm, thereby applying mechanical stress. At this time, the flexure amount is set to 2 mm, and it is flexed for 60 seconds. In addition, in this test, the conditions are set to be stricter than the AEC-Q200 standard required for in-vehicle electronic components.

[0185] After the substrate is bent, the multilayer ceramic capacitor is removed from the substrate, subjected to cross-section grinding, and the presence or absence of cracks in the laminate is observed. In the cross-section grinding, it is ground to a position that is 1 / 2 in the width direction W connecting the first end face and the second end face of the multilayer ceramic capacitor, so that the LT surface of the multilayer ceramic capacitor is exposed.

[0186] For each batch, when cracks are generated in more than 10 out of 100 specimens in which the above test is carried out, the evaluation result of the flexural strength is judged as "NG". When the number of specimens with cracks is less than 10, the evaluation result of the flexural strength is judged as "OK".

[0187] <Method for confirming plating defects>

[0188] Using a jig, the plated specimen is arranged with the end face side facing upward. Then, the external electrode on the end face side of the specimen is observed with a stereomicroscope at a magnification of 50 times, and the presence or absence of plating defects is determined. The case where the base electrode layer (with an occupancy rate of 5% or more) is visible is regarded as a plating defect.

[0189] <Experimental data>

[0190] Table 1 shows the Cu (atom%) of the measurement results of the atomic percentage of the main component metal of the base electrode layer in the surface of the specimen as the organic layer, the number of cracks generated based on the flexural strength test, and the evaluation results of the number of plating defects for Examples 1 to 7 and Comparative Examples 1 to 5.

[0191] [Table 1]

[0192]

[0193] For the specimens of Examples 1 to 7 in which an organic layer exists on the surface of the base electrode layer and the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer is 3.0 atom% or less, good results were obtained. Considering these experimental data, it can be considered that good results can be obtained by setting the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer to 4.0 atom% or less. That is, it can be considered that by setting the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer to 4.0 atom% or less, the precipitation of the plating layer provided on the base electrode layer is hindered, the bonding area between the base electrode layer and the plating layer can be reduced, and good results can be obtained. In addition, the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer is more preferably 3.0 atom% or less.

[0194] As a result, the adhesion between the base electrode layer and the plating layer decreases, and thus the effect of promoting the peeling of the base electrode layer and the plating layer formed on the base electrode layer is exerted. Therefore, when an impact during dropping or a thermal cycle impact is applied to the multilayer ceramic capacitor, stable peeling can occur between the base electrode layer and the plating layer, and stress can be released. As a result, cracks in the body of the multilayer ceramic capacitor can be suppressed.

[0195] In addition, in Comparative Example 1 in which the surface of the organic layer was not formed to expose a part of the surface of the base electrode layer, the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer became 0.0 atom%, and plating defects occurred. The surface of the organic layer is preferably formed to expose a part of the surface of the base electrode layer, and the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer is more preferably 0.6 atom% or more. Thereby, the occurrence of plating defects can also be suppressed. That is, the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer is preferably 0.6 atom% or more and 4.0 atom% or less. In addition, the atomic percentage of the main component metal of the base electrode layer in the surface of the organic layer is more preferably 0.6 atom% or more and 3.0 atom% or less.

[0196] <1>

[0197] A multilayer ceramic electronic component, comprising:

[0198] A laminate including a plurality of ceramic layers and a plurality of internal conductor layers alternately laminated, and having a first main surface and a second main surface opposite to each other in a height direction, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the height direction, and a first end surface and a second end surface opposite to each other in a length direction orthogonal to the height direction and the width direction; and

[0199] External electrodes connected to the internal conductor layers,

[0200] The external electrodes include a first external electrode disposed on the first end surface and a second external electrode disposed on the second end surface,

[0201] The first external electrode includes a first base electrode layer disposed on the first end surface, a first organic layer disposed on the first base electrode layer, and a first plating layer disposed on the first organic layer,

[0202] The second external electrode includes a second base electrode layer disposed on the second end surface, a second organic layer disposed on the second base electrode layer, and a second plating layer disposed on the second organic layer,

[0203] The surface of the first organic layer is formed to expose a part of the first base electrode layer,

[0204] The surface of the second organic layer is formed to expose a part of the second base electrode layer,

[0205] In the surface of the first organic layer, the atomic percentage of the main component metal of the first base electrode layer is 4.0 atom% or less,

[0206] In the surface of the second organic layer, the atomic percentage of the main component metal of the second base electrode layer is 4.0 atom% or less.

[0207] <2>

[0208] The multilayer ceramic electronic component according to <1>, wherein,

[0209] In the surface of the first organic layer, the atomic percentage of the main component metal of the first base electrode layer is 0.6 atom% or more,

[0210] In the surface of the second organic layer, the atomic percentage of the main component metal of the second base electrode layer is 0.6 atom% or more.

[0211] <3>

[0212] The multilayer ceramic electronic component according to <1> or <2>, wherein,

[0213] The main component metal of the first base electrode layer and the main component metal of the second base electrode layer are Cu.

[0214] <4>

[0215] The multilayer ceramic electronic component according to any one of <1> to <3>, wherein

[0216] The first organic layer and the second organic layer are silicone compounds.

[0217] <5>

[0218] The multilayer ceramic electronic component according to any one of <1> to <4>, wherein

[0219] The plurality of internal conductor layers include: a plurality of first internal conductor layers led out to the first end face; and a plurality of second internal conductor layers led out to the second end face,

[0220] The first external electrode is connected to the first internal conductor layer,

[0221] The second external electrode is connected to the second internal conductor layer.

[0222] <6>

[0223] The multilayer ceramic electronic component according to any one of <1> to <4>, wherein

[0224] The external electrode further has a third external electrode,

[0225] The plurality of internal conductor layers include: a plurality of first internal conductor layers led out to the first end face and the second end face; and a plurality of second internal conductor layers led out to at least one of the first side face or the second side face,

[0226] The first external electrode is connected to the first internal conductor layer led out to the first end face,

[0227] The second external electrode is connected to the first internal conductor layer led out to the second end face,

[0228] The third external electrode is connected to the second internal conductor layer.

[0229] Explanation of reference numerals

[0230] 1: Multilayer ceramic capacitor (multilayer ceramic electronic component);

[0231] 10: Stacked body;

[0232] 20: Dielectric layer (ceramic layer);

[0233] 30: Internal electrode layer (internal conductor layer);

[0234] 40: External electrode;

[0235] 40A: First external electrode;

[0236] 40B: Second external electrode;

[0237] 50A: First base electrode layer;

[0238] 50B: Second base electrode layer;

[0239] 60A: First plating layer;

[0240] 60B: Second plating layer;

[0241] 70A: First organic layer;

[0242] 70B: Second organic layer;

[0243] L: Length direction;

[0244] LS1: First end face;

[0245] LS2: Second end face;

[0246] T: Height direction;

[0247] TS1: First main face;

[0248] TS2: Second main face;

[0249] W: Width direction;

[0250] WS1: First side face;

[0251] WS2: Second side face.

Claims

1. A multilayer ceramic electronic component, comprising: A laminate including a plurality of ceramic layers and a plurality of internal conductor layers laminated alternately, and having a first main surface and a second main surface opposite to each other in a height direction, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the height direction, and a first end surface and a second end surface opposite to each other in a length direction orthogonal to the height direction and the width direction; and External electrodes connected to the internal conductor layers, The external electrodes having a first external electrode disposed on the first end surface and a second external electrode disposed on the second end surface, The first external electrode having a first base electrode layer disposed on the first end surface, a first organic layer disposed on the first base electrode layer, and a first plating layer disposed on the first organic layer, The second external electrode having a second base electrode layer disposed on the second end surface, a second organic layer disposed on the second base electrode layer, and a second plating layer disposed on the second organic layer, The surface of the first organic layer is formed to expose a part of the first base electrode layer, The surface of the second organic layer is formed to expose a part of the second base electrode layer, In the surface of the first organic layer, the atomic percentage of the main component metal of the first base electrode layer is 4.0 atom% or less, In the surface of the second organic layer, the atomic percentage of the main component metal of the second base electrode layer is 4.0 atom% or less.

2. The multilayer ceramic electronic component according to claim 1, wherein, In the surface of the first organic layer, the atomic percentage of the main component metal of the first base electrode layer is 0.6 atom% or more, In the surface of the second organic layer, the atomic percentage of the main component metal of the second base electrode layer is 0.6 atom% or more.

3. The multilayer ceramic electronic component according to claim 1 or 2, wherein, The main component metal of the first base electrode layer and the main component metal of the second base electrode layer are Cu.

4. The multilayer ceramic electronic component according to any one of claims 1 to 3, wherein, The first organic layer and the second organic layer are silicone compounds.

5. The multilayer ceramic electronic component according to any one of claims 1 to 4, wherein, The plurality of internal conductor layers include: a plurality of first internal conductor layers led out to the first end surface; and a plurality of second internal conductor layers led out to the second end surface, The first external electrode is connected to the first internal conductor layer, The second external electrode is connected to the second internal conductor layer.

6. The multilayer ceramic electronic component according to any one of claims 1 to 4, wherein, The external electrode further has a third external electrode, The plurality of internal conductor layers include: a plurality of first internal conductor layers led out to the first end surface and the second end surface; and a plurality of second internal conductor layers led out to at least one of the first side surface or the second side surface, The first external electrode is connected to the first internal conductor layer led out to the first end face. The second external electrode is connected to the first internal conductor layer led out to the second end face. The third external electrode is connected to the second internal conductor layer.

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