Energy efficiency adjusting method of central processing unit, baseboard management controller and computing equipment

Abstract

The embodiment of the invention provides an energy efficiency adjusting method of a central processing unit, a baseboard management controller and computing equipment, the energy efficiency adjusting method is applied to a BMC, the BMC is connected with the CPU, the method comprises the steps that index information of the CPU is obtained, and the index information is used for indicating the current load or occupancy rate of the CPU; target energy efficiency information of the CPU is determined based on the index information, and the target energy efficiency information is used for representing target working parameters under the current load or occupancy rate of the CPU; and configuring the target energy efficiency information to the CPU, so that the CPU adjusts the current working parameter to the target working parameter. On the premise that interruption does not need to be triggered, energy efficiency adjustment of the CPU is achieved, normal operation of application programs in an operating system is not affected, and therefore the performance of a service system is optimized.

Description

Technical Field

[0001] This application relates to the field of computer technologies, and in particular, to an energy efficiency adjustment method for a central processing unit, a baseboard management controller, and a computing device. Background Art

[0002] The energy efficiency performance of a server is generally evaluated based on the performance and energy consumption of the server at a specific load level. The energy efficiency performance of the server is of great significance to the overall operating cost of the data center and environmental protection.

[0003] In related technologies, to monitor the occupancy rate of the CPU in the server through the BIOS firmware, it is necessary to trigger the SMI regularly to activate the BIOS firmware.

[0004] Regularly and frequently triggering the SMI interrupt will have a greater impact on the performance of the business system and is highly dependent on the CPU timer. Summary of the Invention

[0005] Embodiments of this application provide an energy efficiency adjustment method for a central processing unit, a baseboard management controller, and a computing device, which can achieve the energy efficiency adjustment of the CPU without triggering an interrupt, and will not affect the normal operation of application programs in the operating system, thereby optimizing the performance of the business system.

[0006] To achieve the above object, the embodiments of this application adopt the following technical solutions:

[0007] In a first aspect, an energy efficiency adjustment method for a central processing unit is provided, which is applied to a baseboard management controller BMC. The BMC is connected to the CPU, and the method includes:

[0008] Obtain the metric information of the CPU, where the metric information is used to indicate the current load or occupancy rate of the CPU;

[0009] Based on the metric information, determine the target energy efficiency information of the CPU, where the target energy efficiency information is used to represent the target working parameters at the current load or occupancy rate of the CPU;

[0010] Configure the target energy efficiency information to the CPU so that the CPU adjusts its current working parameters to the target working parameters.

[0011] Since the BMC is the core component of out-of-band management of the server and is a dedicated microcontroller independent of the server operating system and the main processor, the operation of the BMC is relatively independent of the operation of the CPU. When the BMC and the CPU execute the interaction process, it is not necessary to activate the BIOS firmware, and thus it is not necessary to activate the BIOS by triggering the SMI interrupt. Not triggering an interrupt will not affect the normal operation of application programs in the operating system, thereby optimizing the performance of the business system.

[0012] In a possible implementation, obtaining the metric information of the CPU includes:

[0013] Obtaining data that can represent the metric information from a first register in the CPU; the first register is configured to store the metric information or data for calculating the metric information;

[0014] Determining the metric information based on the data.

[0015] In a possible implementation, configuring the target energy efficiency information to the CPU includes:

[0016] Configuring the target energy efficiency information to a second register in the CPU, and the second register is configured to store the target energy efficiency information.

[0017] In a possible implementation, the metric information is used to indicate the current occupancy rate of the CPU, and the target energy efficiency information is a performance state; based on the metric information, determining the target energy efficiency information of the CPU includes:

[0018] Determining a target level of the performance state according to the magnitude relationship between the current occupancy rate and a preset target occupancy rate;

[0019] Wherein, when the current occupancy rate is lower than the target occupancy rate, the target level is higher than the current level of the performance state; when the current occupancy rate is higher than the target occupancy rate, the target level is lower than the current level.

[0020] In a possible implementation, the metric information is used to indicate the current occupancy rate of the CPU, and the target energy efficiency information is a performance state; based on the metric information, determining the target energy efficiency information of the CPU includes:

[0021] Determining a target level of the performance state according to the current occupancy rate and a mapping relationship;

[0022] Wherein, the mapping relationship includes: the correspondence between the occupancy rate of the CPU and the performance state.

[0023] In a possible implementation, obtaining the metric information of the CPU includes:

[0024] Under the trigger of a timer running in the BMC, obtaining the metric information of the CPU at preset time intervals.

[0025] In a possible implementation, the method further includes:

[0026] Send a block interrupt signal to the CPU, where the block interrupt signal is used to instruct the CPU to cancel sending a system management interrupt (SMI) signal for activating the BIOS firmware.

[0027] In a possible implementation, the data represents a first number of instructions executed per unit time; determining the metric information based on the data includes:

[0028] Determine the occupancy rate of the CPU based on the ratio of the first number to a second number; the second number is the number of instructions executed per unit time at the nominal frequency.

[0029] In a second aspect, an energy efficiency adjustment device is provided. The device includes functional units for performing any of the methods provided in the first aspect, and the actions performed by each functional unit are implemented by hardware or by hardware executing corresponding software. For example, the energy efficiency adjustment device may include an acquisition unit, a determination unit, and a configuration unit; the acquisition unit is configured to acquire metric information of the CPU, where the metric information is used to indicate the current load or occupancy rate of the CPU; the determination unit is configured to determine target energy efficiency information of the CPU based on the metric information, where the target energy efficiency information is used to represent target operating parameters at the current load or occupancy rate of the CPU; the configuration unit is configured to configure the target energy efficiency information to the CPU so that the CPU adjusts the current operating parameters to the target operating parameters.

[0030] In a third aspect, a baseboard management controller is provided, including a controller and a memory; the controller is coupled to the memory; the memory is for computer program instructions; the controller is configured to call the computer program instructions in the memory to execute any of the methods provided in the first aspect.

[0031] In a fourth aspect, a computing device is provided, including the baseboard management controller provided in the third aspect and a central processing unit (CPU), where the baseboard management controller is connected to the CPU.

[0032] In a fifth aspect, a computer-readable storage medium is provided, storing computer-executable instructions, which when running on a BMC device, cause the BMC device to execute any of the methods provided in the first aspect.

[0033] In a sixth aspect, a computer program product is provided, including computer-executable instructions, which when running on a BMC device, cause the BMC device to execute any of the methods provided in the first aspect.

[0034] Among them, for the technical effects brought by any implementation manner of the second aspect to the sixth aspect, reference may be made to the technical effects brought by different implementation manners of the first aspect, which will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 FIG. is a system architecture diagram of a computing device provided by an embodiment of the present application;

[0036] Figure 2 FIG. is a schematic structural diagram of a computing device provided by an embodiment of the present application;

[0037] Figure 3 FIG. is a schematic flow diagram of an energy efficiency adjustment method for a CPU provided by an embodiment of the present application;

[0038] Figure 4 FIG. is a schematic structural diagram of an energy efficiency adjustment device provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0039] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application.

[0040] Among them, in the description of the present application, unless otherwise specified, " / " means that the objects associated before and after are in an "or" relationship. For example, A / B may represent A or B; "and / or" in the present application is only a description of the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. These three situations, where A and B may be singular or plural.

[0041] Moreover, in the description of the present application, unless otherwise specified, "a plurality of" means two or more than two. "At least one (item)" or similar expressions thereof refer to any combination of these items, including any combination of single item (item) or plural items (items). For example, at least one (item) of a, b, or c may represent: a, b, c, a - b, a - c, b - c, or a - b - c, where a, b, c may be single or multiple.

[0042] In addition, in order to facilitate the clear description of the technical solutions of the embodiments of the present application, in the embodiments of the present application, the words "first", "second" and the like are used to distinguish the same items or similar items with substantially the same functions and effects. Those skilled in the art will understand that the words "first", "second" and the like do not limit the quantity and execution order, and the words "first", "second" and the like do not necessarily limit the differences. At the same time, in the embodiments of the present application, the words "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or design solutions. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete manner for ease of understanding.

[0043] The following is a brief introduction to the relevant terms involved in the embodiments of the present application.

[0044] Baseboard management controller (BMC): It is the core component of server out-of-band management. It is a dedicated microcontroller independent of the server operating system and main processor, usually built into the motherboard of servers, network equipment and other complex computer systems. It is mainly responsible for monitoring and managing the status of system hardware, such as monitoring key parameters such as system temperature, voltage, fan speed, power status, etc., and providing remote management and control functions, such as remote monitoring, remote restart, etc.

[0045] It should be noted that different manufacturers may have different names for baseboard management controllers, such as BMC, integrated lights-out (iLO), integrated Dell remote access (IDRAC), hardware device management (HDM), integrated management module (IMM), etc. The above modules with different names can all be understood as the BMC in the embodiments of the present application.

[0046] Basic input / output system (BIOS): It is a set of basic software that is loaded and run when a computing unit (such as a server) is started. It is responsible for initializing and configuring the computer hardware and starting the operating system. BIOS firmware refers to the initialization program (including basic input / output programs) that is fixed to the memory of the computer motherboard. The computing unit initializes and configures the hardware in the computing unit by running the BIOS firmware, and loads the computing unit's operating system.

[0047] Interrupt: It refers to the process in which the CPU temporarily suspends the execution of the current program and switches to execute the program and execution process for handling new situations when needed. That is, during the program running process, when a situation that must be immediately processed by the CPU occurs, the process in which the CPU temporarily suspends the execution of the program and switches to handle this new situation is called an interrupt.

[0048] System Management Interrupt (SMI): It represents an interrupt mechanism used to manage the hardware state of a computer and handle various events. It is responsible for system startup, memory management, and interrupt handling, and also includes the control of external buses, clocks, and power supplies. In a real-time multitasking operating system of a single-chip microprocessor, it also involves task scheduling, communication, and the management of real-time clocks and input / outputs, as well as interrupt management to ensure the stable operation and efficient collaboration of the system.

[0049] Hereinafter, an exemplary introduction to the application scenario of the embodiments of the present application will be given.

[0050] The energy efficiency performance of a server is generally evaluated based on the performance and energy consumption of the server under a specific load level. The energy efficiency performance of the server is of great significance for the overall operating cost and environmental protection of the data center.

[0051] By monitoring the CPU load situation of the server and dynamically adjusting parameters such as the frequency and voltage of the CPU, better energy efficiency can be obtained.

[0052] The embodiments of the present application provide a method for adjusting the energy efficiency of a CPU, which is applied to the BMC, obtains the metric information of the CPU, and the metric information is used to indicate the load or occupancy rate of the CPU; based on the metric information, determines the target energy efficiency information of the CPU, and the target energy efficiency information is used to represent the target working parameters under the current load or occupancy rate of the CPU; configures the target energy efficiency information to the CPU so that the CPU adjusts the current working parameters to the target working parameters.

[0053] Since the BMC is the core component of out-of-band management of the server and is a dedicated microcontroller independent of the server operating system and the main processor, the operation of the BMC is relatively independent of the operation of the CPU. The process of the BMC interacting with the CPU does not require activating the BIOS firmware, and thus does not need to activate the BIOS by triggering the SMI interrupt. Without triggering an interrupt, it will not affect the normal operation of the application programs in the operating system, thereby optimizing the performance of the business system.

[0054] Hereinafter, an exemplary introduction to the system architecture of the embodiments of the present application will be given.

[0055] Generally, one BMC is set in a computing node, and multiple CPUs can be set in the computing node. That is, one BMC can be connected to multiple CPUs.

[0056] It should be noted that the multiple CPUs included in the computing node refer to CPUs at the physical level, and need to be distinguished from the concept of multi-core CPUs. That is, among the multiple CPUs connected to the same BMC, there can be single-core CPUs or multi-core CPUs.

[0057] As Figure 1 shown, an embodiment of the present application provides a system architecture of a computing device. The computing device may include a BMC and multiple CPUs. In the figure, CPU-0, CPU-1, and CPU-n are shown. Among them, the BMC can be connected to each CPU in the computing device.

[0058] Among them, for each CPU, the BMC can perform energy efficiency adjustment on it based on the energy efficiency adjustment method of the CPU provided by the embodiment of the present application.

[0059] In the embodiment of the present application, the computing device can be a network device or a terminal device.

[0060] The network device may include a server, etc. Among them, the server can be a physical or logical server, or two or more physical or logical servers sharing different responsibilities and cooperating with each other to implement the various functions of the server.

[0061] Exemplarily, the server can be a blade server, a high-density server, a rack server, a tower server, an AI server, etc.

[0062] The terminal device may include an augmented reality (AR) device, a virtual reality (VR) device, a personal digital assistant (PDA), an ultra-mobile personal computer (UMPC), a tablet computer, a notebook computer, a netbook, a desktop computer, an all-in-one computer, etc.

[0063] It should be noted that the embodiment of the present application does not limit the device form of the computing device, and the above is only an exemplary description.

[0064] Figure 2 It is a schematic structural diagram of a computing device provided by an embodiment of the present application.

[0065] It should be noted that Figure 2 the system architecture shown is only an exemplary description, and it does not constitute a limitation on the system architecture of the computing device provided by the embodiment of the present application.

[0066] In the embodiments of the present application, the computing device may specifically be a network device. The network device may include a server, etc. Among them, the server may be a physical server, or may be two or more physical servers sharing different responsibilities and cooperating with each other to implement various functions of the server. When the computing device is multiple servers, the scheduling system is a server cluster with high availability capabilities.

[0067] Exemplarily, the server may be a blade server, a high-density server, a rack server, or a tower server, etc. The terminal device may include a personal digital assistant (PDA), an ultra-mobile personal computer (UMPC), a laptop computer, a netbook, a desktop computer, an all-in-one computer, etc.

[0068] Among them, the hardware part of the computing device includes a processor, a basic input / output system (BIOS) chip, an out-of-band controller, and a memory. The software part mainly includes BIOS, an out-of-band management module, and an operating system (OS), as Figure 2 shown.

[0069] The processor may include a central processing unit (CPU). The CPU includes one or more CPU cores, and the operations of processing data by the CPU are all executed by the CPU cores. The more CPU cores included in the CPU, the faster the data processing speed. In the embodiments of the present application, the processor in the computing device is used as a scheduler to execute the above workflow scheduling method.

[0070] The BIOS chip is a chip provided on the motherboard for initializing and detecting various hardware during the startup process of the computing device. The BIOS chip includes a flash memory area.

[0071] The out-of-band management module is located inside the out-of-band controller, and the operating system is located inside the processor.

[0072] The out-of-band management module may be a management unit for non-business modules. For example, the out-of-band management module can remotely maintain and manage the computing device through a dedicated data channel. The out-of-band management module is completely independent of the operating system of the computing device and can communicate with the BIOS and the operating system through the out-of-band management interface of the computing device.

[0073] Exemplarily, the out-of-band management module may include a management unit for computing device operation status, a management system in a management chip, a computing device motherboard management unit (baseboard management controller, BMC), a system management module (system management mode, SMM), etc. It should be noted that the embodiments of the present application do not limit the specific form of the out-of-band management module, and the above is only an exemplary description.

[0074] OS is a computer program that manages and controls the hardware and software resources of a computing device. Any other software must be supported by the operating system to run. After the computing device is powered on, the BIOS first starts a series of operations such as self-test and initialization, and then guides the OS to start, so that the user can use the computing device normally.

[0075] BIOS is a set of programs that are fixed on the BIOS chip on the motherboard of a computing device. The main function of BIOS is to provide the lowest-level and most direct hardware settings and controls for computing devices.

[0076] Memory, also called internal storage or main memory, is installed in memory slots on the motherboard of a computing device.

[0077] It should be noted that the system architecture and application scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Ordinary technicians in this field can know that with the evolution of the system architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0078] For ease of understanding, the energy efficiency adjustment method of the CPU provided in the embodiment of the present application is exemplarily introduced below in combination with the above system architecture and accompanying drawings.

[0079] Figure 3 The flowchart of a method for adjusting the energy efficiency of a CPU according to an exemplary embodiment is shown. Exemplarily, the method for adjusting the energy efficiency of a CPU can be applied to a BMC, and the method steps include the following S301-S303.

[0080] S301: Obtain CPU indicator information, where the indicator information is used to indicate the CPU load or occupancy rate.

[0081] The BMC is connected to the CPU via a hardware channel, which may also be referred to as an out-of-band channel in the art.

[0082] The above hardware channels can be channels based on specific protocols, such as the platform environment control interface (PECI) protocol, the inter-integrated circuit (I2C) protocol, and the improved inter-integrated circuit (I3C) protocol.

[0083] In one embodiment of the present application, the BMC obtains the metric information of the CPU through a hardware channel.

[0084] Specifically, the BMC accesses specific registers in the CPU through a hardware channel, and determines the metric information of the CPU according to the values of the registers. Among them, the specific register can be denoted as the first register, and the first register is configured to store metric information or data for calculating metric information.

[0085] Exemplarily, when the metric information is the occupancy rate of the CPU, the CPU monitors its own occupancy rate in real time and writes the occupancy rate into a register accessible by the BMC. The BMC accesses this register through a hardware channel, thereby directly reading the occupancy rate of the CPU.

[0086] Exemplarily, the CPU writes the data for calculating the occupancy rate into a register accessible by the BMC. The BMC accesses this register through a hardware channel and then performs calculations based on a specific algorithm to obtain the occupancy rate.

[0087] In some embodiments of the present application, the data for calculating the occupancy rate can be a first number, that is, the number of instructions executed per unit time; after the BMC reads the first number stored in the register, it calculates the ratio of the first number to the second number to obtain the occupancy rate of the CPU. Among them, the second number is the number of instructions executed per unit time at the nominal frequency.

[0088] Among them, the second number can be pre-determined, and the second number can be pre-stored in the BMC.

[0089] It can be seen that the BMC can directly access the registers of the CPU through a hardware channel, and obtain the occupancy rate of the CPU by directly reading the values of the registers, or reading the values of the registers and then performing operations. Since the method of directly accessing the registers is adopted, it is not necessary to wake up the BIOS firmware of the CPU.

[0090] S302: Based on the metric information, determine the target energy efficiency information of the CPU, and the target energy efficiency information is used to represent the target working parameters at the current load or occupancy rate of the CPU.

[0091] In the embodiments of the present application, when determining the current occupancy rate of the CPU, the target energy efficiency information can be calculated through a specified algorithm. The target energy efficiency information can be understood as the energy efficiency information that enables the best energy efficiency performance of the CPU.

[0092] Among them, in the case of the current load or occupancy rate of the CPU, the energy efficiency performance of the CPU is directly related to the working parameters, that is, the energy efficiency performance of the CPU depends on the current working parameters. Therefore, the target energy efficiency information can also be understood as the target working parameters representing the current load or occupancy rate of the CPU.

[0093] In some embodiments of the present application, the energy efficiency information represents the performance state of the CPU and can be represented by P-state. Those skilled in the art can understand that the performance state includes different levels. By changing the level of the performance state, the hardware inside the CPU can be adjusted, the working voltage and working frequency of the CPU can be changed, and thus the energy efficiency performance of the CPU can be changed.

[0094] It should be noted that when the CPU is under the same load condition, the CPU with a lower working frequency and a higher occupancy rate has better comprehensive energy efficiency performance than the CPU with a higher working frequency and a lower occupancy rate.

[0095] For the sake of easy understanding, the following is an example. For example, when the CPU processes tasks with high parallelism that require multiple cores to work simultaneously, although the working frequency may be low, the occupancy rate is high. In this case, all or most of the cores of the CPU are working, and the overall working efficiency of the CPU is high, and the energy efficiency performance is good. When the CPU processes single-threaded tasks, it may overclock to provide a higher processing speed, but the occupancy rate is low at this time. In this case, only a few cores of the CPU are working for most of the time, and the overall working efficiency is low, and the energy efficiency performance is poor.

[0096] Based on the above analysis, in some embodiments of the present application, the target occupancy rate of the CPU can be preset, which can also be understood as the expected occupancy rate. That is, it is expected that the CPU works at this occupancy rate to obtain better energy efficiency performance. If there is a deviation between the obtained occupancy rate and the target occupancy rate, the level of the performance state is adjusted according to the deviation.

[0097] Based on the above analysis, when the occupancy rate of the CPU is high, the energy efficiency performance is good. Exemplarily, the target occupancy rate can be set to 95%, or a value between 90% and 95%.

[0098] In some embodiments of the present application, the target level of the performance state is determined according to the magnitude relationship between the current occupancy rate included in the indicator information and the preset target occupancy rate; wherein, when the current occupancy rate is lower than the target occupancy rate, the target level is higher than the current level of the performance state; when the current occupancy rate is higher than the target occupancy rate, the target level is lower than the current level.

[0099] Specifically, when the level of the performance state changes, the CPU adjusts the internal hardware, and the working voltage and working frequency will change accordingly. That is, it can be understood that different levels of performance states correspond to different working frequencies and / or working voltages.

[0100] Exemplarily, when the performance state is set to the P0 state (the first level), the upper limit of the working frequency of the CPU is set to the maximum working frequency supported by the CPU, and the upper limit of the working voltage is also set to the maximum working voltage supported by the CPU; when the performance state is set to the P1 state (the second level), the upper limit of the working frequency of the CPU is reduced relative to the P0 state, and the upper limit of the working voltage of the CPU is reduced relative to the P0 state. As the level of the performance state increases, the upper limits of the working frequency and working voltage of the CPU decrease in turn.

[0101] Continuing the above example, if the current occupancy rate of the CPU is lower than the preset target occupancy rate, the level of the performance state can be increased. For example, the current level of the performance state is increased to obtain the target level. Since the level is increased, the maximum working frequency and maximum working voltage supported by the CPU are reduced, and the working frequency of the CPU will gradually decrease, so that more cores may be occupied for processing, increasing the occupancy rate of the CPU. It can be seen that by increasing the level of the performance state, the CPU is adjusted in the direction of lower working frequency and higher occupancy rate, which can optimize the energy efficiency performance of the CPU.

[0102] Continuing the above example, if the current occupancy rate of the CPU is higher than the preset target occupancy rate, the level of the performance state can be decreased. For example, the current level of the performance state is decreased to obtain the target level. Since the level is decreased, the maximum working frequency and maximum working voltage supported by the CPU are increased, and the working frequency of the CPU will gradually increase, thereby reducing the occupancy rate of the CPU. Since it is not conducive to achieving better energy efficiency performance when the CPU has been at too high (e.g., close to 100%) occupancy rate, the occupancy rate of the CPU is appropriately reduced.

[0103] It can be seen that by adjusting the level of the performance state, the occupancy rate of the CPU is basically stabilized at the target occupancy rate, ensuring that the CPU always has good energy efficiency performance.

[0104] In some embodiments of the present application, according to the current occupancy rate included in the indicator information and the pre-established mapping relationship, the target level of the performance state is determined; wherein, the mapping relationship includes: the correspondence between the occupancy rate of the CPU and the performance state.

[0105] Specifically, according to the energy efficiency performance measured when different levels of the performance state are enabled at different occupancy rates of the CPU, a mapping relationship is established.

[0106] This mapping relationship includes the correspondence between the occupancy rate of the CPU and the level of the measured optimal performance state. Among them, the level of the measured optimal performance state can be understood as: in the case where the CPU is at a specific occupancy rate, the level of the measured performance state that enables the evaluation of the energy efficiency performance of the CPU to reach the optimal.

[0107] Exemplarily, in the measurement stage, when the occupancy rate of the CPU is 80%, the P0 level of the performance state is enabled, and after a specific first period, the energy efficiency performance of the CPU is tested in the second period; when the occupancy rate of the CPU is 80%, the P1 level of the performance state is enabled, and after a specific first period, the energy efficiency performance of the CPU is tested in the second period. And so on, the energy efficiency performance corresponding to different levels can be obtained after enabling different levels of the performance state when the occupancy rate of the CPU is 80%, and then the optimal level is selected from them.

[0108] If after measurement, when the occupancy rate of the CPU is 80%, the energy efficiency performance obtained by enabling the Pn level of the performance state is better than other levels, then a correspondence relationship is established between the CPU occupancy rate of 80% and the Pn level of the P-state.

[0109] Through a large number of measurements, the above mapping relationship can be obtained. Exemplarily, the mapping relationship includes: the P10 state of the performance state corresponding to a CPU occupancy rate of 10%, the P9 state of the performance state corresponding to a CUC occupancy rate of 20%; the P1 state of the performance state corresponding to a CPU occupancy rate of 90%.

[0110] Among them, the present application embodiments do not make specific limitations on the method for evaluating the energy efficiency performance.

[0111] Exemplarily, the energy efficiency performance of the server can be the ratio of the server's ability to complete computing tasks per unit time to its energy consumption. A server with better energy efficiency performance can complete more computing tasks under the same energy consumption, or consume less energy when completing the same computing tasks.

[0112] Therefore, when the current occupancy rate of the CPU is determined, according to the above mapping relationship, the target level of the performance state, that is, the optimal level, can be determined. Since the above mapping relationship is obtained through actual measurement, it further ensures that the CPU is configured to the optimal performance state level, improving the energy efficiency performance of the CPU.

[0113] S303: Configure the target energy efficiency information to the CPU so that the CPU adjusts the current working parameters to the target working parameters.

[0114] In the embodiment of the present application, the BMC configures the target energy efficiency information to the CPU. After the CPU reads the target energy efficiency information, it automatically adjusts the current working parameters.

[0115] In some embodiments of the present application, the working parameters include the CPU working frequency and / or the CPU working voltage.

[0116] Exemplarily, the target energy efficiency information is the target level of the performance state. After the CPU adjusts the performance state to the target level, the working voltage and / or the working frequency of the CPU will change with the change of the performance state level.

[0117] It can be seen that by means of the BMC configuring the energy efficiency information to the CPU, the CPU is instructed to adjust the working frequency and / or the working voltage to ensure that the CPU maintains a good energy efficiency performance.

[0118] In some embodiments of the present application, through the hardware channel between the BMC and the CPU, the BMC configures the target energy efficiency information to the second register in the CPU, so that the CPU adjusts the current working parameters to the target working parameters based on the second register. Among them, the second register is configured to store the target energy efficiency information.

[0119] Through the hardware channel, the BMC can directly access / modify the value of the register in the CPU. The BMC writes the target energy efficiency information to be configured into a specific register, and the CPU can read the value of the register and obtain the target energy efficiency information, and then adjust its own working parameters.

[0120] Applying the energy efficiency adjustment method of the CPU provided by the embodiment of the present application, the BMC obtains the metric information of the CPU, determines the target energy efficiency information based on the metric information, and configures the target energy efficiency information to the CPU so that the CPU adjusts its own working parameters to achieve energy efficiency adjustment. Since the BMC is the core component of the out-of-band management of the server and is a dedicated microcontroller independent of the server operating system and the main processor, the operation of the BMC is relatively independent of the operation of the CPU. The process of the BMC interacting with the CPU does not require activating the BIOS firmware, and thus does not require activating the BIOS by triggering the SMI interrupt. Not triggering the interrupt will not affect the normal operation of the application programs in the operating system, thereby optimizing the performance of the business system.

[0121] In some embodiments of the present application, the above-mentioned energy efficiency adjustment method for the CPU can be triggered periodically. For example, triggered by a timer, every preset time interval, obtain the metric information of the CPU, and perform subsequent energy efficiency adjustment steps based on the metric information.

[0122] Among them, the timer can run in the BMC software. That is, set the timer function in the BMC software, without occupying the timer inside the CPU. Compared with the related art, it does not need to rely on the timer of the CPU.

[0123] Specifically, in the related art, it is necessary to enable the timing function of the CPU, and trigger the SMI interrupt periodically to activate the BIOS firmware, so it strongly depends on the timer of the CPU. However, some types of operating systems will occupy the timer of the CPU, resulting in the BIOS firmware being unable to use the timer. Or, some CPUs themselves do not support or cannot start the internal timer, resulting in the BIOS firmware being unable to use the timer. The above situations all lead to the inability to achieve the energy efficiency adjustment of the CPU.

[0124] In the embodiments of the present application, the main body for performing the CPU energy efficiency adjustment is the BMC. By running the timer in the software of the BMC, the dependence on the timer in the CPU can be eliminated.

[0125] Correspondingly, in the embodiments of the present application, triggered by the timer running in the BMC, every preset time interval, trigger and execute the steps of S301-S303 above once. That is, by means of periodic and cyclic execution of energy efficiency adjustment, the CPU is maintained at a better energy efficiency performance.

[0126] In some embodiments of the present application, the method further includes: obtaining first configuration information input by the user; the first configuration information includes at least one of the following: the adjustment upper limit and / or lower limit of the target energy efficiency information, the target occupancy rate of the CPU, and the time interval for triggering the energy efficiency adjustment of the CPU.

[0127] Specifically, the BMC can be configured with one or more network interfaces for accessing the network, so as to support remote access and configuration. The user can send configuration information to the BMC, and the configuration information can include the parameter information required to be set during the BMC's execution of the CPU energy efficiency adjustment. For example, the target occupancy rate of the CPU and the time interval for triggering the CPU energy efficiency adjustment set above. In addition, the adjustment upper limit and / or lower limit of the target energy efficiency information can also be set, such as the lowest level and / or the highest level of the performance state.

[0128] It can be seen that in the solution of the present application, since the BMC has a network interface and can be connected to the network, it supports the user to customize the configuration of the parameters involved in the energy efficiency adjustment process, which is more flexible and convenient. It is beneficial to achieve more accurate energy efficiency adjustment.

[0129] The following briefly introduces the process of the user remotely configuring parameters for the BMC.

[0130] Exemplarily, the configuration process includes the following steps:

[0131] Step 11: The user opens the network configuration of the computer and configures an IP address in the same subnet as the BMC network interface of the server to ensure that the computer and the server can communicate with each other within the same local area network. Among them, the computer is directly connected to the BMC network interface of the server in advance, or connected to the BMC network interface of the server through a switch.

[0132] Step 12: The user opens a browser on the computer and enters the IP address of the BMC network of the server in the address bar of the browser.

[0133] Step 13: Log in to the BMC management interface. That is, enter the correct username and password on the login interface according to the model and manufacturer to log in.

[0134] Step 14: In the BMC management interface, navigate to the corresponding function module and issue the configuration information.

[0135] In some embodiments of the present application, the method further includes: obtaining second configuration information input by the user, where the second configuration information is used to represent whether to enable the energy efficiency adjustment function for the CPU. Correspondingly, before obtaining the index information of the CPU, it further includes: judging whether to enable the energy efficiency adjustment function for the CPU based on the second configuration information. If so, execute the step of obtaining the index information of the CPU.

[0136] That is, the configuration information input by the user can also be information used to control the on / off state of the energy efficiency adjustment function.

[0137] Specifically, when the user configures, the second configuration information can be input. The second configuration information can be of bool type and is used to represent whether to enable the energy efficiency adjustment function for the CPU. For example, when the second configuration information is the first value, it represents that the energy efficiency adjustment function for the CPU is currently enabled; when the second configuration information is the second value, it represents that the energy efficiency adjustment function for the CPU is currently disabled.

[0138] The BMC determines whether the energy efficiency adjustment function for the CPU is enabled according to the second configuration information. Only when it is enabled, execute the subsequent steps S301 - S303.

[0139] It can be seen that in the embodiments of the present application, the user is also supported to configure the on / off of the energy efficiency adjustment function. In unnecessary time periods (such as when the server is in sleep mode or the load of the server is low), the energy efficiency adjustment function can be selected to be turned off, which improves the flexibility of energy efficiency adjustment and is beneficial to saving the computing resources of the BMC.

[0140] In some embodiments of the present application, the method further includes: sending a stop interrupt signal to the CPU, where the stop interrupt signal is used to instruct the CPU to cancel sending a system management interrupt (SMI) signal for activating the BIOS firmware.

[0141] Specifically, in the related art, to monitor the CPU occupancy rate in the server through the BIOS firmware, it is necessary to start the timing function of the CPU and trigger the SMI interrupt regularly to activate the BIOS firmware.

[0142] With the CPU energy efficiency adjustment method provided in the embodiments of the present application, energy efficiency adjustment is implemented based on the BMC. Since the BMC is the core component of out-of-band management of the server and is a dedicated microcontroller independent of the server operating system and the main processor, the operation of the BMC is relatively independent of the operation of the CPU. During the process of the BMC interacting with the CPU, it is not necessary to activate the BIOS firmware, and thus it is not necessary to activate the BIOS by triggering the SMI interrupt.

[0143] Correspondingly, the BMC can send a stop interrupt signal to the CPU, and the stop interrupt signal is used to instruct the CPU to cancel sending a system management interrupt (SMI) signal for activating the BIOS firmware. Thus, with the CPU energy efficiency adjustment method provided in the embodiments of the present application, CPU energy efficiency adjustment can be implemented based on the BMC.

[0144] The above mainly introduces the solution provided in the embodiments of the present application from the perspective of the method. To implement the above functions, the energy efficiency adjustment device includes the corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving the hardware depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0145] The embodiments of the present application can, according to the above method, exemplarily divide the functional modules of the energy efficiency adjustment device. For example, the energy efficiency adjustment device can include each functional module corresponding to each functional division, or two or more functions can be integrated into one processing module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiments of the present application is illustrative, and is only a logical function division. There may be other division methods in actual implementation.

[0146] Exemplarily,Figure 4 Fig. Figure 4 shows a possible schematic diagram of the energy efficiency adjustment device involved in the above embodiments. The energy efficiency adjustment device 400 may include an acquisition unit 401, a determination unit 402, and a configuration unit 403. Among them, the acquisition unit 401 is configured to acquire the index information of the CPU, and the index information is used to indicate the current load or occupancy rate of the CPU; the determination unit 402 is configured to determine the target energy efficiency information of the CPU based on the index information, and the target energy efficiency information is used to represent the target working parameters at the current load or occupancy rate of the CPU; the configuration unit 403 is configured to configure the target energy efficiency information to the CPU so that the CPU adjusts the current working parameters to the target working parameters.

[0147] Optionally, the acquisition unit 401 is specifically configured to:

[0148] Acquire data from a first register in the CPU that can characterize the index information; the first register is configured to store the index information or data for calculating the index information;

[0149] Determine the index information based on the data.

[0150] Optionally, the configuration unit 403 is specifically configured to:

[0151] Configure the target energy efficiency information to a second register in the CPU, and the second register is configured to store the target energy efficiency information.

[0152] Optionally, the index information is used to indicate the current occupancy rate of the CPU, and the target energy efficiency information is the performance state; the determination unit 402 is specifically configured to:

[0153] Determine the target level of the performance state according to the magnitude relationship between the current occupancy rate and a preset target occupancy rate;

[0154] Wherein, when the current occupancy rate is lower than the target occupancy rate, the target level is higher than the current level of the performance state; when the current occupancy rate is higher than the target occupancy rate, the target level is lower than the current level.

[0155] Optionally, the index information is used to indicate the current occupancy rate of the CPU, and the target energy efficiency information is the performance state; the determination unit 402 is specifically configured to:

[0156] Determine the target level of the performance state according to the current occupancy rate and the mapping relationship;

[0157] Wherein, the mapping relationship includes: the corresponding relationship between the occupancy rate of the CPU and the performance state.

[0158] Optionally, the operating parameters include the CPU operating frequency and / or the CPU operating voltage.

[0159] Optionally, the obtaining unit 401 is specifically configured to:

[0160] Under the trigger of a timer running in the BMC, obtain the metric information of the CPU at preset time intervals.

[0161] Optionally, the device further includes: a first information configuration unit, configured to:

[0162] Obtain first configuration information input by a user; the first configuration information includes at least one of the following:

[0163] The upper limit and / or lower limit of the adjustment of the target energy efficiency information, the target occupancy rate of the CPU, and the time interval for triggering the energy efficiency adjustment of the CPU.

[0164] Optionally, the device further includes: a second information configuration unit, configured to:

[0165] Obtain second configuration information input by a user; the second configuration information is used to represent whether to enable the energy efficiency adjustment function for the CPU;

[0166] The obtaining unit 401 is specifically configured to:

[0167] When it is determined based on the second configuration information that the energy efficiency adjustment function is enabled, obtain the metric information of the CPU.

[0168] Optionally, the data represents a first number of instructions executed per unit time; the determining unit 402 is specifically configured to:

[0169] Determine the occupancy rate of the CPU based on the ratio of the first number to a second number; the second number is the number of instructions executed per unit time at the nominal frequency.

[0170] Optionally, the device further includes:

[0171] A signal sending unit, configured to send a blocking interrupt signal to the CPU, where the blocking interrupt signal is used to instruct the CPU to cancel sending a system management interrupt SMI signal for activating the BIOS firmware.

[0172] An embodiment of the present application further provides a baseboard management controller, including a controller and a memory; the controller is coupled to the memory; the memory is used for computer program instructions; the controller is used to call the computer program instructions in the memory to execute any one of the methods in the above embodiments.

[0173] An embodiment of the present application further provides a computing device, including any one of the substrate management controllers and a central processing unit CPU in the above embodiments, and the out-of-band controller is connected to the CPU.

[0174] An embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program runs on a BMC device, the BMC device is caused to execute any one of the methods in the above embodiments.

[0175] For the explanations and beneficial effects descriptions of the relevant content in any of the above-provided computer-readable storage media, reference can be made to the corresponding embodiments above, and details are not repeated here.

[0176] An embodiment of the present application further provides a computer program product including instructions. When the instructions run on a BMC device, the BMC device is caused to execute any one of the methods in the above embodiments. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions according to the embodiments of the present application are generated in whole or in part. It should be noted that the above-mentioned devices for storing computer instructions or computer programs provided in the embodiments of the present application, such as but not limited to, the above-mentioned memory, computer-readable storage medium, and communication chip, etc., are all non-transitory.

[0177] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions according to the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.

[0178] Computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (such as coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that incorporates one or more media. The available medium can be a magnetic medium (such as a floppy disk, hard disk, magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0179] Although the present application has been described in conjunction with specific features and their embodiments, it is obvious that various modifications and combinations can be made without departing from the spirit and scope of the present application. Accordingly, the present specification and the drawings are merely exemplary illustrations of the present application defined by the appended claims and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the present application. Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these changes and modifications.

Claims

1. A method for adjusting the energy efficiency of a central processing unit (CPU), characterized in that, Applied to a baseboard management controller (BMC), the BMC is connected to the CPU, and the method includes: Obtain metric information of the CPU, where the metric information is used to indicate the current load or occupancy rate of the CPU; Based on the metric information, determine target energy efficiency information of the CPU, where the target energy efficiency information is used to represent target operating parameters at the current load or occupancy rate of the CPU; Configure the target energy efficiency information to the CPU, so that the CPU adjusts its current operating parameters to the target operating parameters.

2. The method according to claim 1, characterized in that, The obtaining the metric information of the CPU includes: Obtain data that can characterize the metric information from a first register in the CPU; the first register is configured to store the metric information or data for calculating the metric information; Based on the data, determine the metric information.

3. The method according to claim 1 or 2, characterized in that The configuring the target energy efficiency information to the CPU includes: Configure the target energy efficiency information to a second register in the CPU, and the second register is configured to store the target energy efficiency information.

4. The method according to any one of claims 1-3, characterized in that, The metric information is used to indicate the current occupancy rate of the CPU, and the target energy efficiency information is a performance state; the determining the target energy efficiency information of the CPU based on the metric information includes: Determine a target level of the performance state according to the magnitude relationship between the current occupancy rate and a preset target occupancy rate; Wherein, when the current occupancy rate is lower than the target occupancy rate, the target level is higher than the current level of the performance state; when the current occupancy rate is higher than the target occupancy rate, the target level is lower than the current level.

5. The method according to any one of claims 1-3, characterized in that, The metric information is used to indicate the current occupancy rate of the CPU, and the target energy efficiency information is a performance state; the determining the target energy efficiency information of the CPU based on the metric information includes: Determine a target level of the performance state according to the current occupancy rate and a mapping relationship; Wherein, the mapping relationship includes: the corresponding relationship between the occupancy rate of the CPU and the performance state.

6. The method according to any one of claims 1-5, characterized in that The obtaining the metric information of the CPU includes: Under the trigger of a timer running in the BMC, obtain the metric information of the CPU at preset time intervals.

7. The method according to any one of claims 1-6, characterized in that, The method further includes: Send a stop interrupt signal to the CPU, and the stop interrupt signal is used to instruct the CPU to cancel sending a system management interrupt (SMI) signal for activating the BIOS firmware.

8. The method according to claim 3, wherein The data characterizes a first number of instructions executed per unit time; the determining the metric information based on the data includes: Determine the occupancy rate of the CPU based on the ratio of the first number to a second number; the second number is the number of instructions executed per unit time at the nominal frequency.

9. A baseboard management controller, characterized in that, Includes a controller and a memory; the controller is coupled to the memory; The memory is used for computer program instructions; The controller is used to call the computer program instructions in the memory to execute the method according to any one of claims 1-8.

10. A computing device, characterized in that, Comprising a baseboard management controller as described in claim 9 and a central processing unit (CPU), the baseboard management controller being connected to the CPU.

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