Chip pin multiplexing method and device, computer equipment and storage medium

Abstract

The invention provides a chip pin multiplexing method and device, computer equipment and a storage medium. The chip pin multiplexing method comprises the following steps: acquiring pin information of a chip; grouping the pin information according to a preset rule; storing the grouped pin information in a pin multiplexing file; identifying a custom code in the pin multiplexing file; updating the pin multiplexing file based on the custom code; wherein the custom code is used for controlling the working mode of the pin. According to the method, the pin information is grouped and sorted, so that similar or similar pin information can be gathered, searching in a plurality of pins is not needed during soc integration, the integration complexity is reduced, debugging is facilitated, meanwhile, the user-defined code is added into the pin multiplexing file, and the debugging efficiency is improved. The selection of the function mode or the test mode and the like by the pin is realized through the custom code, so that the pin multiplexing in the function mode and various test modes can be automatically adapted. And manual adjustment is not needed.

Description

Technical Field

[0001] The present invention relates to the technical field of chip design, and particularly to a method, device, computer device and computer-readable storage medium for chip pin multiplexing. Background Art

[0002] With the continuous progress of chip design technology, the optimization requirements of SoC for power consumption, performance and area are becoming increasingly stringent. To balance cost and integration, the number of chip pins is tending to be tightened due to packaging limitations, while the number of functional modules is increasing exponentially (such as multi-core CPUs, AI accelerators, high-speed interface IPs, etc.), forcing a single pin to support more function multiplexing scenarios. In a complex on-chip system, pin function multiplexing has become a key technology for realizing resource sharing between modules, and its complexity has been significantly improved. A single pin may support up to a dozen functions, and the pin multiplexing configuration in the test mode is often different from that in the functional mode.

[0003] Existing pin multiplexing systems mainly focus on pin multiplexing in the functional mode and cannot well adapt to the test mode. The pin multiplexing configuration in the test mode still needs to be manually filled in and debugged item by item in the code, which not only prolongs the development cycle, but also easily introduces logical conflicts such as signal competition and timing violations, and it is difficult to ensure the consistency and reliability of the two sets of configurations for functions and tests. At the same time, due to the differences in test interfaces of different generations of SoCs, the existing pin multiplexing cannot be automatically adapted, and developers need to make manual modifications, resulting in low debugging efficiency. Summary of the Invention

[0004] The present invention provides a method, device, computer device and storage medium for chip pin multiplexing to solve the technical problems of insufficient support for the test mode, poor SOC adaptability and difficult debugging in the existing pin multiplexing system.

[0005] An embodiment of the present invention provides a method for chip pin multiplexing, including: Reading a pin information table; Identifying the position of the pin in the pin information table and determining the corresponding pin information; Grouping the pin information according to a preset rule; Storing the grouped pin information in a pin multiplexing file to generate a pin model, and generating a pin instantiation model according to the pin information in the pin multiplexing file. The pin instantiation model includes that the instantiation of the pin model in the pin instantiation file comes from the instantiation model preset in the script; Identifying the custom code in the pin multiplexing file and sorting out the special pin models in the custom code; Updating the pin multiplexing file based on the custom code; Among them, the custom code is the code that cannot be implemented by a script in the test function or is a special pin instantiation file.

[0006] In one embodiment, the pin information includes at least one of a pin name, control information, function information, and test information.

[0007] In one embodiment, the grouping of the pin information according to a preset rule includes: Grouping the pins according to the pin name; Merging the pin signals within the same group.

[0008] In one embodiment, the grouping of the pin information according to a preset rule further includes: Grouping the control functions of the pins according to the control information; Grouping the function selections of the pins according to the function information; Grouping the test functions of the pins according to the test information.

[0009] In one embodiment, the identifying the custom code in the pin multiplexing file includes: Searching for the custom code defined according to the rule in the original pin multiplexing file; Performing syntax analysis on the custom code to match the custom code with the function names in the script according to the grouped function names.

[0010] In one embodiment, the searching for the custom code defined according to the rule in the original pin multiplexing file includes: Searching for the port information in the custom code and analyzing the port information; Searching for the wire declaration and / or reg declaration in the custom code and analyzing the wire declaration and / or reg declaration; Searching for at least one of the inst code, always code, and assign code in the custom code.

[0011] In one embodiment, the verifying the search result of the custom code includes: Judging whether the inst code, always code, and assign code match the corresponding port information; Judging whether the inst code, always code, and assign code have the corresponding wire declaration and / or reg declaration.

[0012] Furthermore, the present application also provides a chip pin multiplexing device for implementing the above chip pin multiplexing method, including: An acquisition module, configured to acquire pin information of a chip; A grouping module, configured to group the pin information according to a preset rule; A storage module, configured to store the grouped pin information in a pin multiplexing file; An identification module, configured to identify custom codes in the pin multiplexing file; An update module, configured to update the codes in the storage module and the identification module to the pin multiplexing file.

[0013] Furthermore, the present application further provides a computer device, including a memory and a processor, where the memory stores a computer program, and when the processor executes the computer program, the steps of the chip pin multiplexing method described in any one of the above are implemented.

[0014] Furthermore, a computer-readable storage medium is further provided, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the chip pin multiplexing method described in any one of the above are implemented.

[0015] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects: The chip pin multiplexing method, device, computer device and storage medium provided by the embodiment of the present invention group and organize the pin information, so that similar or homogeneous pin information can be aggregated. When integrating the SOC, there is no need to search among numerous pins, reducing the complexity of integration and facilitating debugging. At the same time, by adding custom codes to the pin multiplexing file, the selection of function modes or test modes, etc. for the pins can be realized through the custom codes, so that the pin multiplexing in different function modes and various test modes can be automatically adapted without manual adjustment. Description of the Drawings

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the descriptions in the embodiments or the prior art. Obviously, the drawings in the following descriptions are some embodiments of the present invention, rather than all embodiments. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0017] Figure 1 A flowchart of a chip multiplexing method provided for an embodiment of the present invention; Figure 2 A logic block diagram of a chip pin multiplexing method provided for an embodiment of the present application; Figure 3 A flowchart of step S110 in a chip pin multiplexing method provided for an embodiment of the present application; Figure 4 Schematic diagram of the pin information table in a pin multiplexing method provided by an embodiment of the present application; Figure 5 Flow chart of step S120 in a pin multiplexing method provided by an embodiment of the present application; Figure 6 Flow chart of step S120 in a pin multiplexing method provided by another embodiment of the present application; Figure 7 Flow chart of step S140 in a pin multiplexing method provided by an embodiment of the present application; Figure 8 Flow chart of step S141 in a pin multiplexing method provided by an embodiment of the present application; Figure 9 Flow chart of step S142 in a pin multiplexing method provided by an embodiment of the present application; Figure 10 Module diagram of a pin multiplexing device provided by an embodiment of the present application; Figure 11 Internal structure diagram of a computer device provided by an embodiment of the present application; Figure 12a Schematic diagram of the pin model provided by an embodiment of the present application; Figure 12b Schematic diagram of the pin multiplexing model provided by an embodiment of the present application. Detailed implementation manners

[0018] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0020] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprises / comprising", "has / including", etc. specify the presence of the stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the related listed items.

[0021] The technical solution of the present invention will be described in detail below with specific embodiments. These specific embodiments below can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0022] Based on the problems existing in the prior art, the embodiments of the present invention provide a chip pin multiplexing method, a chip pin multiplexing device, a computer and a device, and a computer-readable storage medium.

[0023] Figure 1 It is a schematic flowchart of a chip pin multiplexing method provided for an embodiment of the present invention. As Figure 1 shown, the embodiments of the present invention provide a chip pin multiplexing method, including: Step S110: Obtain the pin information of the chip.

[0024] Specifically, first, the pin information of the chip can be obtained through a script. The script language includes but is not limited to python, Perl, TCL, etc. The pin information can be in the form of a table, and the pin information specifically includes the pin name and the pin signal, etc. For example: read the pin information table, identify the position of the pin in the pin information table, and determine the corresponding pin information.

[0025] Step S120: Group the pin information according to a preset rule.

[0026] Specifically, after reading the pin information, the pin information is grouped. The grouping rule can specifically divide and organize the pins according to the pin name or the pin function, etc. After grouping, operations such as signal merging can also be performed on the pins within the group to facilitate subsequent debugging work.

[0027] Step S130: Store the grouped pin information in a pin multiplexing file. Generate a pin model multiplexing file based on the pin names obtained in step S120.

[0028] Specifically, after obtaining the pin names, the instantiation name of each pin model in the pin model file can be determined, and then the instantiation of the pin model defined in the script, such as Figure 12aAs shown, one or more such instantiations can be defined in the script. By obtaining the function information of the pins such as PU, PD, and DS in step S110, and adding signals such as DOUT, DIN, and OEN, the instantiation model corresponding to each pin can be determined. Since the pin multiplexing file and the pin model multiplexing file are two different files, the function information required by the pin model multiplexing file needs to be passed in through port transmission and connected to the port information. The sequence of instantiations and the sequence in the total pins can be obtained from the order of the pin names in the excel, and the instantiation name and the final name of the pin can be obtained in step S120.

[0029] Specifically, the pin information is grouped and saved in the pin multiplexing file. In this embodiment, the pin multiplexing file is a Register Transfer Level (RTL) file, and the RTL file can specifically use the Verilog language.

[0030] Step S140: Identify the custom code in the pin multiplexing file.

[0031] Specifically, the pin multiplexing file in this embodiment incorporates custom code. The custom code is used to control the working mode of the pins, such as the selection of function mode and test mode, etc. Since the pin multiplexing function is modified frequently throughout the chip design process, custom code with special comments is added to the code generated by the pin multiplexing script. After saving the pin information to the pin multiplexing file, these custom codes can be identified in the pin multiplexing file.

[0032] Specifically, different categories of custom codes in the pin multiplexing file can be identified by the method of special comments. For example, / / SPECIAL can be used as the custom code segment, and BEGIN / END represent the start and end. The custom code is divided into three categories: port, signals, and inst. Among them, inst contains some codes that cannot be implemented by the script in the test function. For different categories, taking port as an example: identifying / / SPECIAL PORT BEGIN as the start of the match. After recognizing this comment, the port instantiations after this line of comment are all part of the custom code ports. After obtaining the name, direction, and bit width of this part of the port, they are stored in a list. Identifying / / SPECIAL PORT END as the end of the custom port match. The same method can be used to search for signals and inst as described above.

[0033] After the custom codes of port, signals, and inst are recognized, analyze the custom codes. Take assign as an example: the signal on the left end needs to be connected to the port. There are two signals on the right end, one from the script-generated A and the other from the custom code B. Find the signals similar to A through global matching to output a matching list, and uniformly output the matched and unmatched signals. Poll this operation until all signals are matched, and then complete the signal connection on the right side of assign.

[0034] Since the pin multiplexing function is modified frequently throughout the chip design process, add custom codes with special comments to the codes generated by the pin multiplexing script. After saving the pin information to the pin multiplexing file, these custom codes can be recognized in the pin multiplexing file.

[0035] Since there are still some special pin models in the pin model multiplexing file that cannot be shared with ordinary functional pin model files, some special pin models (such as the pin models of crystal oscillators or USB interfaces) can be updated in the pin multiplexing model in a custom way through the method of obtaining custom pin models by comments in step S140. The final generated file is as Figure 12b shown.

[0036] Step S150: Update the pin multiplexing file based on the custom code.

[0037] Specifically, after recognizing the custom code, perform preset processing on the custom code and write it into a new pin multiplexing file to complete the update of the pin multiplexing file. Figure 2 It is a logic block diagram of a chip pin multiplexing method provided by an embodiment of the present application. As Figure 2 shown, for the pin multiplexing file containing custom scripts obtained in this embodiment, with the entire pin multiplexing file as the top layer, the test (Mipi test mode) and function selection (Mipi phy selection) are implemented by the custom codes in the pin multiplexing file. However, the existing pin multiplexing files do not contain custom codes. Since the pin multiplexing files are generated by scripts, the test (Mipi test mode) and function selection (Mipi phy selection) must be implemented in modules outside the pin multiplexing files. Therefore, compared with the existing pin multiplexing files, the pin multiplexing files in this embodiment reduce the number of input ports (PAD IN) and output ports (MIPI PHY), and reduce the complexity of soc integration.

[0038] In summary, for the chip pin multiplexing method provided by the embodiments of the present invention, by grouping and sorting the pin information, similar or like pin information can be aggregated, eliminating the need to search through numerous pins during SOC integration, reducing the complexity of integration, facilitating debugging. Additionally, by adding custom code to the pin multiplexing file, the selection of function modes or test modes by the pins can be achieved through the custom code, enabling automatic adaptation to pin multiplexing under function modes and various test modes without manual adjustment.

[0039] Figure 3 FIG. is a schematic flowchart of step S110 in a chip pin multiplexing method provided by an embodiment of the present application, as Figure 3 shown. In one embodiment, the above step S110 may include: Step S111: Read the pin information table.

[0040] Step S112: Identify the position of the pin in the pin information table and determine the corresponding pin information.

[0041] Specifically, the pin information can be obtained by reading the pin information table. The pin information table can be in the excel format specifically. The pin information may specifically include pin name, control information, function information, test information, etc. When reading the pin information, by identifying the position of the pin in the pin information table, the corresponding pin name, control information, function information, test information, etc. of that row are saved.

[0042] Furthermore, Figure 4 FIG. is a schematic diagram of the pin information table in a chip pin multiplexing method provided by an embodiment of the present application, as Figure 4 shown. In the pin information table of this embodiment, ROLB is used as the pin name (PAD NAME). In script processing, each pin is grouped, and pins with similar names are generated in the pinmux port. ROLC is used as the dir of the pin to identify whether the pin is an input or an output. ROLD is used as the control information of the pin to control the pull-up and pull-down of the pad. ROLE~H are used as the function information of the pin. Among them, ROLE is the function selection of the pin to select the functions of ROLF~H, and DIR represents the direction. ROLT~W are used as the test information of the pin. Each MODE corresponds to the function of the pin in the corresponding test mode, DIR represents the direction, and core indicates whether the signal corresponding to the test_mode comes from the custom rtl inside the pinmux or from the port.

[0043] Figure 5 FIG. is a schematic flowchart of step S120 in a chip pin multiplexing method provided by an embodiment of the present application, as Figure 5As shown, in one embodiment, the above step S120 may include: Step S121: Group the pins according to the pin names.

[0044] Step S122: Merge the pin signals within the same group.

[0045] Specifically, after obtaining the pin information from the pin information table, it is first necessary to group the pin names of ROLB. The grouping mainly has two functions. Different bits with the same function can be combined into one signal. For example, PWM0 and PWM1 can be combined into PWM[1:0]. For bus-type buses, not only can multiple bits be combined into one signal, but also the pad information of the same category can be aggregated, greatly reducing the difficulty of subsequent integration.

[0046] Furthermore, in a specific embodiment, the pin names can be divided into two groups. The first group is signals similar to GPIO, PWM, etc., and the second group is signals similar to I2C_SDA, SPI_CLK, etc. In the pin information table, the difference between the port signals of the first group (name_group) and the second group (name_group1) is distinguished by the string separator "_" in the name. When grouping, the two groups are obtained through "_". name_group is a first-type group. By obtaining the total signal bit width and direction of this signal, all information of this port can be obtained. name_group1 is a second-type group. For example, in "I2C_SDA, I2C_SCL", "I2C" is the first-type group, and "SDA" and "SCL" are the second-type groups. The bit widths and directions of the second-type groups are obtained respectively. The function of pin grouping can be realized, and when generating the pin multiplexing file, generating according to the first-type group can realize the declaration of similar functions in one place.

[0047] Figure 6 It is a schematic flow diagram of step S120 in a method for chip pin multiplexing provided by another embodiment of the present application. As Figure 6 shown, in one embodiment, the above step S120 may further include: Step S124: Group the control functions of the pins according to the control information.

[0048] Step S125: Group the function selections of the pins according to the function information.

[0049] Step S126: Group the test functions of the pins according to the test information.

[0050] Specifically, in addition to grouping according to the pin names, the functions corresponding to each pin can also be grouped and sorted. Specifically, grouping can be performed according to the control function, function selection, and test function in the pin information.

[0051] Further, for example, for the control function (ctrl), this function mainly controls the pull-up (pu), pull-down (pd) and drive strength (ds) of the pins, and the configuration method is configured by sys_cfg. Its main matching method is to match by feature sub-identification. For example, for ctrl0-0, the first 0 is the pad ctrl register number in cys_cfg, and the second 0 is the bit number corresponding to this register. Thus, the control method corresponding to this pin can be obtained.

[0052] For the function selection (func), the same method as that for ctrl is used for identification. For example, pin_func_sel7-0 represents the register number of func_sel in cys_cf, and the second 0 represents the starting bit number. If each pin in this chip can correspond to 16 functions, then the register number of func_sel corresponding to this pin is func_sel_reg7[3:0]. Thus, only one bit is needed to represent it.

[0053] For the test function (test), it is necessary to add the identification of the remap of the function, and the remap is matched with the specific signals in the function. It is also necessary to add the identification of the function direction. In the test category, it is necessary to add whether this function comes from inside or outside the pinmux.

[0054] Figure 7 It is a schematic flowchart of step S140 in a method for multiplexing chip pins provided by an embodiment of this application. As Figure 7 shown, in one embodiment, the above step S140 may include: Step S141: Classify and search for custom codes in the pin multiplexing file according to a preset annotation.

[0055] Step S142: Verify the search result of the custom code.

[0056] Specifically, different categories of custom codes in the pin multiplexing file can be identified by means of special comments. For example, / / SPECIAL can be used as a custom code segment, and BEGIN / END represent the start and end. The custom codes are divided into three categories: port, signals, and inst. Taking port as an example for different categories: Identify / / SPECIAL PORT BEGIN as the start of the match. After identifying this comment, all port instantiations after this line of comment are custom code part ports. After obtaining the name, direction, and bit width of this part of the port, store them in a list. Identify / / SPECIAL PORT END as the end of the custom port match. The same method can be used to search for signals and inst. After searching for the custom codes, code quality tools such as lint can be used to check the custom codes, and after the custom codes pass the verification, write them into a new pin multiplexing file.

[0057] Figure 8 It is a schematic flowchart of step S141 in a chip pin multiplexing method provided by an embodiment of the present application. As Figure 8 shown, in one embodiment, the above step S141 may include: Step S1411: Search for port information in the custom code.

[0058] Step S1412: Search for wire declarations and / or reg declarations in the custom code.

[0059] Step S1413: Search for at least one of inst code, always code, and assign code in the custom code.

[0060] Specifically, when identifying the custom codes in the pin multiplexing file, the custom codes are identified through three categories, which specifically include port information, wire declarations / reg declarations, and inst code / always code / assign code. First, identify the port. When a custom port is identified, it is stored in the corresponding list. Secondly, it is the wire declaration / reg declaration part, which is mainly the declaration part of custom inst / always / assign. The remaining codes can be divided into inst, assig, and always parts for separate caching. The three categories obtained are stored in different groups respectively. When generating a new version of the pin multiplexing file, the custom codes in the three groups are written into the new pin multiplexing file.

[0061] Figure 9 It is a schematic flowchart of step S142 in a chip pin multiplexing method provided by an embodiment of the present application. As Figure 9As shown, in one embodiment, the above step S142 may include: Step S1421: Determine whether the inst code, always code, and assign code match the corresponding port information.

[0062] Step S1422: Determine whether the inst code, always code, and assign code have corresponding wire declarations and / or reg declarations.

[0063] Specifically, after the three parts of custom code are identified, they need to be verified. The main functions to be checked are whether the wire / reg corresponding to the always code / assign code / inst code is declared, and whether the corresponding port matches. If the wire / reg corresponding to the always code / assign code / inst code is declared and the always code / assign code / inst code matches the corresponding port, it is determined that the custom code can pass the verification and can be written into the new pin multiplexing file.

[0064] This application also provides a chip pin multiplexing device. Figure 10 It is a module schematic diagram of a chip pin multiplexing device provided by an embodiment of this application. As Figure 10 shown, the chip pin multiplexing device includes: an acquisition module 210 for acquiring the pin information of the chip; a grouping module 220 for grouping the pin information according to a preset rule; a storage module 230 for storing the grouped pin information in a pin multiplexing file; an identification module 240 for identifying the custom code in the pin multiplexing file; and an update module 250 for updating the pin multiplexing file based on the custom code. Among them, the custom code is used to control the working mode of the pins.

[0065] In summary, a chip pin multiplexing device provided by an embodiment of the present invention groups and organizes the pin information, so that similar or similar pin information can be aggregated. When integrating the SOC, there is no need to search among numerous pins, reducing the complexity of integration and facilitating debugging. At the same time, by adding custom code to the pin multiplexing file, the pins can be used to select function modes or test modes, etc. through the custom code, so that the pin multiplexing can be automatically adapted to function modes and various test modes. No manual adjustment is required.

[0066] It can be understood that the chip pin multiplexing device in this embodiment can also be used to implement the chip pin multiplexing method in any of the above embodiments and has corresponding functional modules.

[0067] Furthermore, this application also provides a computer device. Figure 11The following is a schematic internal structure diagram of a computer device provided by an embodiment of the present application. As Figure 11 shown, the computer device includes at least one processor, and a memory communicatively connected to at least one processor. The memory stores a computer program, and when the processor executes the computer program, the steps of the chip pin multiplexing method in any of the above embodiments are implemented.

[0068] In an embodiment of the present application, when the above processor executes the computer program, it can implement: obtaining the pin information of the chip; grouping the pin information according to a preset rule; storing the grouped pin information in a pin multiplexing file; identifying the custom code in the pin multiplexing file; updating the pin multiplexing file based on the custom code; wherein, the custom code is used to control the working mode of the pin.

[0069] Furthermore, the present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the chip pin multiplexing method in any of the above embodiments are implemented.

[0070] In an embodiment of the present application, when the above computer program is executed by a processor, it can implement: obtaining the pin information of the chip; grouping the pin information according to a preset rule; storing the grouped pin information in a pin multiplexing file; identifying the custom code in the pin multiplexing file; updating the pin multiplexing file based on the custom code; wherein, the custom code is used to control the working mode of the pin.

[0071] Each embodiment in the present application is described in a progressive manner. The same or similar parts among the embodiments can be referred to each other, and the key point of each embodiment is to illustrate the differences from other embodiments. In particular, for the device and medium embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiments.

[0072] The above describes specific embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be executed in a different order than in the embodiments and still achieve the desired result. Additionally, the processes depicted in the figures do not necessarily require the specific order or sequential order shown to achieve the desired result. In certain implementations, multitasking and parallel processing are also possible or may be advantageous.

[0073] The device and medium provided by the embodiments of the present application correspond one-to-one with the method. Therefore, the device and medium also have beneficial technical effects similar to those of the corresponding method. Since the beneficial technical effects of the method have been described in detail above, the beneficial technical effects of the device and medium will not be elaborated here.

[0074] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0075] The present application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, as well as the combination of flows and / or blocks in the flowchart and / or block diagram. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0076] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device implements the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0077] These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0078] In a typical configuration, a computing device includes one or more processors (CPUs), an input / output interface, a network interface, and memory.

[0079] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM), and / or non-volatile memory in the form of, for example, read-only memory (ROM) or flash memory (flash RAM). The memory is an example of a computer-readable medium.

[0080] A computer-readable medium includes permanent and non-permanent, removable and non-removable media and can implement information storage by any method or technology. The information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassette tapes, magnetic disk storage or other magnetic storage devices, or any other non-transitory medium that can be used to store information accessible by a computing device. As defined herein, a computer-readable medium does not include transitory computer-readable media such as modulated data signals and carrier waves.

[0081] It should also be noted that the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, commodity or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, commodity or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, commodity or device comprising the said element.

[0082] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0083] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but should not be construed as a limitation on the scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A method for multiplexing chip pins, characterized in that, including: reading the pin information table; identifying the position of the pin in the pin information table and determining the corresponding pin information; grouping the pin information according to a preset rule; storing the grouped pin information in a pin multiplexing file, generating a pin model, and generating a pin instantiation model according to the pin information in the pin multiplexing file, where the pin instantiation model includes a pin instantiation file; the instantiation of the pin model comes from the instantiation model preset in the script; identifying the custom code in the pin multiplexing file and sorting out the special pin models in the custom code; updating the pin multiplexing file based on the custom code; wherein the custom code is part of the code that cannot be implemented by the script in the test function or a special pin instantiation file.

2. The chip pin multiplexing method according to claim 1, wherein The pin information includes at least one of a pin name, control information, function information, and test information.

3. The chip pin multiplexing method according to claim 2, wherein The grouping the pin information according to a preset rule includes: grouping the pins according to the pin name; merging the pin signals within the same group.

4. The chip pin multiplexing method according to claim 2, wherein The grouping the pin information according to a preset rule further includes: grouping the control functions of the pins according to the control information; grouping the function selections of the pins according to the function information; grouping the test functions of the pins according to the test information.

5. The chip pin multiplexing method according to claim 1, characterized in that, The identifying the custom code in the pin multiplexing file includes: finding the custom code defined according to the rule in the original pin multiplexing file; performing syntax analysis on the custom code to match the custom code with the function names in the script according to the grouped function names.

6. The chip pin multiplexing method according to claim 5, wherein The finding the custom code defined according to the rule in the original pin multiplexing file includes: finding the port information in the custom code and analyzing the port information; finding the wire declaration and / or reg declaration in the custom code and analyzing the wire declaration and / or reg declaration; finding at least one of the inst code, always code, and assign code in the custom code.

7. The chip pin multiplexing method according to claim 6, wherein The verifying the search result of the custom code includes: judging whether the inst code, always code, and assign code match the corresponding port information; judging whether the inst code, always code, and assign code have corresponding wire declarations and / or reg declarations.

8. A chip pin multiplexing device for implementing the chip pin multiplexing method according to any one of claims 1-7, characterized in that, including: an acquisition module for acquiring the pin information of the chip; a grouping module for grouping the pin information according to a preset rule; a storage module for storing the grouped pin information in a pin multiplexing file; an identification module for identifying the custom code in the pin multiplexing file; an update module for updating the pin multiplexing file based on the custom code.

9. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, the steps of the chip pin multiplexing method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, the steps of the chip pin multiplexing method according to any one of claims 1 to 7 are implemented.

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