Data acquisition device and system based on single bus

Abstract

The invention relates to the technical field of electronic circuits, and discloses a data acquisition device and system based on a single bus, and the device is characterized in that the first ends of a data reading circuit and a data writing circuit are respectively connected with the signal input end and the signal output end of a communication module; the first end of the single bus is connected with the second end of the data reading circuit and the second end of the data writing circuit, and the second end of the single bus is connected with a single bus peripheral; the data reading circuit collects a first data signal of a single bus peripheral through a single bus, and converts the first data signal into a second data signal through level conversion. And the data writing circuit obtains a third data signal of the communication module, converts the third data signal into a fourth data signal through level conversion, and transmits the fourth data signal to the unibus peripheral through the unibus. Data collection is achieved through the single bus, I / O port lines can be effectively saved, the resource structure is simple, bus expansion and maintenance are convenient, the method and device can be suitable for various different peripherals, and the hardware development cost is reduced.

Description

Technical Field

[0001] This application relates to the technical field of electronic circuits, and particularly to a single-bus-based data acquisition device and system. Background Art

[0002] In the prior art, data acquisition generally converts the acquired data into I2C data and then transmits the data. The hardware cost is relatively high. Adaptive hardware modification is required for different peripherals, which will further increase the hardware development cost. Summary of the Invention

[0003] The main purpose of this application is to provide a single-bus-based data acquisition device and system, aiming to solve the technical problem of high data acquisition cost in the prior art.

[0004] In the first aspect of this application, a single-bus-based data acquisition device is provided. The single-bus-based data acquisition device includes:

[0005] A communication module;

[0006] A read data circuit, the first end of the read data circuit is connected to the signal input end of the communication module;

[0007] A write data circuit, the first end of the write data circuit is connected to the signal output end of the communication module;

[0008] A single bus, the first end of the single bus is connected to the second end of the read data circuit and the second end of the write data circuit, and the second end of the single bus is used to connect to a single-bus peripheral;

[0009] Wherein, the read data circuit is used to collect the first data signal of the single-bus peripheral through the single bus, and convert the first data signal into the second data signal readable by the communication module through level conversion;

[0010] The write data circuit is used to obtain the third data signal of the communication module, convert the third data signal into the fourth data signal receivable by the single-bus peripheral through level conversion, and transmit the fourth data signal to the single-bus peripheral through the single bus.

[0011] This application provides a single-bus-based data acquisition system. The single-bus-based data acquisition system includes a cloud server, a gateway, and at least one single-bus-based data acquisition device as described in any one of the above;

[0012] The single-bus-based data acquisition device can be connected to at least one single-bus peripheral, and is used to obtain the acquisition data of the connected single-bus peripheral;

[0013] The single-bus-based data acquisition device can upload the acquisition data to the cloud server through the gateway.

[0014] The present application can achieve level conversion between a communication module and a single-bus peripheral by using a single-bus read / write data circuit, realizing data interaction with the single-bus peripheral and achieving the purpose of data acquisition. By performing data acquisition through the single bus, the present application can effectively save I / O port lines, has a simple resource structure, low cost, is convenient for bus expansion and maintenance, and the data acquisition device based on the single bus in the present application can be applied to various different peripherals, further reducing the hardware development cost. Description of the Drawings

[0015] Figure 1 It is a schematic diagram of the functional modules of the first embodiment of the data acquisition device based on the single bus in the embodiment of the present application;

[0016] Figure 2 It is a circuit diagram of the read data circuit and the write data circuit in an embodiment of the present application;

[0017] Figure 3 It is a circuit diagram of the strong drive pull-up circuit and the weak pull-up circuit in an embodiment of the present application;

[0018] Figure 4 It is a circuit diagram of the pull-down circuit in an embodiment of the present application;

[0019] Figure 5 It is a circuit diagram of the power supply module in an embodiment of the present application;

[0020] Figure 6 It is a schematic diagram of the actual power supply voltage acquisition of a periodic power supply in an embodiment of the present application;

[0021] Figure 7 It is a circuit diagram of the power supply voltage acquisition module in an embodiment of the present application;

[0022] Figure 8 It is a schematic diagram of the functional modules of the second embodiment of the data acquisition device based on the single bus in the embodiment of the present application;

[0023] Figure 9 It is a schematic diagram of the modules of the data acquisition system based on the single bus in the embodiment of the present application. Detailed Embodiments

[0024] The terms "first", "second", "third", "fourth", etc. (if any) in the description, claims, and the above-mentioned drawings of this application are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments described herein can be implemented in an order different from that illustrated or described herein. In addition, the term "comprising" or "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device comprising a series of steps or units does not necessarily limit to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0025] Reference Figure 1 , in an embodiment of the present application, a data acquisition device based on a single bus is provided. The data acquisition device based on a single bus includes:

[0026] Communication module 10;

[0027] Read data circuit 21, the first end of the read data circuit 21 is connected to the signal input end of the communication module 10;

[0028] Write data circuit 22, the first end of the write data circuit 22 is connected to the signal output end of the communication module 10;

[0029] Single bus 30, the first end of the single bus 30 is connected to the second end of the read data circuit 21 and the second end of the write data circuit 22, and the second end of the single bus 30 is used to connect to the single bus peripheral 100;

[0030] Among them, the read data circuit 21 is used to collect the first data signal of the single bus peripheral 100 through the single bus 30 and convert the first data signal into a second data signal readable by the communication module 10 through level conversion;

[0031] The write data circuit 22 is used to obtain the third data signal of the communication module 10, convert the third data signal into a fourth data signal receivable by the single bus peripheral 100 through level conversion, and transmit the fourth data signal to the single bus peripheral 100 through the single bus 30.

[0032] Specifically, the data acquisition device based on a single bus includes: a communication module 10, a single bus read-write module connected to the communication module 10, and a single bus 30.

[0033] The single bus read-write module includes a read data circuit 21 (Read Data circuit) and a write data circuit 22 (Write Data circuit) connected to the communication module 10. Both the read data circuit 21 and the write data circuit 22 are connected to the single bus peripheral 100 through the single bus 30.

[0034] Since the levels of the communication module 10 and the single-bus peripheral 100 do not match, the single-bus read / write module is required to perform level conversion on the output signal of the single-bus peripheral 100 or the output signal of the communication module 10 to achieve data interaction between the communication module 10 and the single-bus peripheral 100.

[0035] The communication module 10 is configured to perform level conversion through the read data circuit 21 to convert the first data signal output by the single-bus peripheral 100 into a second readable data signal.

[0036] The communication module 10 is further configured to perform level conversion through the read data circuit 21 to convert the output third data signal into a fourth data signal receivable by the single-bus peripheral 100.

[0037] The read data circuit 21 is configured to obtain the first data signal of the data acquisition of the single-bus peripheral 100 through the single-bus 30, and convert the first output signal into a second readable data signal by level conversion, so that the communication module 10 can obtain the acquired data.

[0038] The write data circuit 22 is configured to obtain the second output signal of the communication module 10, convert the third data signal into a fourth data signal receivable by the single-bus peripheral 100 through level conversion, and transmit the fourth data signal to the single-bus peripheral 100 through the single-bus 30.

[0039] The single-bus peripheral 100, i.e., the single-bus device, is a peripheral that supports the single-bus protocol, such as a temperature and humidity sensor, a controller, an identity identifier, etc.

[0040] The single-bus 30 is a peripheral serial expansion bus technology. Different from the SPI and I2C serial data communication methods, the single-bus 30 uses a single signal line to transmit both the clock and the data, and the data transmission is bidirectional. It has many advantages such as saving I / O port lines, simple resource structure, low cost, convenient bus expansion and maintenance. There are also many peripherals based on the single-bus 30, such as temperature and humidity sensors, controllers, identity identifiers, etc.

[0041] The single-bus data acquisition solution of this application has extremely low power consumption, can be adapted to different single-bus peripherals 100, only needs to adaptively change the software, and the overall hardware does not need to be changed, greatly reducing the hardware development cost.

[0042] In this embodiment, both the read data circuit 21 and the write data circuit 22 belong to level conversion circuits, and belong to level conversion circuits including MOS transistors and resistors and capacitors.

[0043] The single-bus based data acquisition device of this embodiment can support connecting multiple single-bus peripherals 100 in series.

[0044] In this embodiment, the level conversion between the communication module 10 and the single-bus peripheral 100 can be realized by using the single-bus read-write data circuit, and data interaction with the single-bus peripheral 100 is achieved, so as to achieve the purpose of data acquisition; data acquisition is carried out through the single bus in this embodiment, which can effectively save I / O port lines, has a simple resource structure, low cost, is convenient for bus expansion and maintenance, and the data acquisition device based on the single bus in this embodiment can be applied to various different peripherals, further reducing the hardware development cost.

[0045] In one embodiment, the gate of the first MOS transistor in the read data circuit 21 is grounded through the second resistor, the drain is connected to the communication module 10, the drain is also connected to the first power supply terminal through the first resistor, and the source is grounded.

[0046] The gate of the first MOS transistor is also connected to the drain of the second MOS transistor through the third resistor, the drain of the second MOS transistor is also connected to the second power supply terminal through the fourth resistor, the source is grounded, the gate of the second MOS transistor is grounded through the fifth resistor, and the gate is also connected to the single bus 30 through the sixth resistor;

[0047] and / or

[0048] The gate of the third MOS transistor in the write data circuit 22 is grounded through the eighth resistor, the gate is also connected to the communication module 10 through the seventh resistor, the source is grounded, the drain of the third MOS transistor is connected to the third power supply terminal through the ninth resistor, the drain is also connected to the gate of the fourth MOS transistor through the tenth resistor, the drain of the third MOS transistor is also grounded sequentially through the tenth resistor and the eleventh resistor, the source of the fourth MOS transistor is grounded, and the drain is connected to the single bus 30 through the seventeenth resistor.

[0049] Specifically, Figure 2 is the circuit diagram of the read data circuit 21 and the write data circuit 22 in an embodiment of the present application; referring to Figure 2 , the read data circuit 21 (Read-Data circuit) includes a first MOS transistor Q1 and a second MOS transistor Q2. The gate (G pole) of the first MOS transistor Q1 is grounded through the second resistor R2, the drain (D pole) of the first MOS transistor Q1 is connected to the input end of the communication module 10, the drain is also connected to the first power supply terminal through the first resistor R1, and the source (S pole) of the first MOS transistor Q1 is grounded.

[0050] The gate of the first MOS transistor Q1 is also connected to the drain of the second MOS transistor Q2 through the third resistor R3, the drain of the second MOS transistor Q2 is also connected to the second power supply terminal through the fourth resistor R4, the source is grounded, the gate of the second MOS transistor Q2 is grounded through the fifth resistor R5, and the gate is also connected to the single bus 30 through the sixth resistor R6;

[0051] One end of the single bus 30 is connected to one end of the resistor R6, and the other end of the single bus 30 is connected to the single bus peripheral 100.

[0052] Among them, the drain (D pole) of the first MOS transistor Q1 is connected to the input end of the communication module 10, and a readable second data signal ONE_WIRE_IO_IN is input to the communication module 10.

[0053] The first power supply terminal can provide a voltage VDD_SE, for example. The second power supply terminal can provide a voltage VDD_OWD, for example.

[0054] And / or

[0055] The write data circuit 22 (Write Data circuit) includes a third MOS transistor Q3 and a fourth MOS transistor Q4. The gate of the third MOS transistor Q3 is grounded through an eighth resistor R8, and the gate is also connected to the output end of the communication module 10 through a seventh resistor R7. The source of the third MOS transistor Q3 is grounded. The drain of the third MOS transistor Q3 is connected to a third power supply terminal through a ninth resistor R9, and the drain is also connected to the gate of the fourth MOS transistor Q4 through a tenth resistor R10. The source of the fourth MOS transistor Q4 is grounded, and the drain of the fourth MOS transistor Q4 is connected to the single bus 30 through a seventeenth resistor R17.

[0056] Among them, the gate of the third MOS transistor Q3 is connected to the output end of the communication module 10 through the seventh resistor R7 to obtain a third data signal ONE_WIRE_IO_OUT output by the communication module 10.

[0057] The third power supply terminal can provide a voltage VDD_SE, for example.

[0058] Reference Figure 2 , the first MOS transistor Q1, the second MOS transistor Q2, and the third MOS transistor Q3 are NMOS transistors.

[0059] Of course, if the first MOS transistor Q1, the second MOS transistor Q2, and the third MOS transistor Q3 are replaced with PMOS transistors, the connections of the components in the read data circuit 21 will be modified accordingly.

[0060] In addition, the first MOS transistor Q1, the second MOS transistor Q2, and the third MOS transistor Q3 can all include parasitic diodes.

[0061] In a specific embodiment, the positive terminal (anode) of the parasitic diode of the first MOS transistor Q1 is connected to the source of Q1, and the negative terminal (cathode) is connected to the drain of Q1.

[0062] The positive terminal (anode) of the parasitic diode of the second MOS transistor Q2 is connected to the source of Q2, and the negative terminal (cathode) is connected to the drain of Q2.

[0063] The positive terminal (anode) of the parasitic diode of the third MOS transistor Q3 is connected to the source of Q3, and the negative terminal (cathode) is connected to the drain of Q3.

[0064] In addition, for the read data circuit 21, due to the level mismatch between the communication module terminal and the single-bus peripheral 100, the read data circuit 21 uses a dual-MOS level conversion circuit. For the gate voltage division of MOS transistor Q2, the values of R5 and R6 need to ensure that MOS transistor Q2 can be fully turned on throughout the entire operating range. Similarly, the same applies to MOS transistor Q1. For the gate voltage division of MOS transistor Q1, the values of R3 and R4 need to ensure that MOS transistor Q1 can be fully turned on throughout the entire operating range.

[0065] For the write data circuit 22, due to the level mismatch between the communication module terminal and the single-bus peripheral 100, the write data circuit 22 uses a dual-MOS level conversion circuit. For the gate voltage division of MOS transistor Q3, the values of R7 and R8 need to ensure that MOS transistor Q3 can be fully turned on throughout the entire operating range. Similarly, the same applies to MOS transistor Q4. For the gate voltage division of MOS transistor Q4, the values of R10 and R11 need to ensure that MOS transistor Q4 can be fully turned on throughout the entire operating range.

[0066] Among them, the MOS transistor is Metal Oxide Semiconductor Field-Effect Transistor (field effect transistor).

[0067] In one embodiment, the single-bus data acquisition device further includes a power supply module 40, a strong drive pull-up circuit 23 connected to the communication module 10, and a weak pull-up circuit 24 connected to the power supply module 40;

[0068] The communication module 10 is used to control the power supply module 40 to supply power to or cut off the power supply to the weak pull-up circuit 24;

[0069] The weak pull-up circuit 24 is also connected to the single-bus peripheral 100 through the single bus 30, and is used to supply power to the single-bus peripheral 100 through the single bus 30 after power-on to drive the single-bus peripheral 100;

[0070] The communication module 10 is also used to control the on / off of the strong drive pull-up circuit 23;

[0071] The strong drive pull-up circuit 23 is also connected to the single-bus peripheral 100 through the single bus 30, and is used to supply power to the single-bus peripheral 100 through the single bus 30 after conduction to assist in driving the single-bus peripheral 100.

[0072] Specifically, the single-bus read / write module of this embodiment further includes a strong drive pull-up circuit 23 (Strong Drive PullUp circuit) and a weak pull-up circuit 24.

[0073] The communication module 10 can control the power module 40 to supply power to the weak pull-up circuit 24, and the communication module 10 can also control the power module 40 to disconnect the power supply to the weak pull-up circuit 24. This can effectively achieve low-power operation and energy saving.

[0074] After the power module 40 supplies power to the weak pull-up circuit 24, the weak pull-up circuit 24 supplies power to the single-bus peripheral 100. For example, if the single-bus peripheral 100 is a sensor, the weak pull-up circuit 24 supplies power to the sensor, and at the same time, it can also charge the capacitor inside the sensor. When the single bus 30 is at a low level, this capacitor can supply electrical energy to the sensor.

[0075] The strong drive pull-up circuit 23 can be controlled by the communication module 10 to turn on and off, and the strong drive pull-up circuit 23 can also supply power to the single-bus peripheral 100 through the single bus 30.

[0076] The communication module 10 can control the strong drive pull-up circuit 23 to conduct when the single-bus peripheral 100 needs to collect data. After the strong drive pull-up circuit 23 conducts, it can supply power to the single-bus peripheral 100; the communication module 10 can also control the strong drive pull-up circuit 23 to disconnect when the single-bus peripheral 100 does not need to collect data. After the strong drive pull-up circuit 23 disconnects, it no longer supplies power to the single-bus peripheral 100.

[0077] Due to the level mismatch between the communication module end and the single-bus peripheral 100 (single-bus device), the strong drive pull-up circuit 23 can adopt a dual-MOS circuit.

[0078] Taking the single-bus peripheral 100 as a single-bus temperature and humidity sensor as an example, generally, when the sensor collects data, the input is an analog signal, and the analog signal needs to be converted into a digital signal. During this conversion, the sensor requires a larger drive current. Therefore, a strong drive pull-up circuit 23 is needed to assist in driving the sensor so that the sensor can smoothly collect data.

[0079] In this embodiment, the communication module can control the strong drive pull-up circuit to supply power to the single-bus peripheral or disconnect the power supply, and can also control the weak pull-up circuit to supply power to the single-bus peripheral or disconnect the power supply through the communication module, and control the power supply to the single-bus peripheral according to needs, flexibly and effectively realizing low-power operation and saving power consumption.

[0080] In one embodiment, the gate of the fifth MOS transistor in the strong drive pull-up circuit 23 is grounded through the thirteenth resistor, the gate is also connected to the communication module 10 through the twelfth resistor, the source is grounded, and the drain is connected to the gate of the sixth MOS transistor through the fourteenth resistor. The gate of the sixth MOS transistor is also connected to the single bus 30 through the first capacitor and the sixteenth resistor in sequence. The gate of the sixth MOS transistor is also connected to the fourth power supply terminal through the parallel-connected second capacitor and the fifteenth resistor. The source of the sixth MOS transistor is connected to the fourth power supply terminal and the source is also grounded through the third capacitor. The drain of the sixth MOS transistor is connected to the single bus 30 through the sixteenth resistor;

[0081] and / or,

[0082] One end of the twentieth resistor in the weak pull-up circuit 24 is connected to the fifth power supply terminal, and the other end is connected to the single bus 30. One end of the transient voltage suppression diode is grounded, and the other end is connected to the single bus 30.

[0083] Specifically, Figure 3 is the circuit diagram of the strong drive pull-up circuit 23 and the weak pull-up circuit 24 in an embodiment of the present application; refer to Figure 3 , in the strong drive pull-up circuit 23 (Strong Drive Pull Up circuit), the gate of the fifth MOS transistor Q5 is grounded through the thirteenth resistor R13, the gate of the fifth MOS transistor Q5 is also connected to the communication module 10 through the twelfth resistor R12, the source of the fifth MOS transistor Q5 is grounded, and the drain is connected to the gate of the sixth MOS transistor Q6 through the fourteenth resistor R14. The gate of the sixth MOS transistor Q6 is also connected to the single bus 30 through the first capacitor C1 and the sixteenth resistor R16 in sequence. The gate of the sixth MOS transistor Q6 is also connected to the fourth power supply terminal through the parallel-connected second capacitor C2 and the fifteenth resistor R15. The source of the sixth MOS transistor Q6 is connected to the fourth power supply terminal and the source is also grounded through the third capacitor C3. The drain of the sixth MOS transistor Q6 is connected to the single bus 30 through the sixteenth resistor R16;

[0084] and / or,

[0085] One end of the twentieth resistor R20 in the weak pull-up circuit 24 is connected to the fifth power supply terminal, and the other end is connected to the single bus 30. One end of the transient voltage suppression diode (TVS, Transient Voltage Suppressor) D1 is grounded, and the other end is connected to the single bus 30. Among them, the transient voltage suppression diode D1 can be used for anti-static and surge protection.

[0086] The gate of the fifth MOS transistor Q5 is connected to the communication module 10 through the twelfth resistor R12, and is used to obtain the strong drive pull-up control signal ONE_WIRE_PU_IO output by the communication module 10.

[0087] Among them, the fifth MOS transistor Q5 can be an NMOS transistor, and the sixth MOS transistor Q6 can be a PMOS transistor. In addition, both the fifth MOS transistor Q5 and the sixth MOS transistor may include parasitic diodes.

[0088] In a specific embodiment, the positive terminal (anode) of the parasitic diode of the fifth MOS transistor Q5 is connected to the source of Q5, and the negative terminal (cathode) is connected to the drain of Q5.

[0089] The positive terminal (anode) of the parasitic diode of the sixth MOS transistor Q6 is connected to the drain of Q6, and the negative terminal (cathode) is connected to the source of Q6.

[0090] The fourth power supply terminal can provide a voltage VDD_OWD, for example.

[0091] The fifth power supply terminal can provide a voltage VDD_OWD, for example.

[0092] The single-bus peripheral 100, namely Figure 3 the One-Wire Devices in, the single-bus peripheral 100 is connected to the single bus 30 through the connector J3.

[0093] Taking the single-bus peripheral 100 as a sensor as an example, when the single bus 30 is at a high level, the resistor R20 is pulled up to VDD_OWD (weak pull-up, the specific value of R20 needs to be adjusted according to the specific peripheral, for example, 2KΩ is selected according to the actual product, and this application does not limit this) to supply power to the sensor. At the same time, the internal capacitor of the sensor is charged. When the single bus 30 is at a low level, this capacitor provides electrical energy for the sensor.

[0094] Due to the level mismatch between the communication module side and the single-bus device, the enabling of the strong drive pull-up circuit 23 is controlled by a dual-MOS circuit here. For the single-bus peripheral 100, taking the single-bus temperature and humidity sensor as an example here, generally the sensor input is an analog signal, and the analog signal needs to be converted into a digital signal. During this conversion, the sensor requires a larger drive current. Therefore, the strong drive pull-up circuit 23 is needed here. The value of the resistor R16 needs to be adjusted according to the specific peripheral, for example, the value is 60.4Ω according to the actual product, and this application does not limit this.

[0095] In an embodiment, the single-bus read / write module of the data acquisition device based on the single bus further includes a pull-down circuit 25 connected to the communication module 10,

[0096] The communication module 10 is further configured to control the on / off of the pull-down circuit 25;

[0097] The pull-down circuit 25 is also connected to the single-bus peripheral 100 through the single bus 30, and is configured to pull down the low level of the single bus 30 after being turned on.

[0098] Specifically, the pull-down circuit 25 is the Pull Down circuit.

[0099] When there are many single-bus peripherals 100 externally connected to the single-bus data acquisition device, that is, when it is under heavy load, there may be a problem that the low level of the single bus 30 is too high. Therefore, this embodiment reserves this pull-down circuit 25, and when necessary, the low level of the single bus 30 can be completely pulled down.

[0100] The communication module 10 can control the on / off of the pull-down circuit 25. When necessary, the communication module 10 can control the pull-down circuit 25 to conduct, and after the pull-down circuit 25 conducts, it can be used to pull down the low level of the single bus 30. When idle, the communication module 10 can also control the pull-down circuit 25 to disconnect.

[0101] In this embodiment, by reserving the pull-down circuit in the device, the low level of the single bus can be pulled down when necessary, and when it is not necessary to pull down, the communication module can disconnect the pull-down circuit to make it in a non-working state, effectively realizing low-power operation and saving electric energy.

[0102] In one embodiment, the gate of the seventh MOS transistor in the pull-down circuit 25 is connected to the communication module 10 through the eighteenth resistor and is also grounded through the nineteenth resistor. The source of the seventh MOS transistor is grounded, and the drain is connected to the single bus 30 through the seventeenth resistor.

[0103] Specifically, Figure 4 is the circuit diagram of the pull-down circuit 25 in an embodiment of the present application; refer to Figure 4 . The gate of the seventh MOS transistor Q7 in the pull-down circuit 25 is connected to the communication module 10 through the eighteenth resistor R18 and is also grounded through the nineteenth resistor R19. The source of the seventh MOS transistor Q7 is grounded, and the drain is connected to the single bus 30 through the seventeenth resistor R17.

[0104] Among them, the gate of the seventh MOS transistor Q7 is connected to the communication module 10 through the eighteenth resistor R18, for obtaining the pull-down control signal ONE_WIRE_PD_IO output by the communication module 10.

[0105] Refer to Figure 4 . The seventh MOS transistor Q7 is an NMOS transistor.

[0106] Of course, the seventh MOS transistor Q7 can also be replaced with a PMOS transistor, and at the same time, the connection of the components in the pull-down circuit 25 is adjusted adaptively.

[0107] The seventh MOS transistor Q7 may include a parasitic diode.

[0108] In a specific embodiment, the anode (positive terminal) of the parasitic diode of the seventh MOS transistor Q7 is connected to the source of Q7, and the cathode (negative terminal) is connected to the drain of Q7.

[0109] The resistor R17 passes through both the pull - down circuit 25 and the write data circuit 22, which can play a role in current limiting and anti - static protection.

[0110] In one embodiment, the single - bus - based data acquisition device further includes a power supply module 40 connected to the communication module 10;

[0111] The power supply module 40 includes a power supply control circuit 41, a power supply circuit 42 connected to the power supply control circuit 41, and a power conversion circuit 43;

[0112] The power supply control circuit 41 is configured to control the power supply circuit 42 to input an initial power supply voltage to the power conversion circuit 43 in response to a power - on instruction;

[0113] The power conversion circuit 43 is configured to convert the initial power supply voltage into a target power supply voltage to supply power to a target module or a target circuit in the single - bus - based data acquisition device if a conversion instruction from the communication module 10 is received.

[0114] Specifically, the power supply circuit 42 can be a battery power supply circuit 42, and the power supply control circuit 41 is used to connect or disconnect the power supply circuit 42 from the power conversion circuit 43.

[0115] The power supply control circuit 41 is specifically configured to control the power supply circuit 42 to be connected to the power conversion circuit 43 through the power supply control circuit 41 in response to a power - on instruction. At this time, the power supply circuit 42 provides an initial power supply voltage to the power conversion circuit 43.

[0116] Among them, the power - on instruction can be obtained, for example, by receiving a user's power - on operation through a button, or by receiving a remote power - on instruction, etc. The present application does not limit this.

[0117] In this embodiment, the power conversion circuit 43 is used to perform voltage conversion on the initial power supply voltage to supply power to a target module or a target circuit in the data acquisition device using the obtained target power supply voltage.

[0118] To facilitate power management and rational use of electric energy, the communication module 10 in this embodiment can also control the voltage conversion function of the power conversion circuit 43. More specifically, if the communication module 10 sends a conversion instruction to the power conversion circuit 43, the power conversion circuit 43 will convert the initial power supply voltage into a target power supply voltage.

[0119] Among them, the conversion instruction can be the enable signal DCDC_EN of the communication module 10.

[0120] If the communication module 10 does not send a conversion instruction, the power conversion circuit 43 will not perform voltage conversion. Correspondingly, it will not supply power to the target module or target circuit, thus achieving flexible, efficient, and low-power power management and saving electrical energy.

[0121] In one embodiment, the source of the eighth MOS transistor in the power control circuit 41 is connected to the power supply circuit 42, the source is also grounded through a parallel combination of a second ESD device and a seventh capacitor, the drain is connected to the power conversion circuit 43, the drain is also grounded through a fifth capacitor, the gate of the eighth MOS transistor is grounded through a twenty-second resistor and a first ESD device in sequence, the gate is also connected to the source through a twenty-first resistor, and the four pins of the self-locking button are grounded through the first ESD device, and the other two pins are grounded.

[0122] Specifically, Figure 5 is the circuit diagram of the power supply module 40 in an embodiment of the present application; refer to Figure 5 , the power supply circuit 42 can be a battery power supply circuit 42, and the battery is connected to the power control circuit 41 and the power conversion circuit 43 through a connector J2. Refer to Figure 5 , three of the terminals of the connector J2 are grounded, and the other terminal is connected to the power control circuit 41 respectively. During the use of the data acquisition device, it is necessary to ensure that the battery is correctly connected to the connector J2.

[0123] The source of the eighth MOS transistor Q8 in the power control circuit 41 is connected to the power supply circuit 42, the source of the eighth MOS transistor Q8 is also grounded through a parallel combination of a second ESD device D3 and a seventh capacitor C7, the drain of the eighth MOS transistor Q8 is connected to the power conversion circuit 43, the drain is also grounded through a fifth capacitor C5, the gate of the eighth MOS transistor is grounded through a twenty-second resistor R22 and a first ESD device D2 in sequence, the gate is also connected to the source or the power supply circuit 42 through a twenty-first resistor R21, and the four pins of the self-locking button J1 are grounded through the first ESD device D2, and the other two pins are grounded.

[0124] In a specific embodiment, the first ESD device D2 and the second ESD device D3 are ESD diodes or ESD protection diodes, which can be used for anti-static. Among them, ESD is Electro-Static discharge.

[0125] Among them, the source of the eighth MOS transistor Q8 is specifically connected to one end of the connector J2 in the power supply circuit 42.

[0126] Refer to Figure 5 , the eighth MOS transistor Q8 is a PMOS transistor. The eighth MOS transistor Q8 may include parasitic diodes.

[0127] In a specific embodiment, the anode (positive terminal) of the parasitic diode of the eighth MOS transistor Q8 is connected to the drain of Q8, and the cathode (negative terminal) is connected to the source of Q8.

[0128] Among them, the power supply circuit 42, as the input power supply of the single-bus data acquisition device, can be, for example, a 3V battery, which is specifically set according to the actual situation, and this application does not limit it.

[0129] The power conversion circuit 43 includes a power conversion chip, and this power conversion chip is used to convert the initial power supply voltage provided by the power supply circuit 42 into a target voltage.

[0130] More specifically, after pressing the self-locking button J1, the eighth MOS transistor Q8 conducts, and the data acquisition device is powered on. At this time, the power supply circuit 42 can provide the initial power supply voltage VBAT to the power conversion circuit 43, and VBAT outputs the target voltage VDD_OWD after passing through the power conversion chip.

[0131] When the self-locking button J1 is released, the eighth MOS transistor Q8 is cut off or disconnected, and the data acquisition device is powered off and shut down. The sum of the resistance values of R21 and R22 can be selected at the MΩ level. For example, R22 has a value of 68KΩ and R21 has a value of 1MΩ. If a 3V battery is used, the on-state leakage current of the eighth MOS transistor Q8 (PMOS transistor) can be controlled at about 3μA, saving system power consumption.

[0132] The target voltage VDD_OWD can be used as the weak pull-up power supply for the single-bus device end (pulled up through R20), the pull-up power supply in the read-write data circuit, and the strong drive pull-up power supply.

[0133] This power conversion chip is a boost chip, and its enable is controlled by the communication module 10 DCDC_EN signal. During the time period when data acquisition is not required, the power conversion chip can be disabled, VDD_OWD is powered off, and thus the single-bus device does not work, saving power consumption.

[0134] In addition, the initial power supply voltage VBAT can provide the initial power supply voltage to it through the input terminal of the power conversion chip, and can also supply power to modules such as the communication module 10. This application does not limit this.

[0135] In an embodiment, the single-bus data acquisition device further includes a power supply voltage acquisition module 50 connected to the communication module 10;

[0136] The power supply voltage acquisition module 50 includes an RC charge-discharge circuit connected to the output terminals of the communication module 10 and the power control circuit 41, and the power supply voltage of the RC charge-discharge circuit is the initial power supply voltage;

[0137] The communication module 10 includes a timer and a GPIO module connected to the RC charge-discharge circuit;

[0138] The communication module 10 is used to configure the GPIO in the GPIO module as an output and pull it low to discharge the RC charge-discharge circuit. After the discharge is completed, the GPIO is configured as an input to charge the RC charge-discharge circuit, and the actual charging duration for the RC to charge to the trigger high-level threshold is counted.

[0139] The communication module 10 is also used to obtain the actual power supply voltage corresponding to the actual charging duration by matching based on the pre-stored mapping relationship between the RC charging duration and the initial power supply voltage.

[0140] Specifically, the power supply voltage acquisition module 50 is used to acquire the power supply voltage, that is, the actual power supply voltage. If the actual power supply voltage is lower than the power supply voltage threshold, the communication module 10 can notify the user to replace the power supply or battery through the cloud server.

[0141] The power supply voltage acquisition module 50 can adopt ADC sampling, that is, ADC Sampling, or analog-to-digital sampling, to achieve sampling by converting the analog signal into a digital signal.

[0142] If the communication module 10 does not support the ADC function, the voltage acquisition can be implemented using the RC charge-discharge circuit.

[0143] The specific solution is as follows:

[0144] The power supply voltage acquisition module 50 includes an RC charge-discharge circuit connected to the output ends of the communication module 10 and the power control circuit 41, and the power supply voltage of the RC charge-discharge circuit is the initial power supply voltage, that is Figure 5 the voltage VBAT in

[0145] The communication module 10 includes a GPIO module connected to the RC charge-discharge circuit; the GPIO module includes a GPIO and a timer (or, timer).

[0146] The communication module 10 is used to configure the GPIO in the GPIO module as an output and pull it low to discharge the RC charge-discharge circuit. After the discharge is completed, the GPIO is configured as an input to charge the RC charge-discharge circuit, and the timer or timer can count the actual charging duration for the RC to charge to the trigger high-level threshold.

[0147] The communication module 10 is also used to obtain the actual power supply voltage corresponding to the actual charging duration by matching based on the pre-stored mapping relationship between the RC charging duration and the initial power supply voltage.

[0148] In a specific embodiment, the look-up table method can be used. Based on the RC charging circuit, the VBAT input range is traversed (for example, the step value is selected as 20 mV), and the corresponding RC charging duration when VBAT takes different values is recorded (for each VBAT value, the RC charging duration can be measured multiple times, and then the average value of the RC charging durations measured multiple times is taken). ≥2 prototypes can be measured to verify the consistency.

[0149] The mapping relationship between the final VBAT and the RC charging duration, that is, the RC charging duration and the initial supply voltage, is written into the software code of the communication module 10.

[0150] Based on the mapping relationship, the VBAT corresponding to the actual charging duration is matched through look-up table as the actual supply voltage of the power supply. Or, the voltage corresponding to the time value closest to the actual charging duration in the mapping table is matched through look-up table as the actual supply voltage of the power supply.

[0151] In this embodiment, the GPIO is used to simulate the ADC function, and RC charge and discharge are adopted for voltage acquisition. According to the corresponding relationship between the capacitor charging time and the external voltage, this corresponding relationship is written into the software code, and through the software look-up table method, the obtained time value is converted into the voltage corresponding to the time value in the table.

[0152] This embodiment is implemented by using 1 GPIO in cooperation with a timer. First, the GPIO is configured to be pulled low for capacitor discharge, then the GPIO is configured as an input for capacitor charging, and the triggering GPIO high-level interruption time is the RC charging time. For details, see Figure 6 the schematic diagram of the acquisition of the actual supply voltage (VBAT) of the power supply in one cycle in

[0153] In this embodiment, by setting the power supply voltage acquisition module, the supply voltage of the power supply module can be tracked, the insufficient power supply of the power supply can be detected in time, and the power of the device can be changed in time to ensure the normal operation of the device. In this embodiment, the RC charge and discharge circuit is used, and low-cost voltage acquisition can also be realized.

[0154] In one embodiment, the first end of the twenty-fourth resistor in the power supply voltage acquisition module 50 is connected to the output end of the power supply control circuit 41, the second end of the twenty-fourth resistor is grounded through the parallel-connected twenty-third resistor and the eighth capacitor, the second end of the twenty-fourth resistor is also grounded through the twenty-sixth resistor and the ninth capacitor in sequence, and the second end of the twenty-fourth resistor is also connected to the communication module 10 through the twenty-sixth resistor.

[0155] Specifically, Figure 7 is the circuit diagram of the power supply voltage acquisition module 50 in an embodiment of the present application; refer to Figure 7, the first end of the twenty-fourth resistor R24 in the power supply voltage acquisition module 50 is connected to the output end of the power supply control circuit 41. The second end of the twenty-fourth resistor R24 is grounded through the parallel-connected twenty-third resistor R23 and the eighth capacitor C8. The second end of the twenty-fourth resistor R24 is also grounded through the twenty-sixth resistor R26 and the ninth capacitor C9 in sequence. The second end of the twenty-fourth resistor R24 is also connected to the communication module 10 through the twenty-sixth resistor R26. The communication module 10 can time the charging duration through ADC_COUNTER.

[0156] Among them, the first end of the twenty-fourth resistor R24 is connected to the output end of the power supply control circuit 41. After the eighth MOS transistor Q8 in the power supply control circuit 41 is turned on, the first end of the twenty-fourth resistor R24 is connected to the initial supply voltage VBAT.

[0157] R24 and C8 are the main RC charging components, which can increase the charging time constant as much as possible, increase the count value, and improve the accuracy. The function of R23 is to limit the maximum voltage input to the GPIO. The function of R26 is to limit the maximum sink current of the GPIO during discharge. C9 is reserved for debugging.

[0158] Reference Figure 6 , generally, the high-level interrupt voltage in the 1.8V power supply domain is about 1.2V. If the GPIO level domain at the communication module end is 1.8V, according to the voltage range of VBAT, reasonably select the values of R23 and R24 (accuracy requirement ≤ 1%), and try to ensure that the voltage ≤ 1.8V when C8 is fully charged to prevent affecting the reliability of the module GPIO. However, in some scenarios, it may not be possible to meet the requirement that the fully charged voltage of C8 ≤ 1.8V. For example, if the external battery voltage range is wide (such as a 3V battery, assuming the available voltage range is 1.8V to 3.6V), and the values of R23 and R24 (if R23 is 20KΩ ± 1% and if R24 is 10KΩ ± 1%), then when VBAT = 1.8V, the fully charged voltage of C8 is 1.2V, which can meet the trigger high-level threshold. But when VBAT = 3.6V, the fully charged voltage of C8 is 2.4V, exceeding the 1.8V power supply domain of the GPIO, which will affect the GPIO reliability over a long time. Therefore, after the high-level interrupt is triggered, immediately configure the GPIO output and pull it low to ensure that the highest voltage at C8 during each voltage acquisition is 1.2V (assuming the high-level trigger threshold of the 1.8V power supply domain is 1.2V) to avoid affecting the GPIO reliability.

[0159] In addition, since the RC time is related to R and C, the temperature drift of R is generally small (accuracy requirement ≤ 1%), but the temperature drift of ordinary capacitors is large. Therefore, capacitors with small temperature drift and small leakage are required. C8 generally takes values from 0.1uF to 1uF. For example, an X7R capacitor can be selected.

[0160] In one embodiment, the single-bus based data acquisition device further includes a networking control module 60 and a communication connection module 70 connected to the communication module 10;

[0161] The communication module 10 is further configured to, if receiving a networking instruction through the networking control module 60, match with a gateway through the communication connection module 70, and upload the acquired data to a server through the successfully matched gateway.

[0162] Specifically, the networking control module 60 may be, for example, a networking button. The communication module 10 may receive a user's networking operation through the networking button to obtain a networking instruction. The communication module 10 may also obtain a networking instruction sent wirelessly, for example, sent through remote control, Bluetooth, or WiFi.

[0163] The communication connection module 70 may be, for example, an antenna (ANT).

[0164] When it is necessary to connect the data acquisition device to a cloud server, the networking button needs to be pressed. After the communication module 10 receives this signal or the networking instruction, it is sent to the smart gateway through the ANT antenna. After successfully matching with the smart gateway, the networking function can be realized. In this way, the data of the acquisition device can be uploaded to the cloud server through the smart gateway, facilitating the user to view, analyze, and process.

[0165] In one embodiment, the single-bus based data acquisition device further includes an encryption module 80 and an encryption power control module 90 connected to the communication module 10;

[0166] The input end of the encryption power control module 90 is connected to a sixth power supply end, and the output end is connected to the encryption module 80;

[0167] The communication module 10 is configured to control the sixth power supply end to supply power to or cut off the power supply to the encryption module 80 through the encryption power control module 90;

[0168] The encryption module 80 is configured to encrypt the acquired data when powered;

[0169] The communication module 10 is specifically configured to upload the encrypted acquired data to a server through the successfully matched gateway.

[0170] Specifically, the encryption module 80 in this embodiment may encrypt the acquired data obtained by the communication module 10, enabling the data acquisition device to implement a data encryption function. The data interface uses I2C or other communication protocol interfaces. It is suitable for Internet of Things security encryption applications and supports security protection such as voltage anomaly detection and temperature anomaly detection.

[0171] Among them, the encryption module 80 includes an encryption chip.

[0172] In addition, the encryption module 80 can be controlled by the communication module 10 to be enabled or disabled. The communication signals between the encryption module 80 and the communication module 10 include the I2C_SCL signal and the I2C_SDA signal.

[0173] If it is necessary to enable the encryption module 80, the communication module 10 controls whether the sixth power supply terminal supplies power to the encryption module 80 by controlling the on / off of the encryption power control module 90. If the communication module 10 controls the encryption power control module 90 to conduct, the sixth power supply terminal is connected to the encryption module 80, and the sixth power supply terminal supplies power to the encryption module 80. If the communication module 10 controls the encryption power control module 90 to disconnect, the sixth power supply terminal is disconnected from the encryption module 80, and the encryption module 80 cannot be powered.

[0174] In addition, the sixth power supply terminal can be Figure 5 the output terminal of the power supply circuit 42 in, or the output terminal of the power control circuit 41, providing the supply voltage VBAT.

[0175] In a specific embodiment, the encryption power control module 90 can be a PMOS switch.

[0176] The supply voltage VBAT generates the VDD_SE power supply through the PMOS switch to supply power to the encryption module 80.

[0177] In addition, the VDD_SE power supply can also provide a pull-up power supply for the low-power consumption module end of the read / write data circuit. Controlled by the VDD_SE_EN enable signal of the communication module 10, during the time period when data acquisition is not required, the PMOS switch can be disabled, the VDD_SE is powered off, and then the single-bus read / write circuit and the encryption chip do not work, saving power consumption.

[0178] In addition, the supply voltage of the communication module 10 can be VBAT.

[0179] Figure 8 This is the schematic diagram of the functional modules of the second embodiment of the single-bus-based data acquisition device in the embodiments of the present application; refer to Figure 8 , the single-bus-based data acquisition device includes a communication module 10, a read data circuit 21, a write data circuit 22, a single bus 30, a strong drive pull-up circuit 23, a weak pull-up circuit 24, a pull-down circuit 25, a power module 40, a power supply voltage acquisition module 50, a networking control module 60, a communication connection module 70, an encryption module 80, and an encryption power control module 90.

[0180] The input end of the communication module 10 can receive the data signal ONE_WIRE_IO_IN output by the read data circuit 21, and the output end of the communication module 10 can output the data signal ONE_WIRE_IO_OUT to the write data circuit 22.

[0181] The read data circuit 21 and the write data circuit 22 are used to implement the level conversion between the communication module 10 and the one-wire peripheral 100. The read data circuit 21 converts the data signal output by the one-wire peripheral 100 into a data signal recognizable or readable by the communication module 10; the write data circuit 22 converts the data signal output by the communication module 10 into a data signal receivable by the one-wire peripheral 100.

[0182] The communication module 10 can output a signal ONE_WIRE_PU_IO to the strong drive pull-up circuit 23 to control the on / off of the strong drive pull-up circuit 23.

[0183] The communication module 10 can control the power conversion circuit 43 to convert the voltage VBAT into the voltage VDD_OWD through the enable signal DCDC_EN to supply power to the weak pull-up circuit 24.

[0184] Due to the level mismatch between the communication module side and the one-wire device, the enable of the strong drive pull-up circuit 23 is also controlled by a dual-MOS circuit here. For the one-wire peripheral 100, taking the one-wire temperature and humidity sensor as an example here, when the bus is at a high level, R20 is pulled up to VDD_OWD (weak pull-up, the specific value of R20 needs to be adjusted according to the specific peripheral, for example, 2KΩ is selected in the actual product) to supply power to the sensor. At the same time, the internal capacitor of the sensor is charged. When the bus is at a low level, this capacitor supplies electrical energy to the sensor. However, generally, the sensor input is an analog signal, and the analog signal needs to be converted into a digital signal. During this conversion period, the sensor requires a larger drive current, so the strong drive pull-up circuit 23 is needed here, and the value of R16 needs to be adjusted according to the specific peripheral, for example, 60.4Ω is taken in the actual product.

[0185] The communication module 10 can output a signal ONE_WIRE_PD_IO to the pull-down circuit 25 to control the on / off of the pull-down circuit 25. When there are many one-wire peripherals 100 externally connected to the one-wire data acquisition device, that is, when it is in a heavy load, there may be a problem that the low level of the one-wire 30 is too high. Therefore, it is recommended to reserve this pull-down circuit 25. After the pull-down circuit 25 is turned on, it can completely pull down the low level of the one-wire 30.

[0186] The power supply module 40 includes a power supply circuit 42, a power supply control circuit 41, and a power conversion circuit 43.

[0187] The power supply control circuit 41 can control the power supply circuit 42 to provide the voltage VBAT for the power conversion circuit 43, the communication module 10, and the encryption power supply control module 90, and the power conversion circuit 43 converts the voltage VBAT into the voltage VDD_OWD.

[0188] Alternatively, the power control circuit 41 can control the power supply circuit 42 to disconnect the supply voltage VBAT from being provided to the power conversion circuit 43. As a result, the power conversion circuit 43 has no input voltage VBAT and thus does not output the voltage VDD_OWD.

[0189] The voltage VDD_OWD can be used as the input voltage of the weak pull-up circuit 24.

[0190] The communication module 10 can control the encryption power control module 90 to turn on and off through the enable signal VDD_SE_EN. When the encryption power control module 90 is turned on, it outputs the voltage VDD_SE. The voltage VDD_SE can be used as the power supply voltage for modules or circuits such as the encryption module 80. The voltage VDD_SE can be the voltage VBAT.

[0191] The encryption power control module 90 can be a PMOS switch.

[0192] The power supply circuit 42 also powers the power voltage acquisition module 50 through the power control circuit 41. The power voltage acquisition module 50 acquires the power supply voltage of the power supply circuit 42. The communication module 10 can control the RC charge and discharge circuit to discharge and then recharge, and count the charging duration of the RC charge and discharge circuit, and determine the actual power supply voltage of the power supply circuit 42 according to the actual charging duration, thereby realizing the acquisition tracking and monitoring of the power voltage.

[0193] The networking control module 60 can receive the user's networking operation and send a networking instruction to the communication module 10. After receiving the networking instruction, the communication module 10 controls the communication connection module 70 to match with the gateway and communicate with the cloud server through the matched gateway.

[0194] The communication module 10 can transparently transmit data to the cloud server through the intelligent gateway.

[0195] The networking control module 60 can be a networking button.

[0196] The communication module 10 can also have Debug function pins and Download function pins.

[0197] The communication module 10 can be a low-power communication module. For example, it can be a Sub-1GHz wireless communication module, an NB-IOT communication module, or other low-power communication modules. This application does not limit this.

[0198] The encryption module 80 includes an encryption chip, and the encryption chip can communicate through UART_TX and UART_RX.

[0199] For the specific descriptions of the modules or circuits in this embodiment, please refer to the descriptions of the circuits in the above embodiments and the accompanying drawings, and will not be elaborated here.

[0200] In one embodiment, the single-bus based data acquisition device may further include a power indicator module and a network indicator module connected to the communication module 10;

[0201] The communication module 10 is further configured to control the power indicator module to display the powered-on state after the communication module 10 is powered on, and control the power indicator module to display the powered-off state after the communication module 10 is powered off.

[0202] The communication module 10 is further configured to control the network indicator module to display the networked state after the communication module 10 is networked, and control the network indicator module to display the non-networked state after the communication module 10 is disconnected from the network.

[0203] More specifically, the communication module 10 may control the power indicator module and / or the network indicator module through a triode, such as an NPN triode.

[0204] The single-bus based data acquisition device in this embodiment has a low cost, only requires 1 low-power communication module (to achieve wireless communication and control), and does not require additional devices such as an MCU; the power consumption is extremely low, and in the sleep state, it can reach 3V 3.6uA.

[0205] This embodiment adopts an overall single-bus data acquisition solution that integrates an ultra-low-power communication module + single-bus reading and writing + strong drive pull-up + pull-down + encryption. The power consumption is extremely low. Only software adaptation for different single-bus peripherals is required, and the overall hardware does not need to be changed, greatly reducing the hardware development cost.

[0206] Reference Figure 9 , in one embodiment, the present application further provides a single-bus based data acquisition system, which includes a cloud server, a gateway, and at least one single-bus based data acquisition device as described in any one of the above;

[0207] The single-bus based data acquisition device can be connected to at least one single-bus peripheral 100, and is used to acquire the acquisition data of the connected single-bus peripheral 100;

[0208] The single-bus based data acquisition device can upload the acquisition data to the cloud server through the gateway.

[0209] Specifically, this single-bus based data acquisition device is suitable for externally connecting peripherals that support the single-bus protocol, such as temperature and humidity sensors, identity recognition devices, etc., and connecting them to the Figure 3 J3 position in. It can support connecting multiple single-bus peripherals 100 in series. For example, Figure 9 in, the smart gateway is connected to a single-bus based data acquisition device 1, a single-bus based data acquisition device 2.... a single-bus based data acquisition device n.

[0210] Reference Figure 8, the power conversion chip of the single-bus data acquisition device (power supply for single-bus devices and power supply for read / write data circuits), the encrypted power control module 90 (power supply for encrypted chips and level conversion), the strong drive pull-up circuit 23, the pull-down circuit 25, the power indicator module, and the network indicator module are all controlled by the communication module 10 to turn on and off, ensuring that they are enabled only during the required time period, and minimizing the power consumption of the single-bus data acquisition device. In actual product measurements in the sleep state, the power consumption of this device is approximately 3V 3.6μA.

[0211] For example, in a normal working scenario, 30 single-bus sensors are connected, connected to the cloud server through an intelligent gateway, and the sensor data is reported once every 1h. The power consumption measured in 24h is 3V 92μA. If the sensor data is reported once every 24h instead, the power consumption measured in 24h is 3V, 15μA. The power consumption in 5 years is approximately: 15uA * 24h * 365 * 5 / 1000 = 657mAh. This device has extremely low power consumption and is suitable for single-bus data acquisition scenarios with extremely high power consumption requirements.

[0212] The single-bus ultra-low power consumption data acquisition device of this embodiment is connected to the cloud server through an intelligent gateway. The intelligent gateway belongs to a transparent transmission type gateway, which realizes data intercommunication between the data acquisition device and the cloud server. The data between the data acquisition device and the cloud server can be directly transmitted to each other, playing a role of a relay and can manage thousands of devices. The cloud server needs to add an intelligent gateway device. After the data acquisition device and the gateway are successfully matched and connected, the cloud server can receive the collected data, and the user can analyze and process the data on the cloud server. At the same time, the data reporting frequency can be set. The lower the data reporting frequency, the lower the power consumption of the data acquisition device.

[0213] This application is suitable for collecting peripherals that support the single-bus protocol. For different peripherals, only software adaptation is required, and the overall hardware solution does not need to be changed, saving the hardware development cost. The single-bus data acquisition device of this application supports the serial use of multiple single-bus peripherals, that is, it supports the use of heavy-load peripheral scenarios. An encrypted chip is built in to ensure the security of Internet of Things data. It uses a mobile network to access the Internet, reducing the limitation of wires and facilitating outdoor installation and construction. This device has extremely low power consumption and is suitable for scenarios with strict power consumption requirements.

[0214] Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the above-described systems, devices, and units can refer to the corresponding processes in the foregoing method embodiments and will not be repeated here.

[0215] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods in various embodiments of this application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.

[0216] As described above, the above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit them; although this application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of various embodiments of this application.

Claims

1. A data acquisition device based on a single bus, characterized in that The single-bus-based data acquisition device includes: A communication module; A read data circuit, the first end of which is connected to the signal input end of the communication module; A write data circuit, the first end of which is connected to the signal output end of the communication module; A single bus, the first end of which is connected to the second ends of the read data circuit and the write data circuit, and the second end of the single bus is used to connect to a single-bus peripheral; Wherein, the read data circuit is used to collect a first data signal of the single-bus peripheral through the single bus, and convert the first data signal into a second data signal readable by the communication module through level conversion; The write data circuit is used to obtain a third data signal of the communication module, convert the third data signal into a fourth data signal receivable by the single-bus peripheral through level conversion, and transmit the fourth data signal to the single-bus peripheral through the single bus.

2. The data acquisition device based on a single bus according to claim 1, wherein The gate of the first MOS transistor in the read data circuit is grounded through a second resistor, the drain of the first MOS transistor is connected to the communication module, the drain of the first MOS transistor is also connected to a first power supply terminal through a first resistor, and the source of the first MOS transistor is grounded. The gate of the first MOS transistor is also connected to the drain of a second MOS transistor through a third resistor, the drain of the second MOS transistor is also connected to a second power supply terminal through a fourth resistor, the source of the second MOS transistor is grounded, the gate of the second MOS transistor is grounded through a fifth resistor, and the gate of the second MOS transistor is also connected to the single bus through a sixth resistor; And / or The gate of the third MOS transistor in the write data circuit is grounded through an eighth resistor, the gate of the third MOS transistor is also connected to the communication module through a seventh resistor, the source of the third MOS transistor is grounded, the drain of the third MOS transistor is connected to a third power supply terminal through a ninth resistor, the drain of the third MOS transistor is also connected to the gate of a fourth MOS transistor through a tenth resistor, the drain of the third MOS transistor is also grounded sequentially through the tenth resistor and an eleventh resistor, the source of the fourth MOS transistor is grounded, and the drain of the fourth MOS transistor is connected to the single bus through a seventeenth resistor.

3. The data acquisition device based on a single bus according to claim 1 or 2, characterized in that The single-bus-based data acquisition device further includes a power supply module and a strong drive pull-up circuit connected to the communication module, and a weak pull-up circuit connected to the power supply module; The communication module is used to control the power supply module to supply power to or cut off the power supply to the weak pull-up circuit; The weak pull-up circuit is also connected to the single-bus peripheral through the single bus, and is used to supply power to the single-bus peripheral through the single bus after power-on to drive the single-bus peripheral; The communication module is further used to control the on-off of the strong drive pull-up circuit; The strong drive pull-up circuit is also connected to the single-bus peripheral through the single bus, and is used to assist in driving the single-bus peripheral through the single bus after being turned on.

4. The data acquisition device based on a single bus according to claim 3, wherein The gate of the fifth MOS transistor in the strong drive pull-up circuit is grounded through a thirteenth resistor, the gate of the fifth MOS transistor is also connected to the communication module through a twelfth resistor, the source of the fifth MOS transistor is grounded, the drain of the fifth MOS transistor is connected to the gate of the sixth MOS transistor through a fourteenth resistor, the gate of the sixth MOS transistor is also connected to the single bus through a first capacitor and a sixteenth resistor in sequence, the gate of the sixth MOS transistor is also connected to the fourth power supply terminal through a second capacitor and a fifteenth resistor connected in parallel, the source of the sixth MOS transistor is connected to the fourth power supply terminal, the source of the sixth MOS transistor is also grounded through a third capacitor, and the drain of the sixth MOS transistor is connected to the single bus through a sixteenth resistor; and / or, One end of the twentieth resistor in the weak pull-up circuit is connected to the fifth power supply terminal, and the other end is connected to the single bus. One end of the transient voltage suppression diode is grounded, and the other end is connected to the single bus.

5. The data acquisition device based on a single bus according to claim 3, wherein, The single-bus-based data acquisition device further includes a pull-down circuit connected to the communication module, The communication module is further configured to control the on / off of the pull-down circuit; The pull-down circuit is further connected to the single-bus peripheral through the single bus, and is configured to pull down the low level of the single bus after being turned on.

6. The data acquisition device based on a single bus according to claim 5, characterized in that The gate of the seventh MOS transistor in the pull-down circuit is connected to the communication module through an eighteenth resistor, the gate of the seventh MOS transistor is also grounded through a nineteenth resistor, the source of the seventh MOS transistor is grounded, and the drain of the seventh MOS transistor is connected to the single bus through a seventeenth resistor.

7. The data acquisition device based on a single bus according to claim 1 or 5, characterized in that The single-bus-based data acquisition device further includes a power supply module connected to the communication module; The power supply module includes a power supply control circuit, a power supply circuit, and a power conversion circuit connected to the power supply control circuit; The power supply control circuit is configured to control the power supply circuit to input an initial power supply voltage to the power conversion circuit in response to a power-on instruction; The power conversion circuit is configured to convert the initial power supply voltage into a target power supply voltage to supply power to a target module or a target circuit in the single-bus-based data acquisition device if a conversion instruction from the communication module is received.

8. The data acquisition device based on a single bus according to claim 7, characterized in that The source of the eighth MOS transistor in the power supply control circuit is connected to the power supply circuit, the source of the eighth MOS transistor is also grounded through a second ESD device and a seventh capacitor connected in parallel, the drain of the eighth MOS transistor is connected to the power conversion circuit, the drain of the eighth MOS transistor is also grounded through a fifth capacitor, the gate of the eighth MOS transistor is grounded through a twenty-second resistor and a first ESD device in sequence, the gate of the eighth MOS transistor is also connected to the source through a twenty-first resistor, and the four pins of the self-locking button are grounded through a first ESD device, and the other two pins are grounded.

9. The data acquisition device based on a single bus according to claim 7, wherein The single-bus-based data acquisition device further includes a power supply voltage acquisition module connected to the communication module; The power supply voltage acquisition module includes an RC charge and discharge circuit connected to the communication module and the output terminal of the power supply control circuit, and the power supply voltage of the RC charge and discharge circuit is the initial power supply voltage; The communication module includes a timer and a GPIO module connected to the RC charge-discharge circuit; The communication module is configured to configure the GPIO in the GPIO module as an output and pull it low to discharge the RC charge-discharge circuit. After the discharge is completed, the GPIO is configured as an input to charge the RC charge-discharge circuit, and the actual charging duration when the RC charges to the trigger high-level threshold is counted; The communication module is further configured to obtain the actual power supply voltage corresponding to the actual charging duration by matching based on the pre-stored mapping relationship between the RC charging duration and the initial power supply voltage; 10. The data acquisition device based on a single bus according to claim 9, characterized in that, The first end of the twenty-fourth resistor in the power supply voltage acquisition module is connected to the output end of the power supply control circuit. The second end of the twenty-fourth resistor is grounded through the parallel-connected twenty-third resistor and the eighth capacitor. The second end of the twenty-fourth resistor is also grounded through the twenty-sixth resistor and the ninth capacitor in sequence. The second end of the twenty-fourth resistor is also connected to the communication module through the twenty-sixth resistor; 11. The data acquisition device based on a single bus according to claim 1 or 9, characterized in that, The single-bus based data acquisition device further includes a networking control module and a communication connection module connected to the communication module; The communication module is further configured to, if a networking instruction is received through the networking control module, match with the gateway through the communication connection module, and upload the acquired data to the server through the successfully matched gateway; 12. The data acquisition device based on a single bus according to claim 11, wherein The single-bus based data acquisition device further includes an encryption module and an encrypted power supply control module connected to the communication module; The input end of the encrypted power supply control module is connected to the sixth power supply end, and the output end is connected to the encryption module; The communication module is configured to control the sixth power supply end to supply power to or cut off the power supply to the encryption module through the encrypted power supply control module; The encryption module is configured to encrypt the acquired data under the condition of power supply; The communication module is specifically configured to upload the encrypted acquired data to the server through the successfully matched gateway; 13. A data acquisition system based on a single bus, characterized in that, The single-bus based data acquisition system includes a cloud server, a gateway, and at least one single-bus based data acquisition device according to any one of claims 1-12 above; The single-bus based data acquisition device can be connected to at least one single-bus peripheral device and is configured to acquire the acquired data of the connected single-bus peripheral device; The single-bus based data acquisition device can upload the acquired data to the cloud server through the gateway;

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