Data processing device and method, storage medium, electronic equipment and chip

Abstract

The invention discloses a data processing device and method, a storage medium, electronic equipment and a chip, and relates to the technical field of data processing, and the method comprises the steps: firstly analyzing a data packet descriptor of downlink network data, and obtaining header information of a data packet; performing message header processing on the data packet in a DMA mode according to the header information and a USB protocol; and according to a data format corresponding to a USB controller, the data packet after the message header processing is assembled into a transmission request block, and the transmission request block is used for transmitting the downlink network data through a USB line. In the downlink network data transmission process by using the USB network equipment, the processor does not need to participate in data processing for many times, and in the large-batch downlink network data transmission process, the resource consumption of the processor is effectively reduced, so that the data processing speed of the processor is improved, and the data transmission rate is improved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular, to a data processing device, method, storage medium, electronic device, and chip. Background Art

[0002] With the progress of technology, USB network devices can be used to achieve wireless Internet access for computers. During the process of downlink network data transmission, downlink network data can be transmitted from the network to the computer through a USB cable.

[0003] Currently, the processor in a USB network device processes the downlink network data to be transmitted according to the USB protocol through software, obtains a transmission request block recognizable by the USB controller, and then starts the USB controller to achieve the transmission of downlink network data through the USB cable.

[0004] However, this method requires the processor to participate in data processing multiple times. During the process of transmitting a large number of downlink network data, it will consume a large amount of processor resources, thereby affecting the data processing speed of the processor, and resulting in a poor data transmission rate. Summary of the Invention

[0005] In view of this, this application provides a data processing device, method, storage medium, electronic device, and chip, mainly aiming to improve the technical problem that currently, during the process of using a USB network device for downlink network data transmission, the processor needs to participate in data processing multiple times. During the process of transmitting a large number of downlink network data, it will consume a large amount of processor resources, thereby affecting the data processing speed of the processor, and resulting in a poor data transmission rate.

[0006] In a first aspect, this application provides a data processing device, which includes: a parsing module, a protocol module, and an assembling module;

[0007] The parsing module is communicatively connected to the protocol module, and the protocol module is also communicatively connected to the assembling module;

[0008] The parsing module is configured to parse the packet descriptor of the downlink network data, obtain the header information of the packet, and send the header information to the protocol module;

[0009] The protocol module is configured to perform message header processing on the packet according to the header information and the USB protocol through direct memory access (DMA) mode, and send the packet after message header processing to the assembling module;

[0010] The assembly module is used to assemble the data packet after the message header is processed into a transmission request block according to the data format corresponding to the USB controller, and the transmission request block is used to transmit the downlink network data through the USB cable.

[0011] Optionally, the protocol module includes an Ethernet header sub-module, a protocol header sub-module, and a message header buffer manager;

[0012] The Ethernet header sub-module is used to add an Ethernet header to the data packet in the DMA mode according to the header information and the data packet type;

[0013] The protocol header sub-module is used to add a USB protocol header to the data packet in the DMA mode according to the header information and the USB network card type;

[0014] The message header buffer manager is used to provide an Ethernet header buffer for the Ethernet header and a protocol header buffer for the USB protocol header;

[0015] Among them, the Ethernet header buffer is used to write the Ethernet header to add the Ethernet header to the data packet, and the protocol header buffer is used to write the USB protocol header to add the USB protocol header to the data packet.

[0016] Optionally, the assembly module includes a transmission buffer manager and a transmission configuration sub-module;

[0017] The transmission buffer manager is used to provide a transmission buffer for the transmission request block, and the transmission buffer is used to cache the transmission request block;

[0018] The transmission configuration sub-module is used to assemble the transmission data block and, when the transmission data block meets the sending condition, write the starting address of the transmission data block into a preset queue and notify the processor through an interrupt;

[0019] Among them, the processor is used to read the starting address from the preset queue, write the starting address to the register corresponding to the USB controller, and cause the register to notify the USB controller to start the transmission.

[0020] Optionally, the device further includes: a release module;

[0021] The release module is respectively communicatively connected to the protocol module and the assembly module;

[0022] The release module is used to release the memory space corresponding to the transmission request block whose transmission is completed;

[0023] Among them, the memory space includes a transmission buffer corresponding to a transmission request block whose transmission is completed, and an Ethernet header buffer and a protocol header buffer for data packets corresponding to the transmission request block whose transmission is completed.

[0024] In a second aspect, the present application provides a chip, including one or more interface circuits and one or more processors; the interface circuit is configured to receive a signal from a memory of an electronic device and send the signal to the processor, and the signal includes computer instructions stored in the memory; when the processor executes the computer instructions, the electronic device is caused to execute the data processing method described in the third aspect.

[0025] In a third aspect, the present application provides a data processing method, including:

[0026] Analyze a packet descriptor of downlink network data to obtain header information of the packet;

[0027] Perform message header processing on the packet by DMA according to the header information and the USB protocol;

[0028] Assemble the packet after message header processing into a transmission request block according to the data format corresponding to the USB controller, and the transmission request block is used for transmitting the downlink network data through a USB cable.

[0029] Optionally, the performing message header processing on the packet by DMA according to the header information and the USB protocol includes:

[0030] Apply for allocation of an Ethernet header buffer, and write an Ethernet header into the Ethernet header buffer by DMA according to the header information and the packet type, so as to add the Ethernet header to the packet;

[0031] Apply for allocation of a protocol header buffer, and write a USB protocol header into the protocol header buffer by DMA according to the header information and the USB network card type, so as to add the USB protocol header to the packet.

[0032] Optionally, the method further includes:

[0033] Apply for allocation of a transmission buffer, and cache the assembled transmission data block in the transmission buffer;

[0034] When the transmission data block meets the sending condition, write the starting address of the transmission data block into a preset queue and notify the processor through an interrupt;

[0035] Wherein, the processor is configured to read the head address from the preset queue, write the head address to a register corresponding to the USB controller, and cause the register to notify the USB controller to start the transmission.

[0036] Optionally, satisfying the sending condition includes:

[0037] The number of request blocks of the transmission data block is greater than a preset number threshold; and / or,

[0038] The total length of the sending data corresponding to the transmission data block is greater than a preset length threshold.

[0039] Optionally, the method further includes:

[0040] Release the memory space corresponding to the transmission request block for which the transmission is completed;

[0041] Wherein, the memory space includes a transmission buffer corresponding to the transmission request block for which the transmission is completed, and an Ethernet header buffer and a protocol header buffer for the data packet corresponding to the transmission request block for which the transmission is completed.

[0042] In a fourth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the data processing method described in the first aspect is implemented.

[0043] In a fifth aspect, the present application provides an electronic device, including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that when the processor executes the computer program, the data processing method described in the first aspect is implemented.

[0044] By means of the above technical solutions, a data processing device, method, storage medium, electronic device, and chip provided by the present application first parse the packet descriptor of the downlink network data to obtain the header information of the packet; then, according to the header information and the USB protocol, perform message header processing on the packet by means of DMA; then, according to the data format corresponding to the USB controller, assemble the packet after message header processing into a transmission request block, and the transmission request block is used to transmit the downlink network data through a USB cable. Compared with the current existing technologies, in the process of using a USB network device to transmit downlink network data, the present application does not require the processor to participate in data processing multiple times, and effectively reduces the resource consumption of the processor in the process of transmitting a large amount of downlink network data, thereby improving the data processing speed of the processor and thus improving the data transmission rate.

[0045] The above description is only an overview of the technical solution of this application. In order to understand the technical means of this application more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of this application more obvious and understandable, the specific embodiments of this application are specifically given below. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] The drawings herein are incorporated into and constitute a part of this specification, showing embodiments consistent with this application, and are used together with the specification to explain the principles of this application.

[0047] In order to more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0048] Figure 1 Shows a schematic structural diagram of a data processing device provided by an embodiment of this application;

[0049] Figure 2 Shows a schematic diagram of an example provided by an embodiment of this application;

[0050] Figure 3 Shows a schematic flowchart of a data processing method provided by an embodiment of this application;

[0051] Figure 4 Shows a schematic diagram of an example provided by an embodiment of this application;

[0052] Figure 5 Shows a schematic diagram of an example provided by an embodiment of this application;

[0053] Figure 6 Shows a schematic structural diagram of a communication device provided by an embodiment of this application;

[0054] Figure 7 Shows a schematic structural diagram of a chip provided by an embodiment of this application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0055] The embodiments of this application will be described in more detail below with reference to the drawings. It should be noted that, without conflict, the embodiments in this application and the features in the embodiments can be combined with each other.

[0056] In order to improve the current technical problem that in the process of using a USB network device for downlink network data transmission, the processor needs to participate in data processing multiple times, and in the process of a large number of downlink network data transmissions, a large amount of processor resources will be consumed, which in turn affects the data processing speed of the processor, resulting in a poor data transmission rate. This embodiment provides a data processing device, as Figure 1 shown, the device includes: a parsing module 11, a protocol module 12, and an assembling module 13;

[0057] Among them, the parsing module 11 is communicatively connected to the protocol module 12, and the protocol module 12 is also communicatively connected to the assembling module 13; the parsing module 11 is used to parse the packet descriptor of the downlink network data to obtain the header information of the packet, and send the header information to the protocol module 12.

[0058] In some examples, the parsing module 11 can be used to receive the downlink network data sent by the receiving network module, and by parsing the packet descriptor of the downlink network data, obtain the header information of the packet. Among them, parsing and obtaining the packet descriptor can include but are not limited to network card serial number, network type, network packet valid address, length, USB network card type, Ethernet header identifier, etc., and the network module can include application programs, etc.

[0059] The protocol module 12 is used to perform message header processing on the packet according to the header information and the USB protocol through direct memory access (DMA) mode, and send the packet after message header processing to the assembling module 13.

[0060] In some examples, as Figure 2 shown, the protocol module 12 can determine the message header that needs to be added to the packet according to the header information and the USB protocol, and then use the DMA controller 14 to add the message header to the packet according to the DMA mode. Through the DMA controller 14, the processor does not need to participate in the entire data transmission process, thereby improving the overall performance and efficiency of data processing. Among them, the USB protocol can be determined according to the USB network card type, and can include but are not limited to RNDIS (Remote Network Driver Interface Specification), NCM (Network Control Model), MBIM (mobile Broadband Interface Model), etc., so as to realize the addition of multiple network protocol headers.

[0061] The assembling module 13 is used to assemble the packet after message header processing into a transmission request block according to the data format corresponding to the USB controller, and the transmission request block is used to transmit the downlink network data through the USB cable.

[0062] In some examples, data packets can be assembled according to the data format corresponding to the USB controller to obtain a transfer request block recognizable by the USB controller, and then the downstream network data can be transmitted through the USB cable.

[0063] Compared with the current existing technologies, in this embodiment, the parsing module 11 can parse the packet descriptor of the downstream network data to obtain the header information of the data packet, and send the header information to the protocol module 12; the protocol module 12 can, according to the header information and the USB protocol, process the message header of the data packet in the DMA mode, and send the data packet after message header processing to the assembly module 13; the assembly module 13 can assemble the data packet after message header processing into a transfer request block according to the data format corresponding to the USB controller, and the transfer request block can transmit the downstream network data through the USB cable. The data processing device provided in this embodiment does not require the processor to participate in the data processing multiple times during the process of using the USB network device to transmit downstream network data. During the process of transmitting a large number of downstream network data, the resource consumption of the processor is effectively reduced, thereby improving the data processing speed of the processor and thus increasing the data transmission rate.

[0064] Optionally, as Figure 2 shown, the protocol module 12 may include an Ethernet header sub-module 121, a protocol header sub-module 122, and a message header buffer manager 123; the Ethernet header sub-module 121 is used to add an Ethernet header to the data packet in the DMA mode according to the header information and the data packet type; the protocol header sub-module 122 is used to add a USB protocol header to the data packet in the DMA mode according to the header information and the USB network card type; the message header buffer manager 123 is used to provide an Ethernet header buffer for the Ethernet header and a protocol header buffer for the USB protocol header; wherein, the Ethernet header buffer is used to write the Ethernet header to add the Ethernet header to the data packet, and the protocol header buffer is used to write the USB protocol header to add the USB protocol header to the data packet.

[0065] Exemplarily, as Figure 2As shown in the figure, the Ethernet header sub-module 121 can be used to determine whether an Ethernet frame needs to be added to a data packet according to the Ethernet header identifier, so as to realize the identification and processing of different service scenarios (Ethernet packets, non-Ethernet packets). If an Ethernet frame needs to be added to the data packet, the message header buffer manager 123 allocates an Ethernet header buffer area for the Ethernet header from the message header buffer, and allocates a protocol header buffer area for the USB protocol header, and then writes the Ethernet header into the Ethernet header buffer area through the DMA controller 14, and writes the USB protocol header into the protocol header buffer area; if an Ethernet frame does not need to be added to the data packet, the message header buffer manager 123 allocates a protocol header buffer area for the USB protocol header from the message header buffer, and then writes the USB protocol header into the protocol header buffer area through the DMA controller 14, without the processor participating in the processing process of the message header, effectively reducing the resource consumption of the processor, thereby improving the data processing speed of the processor, and thus improving the data transmission rate.

[0066] Optionally, as Figure 2 shown in the figure, the assembly module 13 includes a transmission buffer manager 131 and a transmission configuration sub-module 132; the transmission buffer manager 131 is used to provide a transmission buffer for the transmission request block, and the transmission buffer is used to cache the transmission request block; the transmission configuration sub-module 132 is used to assemble a transmission data block and, when the transmission data block meets the sending condition, write the start address of the transmission data block into a preset queue and notify the processor through an interrupt; wherein, the processor is used to read the start address from the preset queue, write the start address to the corresponding register of the USB controller, and cause the register to notify the USB controller to start the transmission.

[0067] Exemplarily, information such as the protocol header, Ethernet header, and the address and length of the data packet can be assembled into a transmission request block, and it is determined whether the assembled transmission request block meets the sending condition. If it meets the sending condition, the start address of the transmission request block is written into the preset queue corresponding to the transmission buffer, and a packet assembly completion interrupt is sent to the processor to notify the processor that the transmission of the transmission request block can be performed, without the processor participating in the packet assembly process of the transmission request block, improving the data processing efficiency.

[0068] Optionally, as Figure 2 shown in the figure, the device of this embodiment may further include: a release module 15; the release module 15 is respectively communicatively connected to the protocol module 12 and the assembly module 13; the release module 15 is used to release the memory space corresponding to the transmission request block that has completed transmission; wherein, the memory space includes the transmission buffer corresponding to the transmission request block that has completed transmission, and the Ethernet header buffer area and protocol header buffer area of the data packet corresponding to the transmission request block that has completed transmission.

[0069] Exemplarily, after the processor receives the transfer completion interrupt sent by the USB controller, the release module 15 can write the transfer request block address of the transfer completion into the release buffer, and then the release module 15 releases the memory space corresponding to the transfer request block of the transfer completion, ensuring the effective utilization of system resources and preventing memory waste or memory leakage.

[0070] Exemplarily, as Figure 2 described, this embodiment may include the following modules:

[0071] Parsing module 11 (desc process): responsible for parsing the descriptors of upper-layer network data packets (USB network data);

[0072] Protocol module 12 (protocol process): adds an Ethernet header to the data packet according to the information parsed by the parsing module 11, and adds one of the three different USB protocol headers, RNDIS, NCM, and MBIM, as needed. The protocol module 12 may include an Ethernet header sub-module 121 (MAC process), a protocol header sub-module 122 (header process), and a message header buffer manager 123 (head buf manager). Among them, the message header buffer manager 123 can be used to manage the memory corresponding to the message header buffer, determine the memory segmentation method according to the protocol type, segment the message header buffer into different memory blocks, provide them to the Ethernet header sub-module 121 to add an Ethernet header, and provide them to the protocol header sub-module 122 to add a protocol header;

[0073] Assembly module 13 (trb process): assembles the data packet with the added protocol header into a transfer request block recognizable by the USB controller, and generates an interrupt to notify the processor (for example: Central Processing Unit (CPU)). The assembly module 13 may include a transfer buffer manager 131 (trb buf manager) and a transfer configuration sub-module 132 (trbconfig). The transfer buffer manager 131 can be used to manage the transfer request block memory and provide memory to the assembly module 13. The transfer configuration sub-module 132 can be used to assemble the transfer block content;

[0074] DMA controller 14 (DMA controller): can be used to control DMA transfer, and add a message header to the USB network data in DMA mode, where the message header may include an Ethernet header and a protocol header;

[0075] Release module 15: It may include a release buffer (mem free fifo) and a release manager (mem manager). The release buffer can be used to store the addresses of transmission request blocks to be released, and the release manager can be used to release the memory of the transmission request blocks whose transmissions are completed, as well as the Ethernet header memory and protocol header memory of the data packets corresponding to the transmission request blocks whose transmissions are completed;

[0076] Buffer manager 16 (fifo manager): It can be used to manage various different types of buffers (First-In-First-Out, fifo) inside the data processing device, such as: the buffer for completed assembly of transmission control blocks, the buffer for memory recycling, etc.

[0077] Furthermore, to illustrate the specific usage process of this device, as Figure 3 shown, this embodiment provides a data processing method, which can be applied to the above data processing device. This method includes:

[0078] Step 201, parse the packet descriptor of the downlink network data to obtain the header information of the packet.

[0079] The execution subject of this embodiment can be a data processing device or a hardware acceleration module, which can be configured on the terminal device side, such as an electronic device or a chip, etc.

[0080] In some examples, the terminal device may be referred to as a terminal, user equipment (UE), mobile station (MS), mobile terminal (MT), USB network device, USB wireless network card device, USB receiver, wireless fidelity (WiFi) receiver, etc. The terminal device may also be an automobile with communication functions, intelligent vehicle, mobile phone, wearable device, tablet computer (Pad), computer with wireless transceiver function, virtual reality (VR) device, augmented reality (AR) device, wireless terminal device in industrial control, wireless terminal device in self-driving, wireless terminal device in remote medical surgery, wireless terminal device in smart grid, wireless terminal device in transportation safety, wireless terminal device in smart city, wireless terminal device in smart home, or may also be a chip or chip system, etc. Embodiments of the present application do not limit the specific technologies and specific device forms adopted by the terminal device.

[0081] The downlink network data may be sent by the network device. In an embodiment of the present application, the network device may be a device such as a base station, satellite, etc., and the specific network device is not limited in the embodiments of the present application. The network device may be an entity on the network side for transmitting or receiving signals. For example, the network device may be a communication satellite, evolved NodeB (eNB), transmission reception point (TRP), next generation NodeB (gNB) in the NR system, base station in other future mobile communication systems, or access node in the WiFi system, etc. Embodiments of the present application do not limit the specific technologies and specific device forms adopted by the network device.

[0082] Step 202: Process the message header of the data packet by DMA according to the header information and the USB protocol.

[0083] Exemplarily, such as Figure 4As shown, during the process of a large number of downlink network data transmissions, the downlink network data can first be stored in the hardware buffer, and then the USB hardware acceleration module can be used to parse the downlink network data, encapsulate the Ethernet header and protocol header according to the packet type of the downlink network data, assemble the USB protocol header and the transfer request block (USB control transfer block) through the hardware DMA method, and then send the assembled transfer request block to the processor. Then, the transfer request block is transmitted from the USB controller to the host through the USB cable, thereby realizing the downlink network data transmission from the network module to the host. In this way, the message header processing process of the downlink network data does not require the participation of the processor, effectively reducing the resource consumption of the processor, thereby improving the data processing speed of the processor and thus increasing the transmission rate of the network data.

[0084] Step 203: Assemble the packet after message header processing into a transfer request block according to the data format corresponding to the USB controller, and the transfer request block is used to transmit the downlink network data through the USB cable.

[0085] In this embodiment, the hardware acceleration module can be used to further encapsulate the packet after message header processing into a transfer request block recognizable by the USB controller according to the data format corresponding to the USB controller. Exemplarily, when assembling the packets, the encapsulated packets can be formed into multiple DMA chains through the chained DMA method for sending, and the conditions for completing the chain formation can be judged according to the actual service scenario. In this way, the processor does not need to participate in the process of assembling the transfer request block, improving the data processing speed of the processor and thus increasing the transmission rate of the network data.

[0086] In this embodiment, first, the packet descriptor of the downlink network data can be parsed to obtain the header information of the packet; then, according to the header information and the USB protocol, the packet is processed for the message header through the DMA method; then, according to the data format corresponding to the USB controller, the packet after message header processing is assembled into a transfer request block, and the transfer request block is used to transmit the downlink network data through the USB cable. Compared with the current existing technologies, in this embodiment, the processor does not need to participate in the data processing multiple times. During the process of a large number of downlink network data transmissions, the resource consumption of the processor is effectively reduced, thereby improving the data processing speed of the processor and thus increasing the data transmission rate.

[0087] Optionally, processing the message header of the packet through the DMA method according to the header information and the USB protocol includes: applying for and allocating an Ethernet header buffer, and writing the Ethernet header into the Ethernet header buffer through the DMA method according to the header information and the packet type to add the Ethernet header to the packet; applying for and allocating a protocol header buffer, and writing the USB protocol header into the protocol header buffer through the DMA method according to the header information and the USB network card type to add the USB protocol header to the packet.

[0088] Optionally, the method of this embodiment may further include: applying for allocation of a transmission buffer, and caching the assembled transmission data blocks in the transmission buffer; when the transmission data blocks meet the sending conditions, writing the starting address of the transmission data blocks into a preset queue and notifying the processor through an interrupt; wherein, the processor is configured to read the starting address from the preset queue, write the starting address to the register corresponding to the USB controller, and cause the register to notify the USB controller to start the transmission.

[0089] Optionally, meeting the sending conditions includes: the number of request blocks of the transmission data blocks is greater than a preset number threshold; and / or, the total length of the sending data corresponding to the transmission data blocks is greater than a preset length threshold.

[0090] Exemplarily, when the number of encapsulated transmission request blocks is greater than the preset number threshold, an interrupt can be used to notify the CPU, and then the CPU starts the transmission, and the USB controller is used to send the transmission request blocks to the host, thereby improving the data transmission efficiency.

[0091] Exemplarily, the total length of the sending data corresponding to the transmission data blocks can be counted. If the total length of the sending data is greater than the preset length threshold, it can be determined that the sending conditions are met. If the total length of the sending data is an integer multiple of the maximum length allowed by the USB endpoint, a zero-length packet is additionally added during transmission, which is beneficial for the USB controller to efficiently organize and process data transmission and realize the recognition and processing of special scenarios of the USB protocol.

[0092] Optionally, the method of this embodiment further includes: releasing the memory space corresponding to the transmission request blocks that have been transmitted; wherein, the memory space includes the transmission buffer corresponding to the transmission request blocks that have been transmitted, as well as the Ethernet header buffer and the protocol header buffer corresponding to the data packets of the transmission request blocks that have been transmitted.

[0093] Exemplarily, after sending the transmission request blocks to the host, the USB controller can notify the processor of the transmission completion interrupt, and then the processor sends the address of the transmission request blocks that have been transmitted to the hardware acceleration module to release the memory space of the transmission request blocks that have been transmitted, ensuring the effective utilization of system resources and preventing memory waste or memory leakage.

[0094] Exemplarily, as Figure 5 shown, the method of this embodiment may include the following steps:

[0095] (1) The hardware acceleration module (USB downstream data hardware acceleration module) reads the upper-layer network data descriptor corresponding to the data packet from the USB output buffer (USB OUT FIFO) and inputs it to the parsing module;

[0096] (2) The parsing module parses the upper-layer network data descriptor to obtain information such as the physical address, offset, valid data length, and packet type of the data packet, and then transfers this information to the protocol module through the internal buffer;

[0097] (3) The Ethernet header sub-module in the protocol module first determines whether an Ethernet frame needs to be added to the data packet. If an Ethernet frame needs to be added, it allocates a block of space from the message header buffer through the message header buffer manager, and then writes the Ethernet header content into the allocated space through the DMA controller;

[0098] (4) The protocol header sub-module in the protocol module then allocates a block of space from the message header buffer through the message header buffer manager, and then fills in the corresponding protocol header content through the DMA controller according to the type of the USB network card. Then, it transfers the protocol header, Ethernet header, and information such as the address and length of the data packet to the assembly module;

[0099] (5) The assembly module first applies for a certain amount of memory space from the transmission buffer through the transmission buffer manager, and then assembles the protocol header, MAC header, and information such as the address and length of the data packet generated by the protocol module into a transmission request block, and determines whether the assembled transmission request block meets the sending conditions. The sending conditions may include whether the number of transmission request blocks exceeds the threshold, whether the total length of the transmitted data exceeds the threshold, etc. If the sending conditions are met, the starting address of the transmission request block can be written into the transmission configuration completion buffer (trb_cfg_done_fifo), and a packet assembly completion interrupt is generated to notify the CPU;

[0100] (6) After receiving the packet assembly completion interrupt, the CPU reads the starting address of the transmission request block from the trb_cfg_done_fifo, writes this address into the corresponding register of the USB controller, and configures the command register to notify the USB controller to start the transmission, and sends the transmission data block to the host USB controller through the USB cable;

[0101] (7) When the USB controller finishes the transmission, a transmission completion interrupt is generated to notify the CPU;

[0102] (8) After receiving the transmission completion interrupt, the CPU can write the address of the transmission request block that has completed the transmission into the release buffer;

[0103] (9) The hardware acceleration module reads the address of the transmission request block that has completed the transmission in the release buffer, obtains the address of the data packet by reading the content of the transmission request block, and then sends the data packet address to the release module for release.

[0104] Through the method of this embodiment, the USB downstream network data can be automatically packetized by hardware, which can effectively improve the USB data transmission speed and reduce the consumption of processor resources.

[0105] Figure 6 It is a schematic structural diagram of a communication device 1800 provided in this embodiment. The communication device 1800 may be a terminal device, a network device, a chip, a chip system, or a processor that supports the network device to implement the above method, or a chip, a chip system, or a processor that supports the user equipment to implement the above method. This device can be used to implement the method described in the above method embodiments, and for specific details, please refer to the description in the above method embodiments.

[0106] The communication device 1800 may include one or more processors 1801. The processor 1801 may be a general-purpose processor or a dedicated processor, etc. For example, it may be a baseband processor or a central processing unit. The baseband processor can be used to process data processing protocols and data, and the central processing unit can be used to control the communication device (such as a base station, a baseband chip, a terminal device, a terminal device chip, a DU or a CU, etc.), execute computer programs, and process the data of computer programs.

[0107] Optionally, the communication device 1800 may further include one or more memories 1802, on which a computer program 1804 may be stored. The processor 1801 executes the computer program 1804 to enable the communication device 1800 to execute the method described in the above method embodiments. Optionally, data may also be stored in the memory 1802. The communication device 1800 and the memory 1802 may be provided separately or integrated together.

[0108] Optionally, the communication device 1800 may further include a transceiver 1805 and an antenna 1806. The transceiver 1805 may be referred to as a transceiver unit, a transceiver, or a transceiver circuit, etc., and is used to implement the transceiver function. The transceiver 1805 may include a receiver and a transmitter. The receiver may be referred to as a receiver or a receiving circuit, etc., and is used to implement the receiving function; the transmitter may be referred to as a transmitter or a transmitting circuit, etc., and is used to implement the transmitting function.

[0109] Optionally, the communication device 1800 may further include one or more interface circuits 1807. The interface circuit 1807 is used to receive code instructions and transmit them to the processor 1801. The processor 1801 runs the code instructions to enable the communication device 1800 to execute the method described in the above method embodiments.

[0110] In one implementation, the processor 1801 may include a transceiver for implementing the receiving and sending functions. For example, the transceiver may be a transceiver circuit, an interface, or an interface circuit. The transceiver circuit, interface, or interface circuit for implementing the receiving and sending functions may be separate or integrated. The above-mentioned transceiver circuit, interface, or interface circuit may be used for reading and writing code / data, or the above-mentioned transceiver circuit, interface, or interface circuit may be used for transmitting or delivering signals.

[0111] In one implementation, the processor 1801 may store a computer program 1803, which runs on the processor 1801 and enables the communication device 1800 to perform the method described in the above method embodiment. The computer program 1803 may be fixed in the processor 1801, in which case the processor 1801 may be implemented by hardware.

[0112] In one implementation, the communication device 1800 may include a circuit that can implement the functions of sending or receiving or data processing in the aforementioned method embodiment. The processor and transceiver described in the present disclosure can be implemented in an integrated circuit (IC), an analog IC, a radio frequency integrated circuit RFIC, a mixed signal IC, an application specific integrated circuit (ASIC), a printed circuit board (PCB), an electronic device, etc. The processor and transceiver can also be manufactured using various IC process technologies, such as complementary metal oxide semiconductor (CMOS), N-type metal oxide semiconductor (nMetal-oxide-semiconductor, NMOS), P-type metal oxide semiconductor (positive channelmetal oxide semiconductor, PMOS), bipolar junction transistor (bipolar junction transistor, BJT), bipolar CMOS (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), etc.

[0113] The communication device described in the above embodiments may be a network device or a user device, but the scope of the communication device described in the present disclosure is not limited thereto, and the structure of the communication device may not be limited thereto. Figure 6 The communication device may be an independent device or may be part of a larger device. For example, the communication device may be:

[0114] (1) An independent integrated circuit IC, or chip, or chip system or subsystem;

[0115] (2) A set having one or more ICs, optionally, the IC set may also include storage components for storing data and computer programs;

[0116] (3) ASIC, such as a modem;

[0117] (4) A module that can be embedded in other devices;

[0118] (5) A receiver, a terminal device, a smart terminal device, a cellular phone, a wireless device, a handheld device, a mobile unit, a vehicle-mounted device, a network device, a cloud device, an artificial intelligence device, etc.;

[0119] (6) Others, etc.

[0120] Based on the above embodiments, this embodiment also provides a chip, including a data processing device as Figures 1 to 2 shown, and further including one or more interfaces and one or more processors; the interfaces are used to receive signals from the memory of the communication device and send the signals to the processors, and the signals include computer instructions stored in the memory; when the processors execute the computer instructions, the communication device is caused to execute the method as Figure 3 shown above.

[0121] Figure 7 is a schematic structural diagram of a chip 1000 for implementing the above data processing method provided in this embodiment. Referring to Figure 7 , the chip 1000 includes at least one data processing interface 1001 and a processor 1002. The data processing interface 1001 is used to receive signals input to the chip 1000 or signals output from the above chip 1000. The processor 1002 processes data with the data processing interface 1001 and implements the data processing method described in the above embodiments of the present disclosure through logic circuits or executing code instructions.

[0122] Those skilled in the art can also understand that the various illustrative logical blocks and steps listed in the embodiments of the present disclosure can be implemented by electronic hardware, computer software, or a combination of both. Whether such a function is implemented by hardware or software depends on the specific application and the design requirements of the entire system. Those skilled in the art can use various methods to implement the described function for each specific application, but such implementation should not be construed as exceeding the scope protected by the embodiments of the present disclosure.

[0123] The present disclosure also provides a computer-readable storage medium, on which instructions are stored, and when the instructions are executed by a computer, the functions of any of the above method embodiments are implemented.

[0124] The present disclosure also provides a computer program product, and when the computer program product is executed by a computer, the functions of any of the above method embodiments are implemented.

[0125] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs. When the computer program is loaded and executed on a computer, the processes or functions according to the embodiments of the present disclosure are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer program can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another. For example, the computer program can be transmitted from a website, computer, server, or data center to another website, computer, server, or data center by wire (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer, or a data storage device such as a server or data center that includes one or more integrated available media. The available medium can be a magnetic medium (such as a floppy disk, hard disk, magnetic tape), an optical medium (such as a high-density digital video disc (DVD)), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0126] Those of ordinary skill in the art can understand that the various digital numbers such as the first and second involved in the present disclosure are only for the convenience of description and are not used to limit the scope of the embodiments of the present disclosure, nor do they represent the order of precedence.

[0127] At least one in the present disclosure can also be described as one or more. The plurality can be two, three, four, or more, and the present disclosure does not make any limitations. In the embodiments of the present disclosure, for a technical feature, the technical features in this technical feature are distinguished by "first", "second", "third", "A", "B", "C", and "D", etc. There is no order of precedence or size order among the technical features described by the "first", "second", "third", "A", "B", "C", and "D".

[0128] As used herein, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, apparatus, and / or device (e.g., a magnetic disk, an optical disk, a memory, a programmable logic device (PLD)) used to provide machine instructions and / or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term "machine-readable signal" refers to any signal used to provide machine instructions and / or data to a programmable processor.

[0129] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data processing (e.g., a data processing network). Examples of data processing networks include: local area network (LAN), wide area network (WAN), and the Internet.

[0130] A computer system can include a client and a server. The client and the server are generally remote from each other and typically interact through a data processing network. The relationship between the client and the server is generated by computer programs running on the respective computers and having a client-server relationship with each other.

[0131] It should be understood that various forms of the flow shown above can be used, steps can be reordered, added, or deleted. For example, the steps recited in this disclosure can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions of this disclosure application can be achieved. There is no limitation herein.

[0132] In addition, it should be understood that the various embodiments described in this disclosure can be implemented separately or, where the solution permits, in combination with other embodiments.

[0133] Those of ordinary skill in the art can realize that the units and algorithm steps of the examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans can use different methods for each specific application to implement the described functions, but such implementation should not be considered to exceed the scope of this disclosure.

[0134] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments, and will not be elaborated herein.

[0135] The above is only a specific implementation manner of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present disclosure, and all of them should be covered by the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A data processing device, characterized in that, It includes: a parsing module, a protocol module, and an assembling module; The parsing module is communicatively connected to the protocol module, and the protocol module is also communicatively connected to the assembling module; The parsing module is used to parse the packet descriptor of the downlink network data to obtain the header information of the packet, and send the header information to the protocol module; The protocol module is used to perform message header processing on the packet by means of direct memory access (DMA) according to the header information and the USB protocol, and send the packet after message header processing to the assembling module; The assembling module is used to assemble the packet after message header processing into a transfer request block according to the data format corresponding to the USB controller, and the transfer request block is used to transmit the downlink network data through the USB cable.

2. The device according to claim 1, wherein The protocol module includes an Ethernet header sub-module, a protocol header sub-module, and a message header buffer manager; The Ethernet header sub-module is used to add an Ethernet header to the packet by means of DMA according to the header information and the packet type; The protocol header sub-module is used to add a USB protocol header to the packet by means of DMA according to the header information and the USB network card type; The message header buffer manager is used to provide an Ethernet header buffer for the Ethernet header and a protocol header buffer for the USB protocol header; Wherein, the Ethernet header buffer is used to write the Ethernet header to add the Ethernet header to the packet, and the protocol header buffer is used to write the USB protocol header to add the USB protocol header to the packet.

3. The device according to claim 1, characterized in that, The assembling module includes a transfer buffer manager and a transfer configuration sub-module; The transfer buffer manager is used to provide a transfer buffer for the transfer request block, and the transfer buffer is used to cache the transfer request block; The transfer configuration sub-module is used to assemble the transfer data block and, when the transfer data block meets the sending condition, write the starting address of the transfer data block into a preset queue and notify the processor through an interrupt; Wherein, the processor is used to read the starting address from the preset queue, write the starting address to the register corresponding to the USB controller, and cause the register to notify the USB controller to start the transfer.

4. The device according to any one of claims 1 to 3, characterized in that The device further includes: a release module; The release module is communicatively connected to the protocol module and the assembling module respectively; The release module is used to release the memory space corresponding to the transfer request block with the transfer completed; Wherein, the memory space includes the transfer buffer corresponding to the transfer request block with the transfer completed, and the Ethernet header buffer and the protocol header buffer of the packet corresponding to the transfer request block with the transfer completed.

5. A chip, characterized in that, It includes the device according to any one of claims 1 to 4.

6. A data processing method, characterized in that, It includes: Parsing the packet descriptor of the downlink network data to obtain the header information of the packet; Performing message header processing on the packet by means of direct memory access (DMA) according to the header information and the USB protocol; According to the data format corresponding to the USB controller, assemble the data packet after the message header processing into a transmission request block, and the transmission request block is used to transmit the downlink network data through the USB cable.

7. The method according to claim 6, wherein Perform message header processing on the data packet by DMA according to the header information and the USB protocol, including: Apply for and allocate an Ethernet header buffer, and write the Ethernet header into the Ethernet header buffer by DMA according to the header information and the data packet type, so as to add the Ethernet header to the data packet; Apply for and allocate a protocol header buffer, and write the USB protocol header into the protocol header buffer by DMA according to the header information and the USB network card type, so as to add the USB protocol header to the data packet.

8. The method according to claim 6, wherein The method further includes: Apply for and allocate a transmission buffer, and cache the assembled transmission data block in the transmission buffer; When the transmission data block meets the sending condition, write the starting address of the transmission data block into a preset queue and notify the processor through an interrupt; Wherein, the processor is used to read the starting address from the preset queue, write the starting address to the register corresponding to the USB controller, and cause the register to notify the USB controller to start the transmission.

9. The method according to claim 8, wherein Meeting the sending condition includes: The number of request blocks of the transmission data block is greater than a preset number threshold; and / or, The total length of the transmitted data corresponding to the transmission data block is greater than a preset length threshold.

10. The method according to any one of claims 6 to 9, characterized in that, The method further includes: Release the memory space corresponding to the transmission request block whose transmission is completed; Wherein, the memory space includes the transmission buffer corresponding to the transmission request block whose transmission is completed, as well as the Ethernet header buffer and the protocol header buffer of the data packet corresponding to the transmission request block whose transmission is completed.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, the method according to any one of claims 6 to 10 is implemented.

12. An electronic device, comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that, When the processor executes the computer program, the method according to any one of claims 6 to 10 is implemented.

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