Method for manufacturing semiconductor chip

Abstract

The invention relates to a manufacturing method of a semiconductor chip. The manufacturing method of the semiconductor structure comprises the following steps: providing a wafer; the wafer comprises a carbon-containing substrate; a plurality of semiconductor devices are formed on the front side of the carbon-containing substrate. Forming a barrier film on the front surface of the carbon-containing substrate; and the barrier film at least covers the semiconductor devices and the front surface of the carbon-containing substrate. Performing a back metallization process on the back of the carbon-containing substrate away from the semiconductor device; the back metallization process at least comprises an annealing process. And removing the barrier film. The method can prevent the front surface of the wafer from being influenced by carbon powder aiming at the carbon powder precipitation phenomenon on the back surface of the wafer in the annealing process, and avoids the impurity pollution problem of the front surface of the wafer.

Description

Technical Field

[0001] The present application relates to the field of semiconductor processes, and in particular to a semiconductor chip and a manufacturing method thereof. Background Art

[0002] In the current field of semiconductor processes, the backside process of a wafer includes a backgrinding process and a backside metallization process. In the backside metallization process of a wafer with a carbon-containing substrate (such as a silicon carbide (SiC) substrate), an annealing process needs to be performed on the backside of the wafer. During the annealing process, carbon (C) powder inevitably precipitates on the backside of the carbon-containing substrate wafer.

[0003] However, during the annealing process, an inert gas (such as nitrogen (N2)) needs to be introduced into the annealing equipment to prevent oxidation of the backside metal of the wafer at high temperatures. The introduced inert gas will cause the precipitated carbon (C) powder on the backside of the wafer to be carried by the gas flow to the front side of the wafer, thereby causing device contamination problems on the front side of the wafer. Summary of the Invention

[0004] Based on this, embodiments of the present application provide a manufacturing method of a semiconductor chip, which can address the phenomenon of carbon powder precipitation on the backside of the wafer during the annealing process, protect the front side of the wafer from the influence of carbon powder, and avoid impurity contamination problems on the front side of the wafer.

[0005] To achieve the above object, some embodiments of the present application provide a manufacturing method of a semiconductor chip. The manufacturing method of the semiconductor chip includes the following steps: providing a carbon-containing substrate; a plurality of semiconductor devices are formed on the front side of the carbon-containing substrate. Forming a barrier film on the front side of the carbon-containing substrate; the barrier film covers at least each of the semiconductor devices and the front side of the carbon-containing substrate. Performing a backside metallization process on the backside of the carbon-containing substrate facing away from the semiconductor devices; the backside metallization process includes at least an annealing process. Removing the barrier film.

[0006] In some embodiments, the manufacturing method of the semiconductor chip further includes the following steps: performing a dicing process on the obtained structure after removing the barrier film to obtain a plurality of independent semiconductor chips; each of the semiconductor chips includes at least one of the semiconductor devices.

[0007] In some embodiments, forming the barrier film on the front side of the carbon-containing substrate includes the following steps: providing a barrier film. Adhering the barrier film to the front side of the carbon-containing substrate by using a film laminating process.

[0008] In some embodiments, the barrier film is adhered to the front side of the carbon-containing substrate through a photosensitive adhesive.

[0009] In some embodiments, the backside metallization process on the backside of the carbon-containing substrate includes the following steps: performing surface pretreatment on the backside of the carbon-containing substrate; forming an ohmic metal seed layer on the backside of the carbon-containing substrate; and performing an annealing process on the ohmic metal seed layer to form an ohmic metal layer.

[0010] In some embodiments, removing the barrier film includes the following steps: irradiating the barrier film with ultraviolet light. Removing the barrier film by a film tearing process.

[0011] In some embodiments, after forming the barrier film on the front side of the carbon-containing substrate and before performing the backside metallization process on the backside of the carbon-containing substrate, the method for manufacturing a semiconductor chip further includes the following steps: performing a backside thinning process on the backside of the carbon-containing substrate to thin the carbon-containing substrate to a target thickness.

[0012] In some embodiments, the barrier film is reused as a polishing protection film in the backside thinning process.

[0013] In some embodiments, the annealing process includes a laser annealing process.

[0014] In some embodiments, the temperature resistance range of the barrier film includes 100°C to 150°C.

[0015] The embodiments of the present application can / at least have the following advantages:

[0016] In the embodiments of the present application, by forming a barrier film on the front side of the carbon-containing substrate of the wafer, the barrier film covers the front side of the carbon-containing substrate and the semiconductor device located on the front side of the carbon-containing substrate. During the process of performing the backside metallization process on the backside of the carbon-containing substrate, the barrier film can block the carbon (C) powder precipitated from the carbon-containing substrate during the annealing process, so that the carbon powder carried by the inert gas flow to the front side of the carbon-containing substrate during the annealing process can only adhere to the surface of the barrier film to protect the front-side semiconductor device from carbon powder contamination. Moreover, after the backside metallization process, the carbon powder attached to the surface of the barrier film can be removed together with the barrier film. Under the combined action of the above technical features, the embodiments of the present application can form a barrier protection for the front side of the carbon-containing substrate of the wafer and the semiconductor device through the barrier film, effectively avoiding the problem of impurity contamination on the front side of the wafer caused by the carbon (C) powder precipitation phenomenon during the annealing process. In this way, not only can the yield of semiconductor chip products be ensured, but also the defect detection accuracy of subsequent product measurement can be improved.

[0017] The details of one or more embodiments of the present application are set forth in the following drawings and description. Other features, objects, and advantages of the present application will become apparent from the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0019] Figure 1 A flowchart of a manufacturing method of a semiconductor chip provided in some embodiments;

[0020] Figure 2 A flowchart of another manufacturing method of a semiconductor chip provided in some embodiments;

[0021] Figure 3 A flowchart of still another manufacturing method of a semiconductor chip provided in some embodiments;

[0022] Figure 4 A flowchart of still another manufacturing method of a semiconductor chip provided in some embodiments;

[0023] Figure 5 A flowchart of still another manufacturing method of a semiconductor chip provided in some embodiments;

[0024] Figure 6 A flowchart of still another manufacturing method of a semiconductor chip provided in some embodiments;

[0025] Figure 7 A structural schematic diagram of a wafer provided in some embodiments;

[0026] Figure 8 A structural schematic diagram of a structure obtained after forming a barrier film provided in some embodiments;

[0027] Figure 9 A structural schematic diagram of a structure obtained after performing a back thinning process provided in some embodiments;

[0028] Figure 10 A structural schematic diagram of a structure obtained after forming an ohmic metal seed layer provided in some embodiments;

[0029] Figure 11 A structural schematic diagram of a structure obtained after forming an ohmic metal layer provided in some embodiments;

[0030] Figure 12 A structural schematic diagram of a structure obtained after removing the barrier film provided in some embodiments;

[0031] Figure 13Schematic diagram of a structure obtained after a wafer dicing process provided in some embodiments.

[0032] Description of reference numerals:

[0033] 1 - Carbon-containing substrate, 2 - Semiconductor device, 3 - Barrier film, 4 - Ohmic metal seed layer, 5 - Ohmic metal layer, C - Semiconductor chip. Detailed implementation manners

[0034] To facilitate understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0036] It should be understood that when an element or layer is referred to as "on", "adjacent to", or "connected to" another element or layer, it can be directly on, adjacent to, connected, or coupled to the other element or layer, or there can be intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types, and / or parts, these elements, components, regions, layers, doping types, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or part from another element, component, region, layer, doping type, or part. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type, or part discussed below can be referred to as the second element, component, region, layer, or part.

[0037] As used herein, the singular forms "a", "an", and "the" may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms "comprise" and / or "include" are used in this specification, the presence of the stated features, integers, steps, operations, elements, and / or components can be determined, but one or more other features, integers, steps, operations, elements, components, and / or groups are not excluded. At the same time, as used herein, the term "and / or" includes any and all combinations of the related listed items.

[0038] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the present application, such that variations in the shapes shown are to be expected for example due to manufacturing techniques and / or tolerances. Embodiments of the present application should not be limited to the specific shapes of the regions shown herein, but include shape deviations due to for example manufacturing techniques. Accordingly, the regions shown in the figures are substantially schematic, their shapes do not represent the actual shapes of the regions of the device, and do not limit the scope of the present application.

[0039] Embodiments of the present application provide a method for manufacturing a semiconductor chip, which can protect the front side of the wafer from carbon powder and avoid the problem of impurity contamination on the front side of the wafer for the phenomenon of carbon powder precipitation on the back side of the wafer during the annealing process.

[0040] In some embodiments, refer to Figure 1 , the method for manufacturing a semiconductor chip includes the following steps S100 to S400.

[0041] S100, provide a carbon-containing substrate; a plurality of semiconductor devices are formed on the front side of the carbon-containing substrate.

[0042] S200, form a barrier film on the front side of the carbon-containing substrate; the barrier film covers at least each semiconductor device and the front side of the carbon-containing substrate.

[0043] S300, perform a backside metallization process on the back side of the carbon-containing substrate facing away from the semiconductor devices; the backside metallization process includes at least an annealing process.

[0044] S400, remove the barrier film.

[0045] In embodiments of the present application, by forming a barrier film on the front side of the carbon-containing substrate of the wafer, the barrier film covers the front side of the carbon-containing substrate and the semiconductor devices located on the front side of the carbon-containing substrate. During the process of performing the backside metallization process on the back side of the carbon-containing substrate, the barrier film can form a barrier to the carbon (C) powder precipitated from the carbon-containing substrate during the annealing process, so that the carbon powder brought to the front side of the carbon-containing substrate by the inert gas flow during the annealing process can only adhere to the surface of the barrier film, to protect the front-side semiconductor devices from carbon powder contamination. And, after the backside metallization process, the carbon powder adhering to the surface of the barrier film can be removed together with the barrier film. Under the combined action of the above technical features, embodiments of the present application can form a barrier protection for the front side of the carbon-containing substrate of the wafer and the semiconductor devices through the barrier film, effectively avoiding the problem of impurity contamination on the front side of the wafer caused by the carbon (C) powder precipitation phenomenon during the annealing process. Thus, not only can the yield of semiconductor chip products be guaranteed, but also the defect detection accuracy of subsequent product measurement can be improved.

[0046] In some embodiments, refer to Figure 2, for example, after step S400, the method for manufacturing a semiconductor chip further includes the following step S500.

[0047] S500, perform a dicing process on the obtained structure after removing the barrier film to obtain a plurality of independent semiconductor chips; each semiconductor chip includes at least one semiconductor device.

[0048] It can be understood that the removal of the barrier film is required before the wafer dicing process to facilitate the wafer dicing process. In the embodiments of the present application, since the wafer dicing process is performed after the annealing process in the backside metallization process, the barrier film can be retained on the surface of the carbon-containing substrate until after the annealing process is completed and then removed, so that the barrier film can play a role in blocking carbon (C) powder on the front side of the wafer during the annealing process, effectively avoiding the problem of impurity contamination on the front side of the wafer.

[0049] In some embodiments, please refer to Figure 3 , step S200 includes the following steps S210 to S220.

[0050] S210, provide a barrier film.

[0051] S220, adopt a film pasting process to attach the barrier film to the front side of the carbon-containing substrate.

[0052] In some embodiments, the barrier film is attached to the front side of the carbon-containing substrate through a photosensitive adhesive.

[0053] In the embodiments of the present application, by adopting a film pasting process to attach the barrier film to the front side of the carbon-containing substrate, compared with chemical processes such as coating glue, the front side of the wafer can be covered with a film without affecting the performance of the semiconductor devices on the front side of the wafer.

[0054] In some embodiments, please refer to Figure 4 , after step S200 and before step S300, the method for manufacturing a semiconductor chip further includes the following step S600.

[0055] S600, perform a backside thinning process on the back side of the carbon-containing substrate to thin the carbon-containing substrate to a target thickness.

[0056] In some embodiments, the barrier film is reused as a polishing protection film in the backside thinning process.

[0057] In the embodiments of the present application, the carbon-containing substrate is thinned to a target thickness through the backside thinning process of the wafer to meet the requirements of the thin packaging of the wafer, and can improve the wafer heat dissipation efficiency in subsequent processes, reduce the on-resistance of the vertical conduction devices in the wafer and the volume of the semiconductor devices, thereby facilitating the miniaturization of the semiconductor chip.

[0058] In some embodiments, please refer to Figure 5 , step S300 includes the following steps:

[0059] S310, perform surface pretreatment on the back surface of the carbon-containing substrate.

[0060] S320, form an ohmic metal seed layer on the back surface of the carbon-containing substrate.

[0061] S330, perform an annealing process on the ohmic metal seed layer to form an ohmic metal layer.

[0062] In some embodiments, the annealing process includes a laser annealing process.

[0063] In the embodiments of the present application, surface contaminants on the back surface of the carbon-containing substrate are removed through surface pretreatment, and surface activation treatment is performed to facilitate improving the adhesion of the ohmic metal material in the subsequent ohmic metal seed layer formation process. After the ohmic metal seed layer is formed, an annealing process is adopted, which can promote atomic diffusion between the ohmic metal seed layer material and the semiconductor interface, thereby forming a low-resistance ohmic contact.

[0064] In some embodiments, please refer to Figure 6 , step S400 includes the following steps S410 to S420.

[0065] S410, irradiate the barrier film with ultraviolet light.

[0066] S420, remove the barrier film by using a film tearing process.

[0067] In the embodiments of the present application, the adhesive between the barrier film and the carbon-containing substrate can be softened or expanded under the action of ultraviolet (UV) irradiation, thereby reducing the adhesion between the barrier film and the surface of the carbon-containing substrate, and thus facilitating the peeling of the barrier film through the film tearing process. In this way, the carbon powder can be removed together with the barrier film without damaging the semiconductor device, and the problem of residual glue after film removal can be avoided by using ultraviolet (UV) irradiation and the film tearing process, effectively avoiding impurity contamination on the front side of the wafer.

[0068] It should be understood that although Figures 1 - 6 the steps in the flowchart of Figures 1 - 6At least some of the steps may include multiple steps or multiple stages, which do not necessarily need to be executed and completed at the same time, but can be executed at different times, and the execution order of these steps or stages does not necessarily need to be sequential, but can be executed alternately or in turn with at least some of the steps or stages in other steps or other steps.

[0069] To more clearly illustrate the manufacturing method of the semiconductor chip in some of the above embodiments, the following embodiments are to be understood in conjunction with Figures 7 - 13 this.

[0070] In some embodiments, the manufacturing method of the semiconductor chip C includes the following steps S100 to S400.

[0071] In step S100, please refer to Figure 7 , provide a carbon-containing substrate 1; a plurality of semiconductor devices 2 are formed on the front surface of the carbon-containing substrate 1.

[0072] In some examples, the carbon-containing substrate 1 may be a carbon-containing wafer, for example, it may be a silicon carbide (SiC) wafer.

[0073] Exemplarily, the plurality of semiconductor devices 2 are arranged at intervals on the front surface of the carbon-containing substrate 1.

[0074] In some examples, the semiconductor device 2 includes, but is not limited to, a junction barrier Schottky diode (Junction Barrier Schottky, abbreviated as JBS).

[0075] It should be noted that in a junction barrier Schottky diode (JBS) device, there is no gate electrode and metal contact layer. Its front metal layer is directly in contact with the active region (AA) of the carbon-containing substrate 1 (such as a silicon carbide substrate); and, the outer contour shape of the grain boundary of the front metal layer (such as an aluminum layer) in the junction barrier Schottky diode (JBS) device is fuller than that of the front metal layer grain boundary of a metal oxide semiconductor (MOS) device. For the above reasons, impurities (such as carbon powder) are more likely to form residues on the surface of the JBS device and have an adverse effect on the front metal layer. Therefore, the JBS device is more vulnerable to impurity (such as carbon powder) contamination than the MOS device. By adopting the manufacturing method of the semiconductor chip C provided in the embodiments of the present application, the problem of impurity contamination on the surface of the junction barrier Schottky diode (JBS) device can be effectively avoided.

[0076] In step S200, please refer to Figure 8 , form a barrier film 3 on the front surface of the carbon-containing substrate 1; the barrier film 3 covers at least each semiconductor device 2 and the front surface of the carbon-containing substrate 1.

[0077] Exemplarily, the material of the barrier film 3 includes, but is not limited to, polymer films such as polyimide (PI), polyester (PET), or polyolefin (such as LDPE).

[0078] Exemplarily, the thickness of the barrier film 3 ranges from 50 μm to 150 μm. For example, the thickness of the barrier film 3 can be 50 μm, 80 μm, 100 μm, 120 μm, 140 μm, or 150 μm, etc.

[0079] Here, the thickness of the barrier film 3 refers to the dimension of the barrier film 3 in the direction perpendicular to the carbon-containing substrate 1.

[0080] It should be noted that the barrier film 3 covers the top surface of each semiconductor device 2 facing away from the carbon-containing substrate 1 in the direction perpendicular to the surface of the carbon-containing substrate 1 and the opposite side walls in the direction parallel to the surface of the carbon-containing substrate 1.

[0081] Exemplarily, the temperature resistance range of the barrier film 3 includes 100 °C to 150 °C; for example, the temperature resistance value of the barrier film 3 can be 100 °C, 110 °C, 115 °C, 120 °C, 130 °C, 140 °C, or 150 °C, etc.

[0082] It should be noted that the "temperature resistance range of the barrier film 3" means: the temperature range that the barrier film 3 can withstand on the premise that the performance (such as isolation and protection performance) of the barrier film 3 does not degrade.

[0083] In some embodiments, step S200 includes the following steps S210 to S220.

[0084] In step S210, provide the barrier film 3.

[0085] Exemplarily, the thickness range of the barrier film 3 includes 180 μm to 230 μm.

[0086] Exemplarily, the thickness value of the barrier film 3 can be 180 μm, 190 μm, 200 μm, 210 μm, 220 μm, or 230 μm, etc.

[0087] It should be noted that the barrier film 3 provided in step S210 can be a finished film.

[0088] In step S220, please continue to refer to Figure 8 , and adopt a film laminating process to attach the barrier film 3 to the front side of the carbon-containing substrate 1.

[0089] Exemplarily, the barrier film 3 completely covers the front side of the carbon-containing substrate 1 without exceeding the edge of the carbon-containing substrate 1.

[0090] In some embodiments, the barrier film 3 can be attached to the front side of the carbon-containing substrate 1 through a photosensitive adhesive.

[0091] Exemplarily, the adhesives used in the film laminating process include, but are not limited to, ultraviolet (UV) curable adhesives, etc.

[0092] In some embodiments, after step S200 and before step S300, the manufacturing method of the semiconductor chip C further includes the following step S600.

[0093] In step S600, please refer to Figure 9 , a back thinning process is performed on the back side of the carbon-containing substrate 1 to thin the carbon-containing substrate 1 to a target thickness.

[0094] Exemplarily, the back thinning process includes, but is not limited to, a grinding process. The back thinning process can be, for example, a Mechanical Grinding process or a Chemical Mechanical Planarization (CMP) process, etc.

[0095] In some embodiments, the barrier film 3 is reused as a grinding protection film in the back thinning process.

[0096] It should be noted that during the back thinning process, the barrier film 3 can protect the semiconductor device 2 on the front side of the wafer from being damaged by the grinding process, and effectively prevent the wafer surface from cracking and chipping during grinding, ensuring the integrity of the wafer in the back thinning process.

[0097] In step S300, a back metallization process is performed on the back side of the carbon-containing substrate 1 that faces away from the semiconductor device 2; the back metallization process includes at least an annealing process.

[0098] In some embodiments, step S300 includes the following steps:

[0099] In step S310, the back side of the carbon-containing substrate 1 is subjected to a surface pretreatment.

[0100] In some examples, the surface pretreatment process includes a surface cleaning process and a surface activation process, etc.

[0101] Exemplarily, the surface cleaning process can be, for example, an industrial standard wet cleaning (RCA) process, etc.

[0102] Exemplarily, the surface cleaning process can be carried out using a SEZ device.

[0103] In step S320, please refer to Figure 10 , an ohmic metal seed layer 4 is formed on the back side of the carbon-containing substrate 1.

[0104] In some examples, the forming process of the ohmic metal seed layer 4 includes, but is not limited to, a sputtering process and the like.

[0105] It should be noted that in the sputtering process of the ohmic metal seed layer 4, the maximum temperature of the cumulative temperature effect is less than or equal to 100 °C. Since the temperature resistance range of the barrier film 3 used in the embodiments of the present application includes 100 °C to 150 °C, the barrier film 3 will not be affected by temperature during the sputtering process of the ohmic metal seed layer 4, ensuring the protection function of the barrier film 3 for the carbon-containing substrate 1 and the semiconductor device 2.

[0106] In step S330, please refer to Figure 11 , an annealing process is performed on the ohmic metal seed layer 4 to form an ohmic metal layer 5.

[0107] In some embodiments, the annealing process includes, but is not limited to, a laser annealing process and the like.

[0108] In some embodiments, the annealing equipment used in the annealing process includes a nanosecond laser and the like.

[0109] It should be noted that during the annealing process of the nanosecond laser, instantaneous high temperature can be generated and there is no cumulative temperature effect. Therefore, using a nanosecond laser for the laser annealing process can perform the annealing treatment of the ohmic metal seed layer 4 without affecting the performance of the barrier film 3.

[0110] In step S400, please refer to Figure 12 , the barrier film 3 is removed.

[0111] In some embodiments, step S400 includes the following steps S410 to S420.

[0112] In step S410, the barrier film 3 is irradiated with ultraviolet (UV) light.

[0113] It should be noted that during the process of irradiating the barrier film 3 with ultraviolet (UV) light, the irradiation amount of the ultraviolet (UV) light will increase with the irradiation time until it reaches the target threshold. Among them, the irradiation amount refers to the product of the light intensity and the irradiation time.

[0114] Exemplarily, the value range of the target threshold includes 200 J / cm 2 ~500 J / cm 2 .

[0115] Exemplarily, the value of the target threshold can be, for example, 200 J / cm 2 , 250 J / cm 2 , 300 J / cm 2 , 350 J / cm 2, 400 J / cm 2 , 450 J / cm 2 or 500 J / cm 2 etc.

[0116] In step S420, please continue to refer to Figure 12 , and use the film tearing process to remove the barrier film 3.

[0117] Exemplarily, the specific process of using the film tearing process to remove the barrier film 3 can be: transporting the carbon-containing substrate 1 through the transfer arm of the machine tool to place it on the film tearing table, and making the film tearing table vacuum-adsorb the carbon-containing substrate 1; pressing one end of the heat-sealing film against one end of the barrier film 3 by the hot pressing head of the machine tool, and at the same time, the film tearing arm of the machine tool clamps the other end of the barrier film 3, so as to peel off the barrier film 3 on the surface of the carbon-containing substrate 1 through the relative movement of the film tearing table and the film tearing arm.

[0118] In some embodiments, for example, after step S400, the manufacturing method of the semiconductor chip C further includes the following step S500.

[0119] In step S500, please refer to Figure 13 , perform a wafer dicing process on the obtained structure after removing the barrier film 3 to obtain a plurality of independent semiconductor chips C; each semiconductor chip C includes at least one semiconductor device 2.

[0120] Exemplarily, the wafer dicing process includes, but is not limited to, blade dicing process, laser dicing process, or plasma cutting, etc.

[0121] It should be noted that in the dicing process of step S500, the cutting trace needs to penetrate the carbon-containing substrate 1 and the ohmic metal layer 5 to divide the wafer into a plurality of independent semiconductor chips C.

[0122] In the description of this specification, the description referring to terms such as "some embodiments", "some examples", "exemplarily", etc. means that the specific features, structures, materials, or features described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0123] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0124] The above-described embodiments merely represent several implementation manners of the present application. Their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application.

Claims

1. A manufacturing method of a semiconductor chip, characterized in that, Including: Providing a carbon-containing substrate; a plurality of semiconductor devices are formed on the front surface of the carbon-containing substrate; Forming a barrier film on the front surface of the carbon-containing substrate; The barrier film covers at least each of the semiconductor devices and the front surface of the carbon-containing substrate; Performing a backside metallization process on the back surface of the carbon-containing substrate facing away from the semiconductor devices; the backside metallization process includes at least an annealing process; Removing the barrier film.

2. The manufacturing method of the semiconductor chip according to claim 1, characterized in that Further including: Performing a dicing process on the obtained structure after removing the barrier film to obtain a plurality of independent semiconductor chips; Each of the semiconductor chips includes at least one of the semiconductor devices.

3. The manufacturing method of the semiconductor chip according to claim 1, characterized in that, The forming of the barrier film on the front surface of the carbon-containing substrate includes: Providing a barrier film; Adhering the barrier film to the front surface of the carbon-containing substrate by using a film laminating process.

4. The manufacturing method of the semiconductor chip according to claim 3, characterized in that, The barrier film is adhered to the front surface of the carbon-containing substrate through a photosensitive adhesive.

5. The manufacturing method of the semiconductor chip according to claim 1, characterized in that, The performing of the backside metallization process on the back surface of the carbon-containing substrate includes: Performing a surface pretreatment on the back surface of the carbon-containing substrate; Forming an ohmic metal seed layer on the back surface of the carbon-containing substrate; Performing an annealing process on the ohmic metal seed layer to form an ohmic metal layer.

6. The manufacturing method of the semiconductor chip according to claim 1, characterized in that, The removing of the barrier film includes: Irradiating the barrier film with ultraviolet light; Removing the barrier film by using a film peeling process.

7. The manufacturing method of the semiconductor chip according to claim 1, characterized in that, After forming the barrier film on the front surface of the carbon-containing substrate and before performing the backside metallization process on the back surface of the carbon-containing substrate, the manufacturing method of the semiconductor chip further includes: Performing a backside thinning process on the back surface of the carbon-containing substrate to thin the carbon-containing substrate to a target thickness.

8. The manufacturing method of the semiconductor chip according to claim 7, characterized in that, The barrier film is reused as a polishing protection film in the backside thinning process.

9. The manufacturing method of the semiconductor chip according to claim 1, wherein, The annealing process includes a laser annealing process.

10. The manufacturing method of the semiconductor chip according to claim 1, characterized in that, The temperature resistance range of the barrier film includes 100°C to 150°C.

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