Reconfigurable topology circuit with equalization and control method thereof

Abstract

The invention relates to the technical field of active equalization, and discloses a reconfigurable topology circuit with equalization and a control method thereof, the topology circuit is provided with a plurality of equalization units, the equalization units are connected in sequence, each equalization unit comprises a first switch, a second switch, a first diode, a second diode, an inductor, a third diode and a fourth diode, a connection structure of a diode, a switch and an inductor is properly arranged, each equalization unit is used for connecting two single batteries, a controller is connected with control ends of each first switch, each second switch and each third switch, the time sequence of the switches of each equalization unit is regulated and controlled, and active equalization is performed while stepped alternating current wave current is realized. An extra inverter and an active equalization module are not needed, the cost is reduced, normal operation of functions is maintained, the consistency of single batteries is ensured, and the service life of the batteries is prolonged.

Description

Technical Field

[0001] The present invention relates to the technical field of active balancing, and particularly to a reconfigurable topology circuit with balancing and its control method. Background Art

[0002] When the batteries in a power system are connected to the grid, AC-DC conversion needs to be carried out through an inverter. At the same time, after the series-connected power battery packs are subjected to AC-DC conversion through the inverter, active balancing is required to maintain the overall consistency of the batteries. However, the inverter and the active balancing circuit are independent of each other, which increases the cost of the power battery system. There is a lack of a set of circuits that can simultaneously achieve AC output and active balancing, eliminating the inverter for AC output and the active balancing module for balancing, saving the volume and cost of the battery pack and its inverter system. Summary of the Invention

[0003] To overcome the above objectives, the present invention provides a reconfigurable topology circuit with balancing. The topology circuit is provided with a plurality of balancing units, which are connected in sequence. Each balancing unit includes a first switch, a second switch, a first diode, a second diode, an inductor, a third diode, and a fourth diode. By appropriately setting the connection structure of the diodes, switches, and inductors, each balancing unit is used to connect two single cells. The controller is connected to the control terminals of each first switch, second switch, and third switch, and regulates the timing of the switches of each balancing unit to achieve active balancing while outputting an AC stepped wave voltage, without the need for additional inverters and active balancing modules, reducing costs, maintaining the normal operation of the function, ensuring the consistency of single cells, and extending the service life of the battery. At the same time, the present invention provides a control method for controlling the topology circuit. The control method is based on the topology circuit. First, the level to be output is obtained, and the first balancing unit to be started is determined according to the level. It is judged whether the single cells of the first balancing unit need balancing operations. In the case where no balancing operation is required, the first balancing unit is started, and the remaining balancing units are turned off. In the case where a balancing operation is required, the remaining balancing units are started to perform a balancing operation on the first balancing unit. It is possible to start the corresponding number of balancing units according to the level of the AC stepped wave to be output and output to the outside. At this time, the single cells of the corresponding balancing unit need to perform a balancing operation, and the remaining balancing units are started to perform a balancing operation on the first balancing unit, ensuring that active balancing and output of the AC stepped wave voltage are carried out simultaneously.

[0004] To achieve the above objectives, on the one hand, the present invention provides a reconfigurable topology circuit with balancing, and the topology circuit includes a plurality of balancing units, and each balancing unit includes:

[0005] A first switch, one end of which is used to connect to the negative electrode of a single cell to be accessed;

[0006] The second switch, one end of which is used to connect to the positive electrode of another single battery connected, and the other end of the second switch is connected to the other end of the first switch;

[0007] The first diode, the positive electrode of which is connected to one end of the first switch, and the negative electrode of the first diode is connected to the other end of the first switch;

[0008] The second diode, the positive electrode of which is connected to one end of the second switch, and the negative electrode of the second diode is connected to the other end of the second switch;

[0009] The inductor, one end of which is used to connect to the negative electrode of another single battery;

[0010] The third diode, the positive electrode of which is connected to one end of the inductor, and the negative electrode of the third diode is connected to the other end of the inductor;

[0011] The third switch, one end of which is connected to the other end of the inductor;

[0012] The fourth diode, the positive electrode of which is connected to one end of the third switch, and the negative electrode of the fourth diode is connected to the other end of the third switch;

[0013] The equalization units are connected in sequence. Each equalization unit is used to connect two single batteries, and the other end of the third switch of the next equalization unit is connected to one end of the third switch of the previous equalization unit. The positive electrode of one single battery connected by the next equalization unit is connected to one end of the inductor of the previous equalization unit, and the positive electrode of one single battery connected by the first equalization unit is connected to the other end of the corresponding third switch;

[0014] The controller is connected to the control terminals of each switch.

[0015] Preferably, the controller is configured to:

[0016] Obtain the level to be output;

[0017] Determine the first equalization unit to be activated according to the level;

[0018] Judge whether the single batteries of the first equalization unit need equalization operation;

[0019] In the case where no equalization operation is required, activate the first equalization unit to output the corresponding level;

[0020] In the case where equalization operation is required, use the remaining equalization units to perform equalization operation on the first equalization unit.

[0021] Preferably, the controller is configured to determine the first equalization unit to be activated according to the level, including:

[0022] Determine the number of the first equalization units to be activated for the level;

[0023] Activate the corresponding and consecutive first equalization units according to the quantity.

[0024] Preferably, when no equalization operation is required, the controller is used to activate the first equalization unit to output a corresponding level, including:

[0025] Close the first switch of the first equalization unit, open the second switch of the first equalization unit, and open the third switches of all equalization units.

[0026] Preferably, when an equalization operation is required, the controller uses the remaining equalization units to perform an equalization operation on the first equalization unit, including:

[0027] Select the consecutively connected first equalization units to be equalized after outward output;

[0028] Select and activate the second equalization unit as the remaining equalization units to perform an equalization operation on all the first equalization units, and the second equalization unit is located in front of the first equalization unit;

[0029] Control the first switch of the second equalization unit to be open, the second switch of the second equalization unit to be closed, the third switch of the second equalization unit to enter the PWM high-frequency switching state, and determine the current passing through the inductor of the last second equalization unit according to formula (1),

[0030]

[0031] where N is the total number of the first equalization units and the second equalization units, M is the number of the first equalization units, is the current passing through the inductor of the last second equalization unit, u j is the rated voltage of the jth single battery among all the first equalization units and the second equalization units, L N-M is the inductor of the last second equalization unit;

[0032] Obtain the total reduction amount of SOC of all the single batteries of all the second equalization units within one switching period of the PWM high-frequency switch according to formula (2),

[0033]

[0034] where N is the total number of the first equalization units and the second equalization units, M is the number of the first equalization units, SOC down1 is the total reduction amount of SOC of all the single batteries of all the second equalization units within one switching period of the PWM high-frequency switch, u j is the rated voltage of the jth single battery among all the first equalization units and the second equalization units, L N-MThe inductance of the second equalization unit that is the last one, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single cells in the equalization unit, d N-M is the duty cycle of all the third switches of all the second equalization units;

[0035] Control all the first switches of all the first equalization units to close, and all the second and third switches of all the first equalization units to open, and obtain the current passing through the load according to formula (3),

[0036]

[0037] wherein, u p is the rated voltage of the p-th single cell among all the first and second equalization units, R is the resistance of the load, i R(M) is the current passing through the load when all the first equalization units supply power to the load;

[0038] Obtain the total reduction amount of the SOC of all the single cells that supply power to the load by all the first equalization units within one switching cycle of the PWM high-frequency switch according to formula (4),

[0039]

[0040] wherein, M is the number of the first equalization units, i R(M) is the current passing through the load when the first equalization units supply power to the load, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single cells in the equalization unit, SOC down2 is the total reduction amount of the SOC of all the single cells that supply power to the load by all the first equalization units within one switching cycle of the PWM high-frequency switch;

[0041] Obtain the duty cycle of the third switches of all the second equalization units according to the formula group (5),

[0042]

[0043] wherein, SOC down1 is the total reduction amount of the SOC of all the single cells of all the second equalization units within one switching cycle of the PWM high-frequency switch, SOC down2 is the total reduction amount of the SOC of all the single cells that supply power to the load by all the first equalization units within one switching cycle of the PWM high-frequency switch, N is the total number of the first and second equalization units, M is the number of the first equalization units, d N-M is the duty cycle of all the third switches of the second equalization units, i R(M) is the current passing through the load when the first equalization units supply power to the load, L N-MThe inductance of the second equalization unit that is the last one, u j is the rated voltage of the j-th single cell among all the first equalization units and the second equalization units.

[0044] On the other hand, the present invention provides a control method for a reconfigurable topology circuit with equalization, which is used to control the circuit as described in the above claims, and includes:

[0045] Obtain the level to be output;

[0046] Determine the first equalization units to be activated according to the level;

[0047] Judge whether the single cells of the first equalization units need equalization operation;

[0048] When equalization operation is not required, activate the first equalization units to output the corresponding level;

[0049] When equalization operation is required, use the remaining equalization units to perform equalization operation on the first equalization units.

[0050] Preferably, determining the first equalization units to be activated according to the level includes:

[0051] Determine the number of the first equalization units to be activated for the level;

[0052] Activate the corresponding and consecutive first equalization units according to the number.

[0053] Preferably, when equalization operation is not required, activating the first equalization units to output the corresponding level includes:

[0054] Close the first switches of the first equalization units, open the second switches of the first equalization units, and open the third switches of all the equalization units.

[0055] Preferably, when equalization operation is required, using the remaining equalization units to perform equalization operation on the first equalization units includes:

[0056] Select the consecutive first equalization units to be equalized after outward output;

[0057] Select and activate the second equalization units as the remaining equalization units to perform equalization operation on all the first equalization units, and the second equalization units are located in front of the first equalization units;

[0058] Control the first switches of the second equalization units to be open, the second switches of the second equalization units to be closed, the third switches of the second equalization units to enter the PWM high-frequency switching state, and determine the current passing through the inductance of the last second equalization unit according to formula (1),

[0059]

[0060] Wherein, N is the total number of the first equalization units and the second equalization units, M is the number of the first equalization units, is the current through the inductor of the last second equalization unit, u j is the rated voltage of the jth single cell among all the first equalization units and the second equalization units, L N-M is the inductor of the last second equalization unit;

[0061] Obtain the total reduction amount of SOC of all the single cells of all the second equalization units within one switching period of the PWM high-frequency switch according to formula (2),

[0062]

[0063] Wherein, N is the total number of the first equalization units and the second equalization units, M is the number of the first equalization units, SOC down1 is the total reduction amount of SOC of all the single cells of all the second equalization units within one switching period of the PWM high-frequency switch, u j is the rated voltage of the jth single cell among all the first equalization units and the second equalization units, L N-M is the inductor of the last second equalization unit, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single cells in the equalization unit, d N-M is the duty cycle of all the third switches of all the second equalization units;

[0064] Control the first switches of all the first equalization units to close, and the second switches and the third switches of all the first equalization units to open, and obtain the current through the load according to formula (3),

[0065]

[0066] Wherein, u p is the rated voltage of the pth single cell among all the first equalization units and the second equalization units, R is the resistance of the load, i R(M) is the current through the load when all the first equalization units supply power to the load;

[0067] Obtain the total reduction amount of the total SOC of all the single cells that all the first equalization units supply power to the load within one switching period of the PWM high-frequency switch according to formula (4),

[0068]

[0069] Wherein, M is the number of the first equalization units, iR(M) I is the current supplied by the first equalization unit to the load through the load, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single battery in the equalization unit, SOC down2 is the total reduction in SOC of all the single batteries supplied by all the first equalization units to the load within one switching cycle of the PWM high-frequency switch;

[0070] Obtain the duty cycle of the third switch of all the second equalization units according to the formula group (5),

[0071]

[0072] where, SOC down1 is the total reduction in SOC of all the single batteries of all the second equalization units within one switching cycle of the PWM high-frequency switch, SOC down2 is the total reduction in SOC of all the single batteries supplied by all the first equalization units to the load within one switching cycle of the PWM high-frequency switch, N is the total number of the first equalization units and the second equalization units, M is the number of the first equalization units, d N-M is the duty cycle of all the third switches of the second equalization units, i R(M) is the current supplied by the first equalization unit to the load through the load, L N-M is the inductor of the last second equalization unit, u j is the rated voltage of the j-th single battery in all the first equalization units and the second equalization units.

[0073] Through the above technical solution, the topology circuit is provided with multiple balancing units which are connected in sequence. Each balancing unit includes a first switch, a second switch, a first diode, a second diode, an inductor, a third diode, and a fourth diode. By appropriately setting the connection structure of the diodes, switches, and inductors, each balancing unit is used to connect two single cells. The controller is connected to the control terminals of each first switch, second switch, and third switch to regulate the timing of the switches of each balancing unit, so as to achieve active balancing while outputting a stepped alternating current wave, without the need for additional inverters and active balancing modules, reducing costs, maintaining the normal operation of the function, ensuring the consistency of single cells, and extending the service life of the battery. The control method is based on the topology circuit. First, the level to be output is obtained, the first balancing unit to be started is determined according to the level, and it is judged whether the single cells of the first balancing unit need balancing operation. In the case where no balancing operation is required, the first balancing unit is started and the remaining balancing units are turned off. In the case where balancing operation is required, the remaining balancing units are started to perform balancing operation on the first balancing unit. Thus, the corresponding number of balancing units can be started according to the level of the alternating stepped wave to be output and output outward. At this time, the single cells of the corresponding balancing unit need to perform balancing operation, and the remaining balancing units are started to perform balancing operation on the first balancing unit, ensuring that active balancing and output of the alternating stepped wave voltage are carried out simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0074] Figure 1 FIG. is a circuit connection diagram of a reconfigurable topology circuit with balancing according to an embodiment of the present invention;

[0075] Figure 2 FIG. is a connection block diagram of a control method of a reconfigurable topology circuit with balancing according to an embodiment of the present invention.

[0076] DESCRIPTION OF THE REFERENCE NUMERALS

[0077] 1. First switch 2. Second switch

[0078] 3. First diode 4. Second diode

[0079] 5. Inductor 6. Third diode

[0080] 7. Third switch 8. Fourth diode

[0081] 10. Balancing unit DETAILED DESCRIPTION OF THE EMBODIMENTS

[0082] The following will describe in detail the specific embodiments of the embodiments of the present invention with reference to the drawings. It should be understood that the specific embodiments described herein are only for explaining and illustrating the embodiments of the present invention, and are not used to limit the embodiments of the present invention.

[0083] As shown Figure 1 in the circuit connection diagram of a reconfigurable topology circuit with equalization according to an embodiment of the present invention; in Figure 1 , the topology circuit includes a plurality of equalization units 10, and the equalization unit 10 includes a first switch 1, a second switch 2, a first diode 3, a second diode 4, an inductor 5, a third diode 6, and a third switch 7, a fourth diode 8; specifically, one end of the first switch 1 is used to connect to the negative electrode of a single battery connected; one end of the second switch 2 is used to connect to the positive electrode of another single battery connected, and the other end of the second switch 2 is connected to the other end of the first switch 1; the positive electrode of the first diode 3 is connected to one end of the first switch 1, and the negative electrode of the first diode 3 is connected to the other end of the first switch 1; the positive electrode of the second diode 4 is connected to one end of the second switch 2, and the negative electrode of the second diode 4 is connected to the other end of the second switch 2; one end of the inductor 5 is used to connect to the negative electrode of another single battery connected; the positive electrode of the third diode 6 is connected to one end of the inductor 5, the negative electrode of the third diode 6 is connected to the other end of the inductor 5, and one end of the third switch 7 is connected to the other end of the inductor 6; the positive electrode of the fourth diode 8 is connected to one end of the third switch 7; the negative electrode of the fourth diode 8 is connected to the other end of the third switch 7; the equalization units 10 are connected in sequence, each equalization unit 10 is used to connect two single batteries, and the other end of the third switch 7 of the next equalization unit 10 is connected to one end of the third switch 7 of the previous one, the positive electrode of a single battery connected to the next equalization unit 10 is connected to one end of the inductor of the previous equalization unit 10, and the positive electrode of a single battery connected to the first equalization unit 10 is connected to the other end of the corresponding third switch 7; at the same time, a controller is arranged to be connected to the control ends of each first switch 1, second switch 2, and third switch 7.

[0084] Through the above technical solution, the topology circuit is provided with a plurality of equalization units, the equalization units are connected in sequence, the equalization unit includes a first switch, a second switch, a first diode, a second diode, an inductor, a third diode, and a fourth diode, the connection structure of the diode, switch, and inductor is properly set, each equalization unit is used to connect two single batteries, the controller is connected to the control ends of each first switch, second switch, and third switch, and the timing of the switch of each equalization unit is regulated to realize active equalization while outputting a stepped alternating current wave, without an additional inverter and active equalization module, reducing costs, maintaining the normal operation of the function, ensuring the consistency of single batteries, and extending the service life of the battery.

[0085] Considering that the controller regulates the switch to complete the control of the topology circuit and realizes the output of active equalization and alternating current stepped wave voltage, in an embodiment of the present invention, the controller can be used to: obtain the level grade to be output;

[0086] Determine the first equalization unit to be activated according to the level;

[0087] Judge whether the single battery of the first equalization unit needs equalization operation;

[0088] In the case where equalization operation is not required, activate the first equalization unit to output the corresponding level;

[0089] In the case where equalization operation is required, use the remaining equalization units to perform equalization operation on the first equalization unit.

[0090] In order to realize the control of the output AC stepped wave of the topology circuit by the controller and meet the requirement of activating the corresponding first equalization unit for different levels, in an embodiment of the present invention, the controller for determining the first equalization unit to be activated according to the level may include: determining the number of the first equalization units to be activated for the level; activating the corresponding and continuous first equalization units according to the number. In the topology circuit, as long as the corresponding number of continuous first equalization units are activated, the corresponding level output can be realized for the output AC stepped wave voltage.

[0091] Considering the control of the active equalization function, the single battery of the first equalization unit controlled by the controller to be output does not need to perform active equalization. In an embodiment of the present invention, the controller for activating the first equalization unit to output the corresponding level in the case where equalization operation is not required includes: closing the first switch 1 of the first equalization unit, disconnecting the second switch 2 of the first equalization unit, and disconnecting the third switch 7 of all the equalization units. At this time, all the single batteries of all the first equalization units are connected in series to supply power outward. The activated first equalization units do not perform equalization operation simultaneously, and the function of active equalization is controlled.

[0092] In order to realize the simultaneous implementation of active equalization and output of AC stepped wave voltage, for the entire topology circuit, when the first equalization unit activated by the controller outputs outward, the remaining equalization units perform equalization output on the first equalization unit. In an embodiment of the present invention, the controller for using the remaining equalization units to perform equalization operation on the first equalization unit in the case where equalization operation is required includes:

[0093] Select the continuously connected first equalization units to be equalized after outputting outward. Due to the different discharge depths of the first equalization units selected after outputting outward, there is battery inconsistency;

[0094] Select and activate the second equalization unit as the remaining equalization units to perform equalization operation on all the first equalization units, and the second equalization unit is located in front of the first equalization unit; perform equalization operation from the previous second equalization unit to the first equalization unit to ensure that it can continue during the subsequent output of the AC stepped wave voltage;

[0095] Control the first switch 1 of the second equalization unit to open, the second switch 2 of the second equalization unit to close, and the third switch 7 of the second equalization unit to enter the PWM high-frequency switching state. Determine the current passing through the inductor of the last second equalization unit according to formula (1).

[0096]

[0097] where N is the total number of the first equalization unit and the second equalization unit, and M is the number of the first equalization units. is the current passing through the inductor of the last second equalization unit, and u j is the rated voltage of the jth single cell in all the first equalization units and the second equalization units, and L N-M is the inductor of the last second equalization unit; all the single cells of all the second equalization units supply power to the inductor of the last second equalization unit.

[0098] Obtain the total reduction amount of the SOC of all the single cells of all the second equalization units within one switching period of the PWM high-frequency switch according to formula (2).

[0099]

[0100] where N is the total number of the first equalization unit and the second equalization unit, M is the number of the first equalization units, and SOC down1 is the total reduction amount of the SOC of all the single cells of all the second equalization units within one switching period of the PWM high-frequency switch, and u j is the rated voltage of the jth single cell in all the first equalization units and the second equalization units, and L N-M is the inductor of the last second equalization unit, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single cell in the equalization unit, and d N-M is the duty cycle of all the third switches of all the second equalization units.

[0101] Control all the first switches of all the first equalization units to close, and all the second switches and third switches of all the first equalization units to open. Obtain the current passing through the load according to formula (3).

[0102]

[0103] where u p is the rated voltage of the pth single cell in all the first equalization units and the second equalization units, R is the resistance of the load, and i R(M) is the current passing through the load when all the first equalization units supply power to the load.

[0104] Obtain the total reduction in SOC of all the single cells that all the first equalization units supply power to the load within one switching period of the PWM high-frequency switch according to formula (4).

[0105]

[0106] Where M is the number of the first equalization units, and i R(M) is the current passing through the load when the first equalization unit supplies power to the load, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single cells in the equalization unit, and SOC down2 is the total reduction in SOC of all the single cells that all the first equalization units supply power to the load within one switching period of the PWM high-frequency switch;

[0107] Obtain the duty cycle of the third switch of all the second equalization units according to the formula group (5).

[0108]

[0109] Where SOC down1 is the total reduction in SOC of all the single cells of all the second equalization units within one switching period of the PWM high-frequency switch, and SOC down2 is the total reduction in SOC of all the single cells that all the first equalization units supply power to the load within one switching period of the PWM high-frequency switch. N is the total number of the first equalization units and the second equalization units, M is the number of the first equalization units, d N-M is the duty cycle of all the third switches of the second equalization units, i R(M) is the current passing through the load when the first equalization unit supplies power to the load, L N-M is the inductor of the last second equalization unit, and u j is the rated voltage of the jth single cell in all the first equalization units and the second equalization units; According to the law of conservation of energy, it is determined that the total reduction in SOC of all the first equalization units and the second equalization units within one switch is the same, so as to determine the duty cycle of the third switch of all the second units. According to different output module selections, PWM equalization with different duty cycles is performed, and it is not necessary to detect the voltage of the single cells in the equalization unit, thus ensuring the active equalization.

[0110] As Figure 2 shown is the connection block diagram of the control method of the reconfigurable topology circuit with equalization according to an embodiment of the present invention; In Figure 2 this, the second aspect of the present invention provides a control method of a reconfigurable topology circuit with equalization, and the control method includes:

[0111] In step S10, obtain the level to be output.

[0112] In step S11, determine the first balancing unit to be activated according to the level.

[0113] In step S12, determine whether the single battery cell of the first balancing unit requires a balancing operation.

[0114] In step S13, when no balancing operation is required, activate the first balancing unit to output the corresponding level.

[0115] In step S14, when a balancing operation is required, use the remaining balancing units to perform a balancing operation on the first balancing unit.

[0116] In Figure 2 In the method shown, step S10 is used to obtain the level to be output and determine the output level.

[0117] Step S11 is used to determine the first balancing unit to be activated according to the level, select the corresponding balancing unit, which is convenient for subsequent output of an alternating current stepped wave voltage, without the need for an inverter, reducing costs.

[0118] Step S12 is used to determine whether the single battery cell of the first balancing unit requires a balancing operation, which is convenient for subsequent balancing operations.

[0119] In step S13, when the single battery cell of the first balancing unit does not require a balancing operation, activate the first balancing unit and turn off the remaining balancing units. The activated first balancing unit only outputs an alternating current stepped wave voltage outward.

[0120] In step S14, when the single battery cell of the first balancing unit requires a balancing operation, the activated first balancing unit outputs an alternating current stepped wave voltage outward, and the remaining balancing units perform a balancing operation on the first balancing unit. Therefore, the active balancing and the output of the alternating current stepped wave voltage in the topology circuit can be carried out simultaneously.

[0121] Through the above technical solution, the control method is based on a topology circuit, enabling the activation of the corresponding number of balancing units according to the level of the alternating current stepped wave to be output, and outputting outward. At this time, the single battery cell of the corresponding first balancing unit requires a balancing operation, and the remaining balancing units are activated to perform a balancing operation on the first balancing unit that needs to be balanced, ensuring the simultaneous implementation of active balancing and the output of the alternating current stepped wave voltage.

[0122] In Figure 1Among them, different voltage levels need to activate corresponding first balancing units. In an embodiment of the present invention, determining the first balancing units to be activated according to the voltage level may include: determining the number of first balancing units to be activated at the voltage level; activating corresponding and consecutive first balancing units according to the number. In the topology circuit, as long as the corresponding number of consecutive first balancing units are activated to output an AC stepped wave voltage, the corresponding voltage level output can be achieved.

[0123] Considering the control of the active balancing function, the single cells of the first balancing units that are activated to output externally do not require active balancing during output. In an embodiment of the present invention, in the case where no balancing operation is required, activating the first balancing units to output the corresponding voltage level includes: closing the first switches of the first balancing units, opening the second switches of the first balancing units, and opening the third switches of all the balancing units. At this time, all the single cells of all the first balancing units are connected in series to supply power externally. The activated first balancing units do not perform balancing operations simultaneously to control the active balancing function.

[0124] To achieve the simultaneous implementation of active balancing and outputting an AC stepped wave voltage, for the entire topology circuit, when the activated first balancing units output externally, the remaining balancing units perform balancing output on the first balancing units. In an embodiment of the present invention, in the case where a balancing operation is required, using the remaining balancing units to perform balancing operations on the first balancing units includes:

[0125] Selecting consecutive first balancing units to be balanced after outputting externally. Due to the different discharge depths of the selected first balancing units after outputting, there is inconsistency in the batteries;

[0126] Selecting and activating second balancing units as the remaining balancing units to perform balancing operations on all the first balancing units, and the second balancing units are located in front of the first balancing units. The second balancing units in front perform balancing operations on the first balancing units to ensure that subsequent AC stepped wave voltage output can continue;

[0127] Controlling the first switches of the second balancing units to be opened, the second switches of the second balancing units to be closed, and the third switches of the second balancing units to enter the PWM high-frequency switching state. Determine the current passing through the inductor of the last second balancing unit according to formula (1),

[0128]

[0129] where N is the total number of the first balancing units and the second balancing units, and M is the number of the first balancing units, is the current passing through the inductor of the last second balancing unit, u jis the rated voltage of the j-th single battery in all the first equalization units and the second equalization units, L N-M is the inductance of the last second equalization unit; all the single batteries of all the second equalization units supply power to the inductance of the last second equalization unit;

[0130] Obtain the total reduction of SOC of all the single batteries of all the second equalization units within one switching period of the PWM high-frequency switch according to formula (2),

[0131]

[0132] where N is the total number of the first equalization units and the second equalization units, M is the number of the first equalization units, SOC down1 is the total reduction of SOC of all the single batteries of all the second equalization units within one switching period of the PWM high-frequency switch, u j is the rated voltage of the j-th single battery in all the first equalization units and the second equalization units, L N-M is the inductance of the last second equalization unit, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single battery in the equalization unit, d N-M is the duty cycle of all the third switches of all the second equalization units;

[0133] Control all the first switches of all the first equalization units to close, and all the second switches and third switches of all the first equalization units to open, and obtain the current passing through the load according to formula (3),

[0134]

[0135] where u p is the rated voltage of the p-th single battery in all the first equalization units and the second equalization units, R is the resistance of the load, i R(M) is the current passing through the load when all the first equalization units supply power to the load;

[0136] Obtain the total reduction of the total SOC of all the single batteries that supply power to the load by all the first equalization units within one switching period of the PWM high-frequency switch according to formula (4),

[0137]

[0138] where M is the number of the first equalization units, i R(M) is the current passing through the load when the first equalization unit supplies power to the load, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single battery in the equalization unit, SOC down2The reduction in the total state of charge (SOC) of all the single cells powering the load for all the first equalization units within one switching cycle of the PWM high-frequency switch;

[0139] Obtain the duty cycle of the third switch of all the second equalization units according to the formula group (5),

[0140]

[0141] where SOC down1 is the total reduction in the SOC of all the single cells of all the second equalization units within one switching cycle of the PWM high-frequency switch, and SOC down2 is the total reduction in the SOC of all the single cells powering the load for all the first equalization units within one switching cycle of the PWM high-frequency switch. N is the total number of the first and second equalization units, M is the number of the first equalization units, d N-M is the duty cycle of all the third switches of the second equalization units, i R(M) is the current passing through the load when the first equalization unit powers the load, L N-M is the inductance of the last second equalization unit, and u j is the rated voltage of the j-th single cell among all the first and second equalization units. According to the law of conservation of energy, it is determined that the total reduction in the SOC of all the first and second equalization units within one switch is the same, thereby determining the duty cycle of the third switch of all the second units. Different PWM equalizations with different duty cycles are selected according to different output modules, without the need to detect the voltage of the single cells within the equalization unit, thus ensuring the implementation of active equalization.

[0142] Through the above technical solution, multiple balancing units are provided in the topology circuit. The balancing units are connected in sequence. Each balancing unit includes a first switch, a second switch, a first diode, a second diode, an inductor, a third diode, and a fourth diode. By appropriately setting the connection structure of the diodes, switches, and inductors, each balancing unit is used to connect two single cells. The controller is connected to the control terminals of each first switch, second switch, and third switch to regulate the timing of the switches of each balancing unit, so as to achieve active balancing while outputting a stepped alternating current wave, without the need for additional inverters and active balancing modules, reducing costs, maintaining the normal operation of functions, ensuring the consistency of single cells, and extending the service life of the battery. The control method is based on the topology circuit. First, the level to be output is obtained, and the first balancing unit to be started is determined according to the level. It is judged whether the single cell of the first balancing unit needs balancing operation. In the case where no balancing operation is required, the first balancing unit is started, and the remaining balancing units are turned off. In the case where balancing operation is required, the remaining balancing units are started to perform balancing operation on the first balancing unit. Thus, the corresponding number of balancing units can be started according to the level of the alternating stepped wave to be output and output outward. At this time, the single cells of the corresponding balancing units need to perform balancing operation, and the remaining balancing units are started to perform balancing operation on the first balancing unit, ensuring that active balancing and output of the alternating stepped wave voltage are carried out simultaneously.

[0143] It should also be noted that the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, commodity or device. Without further limitation, the element defined by the statement "including one..." does not exclude the existence of another identical element in the process, method, commodity or device including the element.

[0144] The above are only the embodiments of the present application and are not used to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

Claims

1. A reconfigurable topology circuit with equalization, characterized in that, The topological circuit includes a plurality of balancing units, and each balancing unit includes: A first switch, one end of which is used to connect to the negative electrode of a single battery connected; A second switch, one end of which is used to connect to the positive electrode of another single battery, and the other end of the second switch is connected to the other end of the first switch; A first diode, the positive electrode of which is connected to one end of the first switch, and the negative electrode of the first diode is connected to the other end of the first switch; A second diode, the positive electrode of which is connected to one end of the second switch, and the negative electrode of the second diode is connected to the other end of the second switch; An inductor, one end of which is used to connect to the negative electrode of another single battery; A third diode, the positive electrode of which is connected to one end of the inductor, and the negative electrode of the third diode is connected to the other end of the inductor; A third switch, one end of which is connected to the other end of the inductor; A fourth diode, the positive electrode of which is connected to one end of the third switch, and the negative electrode of the fourth diode is connected to the other end of the third switch; The balancing units are connected in sequence. Each balancing unit is used to connect two single batteries, and the other end of the third switch of the next balancing unit is connected to one end of the third switch of the previous one. The positive electrode of a single battery connected to the next balancing unit is connected to one end of the inductor of the previous balancing unit, and the positive electrode of a single battery connected to the first balancing unit is connected to the other end of the corresponding third switch; A controller, which is connected to the control terminals of each switch.

2. The topological circuit according to claim 1, wherein, The controller is used for: Obtaining the level to be output; Determining the first balancing unit to be started according to the level; Judging whether the single batteries of the first balancing unit need balancing operation; When no balancing operation is required, starting the first balancing unit to output the corresponding level; When balancing operation is required, using the remaining balancing units to perform balancing operation on the first balancing unit.

3. The topological circuit according to claim 2, wherein The controller is used for determining the first balancing unit to be started according to the level, including: Determining the number of the first balancing units to be started at the level; Starting the corresponding and continuous first balancing units according to the number.

4. The topological circuit according to claim 2, characterized in that, The controller is used for starting the first balancing unit to output the corresponding level when no balancing operation is required, including: Closing the first switch of the first balancing unit, opening the second switch of the first balancing unit, and opening the third switches of all the balancing units.

5. The topological circuit according to claim 2, wherein The controller is used for using the remaining balancing units to perform balancing operation on the first balancing unit when balancing operation is required, including: Selecting the first balancing units that are continuously connected and to be balanced after outputting outward; Selecting and starting the second balancing units as the remaining balancing units to perform balancing operation on all the first balancing units, and the second balancing units are located in front of the first balancing units; Controlling the first switch of the second balancing unit to be opened, the second switch of the second balancing unit to be closed, the third switch of the second balancing unit to enter the PWM high-frequency switching state, and determining the current passing through the inductor of the last second balancing unit according to formula (1); Where N is the total number of the first balancing unit and the second balancing unit, and M is the number of the first balancing units. is the current flowing through the inductor of the last second balancing unit, u j is the rated voltage of the j-th single cell among all the first balancing units and the second balancing units, L N-M is the inductor of the last second balancing unit; Obtaining the total reduction amount of the SOC of all single batteries of all the second balancing units within one switching period of the PWM high-frequency switch according to formula (2). Where N is the total number of the first balancing unit and the second balancing unit, M is the number of the first balancing units, SOC down1 is the total reduction amount of the SOC of all the single cells of all the second balancing units within one switching cycle of the PWM high-frequency switch, u j is the rated voltage of the j-th single cell among all the first balancing units and the second balancing units, L N-M is the inductance of the last second balancing unit, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single cells in the balancing unit, d N-M is the duty ratio of all the third switches of all the second balancing units; Close the first switches of all the first balancing units, open the second and third switches of all the first balancing units, and obtain the current passing through the load according to formula (3). where, u p is the rated voltage of the p-th single battery among all the first balancing units and the second balancing units, R is the resistance of the load, and i R(M) is the current passing through the load when all the first balancing units supply power to the load; Obtain the total reduction of the state of charge (SOC) of all the single cells of all the first balancing units supplying power to the load within one switching cycle of the PWM high-frequency switch according to formula (4). Where M is the number of the first equalization units, and i R(M) is the current passing through the load when the first equalization unit supplies power to the load, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single battery in the equalization unit, and SOC down2 is the total reduction in the SOC of all the single batteries that supply power to the load by all the first equalization units within one switching cycle of the PWM high-frequency switch; Obtain the duty cycle of the third switches of all the second balancing units according to the formula group (5). Among them, SOC down1 is the total reduction of SOC of all single cells of all second balancing units within one switching period of the PWM high-frequency switch. SOC down2 is the total reduction of SOC of all single cells that all first balancing units supply power to the load within one switching period of the PWM high-frequency switch. N is the total number of the first balancing units and the second balancing units, M is the number of the first balancing units, d N-M is the duty cycle of all the third switches of the second balancing units, i R(M) is the current passing through the load when the first balancing unit supplies power to the load, L N-M is the inductance of the last second balancing unit, u j is the rated voltage of the j-th single cell among all the first balancing units and the second balancing units.

6. A control method for a reconfigurable topology circuit with equalization, used to control the circuit as described in claim 1, characterized in that, Include: Obtain the level to be output. Determine the first balancing units to be activated according to the level. Judge whether the single cells of the first balancing units need balancing operation. In the case where no balancing operation is required, activate the first balancing units to output the corresponding level. In the case where balancing operation is required, use the remaining balancing units to perform balancing operation on the first balancing units.

7. The control method according to claim 6, characterized in that, Determine the first balancing units to be activated according to the level, including: Determine the number of the first balancing units to be activated at the level. Activate the corresponding and consecutive first balancing units according to the number.

8. The control method according to claim 6, wherein In the case where no balancing operation is required, activate the first balancing units to output the corresponding level, including: Close the first switches of the first balancing units, open the second switches of the first balancing units, and open the third switches of all the balancing units.

9. The control method according to claim 6, wherein In the case where balancing operation is required, use the remaining balancing units to perform balancing operation on the first balancing units, including: Select the continuously connected first balancing units to be balanced after outputting outward. Select and activate the second balancing units as the remaining balancing units to perform balancing operation on all the first balancing units, and the second balancing units are located in front of the first balancing units. Control the first switch of the second balancing unit to be open, the second switch of the second balancing unit to be closed, and the third switch of the second balancing unit to enter the PWM high-frequency switching state, and determine the current passing through the inductor of the last second balancing unit according to formula (1). where N is the total number of the first equalization unit and the second equalization unit, and M is the number of the first equalization units, is the current through the inductor of the last second equalization unit, u j is the rated voltage of the j-th single cell among all the first equalization units and the second equalization units, L N-M is the inductor of the last second equalization unit; Obtain the total reduction of the SOC of all the single cells of all the second balancing units within one switching cycle of the PWM high-frequency switch according to formula (2). Wherein, N is the total number of the first equalization units and the second equalization units, M is the number of the first equalization units, SOC down1 is the total reduction amount of the SOC of all the single cells of all the second equalization units within one switching cycle of the PWM high-frequency switch, u j is the rated voltage of the j-th single cell among all the first equalization units and the second equalization units, L N-M is the inductance of the last second equalization unit, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single cells in the equalization unit, d N-M is the duty cycle of all the third switches of all the second equalization units; Close the first switches of all the first balancing units, open the second and third switches of all the first balancing units, and obtain the current passing through the load according to formula (3). Among them, u p is the rated voltage of the p-th single battery among all the first balancing units and the second balancing units, E is the resistance of the load, and i R(M) is the current passing through the load when all the first balancing units supply power to the load; Obtain the total reduction of the state of charge (SOC) of all the single cells of all the first balancing units supplying power to the load within one switching cycle of the PWM high-frequency switch according to formula (4). Where M is the number of the first balancing units, and i R(M) is the current passing through the load when the first balancing unit supplies power to the load, f is the frequency of the PWM high-frequency switch, Q is the battery capacity of the single battery in the balancing unit, and SOC down2 is the total reduction in the SOC of all the single batteries when all the first balancing units supply power to the load within one switching cycle of the PWM high-frequency switch; Obtain the duty cycle of the third switches of all the second balancing units according to the formula group (5). Among them, SOC down1 is the total reduction of SOC of all single cells of all second balancing units within one switching cycle of the PWM high-frequency switch. SOC down2 is the total reduction of SOC of all single cells that all first balancing units supply power to the load within one switching cycle of the PWM high-frequency switch. N is the total number of the first balancing units and the second balancing units, M is the number of the first balancing units, d N-M is the duty cycle of all the third switches of the second balancing units, i R(M) is the current passing through the load when the first balancing unit supplies power to the load, L N-M is the inductor of the last second balancing unit, u j is the rated voltage of the jth single cell among all the first balancing units and the second balancing units.

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