Data processing method and device, electronic equipment and storage medium

Abstract

The invention discloses a data processing method and device, electronic equipment and a storage medium, which are used for solving the problem of data read-write task processing delay caused by overhigh CPU load in multi-CPU equipment. The method comprises the steps that a first CPU obtains a first data read-write task; when the load of the first CPU is greater than or equal to a first load threshold value, determining a second CPU of which the load is less than a second load threshold value from at least one other CPU; storing the first data read-write task in an asynchronous distribution management structure body of the second CPU, wherein the asynchronous distribution management structure body is used for storing data read-write tasks of other CPUs except the own CPU; and waking up an asynchronous distribution thread of the second CPU to enable the second CPU to process the first data read-write task.

Description

Technical Field

[0001] This application relates to the field of computer technologies, and in particular, to a data processing method, apparatus, electronic device, and storage medium. Background Art

[0002] A block device is a common type of hardware device in an operating system. It is a type of I / O (Input / Output) device and is used to store data and can perform read and write operations at a relatively high speed. Common block devices include hard disks, solid-state drives, CD-ROMs (compact disc read-only memories), etc., which can be recognized by the operating system as block devices and accept read and write operations of block devices.

[0003] In an operating system, a block device is generally used in combination with a file system. When the file system needs to store or read data, it needs to generate a data read / write task, and the CPU (Central Processing Unit) passes the data read / write task to the underlying block device. On a device with multiple CPUs, the data read / write task is one of various types of tasks processed by the CPU. When there are too many tasks on a certain CPU of the device, such as a large number of processes and interrupts, it will cause an increase in the scheduling delay on that CPU, and further cause a delay in processing the data read / write task on that CPU, affecting the processing performance of the data read / write task. If the device uses a core-binding technology, that is, specific processes or threads are bound to run on a specified CPU core, due to the high load of this CPU, other CPUs that need to communicate with this CPU will wait with a delay, thereby causing a decline in the overall performance of the device.

[0004] Therefore, how to avoid the delay in processing data read / write tasks is one of the technical problems that the existing technology urgently needs to solve. Summary of the Invention

[0005] Embodiments of this application provide a data processing method, apparatus, electronic device, and storage medium, which solve the problem of delay in processing data read / write tasks caused by high CPU load in a multi-CPU device.

[0006] In a first aspect, embodiments of this application provide a data processing method implemented on the first CPU side, including:

[0007] The first CPU obtains a first data read / write task;

[0008] When the load of the first CPU is greater than or equal to a first load threshold, determine a second CPU with a load less than a second load threshold from at least one other CPU;

[0009] Store the first data reading and writing task in the asynchronous dispatching management structure of the second CPU, where the asynchronous dispatching management structure is used to store the data reading and writing tasks of the first CPU;

[0010] Wake up the asynchronous dispatching thread of the second CPU so that the second CPU processes the first data reading and writing task.

[0011] In the data processing method provided by the embodiments of the present application, in an electronic device with multiple CPUs, when the first CPU obtains a first data reading and writing task, first determine whether the load of the first CPU is greater than or equal to a first load threshold. If so, determine a second CPU with a load less than a second load threshold from other CPUs, store the first data reading and writing task in the asynchronous dispatching management structure of the second CPU, and wake up the asynchronous dispatching thread of the second CPU so that the second CPU processes the first data reading and writing task based on the asynchronous dispatching thread. Since in the second CPU, an asynchronous dispatching management structure for storing the data reading and writing tasks of other CPUs except the second CPU in the electronic device is established in advance to uniformly manage the data reading and writing tasks migrated from other CPUs to the second CPU, and an asynchronous dispatching thread for processing the data reading and writing tasks migrated from other CPUs to the second CPU is established in advance for the second CPU, the asynchronous distribution of the data reading and writing tasks migrated from other CPUs to the second CPU by the second CPU based on the asynchronous dispatching thread is realized. Thus, the data reading and writing tasks on the high-load CPU are migrated to the low-load CPU for execution, reducing the task volume on the high-load CPU and reducing the latency of processing the data reading and writing tasks. At the same time, since the tasks of the high-load CPU are shared, the high-load CPU can quickly restore its load level. Furthermore, the performance loss of the electronic device caused by the high load of one or some CPUs is alleviated, and the overall performance of the electronic device is improved.

[0012] In a possible implementation manner, obtaining the first data reading and writing task specifically includes:

[0013] Obtain an IO request generated by a target application, and generate a corresponding block device IO operation structure bio based on the IO request;

[0014] Storing the first data reading and writing task in the asynchronous dispatching management structure of the second CPU specifically includes:

[0015] Mount the bio to the asynchronous dispatching management structure.

[0016] In this implementation, the first CPU obtains the IO requests generated by the target application. After converting the IO requests into corresponding bios (block device IO operation structures), the first CPU mounts the bio to the asynchronous dispatch management structure of the second CPU for storage. Thus, the storage of the bio corresponding to the IO requests migrated by the first CPU is achieved through the asynchronous dispatch management structure of the second CPU.

[0017] In a possible implementation, the asynchronous dispatch management structure contains linked lists corresponding to multiple CPUs other than its own CPU.

[0018] Mounting the bio to the asynchronous dispatch management structure specifically includes:

[0019] Mounting the bio to the linked list corresponding to the first CPU in the asynchronous dispatch management structure.

[0020] In this implementation, the asynchronous dispatch management structure corresponding to the second CPU contains linked lists corresponding to multiple CPUs other than the second CPU itself. The first CPU can mount the bio corresponding to the IO request to the linked list corresponding to the first CPU in the asynchronous dispatch management structure. Thus, the storage of the bio corresponding to the IO requests migrated by the first CPU is achieved through the linked list corresponding to the first CPU set in the asynchronous dispatch management structure of the second CPU.

[0021] In a possible implementation, the asynchronous dispatch management structure contains an array of storage structure pointers, and the array of storage structure pointers is used to store the linked lists corresponding to multiple CPUs other than its own CPU.

[0022] In this implementation, the asynchronous dispatch management structure corresponding to the second CPU can specifically store the linked lists corresponding to multiple CPUs other than the second CPU itself through the set array of storage structure pointers.

[0023] In a possible implementation, the asynchronous dispatch management structure and the array of storage structure pointers are created when starting the target block device, and the target block device is the block device corresponding to the first data read / write task.

[0024] In a possible implementation, the second data read / write task issued by the first application running on the second CPU is processed by the second CPU calling the first process; the asynchronous dispatch thread is different from the first process.

[0025] In this implementation manner, the second data read / write task sent by the first application running on the second CPU is processed by the second CPU by invoking the first process. The asynchronous dispatching thread and the first process are two different and independent processes, so that the second CPU realizes parallel processing of its own data read / write tasks and the data read / write tasks migrated from the first CPU to the second CPU, improving the overall performance of the electronic device.

[0026] In a second aspect, an embodiment of the present application provides a data processing device implemented on the first CPU side, including:

[0027] An acquisition module, configured to acquire a first data read / write task by the first CPU;

[0028] A determination module, configured to determine a second CPU with a load less than a second load threshold from at least one other CPU when the load of the first CPU is greater than or equal to a first load threshold;

[0029] A sending module, configured to store the first data read / write task in an asynchronous dispatching management structure of the second CPU, where the asynchronous dispatching management structure is used to store the data read / write tasks of the first CPU;

[0030] A wake-up module, configured to wake up the asynchronous dispatching thread of the second CPU so that the second CPU processes the first data read / write task.

[0031] In a possible implementation manner, the acquisition module is specifically configured to acquire an IO request generated by a target application and generate a corresponding block device IO operation structure bio based on the IO request;

[0032] The sending module is specifically configured to mount the bio to the asynchronous dispatching management structure.

[0033] In a possible implementation manner, the asynchronous dispatching management structure includes linked lists corresponding to multiple other CPUs except its own CPU;

[0034] The sending module is specifically configured to mount the bio to the linked list corresponding to the first CPU in the asynchronous dispatching management structure.

[0035] In a possible implementation manner, the asynchronous dispatching management structure includes a storage structure pointer array, and the storage structure pointer array is used to store the linked lists corresponding to multiple other CPUs except its own CPU.

[0036] In a possible implementation manner, the asynchronous dispatching management structure and the storage structure pointer array are created when starting a target block device, and the target block device is the block device corresponding to the first data read / write task.

[0037] In a possible implementation, a second data read / write task sent by a first application running on the second CPU is processed by the second CPU by invoking a first process; the asynchronous dispatching thread is different from the first process.

[0038] In a third aspect, an embodiment of the present application provides a data processing method implemented on the second CPU side, including:

[0039] The second CPU receives a first data read / write task sent by the first CPU, and the first CPU stores the first data read / write task in an asynchronous dispatching management structure of the second CPU, and the asynchronous dispatching management structure is used to store data read / write tasks of the first CPU;

[0040] If it is determined that the asynchronous dispatching thread is awakened, the first data read / write task is processed based on the asynchronous dispatching thread.

[0041] In a possible implementation, processing the first data read / write task based on the asynchronous dispatching thread specifically includes:

[0042] The asynchronous dispatching thread is invoked to read the first data read / write task from the asynchronous dispatching management structure, and the first data read / write task is sent to a target block device.

[0043] In a possible implementation, the second CPU receiving the first data read / write task sent by the first CPU specifically includes:

[0044] The second CPU receives a block device I / O operation structure bio corresponding to an I / O request sent by the first CPU; the bio is mounted by the first CPU to the asynchronous dispatching management structure.

[0045] In a possible implementation, the asynchronous dispatching management structure includes linked lists corresponding to multiple other CPUs except its own CPU; the bio is mounted by the first CPU to the linked list corresponding to the first CPU in the asynchronous dispatching management structure.

[0046] In a possible implementation, the asynchronous dispatching management structure includes a storage structure pointer array, and the storage structure pointer array is used to store linked lists corresponding to multiple other CPUs except its own CPU.

[0047] In a possible implementation, invoking the asynchronous dispatching thread to read the first data read / write task from the asynchronous dispatching management structure and sending the first data read / write task to a target block device specifically includes:

[0048] Call the created asynchronous dispatching thread to execute the following steps:

[0049] Obtain the linked list corresponding to the first CPU from the asynchronous dispatching management structure;

[0050] Convert the bio included in the linked list corresponding to the first CPU into a request request;

[0051] Send the request request to the software cache queue corresponding to the second CPU;

[0052] Obtain the request request from the software cache queue and send the request request to the hardware dispatching queue corresponding to the software cache queue;

[0053] Obtain the request request from the hardware dispatching queue and send the request request to the target block device; wherein, the asynchronous dispatching thread is used to process the data read / write tasks migrated from other CPUs except itself to the second CPU, and the second data read / write tasks issued by the first application running on the second CPU are processed by the second CPU calling the first process; the asynchronous dispatching thread is different from the first process.

[0054] In this implementation manner, an asynchronous dispatching thread for processing the data read / write tasks migrated from other CPUs to the second CPU is established in advance for the second CPU. When the asynchronous dispatching thread is awakened, the second CPU can call the asynchronous dispatching thread to send the first data read / write tasks migrated from the first CPU to the target block device: obtain the linked list corresponding to the first CPU from the asynchronous dispatching management structure, convert the bio included in the linked list corresponding to the first CPU into a request request, send the request request to the software cache queue corresponding to the second CPU for temporary storage, and then, read the request request from the software temporary storage queue, send the request request to the hardware dispatching queue corresponding to the software cache queue, and then, obtain the request request from the hardware dispatching queue and send the request request to the target block device. The second data read / write tasks issued by the first application running on the second CPU are processed by the second CPU calling the first process. The asynchronous dispatching thread and the first process are two different and independent processes. Thus, the second CPU realizes parallel processing of its own data read / write tasks and the data read / write tasks migrated from other CPUs to the second CPU, improving the overall performance of the electronic device.

[0055] In a possible implementation manner, the asynchronous dispatching management structure, the storage structure pointer array, and the program corresponding to the asynchronous dispatching thread are created when the target block device is started.

[0056] In a fourth aspect, an embodiment of the present application provides a data processing device implemented on the second CPU side, including:

[0057] a receiving module, configured to receive a first data read / write task sent by the first CPU, where the first data read / write task is stored by the first CPU in an asynchronous dispatch management structure of the second CPU, and the asynchronous dispatch management structure is used to store the data read / write tasks of the first CPU;

[0058] a processing module, configured to, if it is determined that the asynchronous dispatch thread is awakened, process the first data read / write task based on the asynchronous dispatch thread.

[0059] In a possible implementation manner, the processing module is specifically configured to call the asynchronous dispatch thread to read the first data read / write task from the asynchronous dispatch management structure and send the first data read / write task to a target block device.

[0060] In a possible implementation manner, the receiving module is specifically configured to receive a block device I / O operation structure bio corresponding to an I / O request sent by the first CPU; the bio is mounted by the first CPU to the asynchronous dispatch management structure.

[0061] In a possible implementation manner, the asynchronous dispatch management structure includes linked lists corresponding to multiple other CPUs except its own CPU; the bio is mounted by the first CPU to the linked list corresponding to the first CPU in the asynchronous dispatch management structure.

[0062] In a possible implementation manner, the asynchronous dispatch management structure includes a storage structure pointer array, and the storage structure pointer array is used to store linked lists corresponding to multiple other CPUs except its own CPU.

[0063] In a possible implementation, the processing module is specifically configured to call the created asynchronous dispatching thread to perform the following steps: obtain the linked list corresponding to the first CPU from the asynchronous dispatching management structure; convert the bio included in the linked list corresponding to the first CPU into a request request; send the request request to the software cache queue corresponding to the second CPU; obtain the request request from the software cache queue, and send the request request to the hardware dispatching queue corresponding to the software cache queue; obtain the request request from the hardware dispatching queue, and send the request request to the target block device; wherein, the asynchronous dispatching thread is used to process data read and write tasks migrated from other CPUs except itself to the second CPU, and the second data read and write tasks issued by the first application running on the second CPU are processed by the second CPU calling the first process; the asynchronous dispatching thread is different from the first process.

[0064] In a possible implementation, the asynchronous dispatching management structure, the storage structure pointer array, and the program corresponding to the asynchronous dispatching thread are created when the target block device is started.

[0065] In a fifth aspect, an embodiment of the present application provides an electronic device, including:

[0066] A first CPU, configured to obtain a first data read and write task; when the load of the first CPU is greater than or equal to a first load threshold, determine a second CPU with a load less than a second load threshold from at least one other CPU; store the first data read and write task in the asynchronous dispatching management structure of the second CPU, where the asynchronous dispatching management structure is used to store the data read and write tasks of the first CPU; wake up the asynchronous dispatching thread of the second CPU;

[0067] A second CPU, configured to receive the first data read and write task sent by the first CPU, and process the first data read and write task based on the asynchronous dispatching thread.

[0068] In a possible implementation, the first CPU is specifically configured to obtain an IO request generated by a target application, and generate a corresponding block device IO operation structure bio based on the IO request; mount the bio to the asynchronous dispatching management structure;

[0069] The second CPU is specifically configured to call the asynchronous dispatching thread to read the first data read and write task from the asynchronous dispatching management structure, and send the first data read and write task to the target block device.

[0070] In a possible implementation, the first CPU is specifically configured to mount the bio to the linked list corresponding to the first CPU in the asynchronous dispatch management structure; the asynchronous dispatch management structure includes linked lists corresponding to multiple other CPUs except its own CPU.

[0071] In a possible implementation, the asynchronous dispatch management structure includes an array of storage structure pointers, and the array of storage structure pointers is used to store the linked lists corresponding to multiple other CPUs except its own CPU.

[0072] In a possible implementation, the second CPU is specifically configured to call the created asynchronous dispatch thread to perform the following steps:

[0073] Obtain the linked list corresponding to the first CPU from the asynchronous dispatch management structure;

[0074] Convert the bio included in the linked list corresponding to the first CPU into a request request;

[0075] Send the request request to the software cache queue corresponding to the second CPU;

[0076] Obtain the request request from the software cache queue, and send the request request to the hardware dispatch queue corresponding to the software cache queue;

[0077] Obtain the request request from the hardware dispatch queue, and send the request request to the target block device; wherein, the asynchronous dispatch thread is used to process data read and write tasks migrated from other CPUs except itself to the second CPU, and the second data read and write tasks issued by the first application running on the second CPU are processed by the second CPU calling the first process; the asynchronous dispatch thread is different from the first process.

[0078] In a possible implementation, the asynchronous dispatch management structure, the array of storage structure pointers, and the program corresponding to the asynchronous dispatch thread are created when the target block device is started.

[0079] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the steps in the data processing method described in the present application are implemented.

[0080] The technical effects that can be achieved by any one of the second to sixth aspects above can be described with reference to the technical effects that can be achieved by any one of the possible designs in the first aspect above, and the repeated parts will not be elaborated. Description of the Drawings

[0081] The accompanying drawings described herein are used to provide a further understanding of the present application and form a part of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation of the present application. In the drawings:

[0082] Figure 1 It is a schematic diagram of an application scenario of the data processing method provided by an embodiment of the present application;

[0083] Figure 2 It is a schematic diagram of the positions of the Bio layer and the Request layer in the block layer;

[0084] Figure 3 It is a schematic diagram of the implementation process of the data processing method provided by an embodiment of the present application;

[0085] Figure 4 It is a schematic diagram of the process of constructing an asynchronous dispatch structure and an asynchronous dispatch thread provided by an embodiment of the present application;

[0086] Figure 5 It is a schematic diagram of the process in which the second CPU calls an asynchronous dispatch thread to send a first data read / write task to a target block device provided by an embodiment of the present application;

[0087] Figure 6 It is an example schematic diagram of the data processing method provided by an embodiment of the present application;

[0088] Figure 7 It is a schematic diagram of the process in which CPU2 migrates a data read / write task to CPU1 and CPU1 sends it to a block device provided by an embodiment of the present application;

[0089] Figure 8 It is a schematic diagram of the data processing method implemented on the first CPU side provided by an embodiment of the present application;

[0090] Figure 9 It is a schematic diagram of the structure of the data processing device implemented on the first CPU side provided by an embodiment of the present application;

[0091] Figure 10 It is a schematic diagram of the data processing method implemented on the second CPU side provided by an embodiment of the present application;

[0092] Figure 11 It is a schematic diagram of the structure of the data processing device implemented on the second CPU side provided by an embodiment of the present application;

[0093] Figure 12 It is a schematic diagram of the structure of the electronic device provided by an embodiment of the present application. Detailed implementation manners

[0094] The embodiments of the present application provide a data processing method, apparatus, electronic device, and storage medium, which reduce the latency of processing data reading and writing tasks and improve the overall performance of the electronic device.

[0095] In the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more. "And / or" describes the association relationship of associated objects and indicates that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after. "At least one (item) of the following" or its similar expressions refer to any combination of these items, including any combination of single item (s) or plural item (s). For example, at least one (item) of a, b, or c can represent: a, b, c, a and b, a and c, b and c, or a, b, and c, where a, b, and c can be single or multiple.

[0096] In the embodiments of the present application, descriptions such as "when...", "in the case of...", "if", and "when" all refer to the corresponding processing that the electronic device will perform under certain objective circumstances, which does not limit time, and does not require the electronic device to have a judgment action during implementation, nor does it mean that there are other limitations.

[0097] In addition, it should be understood that in the description of the present application, terms such as "first" and "second" are only used to distinguish the described objects, and cannot be understood as indicating or implying the relative importance of the described objects, nor can they be understood as indicating or implying an order. For example, "the first load threshold" and "the second load threshold" are used to distinguish different load thresholds, rather than describing a specific order or importance of the load thresholds.

[0098] In the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations, or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or having more advantages than other embodiments or design solutions. The use of words such as "exemplary" or "for example" is intended to present relevant concepts in a specific manner.

[0099] The preferred embodiments of the present application are described below with reference to the accompanying drawings of the specification. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present application, and are not used to limit the present application. And without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0100] In this article, it should be understood that among the technical terms involved in the present application:

[0101] Generic Block Layer: It can also be simply referred to as the Block Layer. It is a kernel component that processes IO requests for block devices sent by other components of the operating system. The Generic Block Layer contains some general functions and data structures for block device operations, such as the general disk structure gendisk structure, the request queue structure request_queue, the request structure request, the block device I / O operation structure bio, and the block device operation structure block_device_operations, etc.

[0102] Multi-queue: The multi-queue in this application refers to the multi-queue in the implementation of the kernel's processing of block device IO requests. It is a block device IO scheduling mechanism of the Generic Block Layer, which improves the concurrency and responsiveness of the system's processing of disk IO by supporting multiple IO scheduling queues. Due to the emergence of faster disk hardware (such as NVME hard disks, solid-state drives, etc.), this mechanism is introduced to fully utilize the performance of these disk hardwares.

[0103] Software Staging Queues: Abbreviated as soft queues, the Generic Block Layer allocates a soft queue for each CPU to temporarily store the IO requests submitted by users. This soft queue can complete operations such as IO sorting, merging, tag processing of IO requests, IO scheduling, and IO statistics. Since each CPU has a separate soft queue, these IO operations on each CPU can be carried out simultaneously without lock competition problems.

[0104] Hardware Dispatch Queues: Abbreviated as hard queues, the Generic Block Layer allocates a hardware dispatch queue for each IO receive buffer of the storage device to store the IO requests dispatched by the soft queue to the IO receive buffer. During the initialization of the storage device driver, in the initialization process, one or more software staging queues are mapped to a hardware dispatch queue through a fixed mapping relationship (while ensuring that the number of software staging queues mapped to each hardware dispatch queue is basically the same). After that, the IO requests on these software staging queues are dispatched to the corresponding hardware dispatch queues. After the IO enters these hardware dispatch queues, it is then dispatched by the hardware dispatch queue to the IO receive buffer on the actual media firmware.

[0105] First, refer to Figure 1 , which is a schematic diagram of an application scenario of the data processing method provided by the embodiment of this application. As Figure 1The electronic device 10 shown contains multiple CPUs: CPU0 to CPUn (the number of CPUs is: n + 1), a general block layer 101, a block device drive 102, and a block device 103, where the CPU can be a physical CPU or a logical CPU. The general block layer 101 is a component in the Linux kernel of the electronic device 10. In the implementation of the general block layer under multiple queues, it includes two layers of queue mechanisms: a software staging queue and a hardware dispatch queue. The software staging queue is like Figure 1 ctx0 to ctxn in Figure 1 . Each CPU corresponds to a software staging queue ctx. The hardware dispatch queue is like Figure 1 hctx0 to hctxm in Figure 1 . The number of hardware dispatch queues is: m + 1. The number of hardware dispatch queues is determined by the underlying hardware and can be one or more. The Linux kernel maintains a mapping table of software staging queues and hardware dispatch queues: map_queue. One hardware dispatch queue corresponds to one or more software staging queues. For example, in the Figure 1 architecture, the hardware dispatch queue hctx0 corresponds to two software staging queues ctx0 and ctx1, and the hardware dispatch queue hctx1 corresponds to the software staging queue ctx2. In this architecture, the number of hardware dispatch queues m + 1 is less than the number of software staging queues n + 1. An application running on the CPU initiates an IO request to the general block layer 101, a component in the kernel. After the IO request enters the general block layer, it goes through two layers of processing: the Bio (Block I / O, block device I / O operation structure) layer and the Request (request) layer. The positions of the Bio layer and the Request layer in the block layer are as shown in Figure 2 . The Bio layer converts the IO request into a bio, where bio is a block device IO operation structure. The Request layer sorts and / or merges the bio and other processing to convert the Bio into a request request. Then, the request request is sent to the software staging queue corresponding to the CPU. The software staging queue sends the request request to its corresponding hardware dispatch queue. Then, the request is sent to the block device drive, and then, it is sent by the block device drive to the block device (such as the hard disk in Figure 1 ).

[0106] Figure 2"Filesystems" in it refers to file systems. Common file systems include ext3, ext4, xfs, etc. " / dev / sda" is the name of a disk device, which is common in the Linux system and is used to represent a disk. The block layer is a logical concept used to describe raw IO requests. md (Mapped Device): It is a logical device provided by the kernel and is a disk device virtualized by the dm (Device Mapper) framework. dm is a mechanism implementation framework in the Linux system for mapping physical devices and realizes the mapping from physical devices to logical devices. RAID (Redundant Array of Independent Disks) is an implementation technology that provides data protection through redundancy. RAID0, RAID1, and RAID5 represent different types of independent disk redundant arrays. For example, Raid 0 requires at least two hard disks. The more disks there are, the faster the read and write speeds. There is no redundancy. In Figure 2In the figure, it represents a corresponding storage device under this technology implementation. RAID 1 can only use two hard disks. The data of the two hard disks are mirrored to each other (slow write, fast read), and one disk is redundant. In this figure, it represents a corresponding storage device under this technology implementation. RAID 5 requires at least 3 hard disks, and one disk is redundant. It is the most common configuration method and a data storage method with parity check data recovery function. The parity check data blocks are distributed among the hard disks in the array. In this figure, it represents a corresponding storage device under this technology implementation. dm-crypt (device mapper crypto target) is a logical device mapped by the dm framework. Device encryption is achieved through dm-crypt to enhance data security. In this figure, it represents a corresponding storage device under this technology implementation. Among them, dm-crypt is an encryption tool for the Linux operating system, and it can encrypt the file system to protect data security. dm-snap (device mapper snap target) is a logical device mapped by the dm framework. Device snapshot is achieved through dm-snap to enhance data reliability. In this figure, it represents a corresponding storage device under this technology implementation. "dm-thin" is a logical storage type implemented by dm, which can put multiple virtualized logical devices together to reduce management costs. In this figure, it represents a corresponding storage device under this technology implementation. DRBD (Distributed Replicated Block Device) is a highly available storage solution that allows data to be mirrored between two physically separated servers in a synchronous manner. In this figure, it represents a corresponding storage device under this technology implementation. RBD (Reliable Autonomic Distributed Object Store Block Device) is a storage intermediate layer that provides block devices for clients built on top of the RADOS (Reliable Autonomic Distributed Object Store) cluster and has features such as snapshot, multiple replicas, cloning, and consistency. In this figure, it represents a corresponding storage device under this technology implementation. Umem (user memory) is a memory buffer that can achieve data sending and receiving without locking. In this figure, it represents a corresponding virtual storage device under this technology implementation. Bcache (block cache) is a caching technology that also uses solid-state drives as read and write caches. In this figure, it represents a corresponding storage device supported by this technology.SCSI (Small Computer System Interface) is a data transfer interface protocol. In this figure, it represents a disk that supports this protocol, usually simply referred to as a SCSI disk. ATA (Advanced Technology Attachment) is a disk interface protocol. In this figure, it represents a disk that supports this protocol, usually simply referred to as an ATA disk. Floppy refers to a floppy disk, and ps3disk is a type of disk. NVME (Non-Volatile Memory Express) is a solid-state disk. Nbd (Network Block Device) allows users to access a certain disk device through the network, and here it represents the corresponding disk type.

[0107] The block device 103 can be, but is not limited to, a disk, a solid-state drive, or a CD-ROM. The embodiments of the present application do not make any limitations in this regard. The electronic device 10 can also be a device such as a server or a terminal that includes a Linux kernel. The server can be an independent physical server or a cloud server that provides basic cloud computing services such as cloud servers, cloud databases, and cloud storage. The embodiments of the present application do not make any limitations in this regard.

[0108] Based on Figure 1 the application scenario shown below, the exemplary embodiments of the present application will be described in more detail with reference to the accompanying Figures 3 to 12 drawings. It should be noted that the above application scenario is only shown for the convenience of understanding the spirit and principle of the present application, and the embodiments of the present application are not restricted in any way here. On the contrary, the embodiments of the present application can be applied to any applicable scenario.

[0109] As Figure 3 shown, it is a schematic flowchart of the implementation process of the data processing method provided by the embodiments of the present application. The data processing method can be applied to the electronic device 10 as Figure 1 shown, and can include the following steps:

[0110] S21. The first CPU obtains the first data read / write task.

[0111] In a possible implementation, when a target application running on a first CPU in an electronic device needs to perform data read and write operations on a target block device in the electronic device, the target application generates a first data read and write task and sends the first data read and write task to the task queue of the first CPU. The first CPU reads the first data read and write task from the task queue, where the first CPU is one of multiple CPUs in the electronic device, the target block device in the electronic device is the block device corresponding to the first data read and write task, the first data read and write task is used to perform read and write operations on the data stored in the target block device in the electronic device, the target application can be but is not limited to a file system, and the embodiments of the present application do not make any limitations in this regard.

[0112] Exemplarily, the first data read task can be an IO request. The first CPU obtains the IO request generated by the target application and generates a corresponding bio based on the IO request.

[0113] Exemplarily, the target application generates an IO request and sends the IO request to the task queue of the first CPU. The first CPU reads the IO request from the task queue, where the IO request includes sector position information of the data to be read or written in the target block device. The sector position information includes: initial sector position information, the number of consecutive sectors read or written backward from the initial sector, and the execution action being "read" or "write". When the IO request is a data write request, the IO request also includes the data to be written. The IO request will be submitted to the general block layer.

[0114] In a possible implementation, the first CPU can also set an asynchronous dispatch flag for the bio. The asynchronous dispatch flag is used to indicate that the request queue supports asynchronous dispatch. The bio can be migrated to other CPUs in the electronic device other than the first CPU, and the other CPUs perform asynchronous dispatch.

[0115] S22. When the load of the first CPU is greater than or equal to the first load threshold, the first CPU determines a second CPU with a load less than the second load threshold from at least one other CPU.

[0116] It can be understood that the second load threshold here can ensure that the second CPU completes the first data read and write task. When the processing capabilities of different CPUs on the same electronic device are the same, the second load threshold can be less than or equal to the first load threshold.

[0117] In a possible implementation, the first CPU obtains the loads of at least one other CPU in the electronic device other than the first CPU.

[0118] Exemplarily, the electronic device can monitor the load of each of its CPUs in real time, such as monitoring the utilization rate of each CPU in real time. The first CPU determines whether the utilization rate of the current first CPU is greater than the first load threshold. When the utilization rate of the first CPU is greater than the first load threshold, the first CPU obtains the utilization rate of at least one other CPU among the multiple CPUs of the electronic device except the first CPU. When the electronic device monitors the utilization rate of each CPU, the first load threshold can be set according to actual needs, such as being set to 85% or 90%, or any other percentage value, and the embodiments of the present application do not limit this.

[0119] In a possible implementation manner, the first CPU can select a second CPU with a utilization rate less than the second load threshold from at least one other CPU among the multiple CPUs of the electronic device except the first CPU, where the second load threshold can be set according to actual needs, such as being set to 60% or 65%, or any other percentage value, and the embodiments of the present application do not limit this. If there is no CPU among all other CPUs except the first CPU with a utilization rate less than the second load threshold, then any second CPU with a relatively low utilization rate can be selected, or the second CPU with the lowest utilization rate can be selected, and the embodiments of the present application do not limit this.

[0120] S23. The first CPU stores the first data read / write task in the asynchronous dispatch management structure of the second CPU.

[0121] After the electronic device operating system is started and enters the target block device initialization stage, an asynchronous dispatch management structure and an asynchronous dispatch thread are created for each CPU. The asynchronous dispatch management structure of each CPU is used to store the data read / write tasks of other CPUs except its own CPU, and the asynchronous dispatch thread is used to process the data read / write tasks of other CPUs except its own CPU. At the same time, a storage structure pointer array is created for the asynchronous dispatch management structure of each CPU. The storage structure pointer array of each CPU is used to store linked lists corresponding to other multiple CPUs in the electronic device except its own CPU, where the linked list corresponding to each CPU among the other multiple CPUs is used to store the bio corresponding to the IO request migrated from the corresponding CPU to the current CPU. It can be understood that the programs corresponding to the asynchronous dispatch management structure, the storage structure pointer array, and the asynchronous dispatch thread are created when starting the target block device.

[0122] For Figure 1Taking the architecture of the electronic device 10 in as an example for illustration, the electronic device 10 includes n + 1 CPUs: CPU0 to CPUn. In the block device initialization stage, an asynchronous dispatch management structure and an asynchronous dispatch thread are created for each CPU. Taking the creation of the asynchronous dispatch management structure for CPU0 as an example, a storage structure pointer array async_push_io is created for the asynchronous dispatch management structure of CPU0. Each storage structure pointer async_push_io[i] (i = 1 to n) correspondingly stores the linked list corresponding to CPU1 to CPUn. Among them, n is the number of linked lists. As Figure 4 shown, there are three bios corresponding to the IO requests migrated from CPU1 to CPU0 in the linked list corresponding to CPU1, two bios corresponding to the IO requests migrated from CPU2 to CPU0 in the linked list corresponding to CPU2, four bios corresponding to the IO requests migrated from CPU3 to CPU0 in the linked list corresponding to CPU3, and three bios corresponding to the IO requests migrated from CPUn to CPU0 in the linked list corresponding to CPUn.

[0123] In a possible implementation manner, a new asynchronous dispatch management structure can also be created for each CPU, and a linked list is created for multiple other CPUs in the electronic device except its own CPU to store the bios corresponding to the IO requests migrated from other CPUs to the current CPU. The identifier information of the CPU that stores this linked list and the bio corresponding to the issued IO request is stored in the newly created asynchronous dispatch management structure. The embodiments of the present application do not limit this.

[0124] In this step, the first CPU mounts the generated bio to the asynchronous dispatch management structure of the second CPU. Among them, the asynchronous dispatch management structure of the second CPU is used to store the data read and write tasks of the first CPU, and is also used to store the data read and write tasks of CPUs other than the first CPU. That is: the asynchronous dispatch management structure of the second CPU is used to store the data read and write tasks of other CPUs except its own CPU. That is: the asynchronous dispatch management structure of the second CPU is used to store the bios corresponding to the IO requests of other CPUs except the second CPU itself. Other CPUs except the second CPU itself include the first CPU.

[0125] In a possible implementation, the first CPU mounts the bio to the linked list corresponding to the first CPU in the asynchronous dispatch management structure of the second CPU. The asynchronous dispatch management structure of the second CPU contains linked lists corresponding to multiple other CPUs except the second CPU itself. The asynchronous dispatch management structure contains an array of storage structure pointers, which is used to store the linked lists corresponding to multiple other CPUs except the second CPU itself among multiple CPUs. Thus, the storage of the bio corresponding to the IO request migrated from the first CPU is realized through the linked list corresponding to the first CPU set in the asynchronous dispatch management structure of the second CPU.

[0126] Exemplarily, the asynchronous dispatch structure may contain a linked list corresponding to each of multiple other CPUs except its own CPU, that is, each of the other CPUs corresponds to a linked list.

[0127] Assume that the second CPU is Figure 1 CPU0 in, and the first CPU is CPU1. Then CPU1 mounts the bio corresponding to the IO request to the linked list corresponding to CPU1 in the asynchronous dispatch management structure of CPU0 as shown in Figure 4 the figure.

[0128] Optionally, another asynchronous dispatch structure may also contain a linked list corresponding to multiple other CPUs except its own CPU. When the asynchronous dispatch structure receives the bio corresponding to an IO request sent by another CPU each time, it stores the identification information of the CPU that issues the bio.

[0129] S24. The first CPU wakes up the asynchronous dispatch thread of the second CPU.

[0130] After the first CPU mounts the bio to the linked list corresponding to the first CPU in the asynchronous dispatch management structure of the second CPU, it wakes up the asynchronous dispatch thread of the second CPU so that the second CPU processes the first data read / write task.

[0131] S25. The second CPU processes the first data read / write task based on the asynchronous dispatch thread.

[0132] In a possible implementation, if the second CPU determines that the asynchronous dispatch thread is woken up, it calls the asynchronous dispatch thread to read the first data read / write task from the asynchronous dispatch management structure and issues the first data read / write task to the target block device. The asynchronous dispatch thread is used to process the data read / write tasks migrated from other CPUs except its own CPU to the second CPU. The second data read / write task issued by the first application running on the second CPU is processed by the second CPU calling the first process, and the asynchronous dispatch thread is different from the first process.

[0133] In the second CPU, an asynchronous dispatch management structure for storing data read / write tasks of other CPUs in the electronic device except the second CPU itself is pre-established, which uniformly manages the data read / write tasks migrated from other CPUs to the second CPU, and an asynchronous dispatch thread for processing the data read / write tasks migrated from other CPUs to the second CPU is established for the second CPU, realizing the asynchronous distribution of the data read / write tasks migrated from other CPUs.

[0134] The first application running on the second CPU can be a file system. The second data read / write task initiated by the file system running on the second CPU is processed by the second CPU calling a first process independent of the asynchronous dispatch thread, and the asynchronous dispatch thread is only used to process the data read / write tasks migrated from other CPUs to the second CPU. The asynchronous dispatch thread and the first process are two different and independent processes. Thus, the second CPU realizes parallel processing of its own data read / write tasks and the data read / write tasks migrated from other CPUs to the second CPU, improving the overall performance of the electronic device.

[0135] Exemplarily, the second CPU can call the asynchronous dispatch thread to execute the process as Figure 5 shown to send the first data read / write task to the target block device, which may include the steps:

[0136] S31. The second CPU obtains the linked list corresponding to the first CPU from the asynchronous dispatch management structure.

[0137] In specific implementation, the second CPU obtains the linked list corresponding to the first CPU from the asynchronous dispatch management structure of the second CPU according to the storage structure pointer corresponding to the first CPU.

[0138] In implementation, the second CPU can traverse, through the asynchronous dispatch thread, the linked lists corresponding to all CPUs except the second CPU in the storage structure pointer array async_push_io[n] in the asynchronous dispatch management structure of the second CPU, including the linked list corresponding to the first CPU.

[0139] S32. Convert the bio included in the linked list corresponding to the first CPU into a request request.

[0140] In specific implementation, when the second CPU traverses to the linked list corresponding to the first CPU, through the asynchronous dispatch thread, in the Request layer of the general block layer, all bios in the linked list corresponding to the first CPU are converted into corresponding request requests through processing such as sorting and merging.

[0141] Optionally, if the first CPU sets an asynchronous dispatch flag for the bio sent to the second CPU, when the second CPU traverses the linked list corresponding to the first CPU and extracts the asynchronous dispatch flag from the bio contained in the linked list, all the bio with the asynchronous dispatch flag in the linked list corresponding to the first CPU are converted into corresponding request requests through sorting, merging, etc. by the asynchronous dispatch thread at the Request layer of the general block layer.

[0142] S33. Send the request request to the software cache queue corresponding to the second CPU.

[0143] In specific implementation, the second CPU sends the request request to the software cache queue corresponding to the second CPU through the asynchronous dispatch process.

[0144] S34. Obtain the request request from the software cache queue and send the request request to the hardware dispatch queue corresponding to the software cache queue.

[0145] In specific implementation, the second CPU queries the mapping table map_queue of the software temporary queue and the hardware dispatch queue through the asynchronous dispatch process, determines the hardware dispatch queue corresponding to the software temporary queue, reads the request request from the software cache queue, and sends the request request to the hardware dispatch queue corresponding to the software cache queue.

[0146] S35. Obtain the request request from the hardware dispatch queue and send the request request to the target block device.

[0147] In specific implementation, the second CPU reads the request request from the hardware dispatch queue through the asynchronous dispatch process, sends the request request to the block device driver, and the block device driver sends it to the target block device.

[0148] The following lists an example. Still taking the Figure 1 shown electronic device as an example, combined with Figure 6 the data read / write task migration process shown for illustration. As Figure 6As shown, the current loads of CPUs 2 and 3 are too high, and the current data read / write tasks need to be migrated to other CPUs, which are asynchronously dispatched to block devices by other CPUs. Assume that the current data read / write tasks of CPU 2 are migrated to CPU 1, and the current data read / write tasks of CPU 3 are migrated to CPUn. After CPU 2 converts the IO request into the corresponding bio, it mounts the bio to the linked list corresponding to CPU 2 in the storage structure pointer array async_push_io(n) of the asynchronous dispatch management structure of CPU 1, and wakes up the asynchronous dispatch thread of CPU 1. CPU 1 calls the asynchronous dispatch thread to convert the bio into the corresponding request request, and issues the request request to the soft queue ctx1 corresponding to CPU 1. Furthermore, CPU 1 reads the request request from the soft queue ctx1, sends the request request to the hard queue hctx0 corresponding to the soft queue ctx1, then takes out the request request from the hard queue hctx0, and sends the request request to the block device driver, which is issued to the block device by the block device driver. After CPU 3 converts the IO request into the corresponding bio, it mounts the bio to the linked list corresponding to CPU 3 in the storage structure pointer array async_push_io(n) of the asynchronous dispatch management structure of CPUn, and wakes up the asynchronous dispatch thread of CPUn. CPUn calls the asynchronous dispatch thread to convert the bio into the corresponding request request, and issues the request request to the soft queue ctxn corresponding to CPUn. Furthermore, CPUn reads the request request from the soft queue ctxn, sends the request request to the hard queue hctxm corresponding to the soft queue ctxn, then takes out the request request from the hard queue hctxm, and sends the request request to the block device driver, which is issued to the block device by the block device driver.

[0149] Taking CPU 2 as an example below, combined with Figure 7Specifically describe the specific process in which CPU2 migrates the data read / write task to CPU1 and CPU1 distributes it to the block device. After CPU2 obtains an IO request initiated by an application (such as a file system) running on it, it submits the IO request to the general block layer, converts the IO request into a corresponding bio, and sets an asynchronous dispatch flag for the bio to indicate that the request queue supports asynchronous dispatch. If the current load of CPU2 is greater than or equal to the first load threshold, it selects a CPU with a load less than the second load threshold from other CPUs. For example, if CPU1 is selected, CPU2 mounts the bio corresponding to the current IO request to the linked list corresponding to CPU2 in the asynchronous dispatch management structure of CPU1 and wakes up the asynchronous dispatch thread on CPU1. After the asynchronous dispatch thread of CPU1 is awakened, it traverses all the linked lists corresponding to other CPUs in the storage structure pointer array async_push_io[n] in its own asynchronous dispatch management structure to distribute the bio in each linked list, generates a request request corresponding to the bio, and distributes the request request to the soft queue ctx1 corresponding to CPU1. Furthermore, CPU1 reads the request request from the soft queue ctx1, sends the request request to the hard queue hctx0 corresponding to the soft queue ctx1, then takes out the request request from the hard queue hctx0, sends the request request to the block device driver, and the block device driver distributes it to the block device.

[0150] The data processing method provided by the embodiment of the present application, in an electronic device with multiple CPUs, when the first CPU obtains a first data read / write task, first determines whether the load of the first CPU is greater than or equal to a first load threshold. If so, determines a second CPU with a load less than a second load threshold from other CPUs, stores the first data read / write task in the asynchronous dispatch management structure of the second CPU, and wakes up the asynchronous dispatch thread of the second CPU, so that the second CPU processes the first data read / write task based on the asynchronous dispatch thread. Since in the second CPU, an asynchronous dispatch management structure for storing data read / write tasks of other CPUs except the second CPU in the electronic device is established in advance to uniformly manage the data read / write tasks migrated from other CPUs to the second CPU, and an asynchronous dispatch thread for processing the data read / write tasks migrated from other CPUs to the second CPU is established in advance for the second CPU, realizing the asynchronous dispatch of the data read / write tasks migrated from other CPUs to the second CPU by the second CPU based on the asynchronous dispatch thread. Thus, it realizes migrating the data read / write tasks on the high-load CPU to the low-load CPU for execution, reduces the task volume on the high-load CPU, and reduces the latency of processing data read / write tasks. At the same time, since the tasks of the high-load CPU are shared, the high-load CPU can quickly restore its load level, and further alleviates the performance loss of the electronic device caused by the over-high load of one or some CPUs, improving the overall performance of the electronic device.

[0151] Based on the same inventive concept, the embodiment of the present application also provides a data processing method implemented on the first CPU side. Since the principle of solving problems by the above data processing method implemented on the first CPU side is similar to that of the above data processing method, the implementation of the above data processing method implemented on the first CPU side can refer to the implementation of the above data processing method, and the repeated parts will not be elaborated.

[0152] As Figure 8 shown, it is a schematic flowchart of the data processing method implemented on the first CPU side provided by the embodiment of the present application. The method is applied to an electronic device with multiple CPUs and may include the following steps:

[0153] S41. The first CPU obtains a first data read / write task.

[0154] S42. When the load of the first CPU is greater than or equal to the first load threshold, determine a second CPU with a load less than the second load threshold from at least one other CPU.

[0155] S43. Store the first data read / write task in the asynchronous dispatch management structure of the second CPU. The asynchronous dispatch management structure is used to store the data read / write tasks of the first CPU.

[0156] S44. Wake up the asynchronous dispatching thread of the second CPU so that the second CPU processes the first data read / write task.

[0157] In a possible implementation, obtaining the first data read / write task specifically includes:

[0158] Obtain the IO request generated by the target application, and generate a corresponding block device IO operation structure bio based on the IO request;

[0159] Storing the first data read / write task in the asynchronous dispatching management structure of the second CPU specifically includes:

[0160] Mount the bio to the asynchronous dispatching management structure.

[0161] In a possible implementation, the asynchronous dispatching management structure contains linked lists corresponding to multiple other CPUs except its own CPU;

[0162] Mounting the bio to the asynchronous dispatching management structure specifically includes:

[0163] Mount the bio to the linked list corresponding to the first CPU in the asynchronous dispatching management structure.

[0164] In a possible implementation, the asynchronous dispatching management structure contains an array of storage structure pointers, and the array of storage structure pointers is used to store the linked lists corresponding to multiple other CPUs except its own CPU.

[0165] In a possible implementation, the asynchronous dispatching management structure and the array of storage structure pointers are created when starting the target block device, and the target block device is the block device corresponding to the first data read / write task.

[0166] In a possible implementation, the second data read / write task sent by the first application running on the second CPU is processed by the second CPU calling the first process; the asynchronous dispatching thread is different from the first process.

[0167] Based on the same inventive concept, an embodiment of the present application further provides a data processing device on the first CPU side. Since the principle of solving problems by the data processing device on the first CPU side is similar to the above data processing method, the implementation of the data processing device on the first CPU side can refer to the implementation of the above data processing method, and the repeated parts will not be described again.

[0168] As Figure 9As shown, it is a schematic structural diagram of a data processing device implemented on the first CPU side provided by an embodiment of the present application. The device is applied to the first CPU in an electronic device having multiple CPUs. The device includes:

[0169] An acquisition module 51, configured to acquire a first data read / write task by the first CPU;

[0170] A determination module 52, configured to determine a second CPU with a load less than a second load threshold from at least one other CPU when the load of the first CPU is greater than or equal to a first load threshold;

[0171] A sending module 53, configured to store the first data read / write task in an asynchronous dispatch management structure of the second CPU, where the asynchronous dispatch management structure is used to store the data read / write tasks of the first CPU;

[0172] A wake-up module 54, configured to wake up the asynchronous dispatch thread of the second CPU so that the second CPU processes the first data read / write task.

[0173] In a possible implementation manner, the acquisition module 51 is specifically configured to acquire an IO request generated by a target application and generate a corresponding block device IO operation structure bio based on the IO request;

[0174] The sending module 53 is specifically configured to mount the bio to the asynchronous dispatch management structure.

[0175] In a possible implementation manner, the asynchronous dispatch management structure includes linked lists corresponding to multiple other CPUs except its own CPU;

[0176] The sending module 53 is specifically configured to mount the bio to the linked list corresponding to the first CPU in the asynchronous dispatch management structure.

[0177] In a possible implementation manner, the asynchronous dispatch management structure includes a storage structure pointer array, and the storage structure pointer array is used to store the linked lists corresponding to multiple other CPUs except its own CPU.

[0178] In a possible implementation manner, the asynchronous dispatch management structure and the storage structure pointer array are created when starting a target block device, and the target block device is the block device corresponding to the first data read / write task.

[0179] In a possible implementation manner, a second data read / write task issued by a first application running on the second CPU is processed by the second CPU by calling a first process; the asynchronous dispatch thread is different from the first process.

[0180] Based on the same inventive concept, an embodiment of the present application further provides a data processing method implemented on the second CPU side. Since the principle of solving problems by the data processing method implemented on the second CPU side is similar to the above data processing method, the implementation of the data processing method implemented on the second CPU side can refer to the implementation of the above data processing method, and the repeated parts will not be elaborated.

[0181] As Figure 10 shown, it is a schematic flowchart of a data processing method implemented on the second CPU side provided by an embodiment of the present application. The method is applied to an electronic device with multiple CPUs and may include the following steps:

[0182] S61. The second CPU receives a first data read / write task sent by the first CPU.

[0183] The first data read / write task is stored by the first CPU in an asynchronous dispatch management structure of the second CPU, and the asynchronous dispatch management structure is used to store the data read / write tasks of the first CPU;

[0184] S62. If it is determined that the asynchronous dispatch thread is awakened, process the first data read / write task based on the asynchronous dispatch thread.

[0185] In a possible implementation manner, processing the first data read / write task based on the asynchronous dispatch thread specifically includes:

[0186] Call the asynchronous dispatch thread to read the first data read / write task from the asynchronous dispatch management structure and send the first data read / write task to a target block device.

[0187] In a possible implementation manner, the second CPU receiving the first data read / write task sent by the first CPU specifically includes:

[0188] The second CPU receives a block device I / O operation structure bio corresponding to an I / O request sent by the first CPU; the bio is mounted by the first CPU to the asynchronous dispatch management structure.

[0189] In a possible implementation manner, the asynchronous dispatch management structure includes linked lists corresponding to multiple other CPUs except its own CPU; the bio is mounted by the first CPU to the linked list corresponding to the first CPU in the asynchronous dispatch management structure.

[0190] In a possible implementation manner, the asynchronous dispatch management structure includes an array of storage structure pointers, and the array of storage structure pointers is used to store the linked lists corresponding to multiple other CPUs except its own CPU.

[0191] In a possible implementation, calling the asynchronous dispatching thread to read the first data reading and writing task from the asynchronous dispatching management structure and sending the first data reading and writing task to the target block device specifically includes:

[0192] Call the created asynchronous dispatching thread to perform the following steps:

[0193] Obtain the linked list corresponding to the first CPU from the asynchronous dispatching management structure;

[0194] Convert the bio included in the linked list corresponding to the first CPU into a request request;

[0195] Send the request request to the software cache queue corresponding to the second CPU;

[0196] Obtain the request request from the software cache queue and send the request request to the hardware dispatching queue corresponding to the software cache queue;

[0197] Obtain the request request from the hardware dispatching queue and send the request request to the target block device; wherein, the asynchronous dispatching thread is used to process the data reading and writing tasks migrated from other CPUs except itself to the second CPU, and the second data reading and writing tasks issued by the first application running on the second CPU are processed by the second CPU calling the first process; the asynchronous dispatching thread is different from the first process.

[0198] In a possible implementation, the asynchronous dispatching management structure, the storage structure pointer array, and the program corresponding to the asynchronous dispatching thread are created when the target block device is started.

[0199] Based on the same inventive concept, an embodiment of the present application further provides a data processing device on the second CPU side. Since the principle of solving problems by the data processing device on the second CPU side is similar to the above data processing method, the implementation of the data processing device on the second CPU side can refer to the implementation of the above data processing method, and the repeated parts will not be described again.

[0200] As Figure 11 shown, it is a schematic structural diagram of a data processing device on the second CPU side provided by an embodiment of the present application. The device is applied to the second CPU in an electronic device with multiple CPUs. The device may include:

[0201] A receiving module 71, configured to receive a first data reading and writing task sent by a first CPU, where the first data reading and writing task is stored by the first CPU in an asynchronous dispatch management structure of a second CPU, and the asynchronous dispatch management structure is used to store data reading and writing tasks of the first CPU;

[0202] A processing module 72, configured to, if it is determined that the asynchronous dispatch thread is awakened, process the first data reading and writing task based on the asynchronous dispatch thread.

[0203] In a possible implementation manner, the processing module 72 is specifically configured to call the asynchronous dispatch thread to read the first data reading and writing task from the asynchronous dispatch management structure, and send the first data reading and writing task to a target block device.

[0204] In a possible implementation manner, the receiving module 71 is specifically configured to receive a block device I / O operation structure bio corresponding to an I / O request sent by the first CPU; the bio is mounted by the first CPU to the asynchronous dispatch management structure.

[0205] In a possible implementation manner, the asynchronous dispatch management structure includes linked lists corresponding to multiple other CPUs except its own CPU; the bio is mounted by the first CPU to the linked list corresponding to the first CPU in the asynchronous dispatch management structure.

[0206] In a possible implementation manner, the asynchronous dispatch management structure includes an array of storage structure pointers, and the array of storage structure pointers is used to store linked lists corresponding to multiple other CPUs except its own CPU.

[0207] In a possible implementation manner, the processing module 72 is specifically configured to call the created asynchronous dispatch thread to perform the following steps: obtain the linked list corresponding to the first CPU from the asynchronous dispatch management structure; convert the bio included in the linked list corresponding to the first CPU into a request request; send the request request to a software cache queue corresponding to the second CPU; obtain the request request from the software cache queue, and send the request request to a hardware dispatch queue corresponding to the software cache queue; obtain the request request from the hardware dispatch queue, and send the request request to the target block device; where the asynchronous dispatch thread is used to process data reading and writing tasks migrated from other CPUs except itself to the second CPU, and a second data reading and writing task sent by a first application running on the second CPU is processed by the second CPU by calling a first process; the asynchronous dispatch thread is different from the first process.

[0208] In a possible implementation, the asynchronous dispatch management structure, the storage structure pointer array, and the program corresponding to the asynchronous dispatch thread are created when the target block device is started.

[0209] As Figure 12 shown, it is a schematic structural diagram of an electronic device provided by an embodiment of the present application. The electronic device may include:

[0210] A first CPU 81, configured to obtain a first data read / write task; when the load of the first CPU 81 is greater than or equal to a first load threshold, determine a second CPU 82 with a load less than a second load threshold from at least one other CPU; store the first data read / write task in the asynchronous dispatch management structure of the second CPU 82, where the asynchronous dispatch management structure is used to store the data read / write tasks of the first CPU; wake up the asynchronous dispatch thread of the second CPU 82;

[0211] A second CPU 82, configured to receive the first data read / write task sent by the first CPU 81 and process the first data read / write task based on the asynchronous dispatch thread.

[0212] In a possible implementation, the first CPU 81 is specifically configured to obtain an IO request generated by a target application, and generate a corresponding block device IO operation structure bio based on the IO request; mount the bio to the asynchronous dispatch management structure;

[0213] The second CPU 82 is specifically configured to call the asynchronous dispatch thread to read the first data read / write task from the asynchronous dispatch management structure and send the first data read / write task to the target block device.

[0214] In a possible implementation, the first CPU 81 is specifically configured to mount the bio to the linked list corresponding to the first CPU 81 in the asynchronous dispatch management structure; the asynchronous dispatch management structure includes linked lists corresponding to multiple other CPUs except its own CPU.

[0215] In a possible implementation, the asynchronous dispatch management structure includes a storage structure pointer array, where the storage structure pointer array is used to store the linked lists corresponding to multiple other CPUs except its own CPU.

[0216] In a possible implementation, the second CPU 82 is specifically configured to call the created asynchronous dispatch thread to execute the following steps:

[0217] Obtain the linked list corresponding to the first CPU 81 from the asynchronous dispatch management structure;

[0218] Convert the bio included in the linked list corresponding to the first CPU 81 into a request request;

[0219] Send the request request to the software cache queue corresponding to the second CPU 82;

[0220] Obtain the request request from the software cache queue, and send the request request to the hardware dispatch queue corresponding to the software cache queue;

[0221] Obtain the request request from the hardware dispatch queue, and send the request request to the target block device; wherein, the asynchronous dispatch thread is used to process data read and write tasks migrated to the second CPU 82 from other CPUs except itself, and the second data read and write tasks issued by the first application running on the second CPU 82 are processed by the second CPU 82 calling the first process; the asynchronous dispatch thread is different from the first process.

[0222] In a possible implementation manner, the asynchronous dispatch management structure, the storage structure pointer array, and the program corresponding to the asynchronous dispatch thread are created when the target block device is started.

[0223] The embodiment of the present application also provides a computer-readable storage medium, storing computer-executable instructions required to be executed by a processor, which includes a program required to be executed by the processor. When the program is executed by the processor, the steps in the data processing method described in the present application are implemented. Wherein, the processor may include the first CPU in the embodiment of the present application, and may also include the second CPU.

[0224] In some possible implementation manners, each aspect of the data processing method provided in the present application may also be implemented in the form of a program product, which includes program code. When the program product runs on an electronic device, the program code is used to make the electronic device execute the steps in the data processing method according to various exemplary embodiments described above in this specification.

[0225] Those skilled in the art should understand that the embodiments of the present application may be provided as a method, a device, or a computer program product. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0226] This application is described with reference to the flowcharts and / or block diagrams of methods, apparatus (devices), and computer program products according to embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the functions specified in one flow Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0227] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including instruction means that implement the functions specified in one flow Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0228] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one flow Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0229] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications once they know the basic creative concepts. Therefore, the appended claims are intended to be construed to include the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0230] Obviously, those skilled in the art can make various changes and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims

1. A data processing method, characterized in that, Including: The first CPU obtains a first data read / write task; When the load of the first CPU is greater than or equal to a first load threshold, determine a second CPU with a load less than a second load threshold from at least one other CPU; Store the first data read / write task in an asynchronous dispatch management structure of the second CPU, where the asynchronous dispatch management structure is used to store the data read / write tasks of the first CPU; Wake up the asynchronous dispatch thread of the second CPU so that the second CPU processes the first data read / write task.

2. The method according to claim 1, characterized in that, Obtaining a first data read / write task specifically includes: Obtain an IO request generated by a target application and generate a corresponding block device IO operation structure bio based on the IO request; Storing the first data read / write task in the asynchronous dispatch management structure of the second CPU specifically includes: Mount the bio to the asynchronous dispatch management structure.

3. The method according to claim 2, wherein The asynchronous dispatch management structure contains linked lists corresponding to multiple other CPUs except its own CPU; Mounting the bio to the asynchronous dispatch management structure specifically includes: Mount the bio to the linked list corresponding to the first CPU in the asynchronous dispatch management structure.

4. The method according to claim 3, wherein The asynchronous dispatch management structure contains a storage structure pointer array, and the storage structure pointer array is used to store the linked lists corresponding to multiple other CPUs except its own CPU.

5. The method according to claim 4, characterized in that, The asynchronous dispatch management structure is created when starting a target block device, and the target block device is the block device corresponding to the first data read / write task.

6. A data processing method, characterized in that Including: The second CPU receives an instruction from the first CPU, and the instruction is used to wake up the asynchronous dispatch thread of the second CPU; Process the first data read / write task based on the asynchronous dispatch thread, where the first data read / write task is stored in the asynchronous dispatch management structure of the second CPU by the first CPU, and the asynchronous dispatch management structure is used to store the data read / write tasks of the first CPU.

7. The method according to claim 6, wherein Processing the first data read / write task based on the asynchronous dispatch thread specifically includes: Call the asynchronous dispatch thread to read the first data read / write task from the asynchronous dispatch management structure and send the first data read / write task to the target block device.

8. The method according to claim 6, characterized in that, The second CPU receives the first data read / write task sent by the first CPU specifically includes: The second CPU receives the block device IO operation structure bio corresponding to the IO request sent by the first CPU; the bio is mounted to the asynchronous dispatch management structure by the first CPU.

9. An electronic device, characterized in that, Including: The first CPU is used to obtain a first data read / write task; when the load of the first CPU is greater than or equal to a first load threshold, determine a second CPU with a load less than a second load threshold from at least one other CPU; store the first data read / write task in the asynchronous dispatch management structure of the second CPU, where the asynchronous dispatch management structure is used to store the data read / write tasks of the first CPU; wake up the asynchronous dispatch thread of the second CPU; A second CPU, configured to process the first data reading and writing task based on the asynchronous dispatching thread.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by a processor, it implements the steps in the data processing method according to any one of claims 1 to 8.

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