Wafer defect detection method and device and electronic equipment

Abstract

The invention discloses a wafer defect detection method and device and electronic equipment. The method comprises the following steps: acquiring a reference crystal grain image and a to-be-detected crystal grain image; recommending an alignment area for the reference grain image, and acquiring an alignment template image of the alignment area; establishing a coarse alignment attention area based on the alignment area, and calibrating the alignment area of the to-be-detected crystal grain image according to the projection offset of the reference crystal grain image and the to-be-detected crystal grain image in the image of the coarse alignment attention area to obtain an alignment correction area; cutting the to-be-detected crystal grain image based on the alignment correction area to obtain an image of the alignment correction area; and performing fine alignment operation according to the image of the alignment correction area and the alignment template image so as to determine an alignment result. According to the embodiment of the invention, by optimizing the image alignment template and the alignment strategy, the calculation amount is reduced, the calculation efficiency is improved, the overall matching efficiency and accuracy of the large-size image can be improved, and rapid alignment of the large-size image is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of wafer defect detection, and particularly to a wafer defect detection method, device and electronic device. Background Art

[0002] Defect detection of patterned wafers in semiconductors is an important link in semiconductor manufacturing, aiming to identify, locate and classify defects on the wafer to ensure product quality and yield.

[0003] In the prior art, the method for wafer defect detection usually adopts D2D (Die to Die), or Random Mode, that is, to determine whether there are defects on the wafer by detecting the image difference between the die to be detected and the reference die at the same position. In special cases, some patterns are periodic, and the prior art obtains the position of the defect by the difference between different adjacent periods (such as pitch) of the pattern itself, that is, C2C (Cell to Cell), or Array Mode. In addition, the prior art also obtains the position of the defect by comparing a single image with the design pattern (Graphic Data System, abbreviated as GDS) at that position, that is, the D2G (Die to General) method.

[0004] For the above-mentioned existing detection methods, precise image alignment operations need to be performed. Among them, image alignment refers to obtaining the deviation of the pattern positions between two images, and the image alignment operation needs to compare the reference die image and the die image to be measured. For example, align the test image in D2D with the reference die image selected from the test image, and align the test image in D2G with the reference die image formed according to the design pattern. The computational complexity of the image alignment operation is approximately the square of the search radius. Therefore, when the image size is large, the amount of calculation required for the alignment operation is very large, resulting in a reduction in detection calculation efficiency, a long alignment operation time and low efficiency. Summary of the Invention

[0005] The present invention provides a wafer defect detection method, device and electronic device to solve the problem that the existing large-size image alignment operation has a large amount of calculation, resulting in a relatively long alignment time and low efficiency, and can achieve rapid alignment of images in wafer defect detection.

[0006] According to one aspect of the present invention, a wafer defect detection method is provided, including: obtaining a reference die image and a die image to be measured; recommending an alignment area for the reference die image and obtaining an alignment template image of the alignment area; establishing a rough alignment region of interest based on the alignment area, and calibrating the alignment area of the die image to be measured according to the projection offset of the images of the reference die image and the die image to be measured in the rough alignment region of interest, so as to obtain an alignment correction area; cropping the die image to be measured based on the alignment correction area to obtain an image of the alignment correction area; and performing a fine alignment operation according to the image of the alignment correction area and the alignment template image to determine an alignment result.

[0007] Optionally, the establishing a rough alignment region of interest based on the alignment area, and calibrating the alignment area of the die image to be measured according to the projection offset of the images of the reference die image and the die image to be measured in the rough alignment region of interest, so as to obtain an alignment correction area includes: obtaining a first image of the reference die image in the rough alignment region of interest and a second image of the die image to be measured in the rough alignment region of interest; and calibrating the alignment area of the die image to be measured according to the projection peak offset between the first image and the second image.

[0008] Optionally, the calibrating the alignment area of the die image to be measured according to the projection peak offset between the first image and the second image includes: adjusting the position of the second image to make the projection peaks of the first image and the second image coincide or approximately coincide along a first direction, and obtaining a first offset of the second image along the first direction after the position adjustment; adjusting the position of the second image to make the projection peaks of the first image and the second image coincide or approximately coincide along a second direction, and obtaining a second offset of the second image along the second direction after the position adjustment; calibrating the alignment area of the die image to be measured along the first direction according to the first offset, and calibrating the alignment area of the die image to be measured along the second direction according to the second offset.

[0009] Optionally, the establishing a rough alignment region of interest based on the alignment area, and calibrating the alignment area of the die image to be measured according to the projection offset of the images of the reference die image and the die image to be measured in the rough alignment region of interest, so as to obtain an alignment correction area includes: expanding the alignment area to a region of a preset multiple along the central position of the wafer to obtain the rough alignment region of interest; where the preset multiple is greater than 1.

[0010] Optionally, recommending an alignment region for the reference grain image and obtaining an alignment template image of the alignment region includes: establishing a recommendation model, which is trained based on the correspondence between the reference grain image and the alignment region; performing training set augmentation on the reference grain image based on shape invariant moments; obtaining corner feature information of the reference grain image and performing corner feature normalization processing on the corner feature information to obtain corner feature normalized data; training the recommendation model based on the corner feature normalized data to obtain an optimal corner selection model; when the prediction accuracy of the optimal corner selection model reaches a preset accuracy threshold, determining at least one graphic region with the highest prediction accuracy value as the alignment region; and cropping the reference grain image based on the alignment region to obtain the alignment template image.

[0011] Optionally, performing an alignment operation on the image of the alignment correction region and the alignment template image to determine an alignment result includes: performing feature matching on the image of the alignment correction region and the alignment template image, determining an image transformation relationship according to the matching result, and calculating offset data between the image of the alignment correction region and the alignment template image according to the image transformation relationship.

[0012] Optionally, obtaining a reference grain image and a to-be-tested grain image includes: selecting an initial reference grain image and performing image feature enhancement processing on the initial reference grain image to obtain the reference grain image.

[0013] Optionally, the wafer defect detection method further includes: when the alignment accuracy of the alignment result is less than the product of the image pixel unit size and a preset ratio, outputting the alignment result; where the preset ratio is less than or equal to 0.1.

[0014] According to another aspect of the present invention, there is provided a wafer defect detection device, including: an image acquisition module for acquiring a reference grain image and a to-be-tested grain image; an alignment template acquisition module for recommending an alignment region for the reference grain image and obtaining an alignment template image of the alignment region; a correction module for establishing a rough alignment region of interest based on the alignment region and calibrating the alignment region of the to-be-tested grain image according to the projection offset amount of the images of the reference grain image and the to-be-tested grain image in the rough alignment region of interest to obtain an alignment correction region; an image processing module for cropping the to-be-tested grain image based on the alignment correction region to obtain an image of the alignment correction region; and an alignment calculation module for performing a fine alignment operation on the image of the alignment correction region and the alignment template image to determine an alignment result.

[0015] According to another aspect of the present invention, there is provided an electronic device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores a computer program executable by the at least one processor, and when the computer program is executed by the at least one processor, the at least one processor is enabled to execute the above-mentioned wafer defect detection method.

[0016] In the technical solution of the embodiment of the present invention, a reference grain image and a grain image to be measured are established; based on methods such as machine learning, an alignment area is automatically recommended for the reference grain image, and an alignment template image of the alignment area is obtained; a rough alignment attention area is established based on the alignment area, and the alignment area of the grain image to be measured is calibrated according to the projection offset of the images of the reference grain image and the grain image to be measured in the rough alignment attention area to obtain an alignment correction area; the grain image to be measured is cropped based on the alignment correction area to obtain an image of the alignment correction area; a fine alignment operation is performed according to the image of the alignment correction area and the alignment template image to determine the alignment result, which solves the problem that the existing large-size image alignment operation has a large amount of calculation, resulting in a long alignment time and low efficiency. By optimizing the image alignment template and alignment strategy, the amount of calculation is reduced, the calculation efficiency is improved, the overall matching efficiency and accuracy of the large-size image are improved, and the rapid alignment of the image in wafer defect detection is realized.

[0017] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0019] Figure 1 It is a flowchart of a wafer defect detection method provided by an embodiment of the present invention;

[0020] Figure 2 It is a schematic structural diagram of a wafer to be measured provided by an embodiment of the present invention;

[0021] Figure 3 It is a flowchart of a method for calibrating an alignment area of a grain image to be measured provided by an embodiment of the present invention;

[0022] Figure 4Flowchart of a rough alignment method based on image projection provided by an embodiment of the present invention;

[0023] Figure 5 Schematic diagram of a projection histogram of a region of interest image provided by an embodiment of the present invention;

[0024] Figure 6 Schematic diagram of the projection peak position of a region of interest image provided by an embodiment of the present invention;

[0025] Figure 7 Schematic diagrams of a region of interest image of a grain to be measured before and after projection peak alignment provided by an embodiment of the present invention;

[0026] Figure 8 Flowchart of a method for obtaining an alignment template provided by an embodiment of the present invention;

[0027] Figure 9 Flowchart of another wafer defect detection method provided by an embodiment of the present invention;

[0028] Figure 10 Schematic structural diagram of a wafer defect detection device provided by an embodiment of the present invention;

[0029] Figure 11 Schematic structural diagram of an electronic device for implementing the wafer defect detection method of an embodiment of the present invention. Detailed implementation manners

[0030] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order different from those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0032] Figure 1 The figure is a flowchart of a wafer defect detection method provided by an embodiment of the present invention. This embodiment is applicable to application scenarios of wafer defect detection using related devices such as computers, industrial cameras, and detection light sources, and is particularly applicable to wafer-level wafer detection applications. This method can be executed by a wafer defect detection device, which can be implemented in the form of hardware and / or software, and can be configured in a wafer detection system or an independent electronic device. In this application, a wafer is composed of multiple dies.

[0033] As Figure 1 shown, the wafer defect detection method of this application includes the following steps:

[0034] S1: Obtain a reference die image and a die image to be measured.

[0035] Among them, the reference die image can be understood as the image of one or more typical dies selected from the wafer, used as a standard image for calibration, detection, or comparison, usually a defect-free or nearly perfect die; the die image to be measured can be understood as the image of one or more dies selected from the wafer that need to perform defect detection or performance evaluation.

[0036] In some embodiments, obtaining the reference die image and the die image to be measured includes: selecting the die image to be measured from the images obtained by image acquisition of the wafer to be measured by an industrial camera or other optical detection devices; and selecting the reference die image from the images obtained by image acquisition of the wafer to be measured by an industrial camera or other optical detection devices, or forming the reference die image from the design pattern at the position where the die image to be measured is located.

[0037] Figure 2 The figure is a schematic structural diagram of a wafer to be measured provided by an embodiment of the present invention. In the Figure 2 shown embodiment, the circular area represents the wafer to be measured W, and the wafer to be measured W is composed of multiple dies (such as Die0 and Die1). Refer to Figure 2 shown, obtaining the reference die image and the die image to be measured further includes: selecting an initial reference die image R-Die from the center position of the image of the wafer to be measured, and performing image feature enhancement processing on the initial reference die image R-Die to obtain the reference die image. Specifically, the methods of image feature enhancement processing include but are not limited to: local histogram equalization, enhancing image features, and enhancing pattern contrast, making the features of the initial reference die image R-Die more obvious, which helps to improve the accuracy of the intelligent recommended alignment area and reduce the failure probability of the intelligent recommended alignment area for low-contrast images.

[0038] S2: Recommend an alignment area for the reference die image and obtain an alignment template image of the alignment area.

[0039] Among them, the alignment area can be understood as the area used to perform alignment comparison, and the size of this area is smaller than the image search size in the existing alignment process. The alignment template image can be understood as a local small image with a size smaller than that of a single grain obtained by cropping in the reference grain image based on the alignment area, and this alignment template image is used as the standard image for performing functional alignment in subsequent steps.

[0040] In some embodiments, a recommendation model can be trained using machine learning methods. This recommendation model can intelligently recommend an alignment area based on the reference grain image. Furthermore, an alignment template image is obtained by cropping in the reference grain image based on the alignment area.

[0041] S3: Establish a rough alignment region of interest based on the alignment area, and calibrate the alignment area of the image of the grain to be measured according to the projection offset of the reference grain image and the image of the grain to be measured in the rough alignment region of interest, so as to obtain an alignment correction region.

[0042] Among them, the rough alignment region of interest can be understood as the area used to crop the image. The size of the rough alignment region of interest in this application is related to the size of the alignment area, and in any direction, the size satisfies: 0 ≤ the size of the rough alignment region of interest - the size of the alignment area ≤ the maximum movement deviation of the stage in this direction, ensuring that all the images to be aligned can be cropped while not affecting the projection comparison time due to the overly large range of the region of interest. In this embodiment, the relative position of the rough alignment region of interest mapped to different grains (such as the reference grain or the grain to be measured) remains unchanged. During the detection process, the projection of the image cropped from the reference grain image using the rough alignment region of interest is used as the reference projection. If the stage moves unstably during the detection process, resulting in the image of the grain to be measured being offset, then the image cropped from the image of the grain to be measured using the rough alignment region of interest is offset relative to the rough alignment region of interest, and the projection of the image cropped from the image of the grain to be measured using the rough alignment region of interest is also offset relative to the reference projection. Accordingly, rough alignment can be performed on the rough alignment region of interest and the image cropped using the rough alignment region of interest to compensate for the image offset caused by the unstable movement of the stage.

[0043] Specifically, the alignment area is used to perform area expansion along the center position of the wafer to be measured (i.e., the center position of the reference die) to obtain the rough alignment area of interest. The rough alignment area of interest is used to crop the reference die image and the die image to be measured, and the images of the reference die and the die to be measured in the rough alignment area of interest are obtained respectively. For example, they can be denoted as the reference die area of interest image and the die to be measured area of interest image. The offsets of the die to be measured area of interest image in different directions (such as the horizontal direction and the vertical direction) are determined based on the projection peaks of the reference die area of interest image and the die to be measured area of interest image. The alignment area of the image to be detected is corrected based on the offsets of the die to be measured area of interest image in different directions to obtain the alignment correction area of the image to be detected.

[0044] S4: Crop the die image to be measured based on the alignment correction area to obtain the image of the alignment correction area.

[0045] Among them, the image of the alignment correction area can be understood as a local small image smaller than a single die obtained by cropping the die image to be measured based on the alignment correction area.

[0046] S5: Perform fine alignment operations on the image of the alignment correction area and the alignment template image to determine the alignment result.

[0047] Among them, the alignment result can be understood as the offset data between the image of the alignment correction area and the alignment template image. Typically, the offset data includes, but is not limited to: the offset amount Dx of the image in the horizontal direction, the offset amount Dy of the image in the vertical direction, and the tilt angle Rz between the images. Optionally, performing alignment operations on the image of the alignment correction area and the alignment template image to determine the alignment result includes: performing feature matching on the image of the alignment correction area and the alignment template image, and determining the image transformation relationship according to the matching result, and calculating the offset data between the image of the alignment correction area and the alignment template image according to the image transformation relationship.

[0048] Specifically, a feature point matching algorithm is used to perform feature matching on the image of the alignment correction area obtained by cropping based on the alignment correction area and the alignment template image. According to the matching result, the transformation relationship of the image is estimated, and the high-precision offset data between the two images, such as the offset Dx, the offset Dy, and the tilt angle Rz between the images, is quickly obtained. By intelligently recommending the alignment template image and establishing a rough alignment attention area, the alignment area of the image of the to-be-tested grain is corrected by using the projection offset of the reference image and the image of the to-be-tested grain in the rough alignment attention area. The fine alignment is realized by using the feature matching between the image of the corrected alignment correction area and the alignment template image, which can provide alignment stability, reduce the calculation amount, improve the calculation efficiency, solve the problem that the existing large-size image alignment operation has a large calculation amount, resulting in a long alignment time and low efficiency, improve the overall matching efficiency and accuracy of the large-size image, and realize the rapid alignment of the image in the wafer defect detection.

[0049] Figure 3 The flowchart of a method for calibrating the alignment area of the image of the to-be-tested grain provided by an embodiment of the present invention is shown. Refer to Figure 3 As shown, in the above step S3, a rough alignment attention area is established based on the alignment area, and the alignment area of the image of the to-be-tested grain is calibrated according to the projection offset of the reference grain image and the image of the to-be-tested grain in the rough alignment attention area to obtain an alignment correction area, including:

[0050] S301: Expand the alignment area along the center position of the wafer into an area of a preset multiple to obtain a rough alignment attention area. Wherein, the preset multiple is greater than 1.

[0051] Exemplarily, the preset multiple can be set to 2, that is, the recommended alignment area is used to expand the area 2 times along the center position of the wafer to obtain a rough alignment attention area.

[0052] Refer to Figure 3 As shown, in the above step S3, a rough alignment attention area is established based on the alignment area, and the alignment area of the image of the to-be-tested grain is calibrated according to the projection offset of the reference grain image and the image of the to-be-tested grain in the rough alignment attention area to obtain an alignment correction area, including:

[0053] S302: Obtain the first image of the reference grain image in the rough alignment attention area and the second image of the to-be-tested grain image in the rough alignment attention area.

[0054] S303: Calibrate the alignment area of the image of the to-be-tested grain according to the projection peak offset between the first image and the second image.

[0055] Specifically, by obtaining the projection peaks of the reference grain image and the image of the grain to be measured in the rough alignment region of interest (i.e., the region of interest image), the alignment region of the image of the grain to be measured is corrected using the offset of the projection peaks, so as to eliminate the problem that the misalignment between the region of interest and the region of interest image caused by the unstable movement of the workpiece stage affects the alignment accuracy.

[0056] Optionally, Figure 4 is a flowchart of a rough alignment method based on image projection provided by an embodiment of the present invention.

[0057] See Figure 4 As shown, in the above step S303, calibrating the alignment region of the image of the grain to be measured according to the projection peak offset between the first image and the second image includes:

[0058] S3031: Adjust the position of the second image so that the projection peaks of the first image and the second image coincide or approximately coincide along the first direction, and obtain the first offset of the second image along the first direction.

[0059] S3032: Adjust the position of the second image so that the projection peaks of the first image and the second image coincide or approximately coincide along the second direction, and obtain the second offset of the second image along the second direction.

[0060] S3033: Calibrate the alignment region of the image of the grain to be measured along the first direction according to the first offset, and calibrate the alignment region of the image of the grain to be measured along the second direction according to the second offset.

[0061] Figure 5 is a schematic diagram of the projection histogram of the region of interest image provided by an embodiment of the present invention;

[0062] Figure 6 is a schematic diagram of the projection peak position of the region of interest image provided by an embodiment of the present invention; Figure 7 is a schematic diagram of the image of the region of interest of the grain to be measured before and after projection peak alignment. In the Figures 5 to 7 shown embodiment, the specific implementation manner of performing rough alignment based on the projection in one direction (for example, the X direction) is shown. In the Figure 5 shown embodiment, Ⅰ represents the projection histogram of the first image (i.e., the region of interest image of the reference grain), and Ⅱ represents the projection histogram of the second image (i.e., the region of interest image of the grain to be measured); in the Figure 6 shown embodiment, F1 represents the projection peak position of the first image (i.e., the region of interest image of the reference grain), and F2 represents the projection peak position of the second image (i.e., the region of interest image of the grain to be measured).

[0063] See Figures 5 to 7As shown, define the first direction as the X direction, the second direction as the Y direction, the coarse alignment region of interest as A0. Use the coarse alignment region of interest A0 to crop the reference grain image to obtain the first image (i.e., the reference grain region of interest image, not shown in the figure), and use the coarse alignment region of interest A0 to crop the image of the grain to be measured to obtain the second image A2 (i.e., the region of interest image of the grain to be measured). As Figure 5 and Figure 6 shown, along the first direction (i.e., the X direction), use the first image and the second image to perform projections respectively to obtain the projection histogram as Figure 5 shown. Adjust the position of the second image to make the projection peaks of the first image and the second image along the first direction coincide or approximately coincide (see the coincidence of F1 and F2 as shown in Figure 6 ), and obtain the first offset dx of the second image along the first direction. See Figure 7 shown. After the projection peaks of the first image and the second image along the first direction coincide or approximately coincide, in the first direction, the coarse alignment region of interest A0 and the second image A2 achieve coarse alignment. See Figure 5 shown. The first offset dx is approximately equal to 7 pixel units (pixels). Similarly, in the second direction (i.e., the Y direction), perform coarse alignment using the same method to obtain the second offset dy of the second image along the second direction. Further, based on the first offset dx in the first direction (i.e., the X direction) and the second offset dy in the second direction (i.e., the Y direction), correct the alignment region of the image to be detected to obtain the alignment correction region of the image to be detected. By establishing a region of interest and using the projection of the region of interest image for coarse alignment to eliminate the alignment offset problem between the region of interest and the region of interest image caused by the movement of the workpiece, the stability of alignment can be improved, and the problem of making wrong processing decisions due to poor alignment can be avoided, especially applicable to low-contrast images or images that are difficult to align.

[0064] Figure 8 is a flowchart of a method for obtaining an alignment template provided by an embodiment of the present invention. See Figure 8 shown. In step S2 above, recommend an alignment region for the reference grain image and obtain the alignment template image of the alignment region, including:

[0065] S201: Establish a recommendation model.

[0066] Among them, the recommendation model is trained based on the correspondence between the reference grain image and the alignment region.

[0067] S202: Expand the training set of the reference grain image based on the invariant moments of shape.

[0068] Specifically, based on the shape invariant moment method, the corner detection method can extract multiple invariant moment features. These multiple invariant moments have the characteristics of being invariant to image translation, scaling, and rotation. Thus, methods such as rotation and translation can be used to expand the training set of the reference grain image.

[0069] S203: Obtain the corner feature information of the reference grain image, and perform corner feature normalization processing on the corner feature information to obtain corner feature normalized data.

[0070] Specifically, by combining corner detection methods such as Harris, CSS, Shi-Tomasi, FAST, SIFT, SURF, ORB, GoG, Hessian matrix, and MSER, obtain the corner feature information of the image, merge the shape invariant moments to form a feature vector representing the content of the exposure image, and normalize the corner features to obtain stable training data, which is convenient for subsequent training to accelerate the convergence of gradient descent and avoid the dimensional difference between features, and is beneficial to improving the performance of the training model.

[0071] S204: Train the recommendation model based on the corner feature normalized data to obtain the optimal corner selection model.

[0072] Specifically, when training the recommendation model, use the image data as the model input parameter and the alignment area as the model output parameter.

[0073] S205: Determine whether the prediction accuracy rate of the optimal corner selection model reaches the preset accuracy threshold.

[0074] Among them, the prediction accuracy rate of the optimal corner selection model represents the prediction accuracy of the graphic sample result. In this embodiment, the prediction accuracy rate can be calculated from the feature coincidence rate between the prediction result (predicted image) of the optimal corner selection model and the actual graphic sample.

[0075] If the prediction accuracy rate of the optimal corner selection model reaches the preset accuracy threshold, execute step S206; if the prediction accuracy rate of the optimal corner selection model reaches the preset accuracy threshold, return to execute step S202, expand the data set again, re-extract the corner features and train.

[0076] S206: Determine at least one graphic area with the highest prediction accuracy rate value as the alignment area.

[0077] Specifically, there may be multiple alignment areas specified by the user in the prediction result (predicted image) of the optimal corner selection model. Select at least one graphic (preferably two) with the highest prediction accuracy rate value as the reference area, and there is only one such reference area in the overall image.

[0078] S207: Crop the reference grain image based on the alignment area to obtain the alignment template image.

[0079] Specifically, the alignment area is intelligently recommended through a self-learning method. Furthermore, the reference area is intercepted in the reference grain image and saved as the alignment template image. By establishing and training a recommendation model, the template is intelligently selected to improve the overall matching efficiency and accuracy of large-size images.

[0080] Figure 9 The flowchart of another wafer defect detection method provided by the embodiment of the present invention is shown in Figure 9 As shown, the wafer defect detection method of the present application includes:

[0081] S701: Obtain the reference grain image and the grain image to be measured.

[0082] S702: Recommend the alignment area for the reference grain image and obtain the alignment template image of the alignment area.

[0083] S703: Establish a rough alignment region of interest based on the alignment area, and calibrate the alignment area of the grain image to be measured according to the projection offset of the images of the reference grain image and the grain image to be measured in the rough alignment region of interest to obtain the alignment correction area.

[0084] S704: Crop the grain image to be measured based on the alignment correction area to obtain the image of the alignment correction area.

[0085] S705: Perform a fine alignment operation according to the image of the alignment correction area and the alignment template image to determine the alignment result.

[0086] S706: When the alignment accuracy of the alignment result is less than the product of the image pixel unit size and the preset ratio, output the alignment result. Wherein, the preset ratio is less than or equal to 0.1.

[0087] Specifically, after the wafer to be measured is placed in the device, an industrial camera or other optical detection equipment is used to collect images of the wafer to be measured, and the images of the die to be measured and the reference die are selected and optimized. A machine learning method is used to recommend the alignment area, and the alignment template image of the reference die image in the alignment area is obtained. The alignment area is expanded into a rough alignment attention area along the central position of the wafer to be measured, and the alignment area of the die image to be measured is calibrated using the projection offset of the reference die image and the die image to be measured in the attention area image of the rough alignment attention area to obtain the alignment correction area. Further, the image of the die to be measured in the alignment correction area (i.e., the local small image within a single die) is obtained, and fine alignment is achieved using the image of the alignment correction area, which can improve the alignment accuracy to less than one-tenth of the pixel unit size. If the alignment accuracy of the alignment result is greater than the product of the image pixel unit size and the preset ratio, an error warning is issued to remind the tester to optimize the recommendation model. By monitoring the detection accuracy and promptly detecting abnormal strategies, the stability of defect detection can be improved.

[0088] Based on the same inventive concept as the above embodiments, an embodiment of the present invention further provides a wafer defect detection device, which can execute the wafer defect detection method provided in any of the above embodiments, and has corresponding functional modules and beneficial effects for executing the method.

[0089] Figure 10 FIG. is a schematic structural diagram of a wafer defect detection device provided by an embodiment of the present invention. Refer to Figure 10 As shown, the wafer defect detection device of the present application includes: an image acquisition module 101, an alignment template acquisition module 102, a calibration module 103, an image processing module 104, and an alignment calculation module 105.

[0090] Among them, the image acquisition module 101 is used to acquire the reference die image and the die image to be measured; the alignment template acquisition module 102 is used to recommend the alignment area for the reference die image and acquire the alignment template image of the alignment area; the calibration module 103 is used to establish a rough alignment attention area based on the alignment area and calibrate the alignment area of the die image to be measured according to the projection offset of the reference die image and the die image to be measured in the image of the rough alignment attention area to obtain the alignment correction area; the image processing module 104 is used to crop the die image to be measured based on the alignment correction area to obtain the image of the alignment correction area; the alignment calculation module 105 is used to perform a fine alignment operation according to the image of the alignment correction area and the alignment template image to determine the alignment result.

[0091] Optionally, the calibration module 103 is configured to: acquire the first image of the reference die image in the rough alignment attention area and the second image of the die image to be measured in the rough alignment attention area; and calibrate the alignment area of the die image to be measured according to the projection peak offset between the first image and the second image.

[0092] Optionally, the calibration module 103 is further configured to: adjust the position of the second image so that the projection peaks of the first image and the second image coincide or approximately coincide along the first direction, and obtain a first offset of the second image along the first direction; adjust the position of the second image so that the projection peaks of the first image and the second image coincide or approximately coincide along the second direction, and obtain a second offset of the second image along the second direction; calibrate the alignment area of the image of the grain to be measured along the first direction according to the first offset, and calibrate the alignment area of the image of the grain to be measured along the second direction according to the second offset.

[0093] Optionally, the calibration module 103 is further configured to: expand the alignment area to an area of a preset multiple along the center position of the wafer to obtain a rough alignment attention area; wherein, the preset multiple is greater than 1.

[0094] Optionally, the alignment template acquisition module 102 is configured to: establish a recommendation model, where the recommendation model is trained based on the correspondence between the reference grain image and the alignment area; expand the training set of the reference grain image based on the shape invariant moment; obtain the corner feature information of the reference grain image, and perform corner feature normalization processing on the corner feature information to obtain corner feature normalized data; train the recommendation model based on the corner feature normalized data to obtain an optimal corner selection model; when the prediction accuracy of the optimal corner selection model reaches a preset accuracy threshold, determine at least one graphic area with the highest prediction accuracy value as the alignment area; crop the reference grain image based on the alignment area to obtain an alignment template image.

[0095] Optionally, the alignment calculation module 105 is configured to: perform feature matching on the image of the alignment correction area and the alignment template image, determine the image transformation relationship according to the matching result, and calculate the offset data between the image of the alignment correction area and the alignment template image according to the image transformation relationship.

[0096] Optionally, the image acquisition module 101 is configured to: select an initial reference grain image, and perform image feature enhancement processing on the initial reference grain image to obtain a reference grain image.

[0097] Optionally, the wafer defect detection device of the present application is further configured to: output the alignment result when the alignment accuracy of the alignment result is less than the product of the image pixel unit size and a preset ratio; wherein, the preset ratio is less than or equal to 0.1.

[0098] Based on the above embodiments, an embodiment of the present invention further provides an electronic device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the wafer defect detection method provided in any of the above embodiments.

[0099] Figure 11 FIG. is a schematic structural diagram of an electronic device for implementing the wafer defect detection method according to an embodiment of the present invention. The electronic device is intended to represent various forms of digital computers, such as, for example, laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as, for example, personal digital processors, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0100] As Figure 11 shown, the electronic device 10 includes at least one processor 11, and a memory communicatively connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc. The memory stores a computer program executable by the at least one processor. The processor 11 can execute various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. The input / output (I / O) interface 15 is also connected to the bus 14.

[0101] Multiple components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0102] The processor 11 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the wafer defect detection method described above.

[0103] In some embodiments, the above-described wafer defect detection method can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the wafer defect detection method described above can be executed. Alternatively, in other embodiments, the processor 11 can be configured to execute the above-described wafer defect detection method by any other suitable means (e.g., by means of firmware).

[0104] The various embodiments of the systems and techniques described above can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-chip (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs, which can be executed and / or interpreted on a programmable system including at least one programmable processor, the programmable processor can be a dedicated or general-purpose programmable processor, can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0105] The computer program for implementing the method of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to the processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer program is executed by the processor, the functions / operations specified in the flowchart and / or block diagram are implemented. The computer program can be executed entirely on the machine, partially on the machine, as an independent software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0106] In the context of the present invention, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer-readable storage medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. Alternatively, the computer-readable storage medium can be a machine-readable signal medium. More specific examples of the machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0107] In order to provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, speech input, or tactile input).

[0108] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local area network (LAN), wide area network (WAN), blockchain network, and the Internet.

[0109] A computing system may include a client and a server. The client and the server are generally far from each other and usually interact via a communication network. The client-server relationship is created by computer programs running on respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or a cloud host, which is a host product in the cloud computing service system, and solves the defects of difficult management and weak business scalability existing in traditional physical hosts and VPS services.

[0110] It should be understood that various forms of processes shown above can be used, steps can be reordered, added or deleted. For example, the steps described in the present invention can be executed in parallel, sequentially or in a different order, as long as the desired results of the technical solution of the present invention can be achieved, and no limitation is made herein.

[0111] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A wafer defect detection method, characterized in that, Including: Obtaining a reference grain image and a grain image to be measured; Recommending an alignment area for the reference grain image and obtaining an alignment template image of the alignment area; Establishing a rough alignment region of interest based on the alignment area, and calibrating the alignment area of the grain image to be measured according to the projection offset of the reference grain image and the grain image to be measured in the image of the rough alignment region of interest, so as to obtain an alignment correction area; Cropping the grain image to be measured based on the alignment correction area to obtain an image of the alignment correction area; Performing a fine alignment operation according to the image of the alignment correction area and the alignment template image to determine an alignment result.

2. The wafer defect detection method according to claim 1, wherein, The establishing a rough alignment region of interest based on the alignment area, and calibrating the alignment area of the grain image to be measured according to the projection offset of the reference grain image and the grain image to be measured in the image of the rough alignment region of interest, so as to obtain an alignment correction area includes: Obtaining a first image of the reference grain image in the rough alignment region of interest and a second image of the grain image to be measured in the rough alignment region of interest; Calibrating the alignment area of the grain image to be measured according to the projection peak offset between the first image and the second image.

3. The wafer defect detection method according to claim 2, wherein The calibrating the alignment area of the grain image to be measured according to the projection peak offset between the first image and the second image includes: Adjusting the position of the second image to make the projection peaks of the first image and the second image coincide or approximately coincide in a first direction, and obtaining a first offset of the second image in the first direction; Adjusting the position of the second image to make the projection peaks of the first image and the second image coincide or approximately coincide in a second direction, and obtaining a second offset of the second image in the second direction; Calibrating the alignment area of the grain image to be measured in the first direction according to the first offset, and calibrating the alignment area of the grain image to be measured in the second direction according to the second offset.

4. The wafer defect detection method according to claim 1, wherein The establishing a rough alignment region of interest based on the alignment area, and calibrating the alignment area of the grain image to be measured according to the projection offset of the reference grain image and the grain image to be measured in the image of the rough alignment region of interest, so as to obtain an alignment correction area includes: Expanding the alignment area to an area of a preset multiple along the central position of the wafer to obtain the rough alignment region of interest; Wherein, the preset multiple is greater than 1.

5. The wafer defect detection method according to claim 1, wherein The recommending an alignment area for the reference grain image and obtaining an alignment template image of the alignment area includes: Establishing a recommendation model, which is trained based on the correspondence between the reference grain image and the alignment area; Expanding the training set of the reference grain image based on shape invariant moments; Obtaining corner feature information of the reference grain image, and performing corner feature normalization processing on the corner feature information to obtain corner feature normalized data; Training the recommendation model based on the corner feature normalized data to obtain an optimal corner selection model; When the prediction accuracy rate of the optimal corner point selection model reaches a preset accuracy threshold, determine at least one graphic area with the highest prediction accuracy rate value as the alignment area; Crop the reference grain image based on the alignment area to obtain the alignment template image.

6. The wafer defect detection method according to claim 1, wherein The performing an alignment operation on the image of the alignment correction area and the alignment template image to determine an alignment result includes: Performing feature matching on the image of the alignment correction area and the alignment template image, determining an image transformation relationship according to the matching result, and calculating offset data of the image of the alignment correction area and the alignment template image according to the image transformation relationship.

7. The wafer defect detection method according to claim 1, wherein The obtaining a reference grain image and a to-be-detected grain image includes: Selecting an initial reference grain image and performing image feature enhancement processing on the initial reference grain image to obtain the reference grain image.

8. The wafer defect detection method according to any one of claims 1-7, characterized in that, It further includes: When the alignment accuracy of the alignment result is less than the product of the image pixel unit size and a preset ratio, output the alignment result; Wherein, the preset ratio is less than or equal to 0.

1.

9. A wafer defect detection device, characterized in that, It includes: An image acquisition module, configured to acquire a reference grain image and a to-be-detected grain image; An alignment template acquisition module, configured to recommend an alignment area for the reference grain image and acquire an alignment template image of the alignment area; A correction module, configured to establish a rough alignment attention area based on the alignment area, and calibrate the alignment area of the to-be-detected grain image according to the projection offset amount of the images of the reference grain image and the to-be-detected grain image in the rough alignment attention area to obtain an alignment correction area; An image processing module, configured to crop the to-be-detected grain image based on the alignment correction area to obtain an image of the alignment correction area; An alignment calculation module, configured to perform a fine alignment operation on the image of the alignment correction area and the alignment template image to determine an alignment result.

10. An electronic device, characterized in that, The electronic device includes: At least one processor; and, A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the wafer defect detection method according to any one of claims 1-8.

Images