A real-time calculation device for radio frequency environment based on FPGA
Through the FPGA-based real-time calculation method and device of the RF environment, the problems of high cost and insufficient scenario adaptability of wireless channel simulation devices are solved, and low-cost and efficient channel simulation is achieved to adapt to complex and changing project requirements.
Patent Information
- Application Number
- CN202510610924.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-13
- Publication Date
- 2025-09-30
- Estimated Expiration
- 2045-05-13
AI Technical Summary
Existing wireless channel environment simulation devices are expensive and lack scene adaptability, making it difficult to meet the complex and changing needs of real projects.
An FPGA-based real-time RF environment calculation method and device are used to obtain channel characteristic information and signal sampling time values, perform delay calculation processing, construct a multipath delay value set, and use integer and fractional delay filters and amplitude response filters for signal processing to achieve simulation of RF environment signals.
It reduces the cost of using the device and has flexible scenario adaptability. It can perform flexible channel simulation according to specific project requirements, reducing the complexity of the test and improving the accuracy of the simulation.
Smart Images
Figure CN120389822B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of signal processing, and in particular relates to a FPGA-based real-time calculation device for radio frequency environments. Background Art
[0002] In fields like wireless communications, field testing—the evaluation of the performance of the developed equipment—is a crucial component of system development. Traditional testing requires setting up these real-world test environments, which is often complex, costly, and inefficient, especially in scenarios involving long transmission distances, node motion, and a large number of accompanying test equipment. To reduce testing complexity, wireless channel environment simulators are currently used to simulate the field test environment and evaluate the equipment under test. This involves using a real-time RF environment computation device to perform hardware-in-the-loop simulation. This involves digitizing the actual RF signal from the equipment under test, performing real-time computations in the digital domain, and then converting it into an RF signal that is then transmitted to the equipment under test. This testing method maintains the authenticity and reliability of the test by utilizing the actual RF signal from the equipment under test. It also significantly reduces testing complexity, as the equipment can be connected using cables in the laboratory, eliminating the complex process of establishing test conditions such as physical distance and movement speed in the field. In addition to significantly reducing the complexity of setting up a field test environment, using a wireless channel environment simulator also offers excellent repeatability: it can recreate the same test channel conditions with high consistency. This is difficult to achieve in field tests, as the open nature of wireless channels often varies in practice.
[0003] Currently, commercial wireless channel environment simulation devices can meet certain test environment construction requirements, but they have many shortcomings:
[0004] 1. Expensive. There are many factors that contribute to the high cost of commercial wireless channel environment simulators. One of them is that, in order to ensure a certain degree of universality, commercial wireless channel environment simulators usually have high indicators, such as wide frequency band coverage. However, these indicators may not be required in specific project requirements.
[0005] 2. Insufficient scenario adaptability. To ensure universal applicability, commercial wireless channel environment simulators are usually adapted to the most typical scenarios. However, in real-world project requirements, wireless channel scenarios are often complex and varied. In some scenarios, commercial wireless channel environment simulators may not meet the requirements or may be very expensive.
[0006] In view of the above reasons, the present invention proposes a real-time calculation device for radio frequency environment based on FPGA, which has the characteristics of being reconfigurable and can flexibly determine the balance between the consumption of FPGA resources and the realization of model performance as needed. Summary of the Invention
[0007] The present invention mainly solves the problem of how to accurately simulate wireless channels at low cost and in multiple types, and discloses a real-time calculation method and device for radio frequency environment based on FPGA.
[0008] In a first aspect of an embodiment of the present invention, a method for real-time calculation of a radio frequency environment based on an FPGA is disclosed, comprising:
[0009] S1, obtaining a channel characteristic information set and a signal sampling time value; the channel characteristic information set includes a channel multipath information set; the channel multipath information set includes each multipath channel path length and a corresponding channel response sequence;
[0010] S2, performing delay calculation processing on the channel characteristic information set and the signal sampling time value to obtain a multipath delay value set;
[0011] S3, based on the multipath delay value set and the channel characteristic information set, calculating and processing the collected original signal to obtain a radio frequency environment signal.
[0012] The performing delay calculation processing on the channel characteristic information set and the signal sampling time value to obtain a multipath delay value set includes:
[0013] S21, dividing each multipath channel path length in the channel characteristic information set by the speed of light to obtain a corresponding multipath delay;
[0014] S22, dividing the multipath delay corresponding to each multipath channel path length by the signal sampling time value to obtain a corresponding division result; determining the integer part of the division result as the integer delay corresponding to the multipath channel path length; and determining the decimal part of the division result as the decimal delay corresponding to the multipath channel path length;
[0015] S23, constructing a multipath delay value set using the integer delays and fractional delays corresponding to all multipath channel path lengths; the multipath delay value set includes the integer delay and fractional delay corresponding to each multipath channel path length.
[0016] The calculating and processing the collected original signal based on the multipath delay value set and the channel characteristic information set to obtain the radio frequency environment signal includes:
[0017] S31, constructing an integer delay filter for obtaining the multipath channel path length using the integer delay corresponding to each multipath channel path length in the multipath delay value set;
[0018] S32, constructing a fractional delay filter for obtaining the multipath channel path length using the fractional delay corresponding to each multipath channel path length in the multipath delay value set;
[0019] S33, constructing an amplitude response filter for each multipath channel path length using a channel response sequence corresponding to each multipath channel path length in the channel characteristic information set;
[0020] S34, connecting the integer delay filter, the fractional delay filter, and the amplitude response filter of each multipath channel path length in series to obtain a multipath channel simulator corresponding to the multipath channel path length;
[0021] S35, using a multipath channel simulator corresponding to each multipath channel path length, respectively processing the collected original signal to obtain a corresponding output signal;
[0022] S36 , adding the output signals corresponding to all multipath channel path lengths to obtain a radio frequency environment signal.
[0023] The constructing an integer delay filter for obtaining the multipath channel path length by using the integer delay corresponding to each multipath channel path length in the multipath delay value set includes:
[0024] Determine an integer delay corresponding to each multipath channel path length in the multipath delay value set, which is the difference between a read address and a write address of a RAM memory; configure an operating mode of the RAM memory to circular addressing, and determine the RAM memory to be an integer delay filter for the multipath channel path length.
[0025] The method of constructing a fractional delay filter for obtaining the multipath channel path length by utilizing the fractional delay corresponding to each multipath channel path length in the multipath delay value set includes:
[0026] S321, obtaining a fractional delay corresponding to each multipath channel path length in the multipath delay value set;
[0027] S322, determining a fractional index value closest to the fractional delay value in a preset fractional delay filter coefficient lookup table; the fractional delay filter coefficient lookup table includes a plurality of fractional index values and corresponding fractional delay filter coefficient vectors;
[0028] S323: construct a fractional delay filter that obtains the multipath channel path length by using the coefficient vector of the fractional delay filter corresponding to the decimal index value in the fractional delay filter coefficient lookup table.
[0029] The method of constructing a fractional delay filter for obtaining the multipath channel path length by utilizing the fractional delay corresponding to each multipath channel path length in the multipath delay value set includes:
[0030] S321, obtaining a fractional delay corresponding to each multipath channel path length in the multipath delay value set;
[0031] S322, determining N fractional index values closest to the fractional delay value in a preset fractional delay filter coefficient lookup table;
[0032] S323: Based on the N closest decimal index values, obtain the corresponding fractional delay filter coefficient vectors in the fractional delay filter coefficient lookup table;
[0033] S324, performing fusion calculation processing on the obtained N coefficient vectors to obtain a fractional filter vector;
[0034] S325 , using the fractional filter vector as a coefficient vector of a fractional delay filter to construct a fractional delay filter that obtains the multipath channel path length.
[0035] The expression of the fusion calculation process is:
[0036]
[0037] Among them, x0 is the fractional delay corresponding to the multipath channel path length, x i is the ith decimal index value of the N nearest decimal index values, ε ij is the jth item of the coefficient vector of the fractional delay filter corresponding to the i-th fractional index value in the fractional delay filter coefficient lookup table, υ j is the jth item of the fractional filter vector.
[0038] In a second aspect of an embodiment of the present invention, a device for real-time calculation of radio frequency environment based on FPGA is disclosed, the device comprising:
[0039] a memory storing executable program code;
[0040] a processor coupled to the memory;
[0041] The processor calls the executable program code stored in the memory to execute the FPGA-based real-time calculation method for the radio frequency environment.
[0042] In a third aspect of an embodiment of the present invention, a computer-storable medium is disclosed, wherein the computer-storable medium stores computer instructions. When the computer instructions are called by a computer, they are used to execute the FPGA-based real-time calculation method of the radio frequency environment.
[0043] A fourth aspect of the embodiments of the present invention discloses an information data processing terminal, which is used to implement the FPGA-based real-time calculation method of the radio frequency environment.
[0044] The beneficial effects of the present invention are:
[0045] The present invention proposes a reconfigurable RF environment real-time calculation device based on FPGA. The advantages and positive effects of the present invention are as follows: compared with the existing technology, the present invention fully utilizes the reconfigurable characteristics of FPGA and the characteristics of storage resource block in FPGA, and has both integration and reconfiguration to realize the tapped delay line structure. Compared with commercial wireless channel environment simulation devices, the use cost is greatly reduced, and at the same time, it can flexibly provide scenario adaptability for specific projects. BRIEF DESCRIPTION OF THE DRAWINGS
[0046] Figure 1 Flow chart for the implementation of the method of the present invention;
[0047] Figure 2 This is a schematic diagram of a typical wireless channel environment simulation device constructed based on the method of the present invention;
[0048] Figure 3 It is a schematic diagram of a continuous fractional delay filter based on a lookup table and an interpolator of the present invention. DETAILED DESCRIPTION
[0049] In order to better understand the content of the present invention, an embodiment is given here.
[0050] Figure 1 Flow chart for the implementation of the method of the present invention; Figure 2 This is a schematic diagram of a typical wireless channel environment simulation device constructed based on the method of the present invention; Figure 3 It is a schematic diagram of a continuous fractional delay filter based on a lookup table and an interpolator of the present invention.
[0051] In a first aspect of an embodiment of the present invention, a method for real-time calculation of a radio frequency environment based on an FPGA is disclosed, comprising:
[0052] S1, obtaining a channel characteristic information set and a signal sampling time value; the channel characteristic information set includes a channel multipath information set; the channel multipath information set includes each multipath channel path length and a corresponding channel response sequence;
[0053] S2, performing delay calculation processing on the channel characteristic information set and the signal sampling time value to obtain a multipath delay value set;
[0054] S3, based on the multipath delay value set and the channel characteristic information set, calculating and processing the collected original signal to obtain a radio frequency environment signal.
[0055] The radio frequency environment signal is used to represent the signal of the original signal after passing through the channel;
[0056] The performing delay calculation processing on the channel characteristic information set and the signal sampling time value to obtain a multipath delay value set includes:
[0057] S21, dividing each multipath channel path length in the channel characteristic information set by the speed of light to obtain a corresponding multipath delay;
[0058] S22, dividing the multipath delay corresponding to each multipath channel path length by the signal sampling time value to obtain a corresponding division result; determining the integer part of the division result as the integer delay corresponding to the multipath channel path length; and determining the decimal part of the division result as the decimal delay corresponding to the multipath channel path length;
[0059] S23, constructing a multipath delay value set using the integer delays and fractional delays corresponding to all multipath channel path lengths; the multipath delay value set includes the integer delay and fractional delay corresponding to each multipath channel path length.
[0060] The calculating and processing the collected original signal based on the multipath delay value set and the channel characteristic information set to obtain the radio frequency environment signal includes:
[0061] S31, constructing an integer delay filter for obtaining the multipath channel path length using the integer delay corresponding to each multipath channel path length in the multipath delay value set;
[0062] S32, constructing a fractional delay filter for obtaining the multipath channel path length using the fractional delay corresponding to each multipath channel path length in the multipath delay value set;
[0063] S33, constructing an amplitude response filter for each multipath channel path length using a channel response sequence corresponding to each multipath channel path length in the channel characteristic information set;
[0064] S34, connecting the integer delay filter, the fractional delay filter, and the amplitude response filter of each multipath channel path length in series to obtain a multipath channel simulator corresponding to the multipath channel path length;
[0065] S35, using a multipath channel simulator corresponding to each multipath channel path length, respectively processing the collected original signal to obtain a corresponding output signal;
[0066] S36 , adding the output signals corresponding to all multipath channel path lengths to obtain a radio frequency environment signal.
[0067] The constructing an integer delay filter for obtaining the multipath channel path length by using the integer delay corresponding to each multipath channel path length in the multipath delay value set includes:
[0068] Determine an integer delay corresponding to each multipath channel path length in the multipath delay value set, which is the difference between a read address and a write address of a RAM memory; configure an operating mode of the RAM memory to circular addressing, and determine the RAM memory to be an integer delay filter for the multipath channel path length.
[0069] The method of constructing a fractional delay filter for obtaining the multipath channel path length by utilizing the fractional delay corresponding to each multipath channel path length in the multipath delay value set includes:
[0070] S321, obtaining a fractional delay corresponding to each multipath channel path length in the multipath delay value set;
[0071] S322, determining a fractional index value closest to the fractional delay value in a preset fractional delay filter coefficient lookup table; the fractional delay filter coefficient lookup table includes a plurality of fractional index values and corresponding fractional delay filter coefficient vectors;
[0072] S323: construct a fractional delay filter that obtains the multipath channel path length by using the coefficient vector of the fractional delay filter corresponding to the decimal index value in the fractional delay filter coefficient lookup table.
[0073] The method of constructing a fractional delay filter for obtaining the multipath channel path length by utilizing the fractional delay corresponding to each multipath channel path length in the multipath delay value set includes:
[0074] S321, obtaining a fractional delay corresponding to each multipath channel path length in the multipath delay value set;
[0075] S322, determining N fractional index values closest to the fractional delay value in a preset fractional delay filter coefficient lookup table;
[0076] S323: Based on the N closest decimal index values, obtain the corresponding fractional delay filter coefficient vectors in the fractional delay filter coefficient lookup table;
[0077] S324, performing fusion calculation processing on the obtained N coefficient vectors to obtain a fractional filter vector;
[0078] S325 , using the fractional filter vector as a coefficient vector of a fractional delay filter to construct a fractional delay filter that obtains the multipath channel path length.
[0079] The expression of the fusion calculation process is:
[0080]
[0081] Among them, x0 is the fractional delay corresponding to the multipath channel path length, x i is the ith decimal index value of the N nearest decimal index values, ε ij is the jth item of the coefficient vector of the fractional delay filter corresponding to the i-th fractional index value in the fractional delay filter coefficient lookup table, v j is the jth item of the fractional filter vector.
[0082] The fractional delay filter may be a fractional delay filter.
[0083] The fusing calculation process of the obtained N coefficient vectors to obtain a fractional filter vector includes:
[0084] Using the obtained N coefficient vectors, a coefficient matrix is constructed;
[0085] Performing singular value calculation on the coefficient matrix to obtain singular values and singular vectors;
[0086] Calculating the rank value and trace value of the coefficient matrix;
[0087] Performing fractional filter vector calculation on the coefficient matrix and the N fractional index values to obtain a fractional filter vector;
[0088] The expression for calculating the fractional filter vector is:
[0089]
[0090] Among them, θ1 and θ2 are the preset first weight value and second weight value, z is the rank value, p is the trace value, λ0 is the average value of all singular values, x i is the ith decimal index value of the N nearest decimal index values, xs ij is the element in the i-th row and j-th column of the coefficient matrix, λ i is the i-th singular value of the coefficient matrix, qs ij is the jth element of the i-th singular vector of the coefficient matrix.
[0091] The integer delay filter, fractional delay filter and amplitude response filter are connected in series, and the input of the integer delay filter is used as the input of the multipath channel simulator, the output of the amplitude response filter is used as the output of the multipath channel simulator, the output of the integer delay filter is used as the input of the fractional delay filter, and the output of the fractional delay filter is used as the input of the amplitude response filter.
[0092] The constructing an amplitude response filter for obtaining the multipath channel path length by utilizing a channel response sequence corresponding to each multipath channel path length in the channel characteristic information set includes:
[0093] The channel response sequence corresponding to each multipath channel path length in the channel characteristic information set is used as the coefficient of the FIR filter to construct an FIR filter, and the FIR filter is used as the amplitude response filter of the multipath channel path length.
[0094] The method of the present invention can be implemented by using an FPGA development board.
[0095] In summary, the advantages and positive effects of the present invention are as follows: compared with the existing technology, the present invention fully utilizes the reconfigurable characteristics of FPGA and the characteristics of storage resource blocking in FPGA, and has both integration and reconfiguration to realize the tapped delay line structure. Compared with commercial wireless channel environment simulation devices, the cost of use is greatly reduced, and at the same time, it can flexibly provide scenario adaptability for specific projects.
[0096] In a second aspect of an embodiment of the present invention, a device for real-time calculation of radio frequency environment based on FPGA is disclosed, the device comprising:
[0097] a memory storing executable program code;
[0098] a processor coupled to the memory;
[0099] The processor calls the executable program code stored in the memory to execute the FPGA-based real-time calculation method for the radio frequency environment.
[0100] In a third aspect of an embodiment of the present invention, a computer-storable medium is disclosed, wherein the computer-storable medium stores computer instructions. When the computer instructions are called by a computer, they are used to execute the FPGA-based real-time calculation method of the radio frequency environment.
[0101] A fourth aspect of the embodiments of the present invention discloses an information data processing terminal, which is used to implement the FPGA-based real-time calculation method of the radio frequency environment.
[0102] In a fifth aspect of an embodiment of the present invention, a device for real-time calculation of radio frequency environment based on FPGA is disclosed, the device comprising the following processing steps:
[0103] S1. The input signal is formed into a tapped delay line structure using FIFO, and the delay coefficient is updated at the signal sampling rate to realize the integer delay part of the continuous delay change of the path to form the original input signal of the multipath;
[0104] S2. Apply a fractional delay filter to each multipath, update the delay coefficient at the signal sampling rate, implement the fractional delay part of the continuous path delay change, and complete the simulation of the continuous path delay change;
[0105] S3. For the fractional delay filter, a method combining a lookup table and coefficient interpolation is used to implement continuous fractional delay simulation;
[0106] S4. Use a multi-tap FIR filter to simulate channel characteristics, such as path fading, reflector scattering characteristics, etc.
[0107] The present invention's FPGA-based real-time RF environment calculation device can be flexibly tailored to meet the needs of different scenarios, leveraging the FPGA's reconfigurable nature to achieve the desired channel simulation effect. It can simulate time-varying channels, including large-scale fading, small-scale fading, the Doppler effect, time-selective fading, multipath effects, and frequency-domain selective fading.
[0108] During implementation, the propagation path distance generated in real time is converted into delay, and decomposed into integer delay part and fractional delay part according to the sampling rate, which are respectively configured as the read and write address of the integer delay part FIFO and the fractional delay input of the fractional delay filter.
[0109] For fractional delay filters, 64 sets of fractional delay filter coefficients are first stored in a local lookup table, covering the delay range of 0-1. For a given fractional delay input, the system first determines which two of the 64 fractional delay filter sets it falls between. After reading the values, linear interpolation is used to generate the filter coefficients for the corresponding fractional delay input.
[0110] For each tap of the FIR filter, if the model is simplified to a single-point reflection, the FIR filter can retain only one set of complex coefficients, whose modulus is the amplitude decay of the path, the phase is the phase shift of the path, and the remaining coefficients are 0. If the model needs to reflect the specific scattering characteristics of the path, multiple taps of the FIR can be used.
[0111] The foregoing is merely an embodiment of the present invention and is not intended to limit the present invention. It will be apparent to those skilled in the art that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention are intended to be included within the scope of the claims of the present invention.
Claims
1. A real-time calculation method of radio frequency environment based on FPGA, characterized in that: include: S1, obtaining a channel characteristic information set and a signal sampling time value; the channel characteristic information set includes a channel multipath information set; the channel multipath information set includes each multipath channel path length and a corresponding channel response sequence; S2, performing delay calculation processing on the channel characteristic information set and the signal sampling time value to obtain a multipath delay value set, including: S21, dividing each multipath channel path length in the channel characteristic information set by the speed of light to obtain a corresponding multipath delay; S22, dividing the multipath delay corresponding to each multipath channel path length by the signal sampling time value to obtain a corresponding division result; determining the integer part of the division result as the integer delay corresponding to the multipath channel path length; and determining the decimal part of the division result as the decimal delay corresponding to the multipath channel path length; S23, constructing a multipath delay value set using the integer delays and fractional delays corresponding to all multipath channel path lengths; the multipath delay value set includes the integer delay and fractional delay corresponding to each multipath channel path length; S3, based on the multipath delay value set and the channel characteristic information set, calculating and processing the collected original signal to obtain a radio frequency environment signal, including: S31, constructing an integer delay filter for obtaining the multipath channel path length using the integer delay corresponding to each multipath channel path length in the multipath delay value set; S32, constructing a fractional delay filter for obtaining the multipath channel path length using the fractional delay corresponding to each multipath channel path length in the multipath delay value set; S33, constructing an amplitude response filter for each multipath channel path length using a channel response sequence corresponding to each multipath channel path length in the channel characteristic information set; S34, connecting the integer delay filter, the fractional delay filter, and the amplitude response filter of each multipath channel path length in series to obtain a multipath channel simulator corresponding to the multipath channel path length; S35, using a multipath channel simulator corresponding to each multipath channel path length, respectively processing the collected original signal to obtain a corresponding output signal; S36 , adding the output signals corresponding to all multipath channel path lengths to obtain a radio frequency environment signal.
2. The FPGA-based real-time calculation method for radio frequency environment according to claim 1, characterized in that: The constructing an integer delay filter for obtaining the multipath channel path length by using the integer delay corresponding to each multipath channel path length in the multipath delay value set includes: Determine an integer delay corresponding to each multipath channel path length in the multipath delay value set, which is the difference between a read address and a write address of a RAM memory; configure an operating mode of the RAM memory to circular addressing, and determine the RAM memory to be an integer delay filter for the multipath channel path length.
3. The FPGA-based real-time calculation method for radio frequency environment according to claim 1, wherein: The method of constructing a fractional delay filter for obtaining the multipath channel path length by utilizing the fractional delay corresponding to each multipath channel path length in the multipath delay value set includes: S321, obtaining a fractional delay corresponding to each multipath channel path length in the multipath delay value set; S322, determining a fractional index value closest to the fractional delay value in a preset fractional delay filter coefficient lookup table; the fractional delay filter coefficient lookup table includes a plurality of fractional index values and corresponding fractional delay filter coefficient vectors; S323: Construct a fractional delay filter that obtains the multipath channel path length by using the coefficient vector of the fractional delay filter corresponding to the decimal index value in the fractional delay filter coefficient lookup table.
4. The FPGA-based real-time calculation method for radio frequency environment according to claim 1, wherein: The method of constructing a fractional delay filter for obtaining the multipath channel path length by utilizing the fractional delay corresponding to each multipath channel path length in the multipath delay value set includes: S321, obtaining a fractional delay corresponding to each multipath channel path length in the multipath delay value set; S322, determining N fractional index values closest to the fractional delay value in a preset fractional delay filter coefficient lookup table; S323: Based on the N closest decimal index values, obtain the corresponding fractional delay filter coefficient vectors in the fractional delay filter coefficient lookup table; S324, performing fusion calculation processing on the obtained N coefficient vectors to obtain a fractional filter vector; S325 , using the fractional filter vector as a coefficient vector of a fractional delay filter to construct a fractional delay filter that obtains the multipath channel path length.
5. The FPGA-based real-time calculation method for radio frequency environment according to claim 4, characterized in that: The expression of the fusion calculation process is: Among them, x0 is the fractional delay corresponding to the multipath channel path length, x i is the ith decimal index value of the N nearest decimal index values, ε ij is the jth item of the coefficient vector of the fractional delay filter corresponding to the i-th fractional index value in the fractional delay filter coefficient lookup table, υ j is the jth item of the fractional filter vector.
6. A real-time calculation device for radio frequency environment based on FPGA, characterized in that: The device comprises: a memory storing executable program code; a processor coupled to the memory; The processor calls the executable program code stored in the memory to execute the FPGA-based real-time calculation method for radio frequency environment according to any one of claims 1 to 5.
7. A computer storable medium, characterized in that The computer storable medium stores computer instructions, which, when called by a computer, are used to execute the FPGA-based real-time calculation method for radio frequency environment according to any one of claims 1 to 5.
8. An information data processing terminal, characterized in that: The information data processing terminal is used to implement the FPGA-based real-time calculation method for radio frequency environment according to any one of claims 1 to 5.