Chip testing method, device and system based on visual waveform platform and medium
Through the chip testing method based on the visual waveform platform, the problem of high professional skills requirements of operators is solved, the chip testing is automated and efficient, and the testing accuracy is improved.
Patent Information
- Application Number
- CN202510403471.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-01
- Publication Date
- 2025-08-01
AI Technical Summary
Existing chip aging tests require high professional skills for operators and are difficult to operate, resulting in inefficient testing.
The chip testing method based on the visual waveform platform is adopted. By obtaining the initial simulated waveform selected by the user, the target parameters are extracted, and the visual waveform platform is used to edit it, the target simulated waveform is generated, and the target simulated waveform is converted into binary waveform data, the digital-to-analog converter driver chip output response waveform is controlled, and whether the chip has passed the test is compared.
It reduces the professional skills requirements of operators, simplifies the testing process, improves testing efficiency and accuracy, and realizes automated judgment of chip testing.
Smart Images

Figure CN120405372A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chip testing, and particularly to a chip testing method, device, system and medium based on a visual waveform platform. Background Art
[0002] With the rapid development and application of domestic chip technology, in order to ensure the stability and durability of chips in actual use, aging testing is widely used in the chip testing process. During the chip aging testing process, it is necessary to stimulate the chip through specific waveform timings to make the chip enter the test state and perform performance evaluation.
[0003] However, due to different chips having different working characteristics and test requirements, there are also significant differences in the required waveforms. Operators need to write code in a specific programming environment according to the chip characteristics to generate waveforms during testing. This process requires high professional skills from operators and is not convenient to operate.
[0004] Therefore, how to reduce the professional skill requirements and operation difficulty of chip aging testing for operators to improve testing efficiency is a technical problem to be solved urgently. Summary of the Invention
[0005] The present invention provides a chip testing method, device, computer system and storage medium based on a visual waveform platform to solve the technical problems of high professional skill requirements and large operation difficulty of existing chip aging testing for operators.
[0006] In a first aspect, a chip testing method based on a visual waveform platform is provided, including: Obtaining an initial analog waveform selected by a user based on a chip type; Extracting target parameters of the initial analog waveform and obtaining an editing result input by the user, where the editing result is obtained by the user editing the target parameters through the visual waveform platform; Adjusting the initial analog waveform based on the editing result to obtain a target analog waveform; Converting the target analog waveform into binary waveform data and sending the binary waveform data to a hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data and controls a digital-to-analog converter through the excitation signal to drive the chip to output a response waveform; Determining whether the chip passes the test according to the target analog waveform and the response waveform. In a second aspect, a chip testing device based on a visual waveform platform is provided, including: An obtaining module, configured to obtain an initial analog waveform selected by a user based on a chip type; An extraction module, configured to extract target parameters of the initial simulation waveform and obtain the editing result input by the user, where the editing result is obtained by the user editing the target parameters through a visual waveform platform; An adjustment module, configured to adjust the initial simulation waveform based on the editing result to obtain a target simulation waveform; An execution module, configured to convert the target simulation waveform into binary waveform data and send the binary waveform data to a hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data and controls a digital-to-analog converter through the excitation signal to drive the chip to output a response waveform; A determination module, configured to determine whether the chip passes the test according to the target simulation waveform and the response waveform.
[0007] In a third aspect, a chip testing system based on a visual waveform platform is provided. The chip testing system includes a testing device, a hardware execution mechanism, a digital-to-analog converter, and a chip, and the visual waveform platform runs on the testing device; The testing device is configured to obtain an initial simulation waveform selected by the user based on the chip type; extract target parameters of the initial simulation waveform and obtain the editing result input by the user, where the editing result is obtained by the user editing the target parameters through a visual waveform platform; adjust the initial simulation waveform based on the editing result to obtain a target simulation waveform; convert the target simulation waveform into binary waveform data and send the binary waveform data to the hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data and controls the digital-to-analog converter through the excitation signal to drive the chip to output a response waveform; The testing device is further configured to collect the response waveform and determine whether the chip passes the test according to the target simulation waveform and the response waveform.
[0008] In a fourth aspect, a computer-readable storage medium is provided. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the chip testing method based on the visual waveform platform described in the first aspect is implemented.
[0009] In a solution implemented by the above chip testing method, device, system and medium based on the visual waveform platform, an initial analog waveform selected by the user based on the chip type is obtained; target parameters of the initial analog waveform are extracted, and an editing result input by the user is obtained, where the editing result is obtained by the user editing the target parameters through the visual waveform platform; the initial analog waveform is adjusted based on the editing result to obtain a target analog waveform; the target analog waveform is converted into binary waveform data, and the binary waveform data is sent to a hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data, and controls a digital-to-analog converter through the excitation signal to drive the chip to output a response waveform; according to the target analog waveform and the response waveform, it is determined whether the chip passes the test. In this embodiment, after obtaining the target waveform selected by the user based on the chip type and extracting the target parameters of the target waveform, the user can edit the target parameters through the visual waveform platform to obtain an editing result. Then, according to the editing result, the testing device can automatically adjust the initial analog waveform, reducing the professional skill requirements for operators and the operation difficulty; furthermore, the target analog waveform is converted into binary waveform data, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data to control the digital-to-analog converter to drive the chip to output a response waveform, and further compares the target analog waveform with the response waveform, so as to quickly and accurately determine whether the chip passes the test, improving the test accuracy and efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can also obtain other drawings without creative efforts.
[0011] Figure 1 is a schematic diagram of a chip testing system based on a visual waveform platform in an embodiment of the present invention; Figure 2 is a flowchart of a chip testing method based on a visual waveform platform in an embodiment of the present invention; Figure 3 is a schematic diagram of a sine wave displayed on a visual waveform platform in an embodiment of the present invention; Figure 4 ]>is a schematic diagram of a triangular wave displayed on a visual waveform platform in an embodiment of the present invention; Figure 5 is a schematic diagram of a leading-edge sawtooth wave displayed on a visual waveform platform in an embodiment of the present invention; Figure 6It is a schematic diagram showing a trailing sawtooth wave displayed on the visualization waveform platform in an embodiment of the present invention; Figure 7 It is a schematic diagram showing a rectangular wave displayed on the visualization waveform platform in an embodiment of the present invention; Figure 8 It is another flowchart of the chip testing method based on the visualization waveform platform in an embodiment of the present invention; Figure 9 It is another flowchart of the chip testing method based on the visualization waveform platform in an embodiment of the present invention; Figure 10 It is another flowchart of the chip testing method based on the visualization waveform platform in an embodiment of the present invention; Figure 11 It is another flowchart of the chip testing method based on the visualization waveform platform in an embodiment of the present invention; Figure 12 It is another flowchart of the chip testing method based on the visualization waveform platform in an embodiment of the present invention; Figure 13 It is a schematic diagram of a chip testing device based on the visualization waveform platform in an embodiment of the present invention. Detailed implementation manners
[0012] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0013] The chip testing method based on the visualization waveform platform provided by the present invention is applied in a chip testing system based on the visualization waveform platform as shown in Figure 1 . The chip testing system 1000 based on the visualization waveform platform includes a testing device 1001, a hardware execution mechanism 1002, a digital-to-analog converter 1003 (DAC), and a chip 1004. The hardware execution mechanism 1002 includes a microcontroller 10021 (MCU), a storage module 10022, and a data parsing module 10023. A visualization waveform platform 10011 runs on the testing device 1001. Among them, the testing device 1001 is connected to the data parsing module 10023, the data parsing module 10023 is connected to the microcontroller 10021, the microcontroller 10021 is connected to the digital-to-analog converter 1003, and the digital-to-analog converter 1003 is connected to the chip. The testing device 1001 includes, but is not limited to, various personal computers, industrial control computers, laptop computers, smart phones, and tablet computers.
[0014] Please also refer to the following Figures 1 to 13 and the following description for detailed steps to illustrate the technical solution proposed by the present invention.
[0015] In the first aspect, as Figure 2 shown, a chip testing method based on a visual waveform platform is provided. Taking the testing device 1001 in which this method is applied Figure 1 as an example, the method includes the following steps: S10. Obtain an initial analog waveform selected by the user based on the chip type.
[0016] In this embodiment, the chip type includes but is not limited to integrated circuits (ICs), memory chips (Flash), analog chips (Analog ICs), or other types of semiconductor chips, etc.
[0017] The target waveform includes but is not limited to sine waves, triangular waves, front-edge sawtooth waves, trailing-edge sawtooth waves, or rectangular waves, etc.
[0018] As an example, the user can select a corresponding target waveform through the visual waveform platform based on the current chip type. For example, when the chip type is a memory chip, the user can select a sine wave through the visual waveform platform, so that the testing device obtains the target waveform selected by the current user. In this way, the testing device can accurately obtain the target waveform selected by the user based on the chip type, thereby ensuring the accuracy and stability of the subsequent parameter extraction, waveform generation, and adjustment processes, reducing the professional skill requirements for operators, and improving the testing efficiency.
[0019] S20. Extract the target parameters of the initial analog waveform, and obtain the editing result input by the user, where the editing result is obtained by the user editing the target parameters through the visual waveform platform.
[0020] In this embodiment, the target parameters include but are not limited to amplitude, frequency, phase, and / or vertical offset (offset), etc. Among them, the amplitude is half of the peak-to-peak value. For example, if the amplitude is 9V, then the peak-to-peak value is 18V. Among them, the peak-to-peak value refers to the voltage difference between the highest point (peak) and the lowest point (valley) in the waveform.
[0021] The editing results include, but are not limited to, the first editing result, the second editing result, the third editing result, the fourth editing result, the fifth editing result, etc. Among them, the first editing result is the corresponding editing result when the initial simulated waveform is a sine wave; the second editing result is the corresponding editing result when the initial simulated waveform is a triangular wave; the third editing result is the corresponding editing result when the initial simulated waveform is a leading-edge sawtooth wave; the fourth editing result is the corresponding editing result when the initial simulated waveform is a trailing-edge sawtooth wave; the fifth editing result is the corresponding editing result when the initial simulated waveform is a rectangular wave.
[0022] As an example, after generating the initial simulated waveform, the test device can automatically analyze the characteristic information of the initial simulated waveform and extract the target parameters by using a preset parameter extraction algorithm. Specifically, it includes the following steps: S21. When the initial simulated waveform is the sine wave, extract the first amplitude, the first frequency, the first phase and the first vertical offset of the sine wave, and obtain the first editing result input by the user, where the first editing result is obtained by the user editing the first amplitude, the first frequency, the first phase and / or the first vertical offset through a visual waveform platform.
[0023] As an example, as Figure 3 shown, if the initial simulated waveform is a sine wave, the test device can automatically analyze the characteristic information of the sine wave by using a preset parameter extraction algorithm (for example, a feature extraction algorithm). For example, analyze the characteristic information of the formula for generating the sine wave to extract the first amplitude of 5V, the first frequency of 10KHz, the first phase of 30 °C, and the first vertical offset of 0V and other target parameters.
[0024] Subsequently, these target parameters are displayed in the display area of the visual waveform platform in numerical and / or graphical form. Here, the first amplitude is displayed with the parameter of the peak-to-peak value in Figure 3 , that is, the peak-to-peak value is equal to 2 times the first amplitude , so the peak-to-peak value displayed in the display area of the visual waveform platform is 10V. The user can, according to the actual test requirements, use the interaction tools provided in the display area, such as a mouse and / or a keyboard, to perform real-time editing on the target parameters in the display area. For example, by using a combination of a mouse and a keyboard to adjust the peak-to-peak value to 12V, the corresponding first amplitude is adjusted to 6V, the first frequency is adjusted to 12KHz, the first phase is adjusted to 35 °C, and the first vertical offset Adjust to 1V so that after the user completes parameter editing, the test device can automatically capture the first editing result.
[0025] S22. When the initial analog waveform is the triangular wave, extract the second amplitude, second period, and second vertical offset of the triangular wave, and obtain the second editing result input by the user, where the second editing result is obtained by the user editing the second amplitude, the second period, and / or the second vertical offset through the visual waveform platform.
[0026] As an example, as Figure 4 shown, if the initial analog waveform is a triangular wave, the test device can automatically analyze the characteristic information of the sine wave using a preset parameter extraction algorithm (for example, a feature extraction algorithm). For example, analyze the characteristic information of the formula for generating the triangular wave to extract the second amplitude of 9V, the second period of 2 of 0.1 millisecond, and the second vertical offset of 0V and other target parameters.
[0027] Subsequently, these target parameters are displayed in numerical and / or graphical form in the display area of the visual waveform platform. Here, the second amplitude is displayed with the parameter of the peak-to-peak value in Figure 4 , the second period of 2 is displayed with the parameter of the frequency in Figure 4 . That is, the peak-to-peak value is equal to 2 times the second amplitude , so the peak-to-peak value displayed in the display area of the visual waveform platform is 10V, and the frequency is equal to the reciprocal of the second period of 2 . Therefore, the frequency displayed in the display area of the visual waveform platform is 10KHz. The user can, according to the actual test requirements, use the interaction tools provided in the display area, such as a mouse and / or a keyboard, to perform real-time editing on the target parameters in the display area. For example, adjust the peak-to-peak value to 12V by using a combination of the mouse and the keyboard, adjust the frequency to 20KHz, then the corresponding second period of 2 is adjusted to 0.2 millisecond and the second vertical offset is adjusted to 1V so that after the user completes parameter editing, the test device can automatically capture the second editing result.
[0028] It should be understood that is the modulo operation to limit within the range of [0, 2P).
[0029] S23. When the initial simulation waveform is the front-edge sawtooth wave, extract the third amplitude, third period, and third vertical offset of the front-edge sawtooth wave, and obtain the third editing result input by the user, where the third editing result is obtained by the user editing the third amplitude, the third period, and / or the third vertical offset through the visual waveform platform.
[0030] As an example, as Figure 5 shown, if the initial simulation waveform is a front-edge sawtooth wave, the test device can automatically analyze the characteristic information of the front-edge sawtooth wave by using a preset parameter extraction algorithm (for example, a feature extraction algorithm). For example, analyze the characteristic information of the formula for generating the front-edge sawtooth wave to extract the third amplitude of 10V, the third period of 0.1 millisecond, and the third vertical offset of 0V and other target parameters.
[0031] Subsequently, these target parameters are displayed in numerical and / or graphical form in the display area of the visual waveform platform. Here, the third amplitude is displayed with the parameter of peak-to-peak value in Figure 5 , the third period is displayed with the parameter of frequency in Figure 5 . That is, the peak-to-peak value is equal to 2 times the third amplitude , so the peak-to-peak value displayed in the display area of the visual waveform platform is 10V, and the frequency is equal to the reciprocal of the third period . Therefore, the frequency displayed in the display area of the visual waveform platform is 10KHz. The user can, according to the actual test requirements, use the interaction tools provided in the display area, such as a mouse and / or a keyboard, to perform real-time editing on the target parameters in the display area. For example, by using a combination of a mouse and a keyboard, change the peak-to-peak value to 2V, change the frequency to 20KHz, then adjust the corresponding third period to 0.2 millisecond and adjust the third vertical offset to 1V. In this way, after the user completes the parameter editing, the test device can automatically capture the third editing result.
[0032] It should be understood that the waveform of the front-edge sawtooth wave is linearly rising from the 0 line to A (as Figure 5 shown, A is 5 here), and then instantaneously jumps back to 0, forming a sawtooth with a "steep front edge".
[0033] S24. When the initial simulated waveform is the trailing sawtooth wave, extract the fourth amplitude, fourth period, and fourth vertical offset of the trailing sawtooth wave, and obtain the fourth editing result input by the user, where the fourth editing result is obtained by the user editing the fourth amplitude, the fourth period, and / or the fourth vertical offset through the visual waveform platform.
[0034] As an example, as Figure 6 shown, if the initial simulated waveform is a trailing sawtooth wave, the test device can automatically analyze the feature information of the trailing sawtooth wave using a preset parameter extraction algorithm (e.g., feature extraction algorithm). For example, analyze the feature information of the formula for generating the trailing sawtooth wave to extract the fourth amplitude of 10V, the fourth period of 0.1 millisecond, and the fourth vertical offset of 0V and other target parameters.
[0035] Subsequently, these target parameters are displayed in numerical and / or graphical form in the display area of the visual waveform platform. Here, the fourth amplitude is displayed with the peak-to-peak parameter in Figure 6 , the fourth period is displayed with the frequency parameter in Figure 6 . That is, the peak-to-peak value is equal to 2 times the fourth amplitude , so the peak-to-peak value displayed in the display area of the visual waveform platform is 10V, and the frequency is equal to the reciprocal of the fourth period . So the frequency displayed in the display area of the visual waveform platform is 10KHz. The user can, according to the actual test requirements, use the interaction tools provided in the display area, such as a mouse and / or keyboard, to edit the target parameters in the display area in real time. For example, by using a combination of mouse and keyboard, change the peak-to-peak value to 2V, change the frequency to 20KHz, then adjust the corresponding fourth period to 0.2 millisecond and adjust the third vertical offset to 1V. In this way, after the user completes the parameter editing, the test device can automatically capture the fourth editing result.
[0036] It should be understood that the waveform of the leading sawtooth wave rises instantaneously from 0 to A (as Figure 6 shown, where A is 5 here), and then linearly descends to 0, forming a sawtooth with a "steep trailing edge".
[0037] S25. When the initial simulation waveform is the rectangular wave, extract the fifth amplitude, fifth frequency, and fifth vertical offset of the rectangular wave, and obtain the fifth editing result input by the user, where the fifth editing result is obtained by the user editing the fifth amplitude, the fifth frequency, and / or the fifth vertical offset through the visual waveform platform.
[0038] As an example, as Figure 7 shown, if the initial simulation waveform is a rectangular wave, the test device can automatically analyze the feature information of the rectangular wave by using a preset parameter extraction algorithm (for example, a feature extraction algorithm). For example, analyze the feature information of the formula for generating the rectangular wave to extract the fifth amplitude of 10V, the fifth frequency of 10KHz, and the fifth vertical offset of 0V and other target parameters.
[0039] Subsequently, these target parameters are displayed in the display area of the visual waveform platform in numerical and / or graphical form. Here, the fifth amplitude is displayed with the parameter of the peak-to-peak value in Figure 7 , that is, the peak-to-peak value is equal to twice the fifth amplitude , so the peak-to-peak value displayed in the display area of the visual waveform platform is 10V. The user can, according to the actual test requirements, use the interaction tools provided in the display area, such as a mouse and / or a keyboard, to perform real-time editing on the target parameters in the display area. For example, by using a combination of the mouse and the keyboard to change the peak-to-peak value to 2V, the fifth amplitude is adjusted to 6V, the fifth frequency is adjusted to 20KHz, and the fifth vertical offset is adjusted to 1V. In this way, after the user completes the parameter editing, the test device can automatically capture the fifth editing result.
[0040] It should be understood that is the positive function (rounding down to the nearest integer ); the waveform range is .
[0041] Through the above steps, the user can intuitively modify the waveform parameters and optimize the waveform shape without deeply mastering complex waveform modification algorithms, effectively reducing the requirements for the professional skills of the operator and simplifying the test process.
[0042] It should be noted that in addition to adjusting the peak-to-peak value, frequency, phase, and / or vertical offset (offset), the duty cycle of the initial analog waveform can also be adjusted. The duty cycle refers to the ratio of the duration of the high level signal to the duration of the entire cycle in the initial analog waveform. This is only used as an example.
[0043] S30 . Adjust the initial simulation waveform based on the editing result to obtain a target simulation waveform.
[0044] As an example, after obtaining the editing result input by the user through the visual waveform platform, the test equipment adjusts the initial simulation waveform based on the editing result to generate the final target simulation waveform. Figure 8 As shown, the following steps are included: S31. Parsing the adjustment parameters input by the user through mouse click and / or keyboard in the editing result, where the adjustment parameters include adjusting amplitude, adjusting frequency, adjusting phase and / or adjusting vertical offset.
[0045] S32. Based on the adjusted amplitude, the adjusted frequency, the adjusted phase and / or the adjusted vertical offset, use a preset waveform adjustment algorithm to adjust the initial simulation waveform to generate the target simulation waveform.
[0046] As an example, when the initial simulation waveform is a sine wave, the corresponding editing result is a first editing result; the first adjustment parameter entered by the user through mouse click and / or keyboard in the first editing result can be parsed, wherein the first adjustment parameter includes a first adjustment amplitude, a first adjustment frequency, a first adjustment phase and a first adjustment vertical offset; according to the first adjustment amplitude, the first adjustment frequency, the first adjustment phase and the first adjustment vertical offset, the preset waveform adjustment algorithm is used to adjust the sine wave to generate a target simulation waveform.
[0047] For example, the user adjusts the first amplitude from 5V to 6V. Figure 3 The reaction is to adjust the peak-to-peak value to 12V, adjust the first frequency 10KHz to 12KHz, adjust the first phase 30° to 35°, and adjust the first vertical offset 0V to 1V. At this time, the first adjustment amplitude is 2V, the first adjustment frequency is 2KHz, the first adjustment phase is 5°, and the first adjustment vertical offset is 1V. Then, using the preset waveform adjustment algorithm, the amplitude of the initial simulation waveform is increased by 2V, the frequency is increased by 2KHz, the phase is increased by 5°, and the vertical offset is increased by 1V to obtain the target simulation waveform.
[0048] As another example, when the initial simulated waveform is a triangular wave, the corresponding editing result is the second editing result; the second adjustment parameters input by the user through mouse clicks and / or keyboard operations in the second editing result can be parsed, where the second adjustment parameters include a second adjustment amplitude, a second adjustment period, and a second adjustment vertical offset; according to the second adjustment amplitude, the second adjustment period, and the second adjustment vertical offset, the triangular wave is adjusted by using a preset waveform adjustment algorithm to generate a target simulated waveform.
[0049] It should be noted that when the initial simulated waveform is a waveform such as a front-edge sawtooth wave, a trailing-edge sawtooth wave, or a rectangular wave, the adjustment process for the initial simulated waveform being a sine wave or a triangular wave can be referred to. To avoid repetition, it will not be elaborated here one by one.
[0050] Through the above method, the user can intuitively and conveniently adjust the test waveform, improving the flexibility and accuracy of the test, and at the same time reducing the requirements for the professional skills of the operator.
[0051] It should be understood that during the adjustment process, the test device displays the corrected waveform in real time through the display area of the visualization waveform platform for the user to view and confirm; if the corrected waveform does not meet the test requirements, fine-tuning can be continued until a waveform that meets the test requirements is obtained as the target simulated waveform.
[0052] S40. Convert the target simulated waveform into binary waveform data, and send the binary waveform data to the hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data, and controls the digital-to-analog converter to drive the chip to output a response waveform through the excitation signal.
[0053] As an example, the target analog waveform can be sampled and quantized using analog-to-digital conversion technology to convert the continuous analog signal into a discrete digital signal, that is, convert the target analog waveform into binary waveform data. Then, this binary data can be transmitted to the hardware execution mechanism through a data interface (such as SPI or I2C), so that the data parsing module built into the hardware execution mechanism decodes the received binary waveform data and transmits the decoded data to the microcontroller. The microcontroller generates an excitation signal (such as a matching high level, low level, and high impedance state, etc.) that matches the target analog waveform according to a preset algorithm and the parsed data. Subsequently, the excitation signal is transmitted to a digital-to-analog converter (DAC), and the digital-to-analog converter converts it into a continuous analog signal according to the digital instruction of the excitation signal and outputs it to the chip. The chip outputs a corresponding response signal after receiving this excitation signal. Further, this response signal is converted into corresponding response binary waveform data and transmitted to the test device, and the test device decodes to obtain the response waveform. For example, the response binary waveform data is generated into a corresponding response waveform using the third-party open-source graphics library Scottplot. Through the above steps, technical support is provided for high-precision chip testing.
[0054] S50. Determine whether the chip passes the test according to the target analog waveform and the response waveform.
[0055] As an example, after the test device obtains the response waveform, the response waveform can be further compared with the target analog waveform to calculate the matching degree between the two, so as to determine whether the chip passes the test. Specifically, as Figure 9 shown, it includes the following steps: S51. Calculate the deviation value between the response waveform and the target analog waveform, and determine whether the deviation value is within the error threshold range; S52. If the deviation value is within the error threshold range, determine that the chip passes the test; S53. If the deviation value is not within the error threshold range, determine that the chip fails the test and output an error analysis report.
[0056] In this embodiment, the deviation value refers to the difference value between the response waveform and the target analog waveform at the same time point.
[0057] As an example, a preset similarity evaluation algorithm can be used, such as methods like average error, mean square error (MSE), or cross-correlation analysis, etc., to calculate the deviation value between the response waveform and the target analog waveform. For example, the amplitudes of the target analog waveform and the response waveform at multiple identical time points can be calculated to obtain an average amplitude, and this average amplitude is used as the deviation value.
[0058] Further, it is determined whether the deviation value is within a preset error threshold range; if the deviation value is within the error threshold range, for example, the error threshold range is from -0.1 to 0.1, and the calculated deviation value is 0.05, since 0.05 is within -0.1 to 0.1, it is determined that the chip test passes; if the deviation value is not within the error threshold range, for example, the calculated deviation value is 0.15, it is determined that the chip fails the test, and at this time, an error analysis report will be output. Among them, the error analysis report may include, but is not limited to, information such as the time point of the error, the amplitude difference, and the possible reasons for the error.
[0059] Through the above steps, the automatic determination of chip testing is realized, the testing efficiency is improved, and when the chip fails the test, an error analysis report is provided, providing a reference for further optimizing the chip and ensuring the accuracy and reliability of the test.
[0060] In summary, in one solution provided by the embodiment of the present invention, after obtaining the target waveform selected by the user based on the chip type and extracting the target parameters of the target waveform, the user can edit the target parameters through the visual waveform platform to obtain an editing result. Then, according to the editing result, the testing device can automatically adjust the initial analog waveform, reducing the professional skill requirements for the operator and the operation difficulty; further converting the target analog waveform into binary waveform data, enabling the hardware actuator to generate an excitation signal based on the binary waveform data to control the digital-to-analog converter to drive the chip to output a response waveform, and further comparing the target analog waveform with the response waveform, thereby quickly and accurately determining whether the chip passes the test, improving the testing accuracy and efficiency.
[0061] In one embodiment, as Figure 10 shown, that is, in step S10, that is, among the steps of obtaining the initial analog waveform selected by the user based on the chip type, the following steps are included: S11. Receive the chip type input by the user; S12. Based on the chip type, screen out one or more preselected analog waveforms that match the chip type from the preset waveform library, and display the one or more preselected analog waveforms to the user in the form of a thumbnail array in the display area of the visual waveform platform; S13. When the selection result of the target thumbnail in the thumbnail array is detected by the user, determine the preselected analog waveform corresponding to the target thumbnail as the initial analog waveform.
[0062] In this embodiment, the preset waveform library includes all waveforms required for chip testing, such as sine waves, triangular waves, forward sawtooth waves, backward sawtooth waves, and rectangular waves, etc. Here, it is only an example and does not constitute a limitation to the present invention.
[0063] As an example, the test device can receive the chip type input by the user through the visualization waveform platform. For example, the input chip type is a memory chip. Then, the test device can screen out one or more preselected analog waveforms applicable to the chip type from the preset waveform library based on the association relationship between the chip type and the preset target waveform. For example, for a memory chip, a sine wave, a triangular wave, and a front sawtooth wave can be screened out.
[0064] Next, the one or more preselected analog waveforms are displayed in the display area of the visualization waveform platform in the form of a thumbnail array. Among them, each thumbnail corresponds to a schematic diagram of a preselected analog waveform, enabling the user to intuitively select the most suitable initial analog waveform.
[0065] When the test device detects that the user selects a certain target thumbnail in the display area of the visualization waveform platform, it will automatically determine the preselected analog waveform corresponding to the target thumbnail as the target analog waveform. For example, the sine wave is used as the initial analog waveform.
[0066] Through the above steps, the user can intuitively and efficiently select the test waveform applicable to a specific chip, improving the convenience and accuracy of chip testing and reducing the operation threshold.
[0067] In one embodiment, as Figure 11 shown, that is, in step S40, that is, in the step of sending the binary waveform data to the hardware execution mechanism so that the hardware execution mechanism generates an excitation signal based on the binary waveform data, the following steps are included: S41. Compress the binary waveform data using a bit compression algorithm to obtain compressed binary waveform data; S42. Send the compressed binary waveform data to the hardware execution mechanism so that the hardware execution mechanism generates an excitation signal based on the compressed binary waveform data.
[0068] In this embodiment, the bit compression algorithm includes but is not limited to run-length encoding or Huffman coding, etc.
[0069] As an example, before sending the binary waveform data to the hardware actuator, the test device compresses the binary waveform data using a bit compression algorithm. For example, if the original binary waveform data is stored with a 16-bit depth, the original binary waveform data is re-encoded bit by bit, with 2 bits representing the waveform data of one depth. Then, 1 byte can represent the waveform data of 4 depths. Therefore, the waveform data can be compressed to 1 / 4 of the original binary waveform data. That is, if each sampling point occupies 16-bit storage space, only 4-bit storage space is required after compression, thus reducing the storage overhead and transmission burden. Subsequently, the compressed binary waveform data is sent to the hardware actuator so that the hardware actuator generates an excitation signal based on the compressed binary waveform data. Through the above steps, not only the transmission efficiency is improved, but also the storage and processing burdens are reduced, enabling efficient and accurate chip testing with limited hardware resources.
[0070] In one embodiment, as Figure 12 shown, that is, in step S42, which is to send the compressed binary waveform data to the hardware actuator so that the hardware actuator generates an excitation signal based on the compressed binary waveform data, the following steps are included: S421. Real-time monitor the data depth of the compressed binary waveform data received but not processed by the hardware actuator, and determine whether the data depth is greater than or equal to a preset depth threshold; S422. When the data depth is greater than or equal to the preset depth threshold, stop sending the remaining compressed binary waveform data to the hardware actuator; S423. When the data depth is less than the preset depth threshold, continue to send the remaining compressed binary waveform data to the hardware actuator.
[0071] In this embodiment, the data depth refers to the total amount of the compressed binary waveform data received but not processed by the current hardware actuator, that is, the size of the compressed binary waveform data received but not processed.
[0072] As an example, when it is monitored that the data depth of the compressed binary waveform data received but not processed by the hardware actuator is greater than or equal to the preset depth threshold, stop sending the remaining compressed binary waveform data to the hardware actuator; when the data depth is less than the preset depth threshold, continue to send the remaining compressed binary waveform data to the hardware actuator. In this way, the data sending rate can be effectively controlled, preventing too much data from accumulating in the buffer of the hardware actuator, and ensuring the real-time, stable and smooth waveform generation process.
[0073] For example, if the amount of compressed binary waveform data is 50 MB and the preset depth threshold of the hardware execution mechanism is 8 MB, then when it is monitored that the data depth of the compressed binary waveform data received but not yet processed by the hardware execution mechanism is greater than or equal to the preset depth threshold, for example, the data depth of the compressed binary waveform data received but not yet processed is 8 MB, the transmission of the remaining 42 MB of data will be paused. When it is monitored that the data depth of the compressed binary waveform data received but not yet processed by the hardware execution mechanism is less than the preset depth threshold, the remaining 40 MB of data will continue to be transmitted. It should be understood that this is only an example here and does not constitute a limitation to the present invention.
[0074] It should be noted that the magnitudes of the sequence numbers of the steps in the above embodiments do not mean the order of execution. The execution order of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
[0075] In a second aspect, a chip testing device based on a visualization waveform platform is provided. The chip testing device based on the visualization waveform platform corresponds one-to-one with the chip testing method based on the visualization waveform platform in the above embodiments. As Figure 13 shown, the chip testing device based on the visualization waveform platform includes an acquisition module 101, an extraction module 102, an adjustment module 103, an execution module 104, and a determination module 105. The detailed description of each functional module is as follows: The acquisition module 101 is configured to acquire an initial analog waveform selected by the user based on the chip type; The extraction module 102 is configured to extract target parameters of the initial analog waveform and acquire an editing result input by the user, where the editing result is obtained by the user editing the target parameters through the visualization waveform platform; The adjustment module 103 is configured to adjust the initial analog waveform based on the editing result to obtain a target analog waveform; The execution module 104 is configured to convert the target analog waveform into binary waveform data and send the binary waveform data to a hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data and controls a digital-to-analog converter through the excitation signal to drive the chip to output a response waveform; The determination module 105 is configured to determine whether the chip passes the test according to the target analog waveform and the response waveform.
[0076] In an embodiment, the acquisition module 101 is specifically configured to: Receive the chip type input by the user; Based on the chip type, one or more preselected analog waveforms matching the chip type are screened out from a preset waveform library, and one or more of the preselected analog waveforms are presented to the user in a thumbnail array through the display area of the visualization waveform platform; When the selection result of the target thumbnail in the thumbnail array by the user is detected, the preselected analog waveform corresponding to the target thumbnail is determined as the initial analog waveform.
[0077] In one embodiment, the initial analog waveform includes a sine wave, a triangular wave, a forward sawtooth wave, a backward sawtooth wave, or a rectangular wave.
[0078] In one embodiment, the adjustment module 103 is specifically configured to: Analyze the adjustment parameters input by the user through mouse clicks and / or keyboard in the editing result, where the adjustment parameters include adjusting the amplitude, adjusting the frequency, adjusting the phase, and / or adjusting the vertical offset; Based on the adjusted amplitude, the adjusted frequency, the adjusted phase, and / or the adjusted vertical offset, use a preset waveform adjustment algorithm to adjust the initial analog waveform to generate the target analog waveform.
[0079] In one embodiment, the execution module 104 is specifically configured to: Compress the binary waveform data using a bit compression algorithm to obtain compressed binary waveform data; Send the compressed binary waveform data to the hardware execution mechanism so that the hardware execution mechanism generates an excitation signal based on the compressed binary waveform data.
[0080] In one embodiment, the execution module 104 is further specifically configured to: Real-time monitor the data depth of the compressed binary waveform data received but not processed by the hardware execution mechanism, and determine whether the data depth is greater than or equal to a preset depth threshold; When the data depth is greater than or equal to the preset depth threshold, stop sending the remaining compressed binary waveform data to the hardware execution mechanism; When the data depth is less than the preset depth threshold, continue to send the remaining compressed binary waveform data to the hardware execution mechanism.
[0081] In one embodiment, the determination module l05 is specifically configured to: Calculate the deviation value between the response waveform and the target analog waveform, and determine whether the deviation value is within the error threshold range; If the deviation value is within the error threshold range, determine that the chip passes the test; If the deviation value is not within the error threshold range, it is determined that the chip fails the test, and an error analysis report is output.
[0082] For the specific limitations of the chip testing device based on the visualization waveform platform, reference can be made to the limitations of the chip testing method based on the visualization waveform platform in the above text, which will not be elaborated here. Each module in the above chip testing device based on the visualization waveform platform can be implemented in whole or in part by software, hardware, and their combination. The above-mentioned modules can be embedded in the processor in the computer system in hardware form or independent of it, or stored in the memory in the computer system in software form, so as to facilitate the processor to call and execute the results corresponding to each of the above modules.
[0083] In the third aspect, as Figure 1 shown, a chip testing system based on a visualization waveform platform is provided. The chip testing system 1000 includes a testing device 1001, a hardware execution mechanism 1002, a digital-to-analog converter 1003, and a chip 1004. A visualization waveform platform 10011 runs on the testing device 1001; The testing device 1001 is configured to obtain an initial analog waveform selected by the user based on the chip type; extract target parameters of the initial analog waveform, and obtain an editing result input by the user, where the editing result is obtained by the user editing the target parameters through the visualization waveform platform 10011; adjust the initial analog waveform based on the editing result to obtain a target analog waveform; convert the target analog waveform into binary waveform data, and send the binary waveform data to the hardware execution mechanism 1002, so that the hardware execution mechanism 1002 generates an excitation signal based on the binary waveform data, and controls the digital-to-analog converter 1003 to drive the chip 1004 to output a response waveform through the excitation signal; The testing device 1001 is further configured to collect the response waveform, and determine whether the chip 1004 passes the test according to the target analog waveform and the response waveform.
[0084] In an embodiment, the testing device 1001 is further configured to: Receive the chip type input by the user; Based on the chip type, screen out one or more preselected analog waveforms matching the chip type from a preset waveform library, and display one or more of the preselected analog waveforms to the user in a thumbnail array through the display area of the visualization waveform platform 10011; When detecting the selection result of the user for the target thumbnail in the thumbnail array, determine the preselected analog waveform corresponding to the target thumbnail as the initial analog waveform.
[0085] In one embodiment, the initial analog waveform includes a sine wave, a triangular wave, a front-edge sawtooth wave, a trailing-edge sawtooth wave, or a rectangular wave.
[0086] In one embodiment, the test device 1001 is further configured to: Analyze the adjustment parameters input by the user through mouse clicks and / or keyboard in the editing result, where the adjustment parameters include adjusting the amplitude, adjusting the frequency, adjusting the phase, and / or adjusting the vertical offset; Based on the adjusted amplitude, the adjusted frequency, the adjusted phase, and / or the adjusted vertical offset, use a preset waveform adjustment algorithm to adjust the initial analog waveform to generate the target analog waveform.
[0087] In one embodiment, the test device 1001 is further configured to: Compress the binary waveform data by using a bit compression algorithm to obtain the compressed binary waveform data; Send the compressed binary waveform data to the hardware execution mechanism 1002, so that the hardware execution mechanism 1002 generates an excitation signal based on the compressed binary waveform data.
[0088] In one embodiment, the test device 1001 is further configured to: Real-time monitor the data depth of the compressed binary waveform data sent to the hardware execution mechanism 1002, and determine whether the data depth is greater than or equal to a preset depth threshold; When the data depth is greater than or equal to the preset depth threshold, stop sending the remaining compressed binary waveform data to the hardware execution mechanism 1002; When the data depth is less than the preset depth threshold, continue to send the remaining compressed binary waveform data to the hardware execution mechanism 1002.
[0089] In one embodiment, the test device 1001 is further configured to: Calculate the deviation value between the response waveform and the target analog waveform, and determine whether the deviation value is within the error threshold range; If the deviation value is within the error threshold range, determine that the chip passes the test; If the deviation value is not within the error threshold range, determine that the chip fails the test and output an error analysis report.
[0090] For the specific limitations of the chip test system based on the visual waveform platform, reference can be made to the limitations of the chip test method based on the visual waveform platform in the above text, which will not be elaborated here.
[0091] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented: Obtain an initial analog waveform selected by a user based on a chip type; Extract target parameters of the initial analog waveform, and obtain an editing result input by the user, where the editing result is obtained by the user editing the target parameters through a visual waveform platform; Adjust the initial analog waveform based on the editing result to obtain a target analog waveform; Convert the target analog waveform into binary waveform data, and send the binary waveform data to a hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data, and controls a digital-to-analog converter through the excitation signal to drive the chip to output a response waveform; Determine whether the chip passes a test according to the target analog waveform and the response waveform.
[0092] Those of ordinary skill in the art can understand that all or part of the processes of implementing the methods in the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium used in the various embodiments provided in the present application can include non-volatile and / or volatile memories. Non-volatile memories can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memories can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0093] Those skilled in the art can clearly understand that, for the convenience and conciseness of description, only the above-mentioned division of each functional unit and module is used as an example. In actual applications, the above functions can be assigned to different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above.
[0094] The above-described embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.
Claims
1. A chip testing method based on a visualization waveform platform, characterized in that, include: Get the initial simulation waveform selected by the user based on the chip type; Extracting target parameters of the initial simulation waveform and obtaining an editing result input by the user, wherein the editing result is obtained by the user editing the target parameters through a visual waveform platform; Adjusting the initial simulation waveform based on the editing result to obtain a target simulation waveform; Converting the target analog waveform into binary waveform data, and sending the binary waveform data to a hardware actuator, so that the hardware actuator generates an excitation signal based on the binary waveform data, and controls the digital-to-analog converter to drive the chip to output a response waveform through the excitation signal; Whether the chip passes the test is determined based on the target simulation waveform and the response waveform.
2. The chip testing method based on the visualization waveform platform according to claim 1, characterized in that The obtaining of the initial simulation waveform selected by the user based on the chip type includes: receiving the chip type input by the user; Based on the chip type, one or more preselected analog waveforms matching the chip type are screened from a preset waveform library, and one or more preselected analog waveforms are displayed to the user in a thumbnail array in a display area of the visualized waveform platform; When the user's selection result of a target thumbnail in the thumbnail array is detected, the preselected analog waveform corresponding to the target thumbnail is determined as the initial analog waveform.
3. The chip testing method based on the visualization waveform platform according to claim 1 or 2, characterized in that The initial analog waveform includes a sine wave, a triangle wave, a leading sawtooth wave, a trailing sawtooth wave or a rectangular wave.
4. The chip testing method based on the visualization waveform platform according to claim 1, wherein The adjusting the initial simulation waveform based on the editing result to obtain a target simulation waveform includes: parsing the adjustment parameters input by the user through mouse clicks and / or keyboard input in the editing result, wherein the adjustment parameters include adjusting amplitude, adjusting frequency, adjusting phase and / or adjusting vertical offset; Based on the adjusted amplitude, the adjusted frequency, the adjusted phase and / or the adjusted vertical offset, the initial analog waveform is adjusted using a preset waveform adjustment algorithm to generate the target analog waveform.
5. The chip testing method based on the visualization waveform platform according to claim 1, characterized in that The step of sending the binary waveform data to a hardware actuator so that the hardware actuator generates an excitation signal based on the binary waveform data includes: compressing the binary waveform data using a bit compression algorithm to obtain compressed binary waveform data; The compressed binary waveform data is sent to the hardware actuator, so that the hardware actuator generates an excitation signal based on the compressed binary waveform data.
6. The chip testing method based on the visualization waveform platform according to claim 5, wherein, The step of sending the compressed binary waveform data to the hardware actuator so that the hardware actuator generates an excitation signal based on the compressed binary waveform data includes: monitoring in real time the data depth of the compressed binary waveform data received but not processed by the hardware actuator, and determining whether the data depth is greater than or equal to a preset depth threshold; When the data depth is greater than or equal to the preset depth threshold, stopping sending the remaining compressed binary waveform data to the hardware execution mechanism; When the data depth is less than the preset depth threshold, continue to send the remaining compressed binary waveform data to the hardware execution mechanism.
7. The chip testing method based on the visualization waveform platform according to claim 1, wherein Determining whether the chip passes the test according to the target analog waveform and the response waveform includes: Calculating a deviation value between the response waveform and the target analog waveform, and determining whether the deviation value is within an error threshold range; If the deviation value is within the error threshold range, determine that the chip passes the test; If the deviation value is not within the error threshold range, determine that the chip fails the test and output an error analysis report.
8. A chip testing device based on a visualization waveform platform, characterized in that, Including: An acquisition module for acquiring an initial analog waveform selected by a user based on the chip type; An extraction module for extracting target parameters of the initial analog waveform and obtaining an editing result input by the user, where the editing result is obtained by the user editing the target parameters through a visual waveform platform; An adjustment module for adjusting the initial analog waveform based on the editing result to obtain a target analog waveform; An execution module for converting the target analog waveform into binary waveform data and sending the binary waveform data to a hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data and controls the digital-to-analog converter through the excitation signal to drive the chip to output a response waveform; A determination module for determining whether the chip passes the test according to the target analog waveform and the response waveform.
9. A chip testing system based on a visualization waveform platform, characterized in that The chip test system includes a test device, a hardware execution mechanism, a digital-to-analog converter, and a chip, and a visual waveform platform runs on the test device; The test device is used to acquire an initial analog waveform selected by a user based on the chip type; Extract target parameters of the initial analog waveform and obtain an editing result input by the user, where the editing result is obtained by the user editing the target parameters through a visual waveform platform; Adjust the initial analog waveform based on the editing result to obtain a target analog waveform; Convert the target analog waveform into binary waveform data and send the binary waveform data to the hardware execution mechanism, so that the hardware execution mechanism generates an excitation signal based on the binary waveform data and controls the digital-to-analog converter through the excitation signal to drive the chip to output a response waveform; The test device is further used to collect the response waveform and determine whether the chip passes the test according to the target analog waveform and the response waveform.
10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the chip test method based on a visual waveform platform according to any one of claims 1 to 7.
Citation Information
Cited By
Batch automatic testing method and device and computer equipment
CN121069159A
Test board for chip aging test
CN121476906A