Image forming apparatus with top emitting light emitting device

Abstract

The invention provides an image forming apparatus having a top-emitting light emitting device. A second electrode is laminated on the light-emitting layer on an opposite side across the light-emitting layer from the first electrode laminated on the silicon substrate. The second electrode is transmissive to light. The photoconductor drum is exposed by using the light transmitted through the second electrode.

Description

[0001] This application is a divisional application of a patent application for an invention titled "Image Forming Apparatus Having a Top-Emission Light-Emitting Device", with an application date of July 28, 2020, an application number of 202080058157.3 (international application number PCT / JP2020 / 028778). Technical Field

[0002] The present invention relates to an electrophotographic image forming apparatus, and more particularly, to an image forming apparatus having a top-emission light-emitting device as a light-emitting device that emits light for exposing a photoconductor. Background Art

[0003] Generally, an electrophotographic image forming apparatus is known that forms an image by exposing a photoconductor drum using an exposure head including an LED (light-emitting diode) or an organic EL (organic electroluminescence) diode. The exposure head includes a plurality of light-emitting portions arranged in a direction substantially orthogonal to the rotation direction of the photoconductor drum. The exposure head also includes a rod lens array for forming an image on the photoconductor drum using the light emitted from the light-emitting portions. The number of light-emitting portions and the distance between adjacent light-emitting portions depend on the width of the image forming area on the photoconductor drum and the resolution of the output image of the image forming apparatus. For example, in the case of a printer with an output resolution of 1200 dpi, the width of one pixel is 21.16 μm (omitting the third and subsequent decimal places), and thus the light-emitting portions are formed such that the center-to-center distance between adjacent light-emitting portions is 21.16 μm. Since, unlike a scanning laser beam printer, such an image forming apparatus using an exposure head does not use a deflector such as a polygon mirror, the number of components used is smaller than that of a scanning laser printer, and thus a downsized and low-cost apparatus can be provided.

[0004] An exposure head using a TFT circuit and an organic EL device on a transparent glass substrate has been proposed as such an exposure head (for example, see PTL 1).

[0005] Citation List

[0006] Patent Literature

[0007] PTL 1: Japanese Patent Laid-Open No. 2015-162428 Summary of the Invention

[0008] Technical Problem

[0009] The light-emitting device provided in the exposure head described in PTL1 is a so-called bottom-emission light-emitting device that emits light from the organic layer side to the TFT circuit side. In the bottom-emission light-emitting device, the optical path is restricted by the TFT circuit, so the ratio of the amount of light emitted from the light-emitting device to the amount of light generated in the light-emitting layer is low. For this reason, when the bottom-emission light-emitting device is used as an exposure light source for a photoconductor, there is a challenge of needing to increase the amount of light generated.

[0010] Solution to the problem

[0011] In view of the above problems, the present invention has been conceived. The image forming apparatus of the present invention is an image forming apparatus. The image forming apparatus includes: a photoconductor configured to be driven to rotate about a rotation axis; and an exposure head including a light-emitting device and a lens array configured to guide light emitted from the light-emitting device to the surface of the photoconductor. The light-emitting device includes: a silicon substrate including a drive circuit configured to drive the light-emitting device; a first electrode layer including a plurality of electrodes that are arranged in a two-dimensional array in the rotation direction of the photoconductor and in a direction substantially parallel to the rotation axis and are separately formed on the silicon substrate; a light-emitting layer formed as a layer on the first electrode layer and configured to generate light when a voltage is applied; and a second electrode layer provided in common for the plurality of electrodes of the first electrode layer on the opposite side across the light-emitting layer from the side where the silicon substrate and the first electrode layer are disposed, and the second electrode layer is configured to be able to transmit light. The drive circuit is configured to control the voltage of each electrode included in the first electrode layer according to image data so that the light-emitting layer generates light. The lens array is disposed between the second electrode layer and the surface of the photoconductor so that the light transmitted through the second electrode layer is guided to the photoconductor. The image forming apparatus of the present invention is an image forming apparatus. The image forming apparatus includes: a photoconductor configured to be driven to rotate about a rotation axis; and an exposure head including a light-emitting device and a lens array configured to guide light emitted from the light-emitting device to the surface of the photoconductor. The light-emitting device includes: a silicon substrate including a drive circuit configured to drive the light-emitting device; a first electrode layer including a plurality of electrodes that are arranged in a direction substantially parallel to the rotation axis and are separately formed on the silicon substrate; a light-emitting layer formed as a layer on the first electrode layer and configured to generate light when a voltage is applied; and a second electrode layer provided in common for the plurality of electrodes of the first electrode layer on the opposite side across the light-emitting layer from the side where the silicon substrate and the first electrode layer are disposed, and the second electrode layer is configured to be able to transmit light. The drive circuit is configured to control the potential of each electrode included in the first electrode layer according to image data so that the light-emitting layer generates light. The lens array is disposed between the second electrode layer and the surface of the photoconductor so that the light transmitted through the second electrode layer is guided to the photoconductor.

[0012] Advantageous effects of the present invention

[0013] An image forming apparatus that can expose a photoconductor drum by using a top emission light-emitting device can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 Figure 1 is a schematic cross-sectional view of an image forming apparatus according to an embodiment.

[0015] Figure 2A Figure 2A is a view showing the positional relationship between an exposure head and a photoconductor drum according to an embodiment.

[0016] Figure 2B Figure 2B is a view showing the positional relationship between an exposure head and a photoconductor drum according to an embodiment.

[0017] Figure 3A Figure 3A is a schematic view of an exposure head according to an embodiment.

[0018] Figure 3B Figure 3B is a schematic view of an exposure head according to an embodiment.

[0019] Figure 4 Figure 4 is a view showing the layout relationship on a printed circuit board between a plurality of light-emitting devices according to a first embodiment.

[0020] Figure 5 Figure 5 is a top view showing the layout relationship between a rod lens array and a printed circuit board according to an embodiment.

[0021] Figure 6 Figure 6 is a top view of a light-emitting device according to an embodiment.

[0022] Figure 7A Figure 7A is a schematic cross-sectional view of a light-emitting device according to a first embodiment.

[0023] Figure 7B Figure 7B is a schematic cross-sectional view of a light-emitting device according to a first embodiment.

[0024] Figure 8A Figure 8A is a view showing the array of lower electrodes according to a first embodiment.

[0025] Figure 8B Figure 8B ​​​​​​​​​​​​​​​​​​​​​​​​is a schematic cross-sectional view of a light-emitting device according to a first embodiment, showing an array of lower electrodes according to the first embodiment.

[0026] Figure 9A Figure 9A is a diagram illustrating the states of a plurality of spots according to the first embodiment.

[0027] Figure 9B Figure 9B is a diagram illustrating the states of a plurality of spots according to the first embodiment.

[0028] Figure 9C Figure 9C is a diagram illustrating the states of a plurality of spots according to the first embodiment.

[0029] Figure 10 Figure 10 is a block diagram of an image controller unit and a driving circuit board according to the first embodiment.

[0030] Figure 11A Figure 11A is a circuit diagram in a light-emitting device according to an embodiment.

[0031] Figure 11B Figure 11B is a circuit diagram in a light-emitting device according to an embodiment.

[0032] Figure 12 Figure 12 is a chart showing signal waveforms and the shift of image data.

[0033] Figure 13 Figure 13 is a chart showing the waveforms of signals for performing multiple exposures and image data according to an embodiment.

[0034] Figure 14A Figure 14A is a block diagram of an analog unit according to an embodiment.

[0035] Figure 14B Figure 14B is a circuit diagram of a driving unit according to an embodiment.

[0036] Figure 15 Figure 15 is a circuit diagram in a light-emitting device for switching the light emission order according to an embodiment.

[0037] Figure 16 Figure 16 is a diagram showing the layout relationship on a printed circuit board between a plurality of light-emitting devices according to the second embodiment.

[0038] ​​​​​​​​​​​​​​​​​​​​​​​​​Figure 17 Figure 17 is a schematic cross-sectional view showing a light-emitting device according to a second embodiment.

[0039] Figure 18 Figure 18 is a view showing an array of lower electrodes according to a second embodiment. Detailed Description

[0040] First Embodiment

[0041] is a schematic cross-sectional view showing the configuration of an electrophotographic image forming apparatus according to a first embodiment. Figure 1 The image forming apparatus shown is a multi-functional peripheral (MFP) including a scanner function and a printer function. The image forming apparatus includes a scanner unit 100, an image forming unit 103, a fixing unit 104, a paper feeding and conveying unit 105, and a printer control unit (not shown) that controls these units. The scanner unit 100 optically reads a document image by illuminating a document placed on a document platen and converts the read image into an electrical signal, thereby creating image data.

[0042] The image forming unit 103 includes four image forming stations arranged in the order of a cyan (C) station, a magenta (M) station, a yellow (Y) station, and a black (K) station along the rotation direction (counterclockwise direction) of the endless conveyor belt 111. The four image forming stations have the same configuration. Each image forming station includes a photoconductor drum 102, an exposure head 106, a charger 107, and a developing unit 108. The photoconductor drum 102 is a photoconductor that rotates in the arrow direction (clockwise direction). The suffixes a, b, c, and d of the photoconductor drum 102, the exposure head 106, the charger 107, and the developing unit 108 respectively indicate components corresponding to the black (K) image forming station, the yellow (Y) image forming station, the magenta (M) image forming station, and the cyan (C) image forming station. Hereinafter, the suffixes of the reference symbols are omitted unless a specific photoconductor drum or the like is specified.

[0043] ​​​The image forming unit 103 drives the photoconductor drum 102 to rotate and charges the photoconductor drum 102 using the charger 107. The exposure head 106, which is an exposure component, causes the light emitting device to generate light according to the image data, converges the light generated by the light emitting device onto the photoconductor drum 102 (photoconductor) using the rod lens array, and forms an electrostatic latent image. The developing unit 108, which is a developing component, develops the electrostatic latent image formed on the photoconductor drum 102 using toner. The developed toner image is transferred onto the recording paper on the conveyor belt 111 that conveys the recording paper. Such a series of electrophotographic processes are performed at each image forming station. During image formation, after a predetermined time has elapsed since the start of image formation in the cyan (C) image forming station, the image forming operations are sequentially performed in the magenta (M) image forming station, the yellow (Y) image forming station, and the black (K) image forming station. Thus, a full-color image is formed.

[0044] Figure 1 The image forming apparatus shown in includes the internal paper feeding units 109a, 109b of the paper feeding and conveying unit 105, the external paper feeding unit 109c as a high-capacity paper feeding unit, and the manual paper feeding unit 109d as units for feeding the recording paper. During image formation, the recording paper is fed from a pre-specified paper feeding unit among these feeding units and the fed recording paper is conveyed to the alignment roller 110. The alignment roller 110 conveys the recording paper to the conveyor belt 111 at the timing when the toner image formed in the above-described image forming unit 103 is transferred onto the recording paper. The toner images formed on the photoconductor drum 102 at each image forming station are sequentially transferred onto the recording paper conveyed by the conveyor belt 111. The recording paper with the unfixed toner image transferred thereon is conveyed to the fixing unit 104. The fixing unit 104 incorporates a heat source such as a halogen heater and fixes the toner image on the recording paper by heating and pressing the toner image on the recording paper with two rollers. The recording paper on which the toner image has been fixed by the fixing unit 104 is conveyed to the outside of the image forming apparatus by the conveying roller 112.

[0045] On the downstream side in the recording paper conveying direction of the black (K) image forming station, the optical sensor 113, which is a detection component, is deployed at a position facing the conveyor belt 111. The optical sensor 113 detects the position of the test image formed on the conveyor belt 111 to derive the amount of misregistration between the toner images of the image forming stations. The amount of misregistration derived by the optical sensor 113 is provided to the image controller unit 700 (see Figure 1 and Figure 7Aetc., and the image positions of each color are corrected so that a full-color toner image without registration misalignment is transferred onto the recording paper. The printer control unit (not shown) performs an image forming operation while controlling the above-described scanner unit 100, image forming unit 103, fixing unit 104, paper feeding and conveying unit 105, etc., according to an instruction from an MFP control unit (not shown) that controls the entire multifunction peripheral (MFP).

[0046] Here, as an example of an electrophotographic image forming apparatus, an image forming apparatus is described that is configured to directly transfer a toner image formed on a photoconductor drum 102 at each image forming station onto a recording paper on a conveyor belt 111. However, the embodiments are not limited to such a printer configured to directly transfer the toner image on the photoconductor drum 102 onto the recording paper. For example, an embodiment may also be an image forming apparatus including a primary transfer unit that transfers the toner image on the photoconductor drum 102 onto an intermediate transfer belt and a secondary transfer unit that transfers the toner image on the intermediate transfer belt onto the recording paper.

[0047] Configuration of the exposure head

[0048] Next, reference will be made to Figure 7B and Figure 2A to describe an exposure head 106 that exposes the photoconductor drum 102. Figure 2B is a perspective view showing the positional relationship between the exposure head 106 and the photoconductor drum 102. Figure is a view illustrating the internal configuration of the exposure head 106 and the state in which the light beam from the exposure head 106 is converged onto the photoconductor drum 102 through a rod lens array 203. As ​ shown, the exposure head 106 is mounted to a position facing the photoconductor drum 102 above the photoconductor drum 102 that rotates in the arrow direction ( ​ ) of the image forming apparatus through a mounting member (not shown).

[0049] As ​ shown, the exposure head 106 includes a drive circuit board 202, a light emitting device 400 mounted on the drive circuit board 202, a rod lens array 203, and a housing 204. The rod lens array 203 and the drive circuit board 202 are attached to the housing 204. As ​ and ​As shown, the rod lens array 203 is deployed between the light-emitting device 400 and the photoconductor drum 102. The rod lens array 203 is arranged along the longitudinal direction of the drive circuit board 202 and converges the light beams emitted from the light-emitting device group onto the photoconductor drum 102. In the factory, the exposure head 106 is individually assembled and adjusted, and focus adjustment and light quantity adjustment are performed. Here, the assembly and adjustment are performed such that the distance between the photoconductor drum 102 and the rod lens array 203 becomes a predetermined distance, and the distance between the rod lens array 203 and the light-emitting device 400 becomes a predetermined distance. Therefore, the light from the light-emitting device 400 forms an image on the photoconductor drum 102. For this reason, during the focus adjustment in the factory, the installation position of the rod lens array 203 is adjusted such that the distance between the rod lens array 203 and the light-emitting device 400 becomes a predetermined value. During the light quantity adjustment in the factory, the lower electrode of the light-emitting device 401 (described later) is driven, and the adjustment of the voltage (described later) to be applied to the light-emitting device is performed such that the light converged onto the photoconductor drum 102 via the rod lens array 203 becomes a predetermined amount of light.

[0050] ​ and ​ is a diagram illustrating the drive circuit board 202 and the light-emitting device 400 mounted on the drive circuit board 202. ​ is a schematic diagram showing the configuration of the surface of the drive circuit board 202 on which the light-emitting device 400 is mounted. ​ is a schematic diagram showing the configuration of the surface (second surface) of the drive circuit board 202 opposite to the surface (first surface) on which the light-emitting device 400 is mounted.

[0051] As ​ shown, the light-emitting device 400 mounted on the drive circuit board 202 as the second circuit board has a configuration in which the light-emitting devices 401-1 to 401-20 as independent chips are deployed in two rows in a staggered manner along the longitudinal direction of the drive circuit board 202. In other words, on the drive circuit board 202 (on the second circuit board), the odd-numbered light-emitting devices 401-1,... and the even-numbered light-emitting devices 401-2,... are arranged at different positions in the rotation direction of the photoconductor drum 102. Hereinafter, the light-emitting devices 401-1 to 401-20 will be described as the light-emitting device 400 in general terms. In ​In [the figure], the vertical direction represents the rotation direction of the photoconductor drum 102 as the first direction, and the horizontal direction represents the longitudinal direction as the second direction orthogonal to the first direction. The longitudinal direction is also the intersecting direction intersecting with the rotation direction of the photoconductor drum 102. Each light-emitting device 400 includes a total of 748 lower electrodes (described later). In this embodiment, the lower electrodes are deployed one by one at intervals of 21.16 μm (≈2.54 cm / 1200 dots). As a result, the array distance from one end to the other end of the 748 lower electrodes in one light-emitting device is approximately 15.8 mm (≈21.16 μm × 748). The light-emitting device 400 is composed of 20 light-emitting devices 401-1 to 401-20. The number of lower electrodes in the light-emitting device 400 is 14,960 (= 748 electrodes × 20 chips), and the light-emitting device 400 can perform exposure on an image width of approximately 316 mm (≈ approximately 15.8 mm × 20 chips) in the longitudinal direction.

[0052] As ​ shown in [the figure], the connector 305 is mounted on the surface of the drive circuit board 202 opposite to the surface on which the light-emitting device 400 is mounted. The connector 305 is a connector for connecting a power supply line and a control signal for controlling the light-emitting device 400 from an image controller unit 700 (not shown). The light-emitting devices 401-1 to 401-20 are driven via the connector 305.

[0053] ​ is a view showing the state of the boundary portion between the chips of the light-emitting device 401 arranged in two rows in the longitudinal direction. The horizontal direction is ​ the longitudinal direction of the light-emitting device 401. ​ shows the boundary portion between the chips of the light-emitting device 401 (the portion where the ends of the chips overlap in the longitudinal direction (overlapping portion)). In addition, at the boundary portion between the light-emitting device 401-2n and the light-emitting device 401-2n + 1, the pitch of the lower electrodes at the ends between different light-emitting devices (the distance between the centers of two lower electrodes) is substantially 21.16 μm, that is, the pitch of a resolution of 1200 dpi.

[0054] ​ is a top view showing the layout relationship between the rod lens array 203 and the drive circuit board 202 according to this embodiment. The rod lens array 203 is a lens group in which rod lenses with optical axes extending in the Z direction are arranged as ​ shown in [the figure]. A plurality of rod lenses 500 are deployed within a length greater than or equal to the length of the light-emitting regions of the light-emitting devices 401-1 to 401-20 mounted on the drive circuit board 202. In addition to the rod lens array 203, a microlens array or the like can be used.

[0055] Configuration of the light-emitting device

[0056] ​ is a schematic diagram showing the internal configuration of the light-emitting device 401. Here, as ​ shown, the longitudinal direction of the light-emitting device 401 is defined as the X direction, and the lateral direction of the light-emitting device 401 is defined as the Y direction. Here, the Y direction is the rotation direction of the photoconductor drum 102, in other words, the moving direction of the light surface (photoconductor surface) of the rotating photoconductor drum 102. The X direction is a direction substantially orthogonal to the Y direction - that is, the rotation direction of the photoconductive drum 102. The Y direction is a direction substantially parallel to the rotation direction of the photoconductor drum 102. The substantially orthogonal direction allows an angle tilt of about ±1° with respect to 90°. The substantially parallel direction allows an angle tilt of about ±1° with respect to 0° formed therebetween. In the light-emitting device 401, wiring bonding pads (hereinafter, referred to as WB pads) 601-1, 601-2, 601-3, 601-4 are formed on the silicon circuit board 402 as the first circuit board. The circuit section 602 (dotted line) as the driving section is incorporated into the silicon circuit board 402. An analog driving circuit, a digital control circuit, or a component including both can be used as the circuit section 602. Power is supplied to the circuit section 602, signals are input from the outside of the light-emitting device 401, and signals are output to the outside of the light-emitting device 401 via the WB pads, etc.

[0057] The light-emitting device 401 according to the present embodiment includes a linear light-emitting region 604 extending along the rotation axis direction of the photoconductor drum. The light-emitting region 604 includes a positive electrode, a negative electrode, and a light-emitting layer 450 (described later). The light-emitting region 604 is a region where light is generated when there is a potential difference between the positive electrode and the negative electrode.

[0058] Process technologies for forming integrated circuits have been developed, and the silicon circuit board 402 has been used as a circuit board for various integrated circuits. Therefore, it is beneficial to form high-speed and high-function circuits with high density. In addition, large-diameter wafers have been allocated for the silicon circuit board. Therefore, it is beneficial that large-diameter wafers are available on the market and can be obtained at low cost.

[0059] will be further described in detail with reference to ​ the light-emitting device 401. ​ The X direction in

[0060] ​ and ​ is along ​ the enlarged relevant part view of the schematic cross-sectional view taken along line A-A in ​ and ​is a schematic view of the lower electrodes 410-1 to 410-748 when observed in the Z direction (described later). As ​ and ​ shown in, the light-emitting device 401 includes a silicon circuit board 402, lower electrodes 410-1 to 410-748, lower electrodes 420-1 to 420-748, a light-emitting layer 450, and an upper electrode 460.

[0061] The silicon circuit board 402 is a driving circuit board that forms a driving unit including a driving unit corresponding to the lower electrodes 410-1 to 410-748 (described later) in the manufacturing process.

[0062] As ​ shown in, the lower electrodes 410-1 to 410-748 (negative electrodes) are a plurality of electrodes formed as a layer (first electrode layer) on the silicon circuit board 402. By using Si integrated circuit processing technology together with the manufacturing process for manufacturing the silicon circuit board 402, the lower electrodes 410-1 to 410-748 are respectively formed on the plurality of driving units incorporated in the silicon circuit board 402. The lower electrodes 410-1 to 410-748 are preferably made of a metal having a high reflectivity with respect to the emission wavelength of the light-emitting layer 450 (described later). Therefore, the lower electrodes 410-1 to 410-748 preferably contain silver (Ag), aluminum (Al), their alloys, silver-magnesium alloys, etc.

[0063] As ​ shown in, the lower electrodes 410-1 to 410-748 are electrodes provided corresponding to pixels in the X direction. In other words, each of the lower electrodes 410-1 to 410-748 is an electrode provided to form one pixel. The lower electrodes 410-1 to 410-748 are defined as the first electrode array.

[0064] In the present embodiment, the width W of the lower electrodes 410-1 to 410-748 in the X direction corresponds to the width of one pixel. The gap d is the distance between the lower electrodes in the X direction. Since the lower electrodes 410-1 to 410-748 are formed on the silicon circuit board 402 with the gap d, the plurality of driving units formed in the silicon circuit board 402 can independently control the voltages of the lower electrodes 410-1 to 410-748. The organic material of the light-emitting layer 450 is filled in the gap d, and the lower electrodes are separated by the organic material.

[0065] In the light-emitting device according to the present embodiment, the width W of each of the lower electrodes 410-1 to 410-748 is set to a nominal dimension of 20.90 μm, and the gap d is set to a nominal dimension of 0.26 μm. In other words, the light-emitting device according to the present embodiment includes one lower electrode 410 every 21.16 μm in the X direction. Since 21.16 μm is the size of one pixel at 1200 dpi, the width of the lower electrode 410 in the X direction of each lower electrode is the size of one pixel equivalent to the output resolution of the image forming device according to the present embodiment. The processing rule in the light-emitting device according to the present embodiment is about 0.2 μm and the accuracy is high, and the width of d1 can be formed with a resolution of 0.26 μm.

[0066] The width of each of the lower electrodes 410-1 to 410-748 in the Y direction, which is the rotation direction of the photoconductor drum, is also W. In other words, the lower electrodes 410-1 to 410-748 according to the present embodiment each have a square shape with a side length of 20.90 μm, and the area of the lower electrode 410 is 436.81 μm. 2 This occupies approximately 97.6% of the area of a pixel, i.e., 447.7456 μm 2 . The amount of light emitted by an organic light-emitting material is less than that of an LED. In contrast, when a square-shaped lower electrode is formed on the silicon circuit board 402 with a distance between adjacent lower electrodes being reduced as described above, a light-emitting area for obtaining an amount of light to such an extent that the potential of the photoconductor drum can be ensured. It is desirable to ensure an area of the lower electrode that is 90% or more of the occupied area as one pixel. Therefore, it is desirable that the width of one side of the lower electrode 410 be formed at approximately 20.07 μm or more for an image forming apparatus having an output resolution of 1200 dpi, and it is desirable that the width of one side of the lower electrode 410 be formed at approximately 10.04 μm or more for an image forming apparatus having an output resolution of 2400 dpi.

[0067] On the other hand, the upper limit of the occupied area of the lower electrode 410 should be set according to the transmittance of the upper electrode and the rod lens array (described later), and in this embodiment, the upper limit is set to 110% of the occupied area of one pixel. When the occupied area of the lower electrode 410 is designed to be larger than 110% of the occupied area of one pixel, the size of the pixels formed when exposing a photoconductor drum with high sensitivity may significantly exceed the resolution. Therefore, the upper limit value of the occupied area of the lower electrode 410 is set to 110%. Thus, it is desirable that for an image forming apparatus with an output resolution of 1200 dpi, the width of one side of the lower electrode 410 is formed to be about 22.19 μm or less, and it is desirable that for an image forming apparatus with an output resolution of 2400 dpi, the width of one side of the lower electrode 410 is formed to be about 11.10 μm or less. In other words, the range of the occupied area of the lower electrode with respect to the occupied area of one pixel is preferably higher than or equal to 90% and lower than or equal to 110%.

[0068] The shape of the lower electrode is not limited to a square shape, and it can be a shape such as a polygon shape other than a quadrilateral shape, a circular shape, and an elliptical shape as long as it emits light with an exposure area size corresponding to the output resolution of the image forming apparatus and the quality of the output image meets the design specifications of the image forming apparatus by this light.

[0069] As ​ shown, the light emitting device 401 according to this embodiment includes lower electrodes 420-1 to 420-748 in addition to lower electrodes 410-1 to 410-748. The lower electrodes 420-1 to 420-748 and the lower electrodes 410-1 to 410-748 are a plurality of electrodes formed as a layer (first electrode layer) on the silicon circuit board 402. The lower electrodes 420-1 to 420-748 are defined as a second electrode array. In other words, the light emitting device 4 includes lower electrodes arranged in a two-dimensional array. The sizes, shapes, and layouts in the X direction of the lower electrodes 420-1 to 420-748 are similar to those of the lower electrodes 420-1 to 420-748, so the description is omitted.

[0070] The lower electrodes 420-1 to 420-748 (second electrode array) are deployed with a gap d in the Y direction from the lower electrodes 410-1 to 410-748 (first electrode array). The lower electrode 420-1 is deployed adjacent to the lower electrode 410-1 in the Y direction. Similarly, the lower electrodes 420-2 to 420-748 are respectively deployed adjacent to the lower electrodes 410-2 to 410-748. As in the case of this embodiment, it is not always necessary to design the lower electrodes such that the distance between the lower electrodes in the X direction is equal to the distance between the lower electrodes in the Y direction; however, it is desirable to design the lower electrodes such that the distances between the lower electrodes in both directions are equal to each other in order to effectively arrange the lower electrodes in a predetermined area. In this embodiment, for the sake of easy description, a light-emitting device including two rows of electrode arrays is illustrated; however, as ​ shown, a selected number of rows of three or more rows of electrode arrays can be employed. For example, as in the above case, the lower electrodes 430-1 to 430-748 can be respectively deployed adjacent to the lower electrodes 420-1 to 420-748, and the lower electrodes 440-1 to 440-748 can also be respectively deployed adjacent to the lower electrodes 430-1 to 430-748. Hereinafter, for the sake of easy description, a light-emitting device including the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 will be described as an example.

[0071] When the lower electrode 410-1 and the lower electrode 420-1 are driven simultaneously, the area of the central position on the photoconductor drum 102 exposed by the driving electrode is shifted by W + d in the rotational direction of the photoconductor drum 102. The image forming apparatus according to this embodiment exposes a region corresponding to one pixel in the output resolution of the image forming apparatus by driving a plurality of lower electrodes (e.g., the lower electrode 410-1 and the lower electrode 420-1) adjacent to each other in the rotational direction of the photoconductor drum 102. For this reason, by providing a time difference between the timing of applying a voltage to the lower electrode 410-1 and the timing of applying a voltage to the lower electrode 420-1 according to the rotational speed of the photoconductor drum 102, the region corresponding to one pixel can be exposed multiple times (multiple exposures).

[0072] Next, the light-emitting layer 450 will be described. The light-emitting layer 450 is formed to be stacked on the silicon circuit board 402 on which the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 are formed. In other words, in the region where the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 are formed, the light-emitting layer 450 is stacked on the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748. In the region where the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 are not formed, the light-emitting layer 450 is stacked on the silicon circuit board 402. In the present embodiment, in the light-emitting device 401, the light-emitting layer 450 is formed to bridge all the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748; however, this embodiment is not limited thereto. For example, the light-emitting layer 450 may be formed to be stacked on each lower electrode separately as in the case of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748, or the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 may be divided into a plurality of groups, and for each divided group, a light-emitting layer may be stacked on the lower electrodes belonging to the same group.

[0073] For example, an organic material may be used for the light-emitting layer 450. The light-emitting layer 450 as an organic EL film is a stacked structure including functional layers such as an electron transport layer, a hole transport layer, an electron injection layer, a hole injection layer, an electron blocking layer, and a hole blocking layer. In addition to the organic material, an inorganic material may be used for the light-emitting layer 450.

[0074] The upper electrode 460 (positive electrode) is stacked on the light-emitting layer 450 (as the second electrode layer). The upper electrode 460 is an electrode capable of transmitting (transmittable) light having the emission wavelength of the light-emitting layer 450. Therefore, the upper electrode 460 according to the present embodiment uses a material containing indium tin oxide (ITO) as a transparent electrode. The electrode made of indium tin oxide has a light transmittance of 80% or higher in the visible light range, and thus this electrode is suitable as an electrode for an organic EL device.

[0075] The upper electrode 460 is formed at least across one side of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 with respect to the light-emitting layer 450. In other words, the light-emitting layer 450 is disposed between the upper electrode 460 and the lower electrodes 410-1 to 410-748 and between the upper electrode 460 and the lower electrodes 420-1 to 420-748 in the Z direction. And when the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 are projected onto the upper electrode 460 in the Z direction, the regions where the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 are formed are embedded in the region where the upper electrode 460 is formed. The transparent electrode does not need to be laminated over the entire light-emitting layer 450; however, in order to emit the light generated in the light-emitting layer 450 and effectively emit it to the outside of the light-emitting device, the occupied area of the upper electrode 460 is preferably higher than or equal to 100% with respect to the occupied area of one pixel, and more preferably higher than or equal to 120%. Optionally, the upper limit value of the occupied area of the upper electrode 460 is designed based on the area of the silicon circuit board 402 and the light-emitting layer 450. The wiring can be disposed in regions other than the region where light passes through in the upper electrode 460.

[0076] The upper electrode 460 according to the present embodiment is a positive electrode commonly provided for the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748; however, the upper electrode 460 can be provided individually for each of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748, or one upper electrode can be provided for each group of lower electrodes.

[0077] The driving circuit controls the potential of each of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 according to the image data so as to generate a potential difference between the upper electrode 460 and the selected lower electrode among the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748.

[0078] The light-emitting device according to the present embodiment is a device having an emission system of a so-called top emission type. When a voltage is applied between the upper electrode 460 as the positive electrode and each of the lower electrodes 410 and 420 as the negative electrodes and as a result a potential difference is generated between the two electrodes, electrons flow into the light-emitting layer 450 from the negative electrode, and holes flow into the light-emitting layer 450 from the positive electrode. Then, the electrons and holes recombine with each other in the light-emitting layer 450, and as a result, the light-emitting layer 450 generates light. When the light-emitting layer 450 generates light, the light directed toward the upper electrode 460 passes through the upper electrode 460 and ​ and ​It exits from the light-emitting device in the direction of arrow A indicated in the figure. The light from the light-emitting layer 450 toward the lower electrodes 410 and 420 is reflected on the lower electrodes 410 and 420 toward the upper electrode 460, and the reflected light also passes through the upper electrode 460 and exits from the light-emitting device. There is a time difference in the timing of the light exiting from the upper electrode 460 between the light directly emitted from the light-emitting layer 450 toward the upper electrode 460 and the light reflected on the lower electrodes 410 and 420 and emitted from the upper electrode 460; however, the thickness of the layers of the light-emitting device is minimal, so the emission of light can be regarded as being at substantially the same time.

[0079] When a transparent electrode made of indium tin oxide or the like is used as the upper electrode 460, the aperture ratio representing the light transmittance of the electrode can be made substantially equal to the transmittance of the upper electrode 460. In other words, since there is substantially no area that attenuates or blocks light other than the upper electrode 460, the light generated from the light-emitting layer 450 becomes emission light that is as little attenuated or blocked as possible.

[0080] As described above, when the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 are formed by high-precision Si integrated circuit processing technology, the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 can be deployed at high density. Therefore, almost all of the area of the light-emitting portion 404 (here, the sum of the areas of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 and the areas of the regions between the adjacent lower electrodes) can be allocated to the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748. In other words, the utilization efficiency of the light-emitting area per unit area of the exposure head is high.

[0081] When light-emitting materials that are easily affected by moisture, such as organic EL layers and inorganic EL layers, are used for the light-emitting layer 450, it is desirable to perform sealing to prevent moisture from entering the light-emitting portion 404. As a sealing method, for example, a separate thin film or a laminated sealing film made of silicon oxide, silicon nitride, and aluminum oxide is formed. As a method for forming the sealing film, a method with excellent performance for coating structures such as steps is preferred, and for example, the atomic layer deposition method (ALD method) or the like can be used. The material, structure, formation method, etc. of the sealing film are an example, and the embodiments are not limited to the above examples. Appropriate materials, structures, formation methods, etc. can be selected as needed.

[0082] Shape of the exposure area for multiple exposures

[0083] ​ Shows the positional relationship between the exposure areas (dots) during multiple exposures. ​Shows the exposure area on the exposure head 106 that is exposed by driving the lower electrode 410-n (n is a natural number, 1 ≤ n ≤ 748) and the lower electrode 420-n adjacent to the lower electrode 410-n in the Y direction. In other words, ​ Shows the exposure area of two lower electrodes arranged in the Y direction - the lower electrode 410-n and the lower electrode 420-n, which are the nth lower electrode among the 748 lower electrodes arranged in the X direction. When voltages for causing the light-emitting layer 450 to generate light are applied to the lower electrode 410-n and the lower electrode 420-n in the Y direction of the silicon circuit board 402 substantially simultaneously, the exposure area corresponding to the lower electrode 410-n and the exposure area corresponding to the lower electrode 420-n are at different positions in the Y direction as ​ shown. The position of the exposure area is similar to the layout relationship between the lower electrode 410-n and the lower electrode 420-n in the Y direction. In other words, the center-to-center distance between the exposure areas in the Y direction is W (μm) + d (μm).

[0084] ​ Shows the state of the exposure area when the timing (hereinafter referred to as the conduction timing) of applying a voltage to the lower electrode 420-n, which is deployed to expose the area on the downstream side of the lower electrode 410-n in the rotation direction of the photoconductor drum 102, is delayed according to the expression (1) based on the rotation direction and rotation speed Vdr (mm / s) of the photoconductor drum 102. The timing T at which the positions of the exposure areas formed on the photoconductor drum 102 coincide with each other is controlled according to the delay time Tdelay obtained from the expression (1).

[0085] Tdelay = ((W + d) ÷ 1000) ÷ Vdr (1)

[0086] In this embodiment, a light-emitting signal is generated such that the maximum value Tw of the light emission time corresponding to each lower electrode of the pixel is equal to the time corresponding to the line interval in the Y direction, and the expression (2) is represented by the resolution (e.g., 1200 dpi) and the rotation speed Vdr.

[0087] Tw = (25.4 ÷ 1200) ÷ Vdr (2)

[0088] Exposure can be performed at substantially the same position on the photoconductor drum 102 by using the lower electrode 410-n and the lower electrode 420-n with multiple exposures, so that the amount of light received by the photoconductor drum 102 can be increased in proportion to the number of lower electrodes arranged in the Y direction. To maintain such an advantage, the deviation between the positions of the exposure areas of the lower electrodes that perform multiple exposures on the photoconductor drum 102 is preferably small.

[0089] ​ An example is shown in which the positions of the exposed areas on the photoconductor drum 102 in multiple exposures are offset from each other. In this example, although the two exposed areas formed by multiple exposures do not completely overlap, the two exposed areas partially overlap. Ideally, since the dots are clearly formed, a situation where the two exposed areas are substantially coincident (completely overlapping) as shown in ​ is preferred. However, when the exposed areas are partially overlapping as shown in ​ , although the sharpness of the dots decreases compared to ​ , the required density can be obtained.

[0090] For this reason, even when there are variations due to control, the time Tdelay falls within the range of the expression (3) of Ws (μm) for the size of the exposed area, and the light emission timing is controlled within the allowable error ΔT of the light emission timing.

[0091] ΔT = (Ws ÷ 1000) ÷ Vdr (3)

[0092] Control block

[0093] ​ A block diagram of the image controller unit 700 and the drive circuit board 202 is shown. Hereinafter, the chip select signal is represented by cs_x, the line sync signal is represented by lsync_x, the clock signal is represented by clk, and the image data signal is represented by data. In the present embodiment, for the sake of simple description, monochromatic processing will be described, and similar processing is performed in parallel for the four colors.

[0094] Image controller unit

[0095] The image data generated by the scanner unit 100 is input to the image controller unit 700, and the image controller unit 700 sends a control signal for controlling the drive circuit board 202. The image data input to the image controller unit 700 may be the above-mentioned data generated in the scanner unit 100, or may be data transmitted via a network device (not shown) by a personal computer. The control signal includes a chip select signal cs_x indicating the valid range of the image data, a clock signal clk, an image data signal data, a line synchronization signal lsync_x indicating the partition of each line of image data, and a communication signal with the CPU 703. The signals are respectively sent to the light-emitting device 401 in the drive circuit board 202 via the chip select signal line 705, the clock signal line 706, the image data signal line 707, the line synchronization signal line 708, and the communication signal line 709. The image controller unit 700 performs processing on the image data and processing on the printing timing. The image data generation unit 701 generates image data for print output by dithering the image data received from the scanner unit 100 or the outside of the image forming apparatus at a resolution specified by the CPU 703. In this embodiment, dithering is performed at a resolution of, for example, 1200 dpi.

[0096] The synchronization signal generation unit 704 generates a line synchronization signal lsync_x as a second signal. For a predetermined rotational speed of the photoconductor drum 102, the CPU 703 provides an instruction on the time interval of the signal period to the synchronization signal generation unit 704 as one line period. Here, one line period is the period during which the surface of the photoconductor drum 102 moves a pixel size of 1200 dpi (about 21.16 μm) in the rotational direction. For example, when printing is performed at a speed of 200 mm / s in the conveyance direction of the recording paper, the CPU 703 provides an instruction on the time interval to the synchronization signal generation unit 704 when one line period is set to 105.8 μs (the second and subsequent decimal places are omitted). The CPU 703 calculates the speed in the conveyance direction by using the set value (fixed value) of the printing speed (image forming speed) set in a control unit (not shown) for controlling the speed of the photoconductor drum 102. For example, the printing speed is set according to the type of the recording paper.

[0097] The chip data conversion unit 702 divides one line of image data into image data for each light-emitting device 401 in synchronization with the line synchronization signal lsync_x generated in the synchronization signal generation unit 704. The chip data conversion unit 702 sends each of the image data divided for each light-emitting device 401 to the drive circuit board 202 together with the clock signal clk and the chip select signal cs_x. The clock signal clk is a reference signal for control.

[0098] Drive circuit board

[0099] Next, the configuration of the drive circuit board 202 will be described. The header information storage unit 710 is a storage device that stores header information such as the amount of light generated by each light-emitting device 401 and installation position information, and is connected to the CPU 703 via the communication signal line 709. The clock signal line 706, the image data signal line 707, the horizontal synchronization signal line 708, and the communication signal line 709 are connected to all the light-emitting devices 401. The chip select signal line 705 is connected to the input terminal of the light-emitting device 401-1. The output of the light-emitting device 401-1 is connected to the input terminal of the light-emitting device 401-2 via the signal line 711-1, and the output terminal of the light-emitting device 401-2 is connected to the input terminal of the light-emitting device 401-3 via the signal line 711-2. In this way, the chip select signal line 705 (or the signal line 711) is connected through the light-emitting devices 401 by a so-called cascade chain (cascade connection). Each light-emitting device 401 controls the voltage of the lower electrode of the light-emitting device 401 according to the set values set by the chip select signal line 705, the clock signal line 706, the horizontal synchronization signal line 708, the image data signal line 707, and the communication signal line 709. Each light-emitting device 401 generates a chip select signal for the subsequent light-emitting device 401.

[0100] Circuit configuration in the light-emitting device

[0101] ​ A circuit block diagram in the light-emitting device 401 is shown. The circuit unit 406 in the light-emitting device 401 includes a digital unit 800 and an analog unit 806. The digital unit 800 has a function of generating pulse signals for driving the lower electrodes 410-n and 420-n according to set values preset by communication signals and various signals in synchronization with the clock signal CLK and sending the pulse signals to the analog unit 806 via the pulse signal line 907. Here, the various signals are the chip select signal cs_x, the image data signal data, and the horizontal synchronization signal lsync_x. The digital unit 800 has a function of generating a chip select signal for the subsequent light-emitting device 401 from the input chip select signal cs_x.

[0102] Digital unit

[0103] The communication IF unit 801 controls the writing and reading of the set values to / from the register unit 802 according to the communication signals from the CPU 703. The register unit 802 stores the set values required for operations (predetermined set values). Examples of the set values include the exposure timing information used in the image data storage unit 804, the information about the width and phase of the pulse signal generated in the pulse signal generation unit 805, and the set information of the drive voltage set in the analog unit 806. Since the drive voltage can be derived from the resistance value between the lower electrode and the upper electrode and the range of this resistance value is known in advance, the information about the drive current can be stored instead of the set information of the drive voltage. The register unit 802 stores at least one of these pieces of information. The chip select signal generation unit 803, as the second generation unit, generates the chip select signal for the subsequent light-emitting device 401 by delaying the chip select signal cs_x of the input first signal, and transmits the chip select signal via the signal line 711. The image data storage unit 804 holds the image data when the input chip select signal cs_x is valid, and outputs the image data to the pulse signal generation unit 805 synchronously with the horizontal synchronization signal lsync_x. Details will be described later.

[0104] The pulse signal generation unit 805 generates a pulse signal based on the width information and phase information of the pulse signal set in the register unit 802 according to the image data input from the image data storage unit 804, and outputs the pulse signal to the analog unit 806. Details will be described later. The analog unit 806 generates the signal required to drive the lower electrode according to the pulse signal generated in the digital unit 800. Details will be described later.

[0105] Image data storage unit

[0106] Next, the operation of the image data storage unit 804 will be described. The image data storage unit 804 according to the first embodiment is incorporated in the light-emitting device 401. An example where the chip select signal cs_x and the horizontal synchronization signal lsync_x are negative logic signals will be described; however, these signals can be positive logic. ​ is the circuit configuration diagram of the image data storage unit 804. The clock gate circuit 810 outputs the logical product of the inverted signal of the chip select signal cs_x and the clock signal clk. The clock gate circuit 810 outputs the clock signal s_clk to the flip-flop circuit 811 only when the chip select signal cs_x is valid.

[0107] The trigger circuit 811 receives the image data signal data input to the image data storage unit 804 as the original input. The trigger circuits 811 equal in number to the number of the array of the lower electrodes 410 provided in the longitudinal direction of the light-emitting device 401 (748 in this embodiment) are connected in series. The trigger circuit 811 operates in response to the clock signal s_clk sent from the clock gate circuit 810. The outputs of the trigger circuits 811 are respectively output as the image data dly_data_000 to dly_data_747 to the adjacent next trigger circuit 811 and the trigger circuit 812. The trigger circuits 811 and the trigger circuit 812 equal in number to the number of the lower electrodes 401 (748 in this embodiment) are provided in the longitudinal direction of the lower electrode array 401.

[0108] The trigger circuit 812 respectively receives the outputs of the trigger circuits 811 as inputs and operates in response to the line synchronization signal lsync_x. The outputs of the trigger circuits 812 are respectively output as the image data buf_data_0_000 to buf_data_0_747 to the pulse signal generation unit 805 (805-1, 805-3, 805-5,...) and the trigger circuit 813. The trigger circuits 812 all serve as memory circuits, and the trigger circuits 812 provided for one lower electrode array (the lower electrodes 401-1 to 401-748) serve as a memory circuit group (or the first memory circuit group). The pulse signal generation units 805-1, 805-3, 805-5,... serve as a first pulse signal generation unit group for generating the first pulse signal. The pulse signal generation unit 805-1 generates a pulse signal for driving the lower electrode 410-1. The pulse signal generation unit 805-3 generates a pulse signal for driving the lower electrode 410-2. The pulse signal generation unit 805-5 generates a pulse signal for driving the lower electrode 410-3.

[0109] Each trigger circuit 813 receives the output of trigger circuit 812 as an input and operates in response to the multi-exposure timing signal lshift_0. The outputs of trigger circuits 813 are output as image data buf_data_1_000 to buf_data_1_747 to the pulse signal generation unit 805 (805-2, 805-4, 805-6,...), respectively. Each trigger circuit 813 serves as a memory circuit, and the trigger circuits 813 provided for one lower electrode array (lower electrodes 402-1 to 402-748) serve as a memory circuit group (or second memory circuit group). The pulse signal generation units 805-2, 805-4, 805-6,... serve as a second pulse signal generation unit group for generating second pulse signals. The pulse signal generation unit 805-2 generates a pulse signal for driving the lower electrode 420-1. The pulse signal generation unit 805-4 generates a pulse signal for driving the lower electrode 420-2. The pulse signal generation unit 805-6 generates a pulse signal for driving the lower electrode 420-3.

[0110] The multi-exposure timing signal generation unit 814, which is a first generation unit, generates the multi-exposure timing signal lshift_0 as a timing signal based on the horizontal synchronization signal lsync_x, the clock signal clk, and a plurality of timing setting signals lshift_start. In other words, the multi-exposure timing signal generation unit 814 generates the multi-exposure timing signal lshif_0 for generating the pulse signals of the pulse signal generation units 805-2, 805-4,... at timings different from those of the pulse signal generation units 805-1, 805-3,.... In the present embodiment, the multi-exposure timing signal generation unit 814 generates the multi-exposure timing signal lshift_0 by delaying the horizontal synchronization signal lsync_x by a set value set in the plurality of timing setting signals lshift_start. For example, when the plurality of timing setting signals lshift_start are set to 1 (lshift_start = 1), the multi-exposure timing signal lshift_0 becomes a signal obtained by delaying the horizontal synchronization signal lsync_x by one cycle of the clock signal clk. The multi-exposure timing signal generation unit 814 generates the multi-exposure timing signal lshift_0 based on the rotation speed of the photoconductor drum 102. In other words, the plurality of timing setting signals lshift_start are set according to the delay time Tdelay obtained from the above expression (1).

[0111] ​ is a timing chart showing the operation of the image data storage unit 804 in the longitudinal direction of the light-emitting device 401. At ​Among them, (i) shows the waveform of the clock signal clk, (ii) shows the waveform of the line synchronization signal lsync_x, (iii) shows the waveform of the chip select signal cs_x, and (iv) shows the image data signal data with values from 000 to 747. Here, for example, "000" represents the image data corresponding to the lower electrode 410-1, and "747" represents the image data corresponding to the lower electrode 410-748. The diagonally shaded area of the image data signal data represents invalid data as image data. (v) shows the image data dly_data_000, etc., which are the outputs of the flip-flop circuit 811, and (vi) shows the image data buf_data_0_000, etc., which are the outputs of the flip-flop circuit 812.

[0112] During the period from time T0 to time T1 when the chip select signal cs_x is 0 (cs_x = 0 (low level)), the image data is shifted as follows through the serially connected flip-flop circuit 811. Time T1 is the time when cs_x = 0 is captured at the rising edge of the clock signal clk. In other words, the image data is shifted as data → dly_data_000 → dly_data_001 →... → dly_data_747. During the period when the chip select signal cs_x is at a low level (cs_x = 0), it is assumed that 748 clock signals clk, which is equal to the number of lower electrodes in the longitudinal direction of the light-emitting device 401, are input. With this configuration, one line of image data is held in dly_data_000 to dly_data_747.

[0113] From time T1 onwards, the chip select signal cs_x is 1 (cs_x = 1 (high level)), so the shift operation is not performed, and the image data at time T1 is held. For example, the image data dly_data_000 held in the first flip-flop circuit 811 from time T1 onwards is 747. When the line synchronization signal lsync_x becomes 0 (lsync_x = 0 (low level)) at time T2, one line of image data is simultaneously output as buf_data_0_000 to buf_data_0_747 to the pulse signal generation unit 805. Time T2 is the time when lsync_x = 0 is captured at the rising edge of the clock signal clk. In other words, the image data dly_data_000, etc., held in the flip-flop circuit 811 is output as image data buf_data_0_000, etc., to the pulse signal generation unit 805 through the flip-flop circuit 812.

[0114] Next, ​ is a timing diagram showing the operation of the image data storage unit 804 in the Y direction. In ​In (i), the waveform of the horizontal synchronization signal lsync_x is shown, and in (ii), image data buf_data_0_000 etc. which are the outputs of the flip-flop circuit 812 are shown. In (iii), the waveform of the multiple exposure timing signal lshift_0 is shown, and in (iv), image data buf_data_1_000 etc. which are the outputs of the flip-flop circuit 813 are shown. ​ A representative illustration shows at ​ the leftmost image data buf_data_0_000 which is the output of the flip-flop circuit 812 and image data buf_data_1_000 which is the output of the flip-flop circuit 813 in

[0115] As described in the reference ​ , at ​ time T10 in ​ , the image data dly_data_000 is input to the flip-flop circuit 812, and time T10 is the timing at which the horizontal synchronization signal lsync_x becomes 0 at time T2 in

[0116] Then, the value of the image data dly_data_000 is output from the flip-flop circuit 812 as the image data buf_data_0_000. At time T11, the multiple exposure timing signal lshift_0 is input to the flip-flop circuit 813 as a low level (lshift_0 = 0). Then, the value of the image data buf_data_0_000 output from the flip-flop circuit 812 is output from the flip-flop circuit 813 as the image data buf_data_1_000 to the pulse signal generation unit 805. In this way, the data output to the pulse signal generation unit 805 as buf_data_0_000 in the state where lsync_x = 0 is output to the pulse signal generation unit 805 again as buf_data_1_000 at the next timing when lshift_0 = 0. Here, time T11 when the multiple exposure timing signal lshift_0 becomes a low level is the timing delayed by a plurality of timing setting signals lshift_start from time T10 when the horizontal synchronization signal lsync_x becomes a low level. The image data buf_data_0_000 is output to the pulse signal generation unit 805 corresponding to the lower electrode used in the previous exposure in the Y direction on the photoconductor drum 102. The image data buf_data_1_000 is output to the pulse signal generation unit 805 corresponding to the lower electrode used in the subsequent exposure in the Y direction on the photoconductor drum 102. Thus, multiple exposure is achieved.In the present embodiment, a configuration for performing multiple exposures by using two lower electrodes 410-n and 420-n arranged in the Y direction is described as an example; however, the number of lower electrodes for multiple exposures is not limited to two. When the number of lower electrodes for multiple exposures increases (when the lower electrodes of m = 3 or more rows are used for multiple exposures), ​ the trigger circuits 812, 813 (748) shown in can be increased to m rows (m × 748). Therefore, the image data corresponding to the lower electrodes of m rows (m × 748) can be held. By increasing the pulse signal generation unit 805 connected to the m-row trigger circuits to m rows (m × 748), the light emission timing of each of the lower electrodes of m rows (m × 748) can be controlled, and as a result, m-row multiple exposures can be performed.

[0117] In the present embodiment, the trigger circuit is described as an example of a component that holds the image data of each lower electrode. With this configuration, the trigger circuit is deployed together with the lower electrodes 410-1 to 410-748, resulting in a simpler circuit with a smaller wiring area. On the other hand, when the trigger circuit is not used, the following configuration can be adopted. As long as a memory circuit (e.g., RAM, etc.) corresponding to the lower electrode and a control unit that controls the timing of reading from the memory circuit and the timing of writing to the memory circuit are provided, there is no need to use the trigger circuit.

[0118] When the number of lower electrodes for multiple exposures increases and the number of lower electrode arrays for multiple exposures is selectable, further dynamic light amount control can be performed. For example, in the case of a configuration where the number of rows m of the lower electrode array is m = 10 and the lower electrodes are arranged in the Y direction, the lower electrode array for multiple exposures can be selected from 2 rows to 10 rows according to the image formation speed of the image forming apparatus. Therefore, the light output can be changed in nine levels. Therefore, the control range of the drive current of each lower electrode can be reduced, and the lower electrodes can be constantly driven under substantially equal drive current conditions. When, for example, the lower electrodes are driven with a low current (i.e., low light amount), there is a case where there is a response delay of the lower electrodes and a predetermined amount of light is not obtained. In this case, according to the present embodiment, the lower electrodes can be stably driven by using multiple exposures. In this way, in order to select which of the multiple rows of lower electrodes to use, a configuration can be adopted in which a reset terminal is added to the trigger circuits 812, 813, etc. and the output of the image data is selectively stopped. In addition to this method, a component for stopping the output of the stop pulse signal can be added to the pulse signal generation unit 805.

[0119] Analog section

[0120] ​A block diagram in the analog section 806 is shown. In the present embodiment, for the sake of simple description, the driving units 1001-1 and 1001-3 that drive two of the lower electrodes 410-1 to 410-748 in the lower electrode array 410-1 to 410-748 will be described. However, it is assumed that similar driving units 1001-1 to 1001-748 are formed corresponding to the lower electrodes included in the lower electrode array 410-1 to 410-748, and are also formed corresponding to another lower electrode array. The pulse signal generation units 805-1 and 805-3 respectively generate pulse signals for controlling the light emission (ON) timing of the lower electrodes 410-1 and 410-2. The pulse signal generation units 805-1 and 805-3 respectively input the pulse signals to the driving units 1001-1 and 1001-3 via the pulse signal lines 907-1 and 907-3.

[0121] The digital-analog converter (hereinafter referred to as DAC) 1002 supplies an analog voltage that determines the driving current to the driving units 1001-1 and 1001-3 via the signal line 1003 according to the data set in the register unit 802. The driving unit selection unit 1007 supplies a driving unit selection signal for selecting one of the driving units 1001-1 and 1001-3 to the driving units 1001-1 and 1001-3 via the signal lines 1004 and 1005 according to the data set in the register unit 802. The driving unit selection signal is generated such that only the signal connected to the selected driving unit 1001 is at a high level. When, for example, the driving unit 1001-1 is to be selected, only a high-level driving unit selection signal is supplied to the signal line 1004, and a low-level driving unit selection signal is supplied to the signal line 1005 etc. (i.e., the signal lines 1005 etc. respectively connected to other driving units 1001-3 etc.). In the present embodiment, the driving unit selection signal is of positive logic; however, the driving unit selection signal may be of negative logic.

[0122] At the timing when the driving unit selection unit 1007 selects the driving unit (the timing when the driving unit selection signal becomes high level), the analog voltage input via the signal line 1003 is set to the driving unit 1001-1 or the driving unit 1001-3. The CPU 703 sequentially selects the driving units 1001-1 and 1001-3 via the register unit 802 and sets the voltage associated with the selected one of the driving units 1001-1 and 1001-3. Therefore, the CPU 703 sets the analog voltages of all the driving units 1001 using one DAC 1002. Through the above operations, the analog voltage that determines the driving current and the pulse signal are input to each of the driving units 1001-1 and 1001-3, and the driving current and the light emission time of each of the lower electrodes 410-1 and 410-2 are independently controlled by a driving circuit to be described later.

[0123] Driving unit

[0124] ​ A circuit of a driving unit 1001-1 that drives a lower electrode 410-1 is shown. It is assumed that the driving units 1001 for other lower electrodes are also driven by similar circuits. A MOS field-effect transistor (hereinafter referred to as MOSFET) 1102 supplies a driving current to the lower electrode 410-1 in response to a gate voltage value, and controls the current to turn off (cut off) the driving current when the gate voltage is low.

[0125] A pulse signal line 907-1 is connected to the gate terminal of the MOSFET 1104, and when the pulse signal is high, the voltage charged in the capacitor 1106 is supplied to the MOSFET 1102. A driving unit selection signal sent from a driving unit selection unit 1007 (transported by a signal line 1004) is connected to the gate terminal of the MOSFET 1107. When the received driving unit selection signal is high, the MOSFET 1107 is turned on, and the capacitor 1106 is charged with an analog voltage output from the DAC 1002 (transported by a signal line 1003). In this embodiment, at a timing before image formation, the DAC 1002 sets the analog voltage in the capacitor 1106 and sets the MOSFET 1107 to an off state, and continues to maintain the voltage level during the image formation period.

[0126] Through the above operations, the MOSFET 1102 supplies a driving current to the lower electrode 410-1 according to the set analog voltage and pulse signal. When the input capacitance of the lower electrode 410-1 is large and the cut-off response speed is low, the cut-off speed can be increased by using the MOSFET 1103. A signal logically inverted from the pulse signal by an inverter 1105 is input to the gate terminal of the MOSFET 1103. When the pulse signal is low, the gate terminal of the MOSFET 1103 becomes high, and the charge in the input capacitance of the lower electrode 410-1 is forcibly discharged.

[0127] In this embodiment, a configuration in which the light amount of the entire image is controlled by a driving current and the light amount according to image data in each pixel unit is controlled by PWM is described as an example; however, in the present invention, the method of controlling the light amount is not limited. Both the control of the entire image and the control in each pixel unit can be performed by control based on the driving current, or can be performed by PWM.

[0128] Switching the direction of driving the lower electrode (supporting staggered arrangement)

[0129] As described above, in the present embodiment, as an example, a configuration is adopted in which the light-emitting devices 401 are deployed on the driving circuit board 202 in a staggered manner (hereinafter referred to as a staggered arrangement). When the light-emitting devices 401 are deployed in a staggered arrangement, good image-forming characteristics are obtained by placing the lower electrodes near the lens centers of the rod lens array 203 in the lateral direction. When using a low-cost rod lens array, the opening of each rod lens has limitations. Therefore, if each lower electrode is too far from the center of the rod lens, the light does not reach the opening of the rod lens, and thus there may be a situation where the light does not exit onto the photoconductor drum 102. For this reason, a configuration in which the lower electrode array is deployed on one side in the lateral direction with respect to the center of the light-emitting device 401 and the lower electrode array is deployed as close as possible to the rod lens center is effective.

[0130] In ​ it, the center of the rod lens array 203 in the lateral direction is represented by a dashed line and is indicated as L_center. The rod lens array 203 and the light-emitting devices 401 are mounted such that the center line L_center (hereinafter referred to as the center line) of the rod lens array 203 in the lateral direction coincides with the centers of the two light-emitting devices 401 deployed in a staggered arrangement. The lower electrodes of each light-emitting device 401 are arranged adjacent to a position closer to the center line L_center than the center of the light-emitting device 401. Here, in the light-emitting device 401-2n (a first circuit board), the surface farther from the light-emitting device 401-2n+1 is defined as the end face 311, and the surface closer to the light-emitting device 401-2n+1 is defined as the end face 310. In the light-emitting device 401B (another first circuit board), the surface farther from the light-emitting device 401A is defined as the end face 311, and the surface closer to the light-emitting device 401B is defined as the end face 310. In any of the light-emitting devices 401, the lower electrodes are deployed adjacent to the end face 310 side.

[0131] By deploying the lower electrodes in this way, each lower electrode is deployed such that light enters the opening of the rod lens array 203. In the present embodiment, the lower electrodes in each light-emitting device 401 are arranged at positions adjacent to one side with respect to the center of the light-emitting device 401 in the lateral direction. In any light-emitting device 401, the direction in which the light-emitting device 401 is mounted is determined such that the end face 310 is adjacent to the center line L_center side. In other words, in the silicon circuit board 402, the plurality of lower electrodes 410-1 to 410-748 are deployed closer to the center (center line L_center) of the rod lens array 203 in the lateral direction. When the light-emitting devices 401 are arranged in a two-row staggered arrangement, the light-emitting device 401A and the light-emitting device 401B are deployed such that in a state where they are inverted 180° between the light-emitting device 401A and the light-emitting device 401B, the lower electrodes are close to the center line L_center.

[0132] In this way, the mounting direction of each light-emitting device 401 is determined such that the position of the lower electrode is adjacent to one side in each light-emitting device 401, and the lower electrode is close to the center line L_center. Therefore, good image formation characteristics can be obtained. On the other hand, by deploying each light-emitting device 401 in different mounting directions as described above, it is necessary to control the conduction order of the lower electrodes in the Y direction according to the direction of the light-emitting device 401. For example, in the light-emitting device 401A, the lower electrode closer to the end face 311 (the upper side in the figure) is turned on first, and in the light-emitting device 401B, the lower electrode closer to the end face 310 (the upper side in the figure) is turned on first. Hereinafter, the control method in this case will be described.

[0133] Circuit with selector

[0134] ​ is a circuit block diagram inside the light-emitting device 401 that switches the light emission order of the lower electrode arrays 410-1 to 410-748 in the lateral direction of the drive circuit board 202. The case of arranging two rows of lower electrode arrays 410-1 to 410-748 and lower electrode arrays 420-1 to 420-748 in the Y direction as in ​ will be described. In addition to the circuit configuration illustrated in ​ , the image data storage unit 804 includes selectors 2200-12, 2200-34, 2200-56,.... The selector 2200-12 switches the combination of the connection between the pair of flip-flop circuits 812 and 813 and the pair of pulse signal generation units 805-1 and 805-2. The selector 2200-34 switches the combination of the connection between the pair of flip-flop circuits 812 and 813 and the pair of pulse signal generation units 805-3 and 805-4. The selector 2200-56 switches the combination of the connection between the pair of flip-flop circuits 812 and 813 and the pair of pulse signal generation units 805-5 and 805-6.

[0135] The selectors 2200-12, 2200-34, 2200-56,... are collectively referred to as the selector 2200. The selector 2200 can switch the connection relationship with the pulse signal generation unit 805 which is the destination to which the image data is sent by the flip-flop circuits 812 and 813 respectively. In other words, the selector 2200 serves as a selection unit that selects the combination of the connection between the pair of first memory circuit groups and second memory circuit groups and the pair of first pulse signal generation unit groups and second pulse signal generation unit groups.

[0136] For example, in one light-emitting device 401 in the staggered longitudinal direction, the trigger circuit 812 is connected to the pulse signal generation unit 805-1, and the trigger circuit 813 is connected to the pulse signal generation unit 805-2. In other light-emitting devices 401 in the staggered longitudinal direction, the trigger circuit 812 is connected to the pulse signal generation unit 805-2, and the trigger circuit 813 is connected to the pulse signal generation unit 805-1. Information regarding the connection of the selector 2200 is set in a predetermined register of the register unit 802 according to the communication signal from the CPU 703. It is assumed that the connection of the selector 2200 is controlled according to the information (register value) regarding the connection set in the register unit 802.

[0137] As described above, by using the component that switches the conduction order of the lower electrodes, multiple exposures can be performed regardless of the direction in which the light-emitting devices 401 are deployed on the drive circuit board 202. In this embodiment, the availability of the staggered arrangement has been described, and this staggered arrangement is also usable when the same exposure head is used in a plurality of different image forming apparatuses. The conduction order is selected according to the rotation direction of the photoconductor drum 102 and the mounting direction of the exposure head. Therefore, the same exposure head can be used in image forming apparatuses in which the rotation direction of the photoconductor drum 102 is also different.

[0138] As described above, in this embodiment, by arranging the lower electrodes in the Y direction and performing multiple exposures, a high light output of the exposure head is possible, and as a result, the speed of the image forming apparatus can be increased and a photoconductor material that requires more light amount can be supported. By arranging the lower electrode array and the circuit unit 406 on the silicon circuit board, higher performance of control and finer output resolution obtained from a large-scale logic circuit that allows the mounting of the light-emitting device can be provided.

[0139] The silicon circuit board 402 includes components that generate image data for multiple exposures. Therefore, the required image data can be generated without increasing the wiring (wiring bonding) of the interface of each light-emitting device 401. The area of the wiring can be optimized by optimally deploying the memory circuit (trigger circuit). In addition, the light emission timing can be controlled according to the printing speed, resolution, and the gap between the lower electrodes of the light-emitting device 401 in the image forming apparatus. Therefore, the exposure area on the photoconductor drum 102 that undergoes multiple exposures can be sharpened.

[0140] Second Embodiment

[0141] Next, a second embodiment will be described. In the first embodiment, a light-emitting device having a structure in which lower electrodes are arranged in a two-dimensional array is illustrated, while in the second embodiment, a light-emitting device having a structure in which lower electrodes are arranged in a one-dimensional array (arranged in an array) will be illustrated. In this embodiment, descriptions of items overlapping with those in the description of the first embodiment are omitted.

[0142] Reference will be made to ​ describe this embodiment. ​ is a diagram showing the layout relationship on a printed circuit board between a plurality of light-emitting devices. ​ is a schematic cross-sectional view of the light-emitting device. ​ is a diagram showing an array of the lower electrodes.

[0143] ​ is a diagram showing the state of a boundary portion between chips of the light-emitting devices 1601 deployed in two rows in the longitudinal direction. The light-emitting device 1601 corresponds to the light-emitting device 401 in the first embodiment.

[0144] The horizontal direction corresponds to ​ the longitudinal direction of the light-emitting device 401 in ​ As in the case of ​ shows the boundary portion between the chips of the light-emitting device 1601 (the portion where the ends of the chips overlap in the longitudinal direction (the overlapping portion)). In addition, at the boundary portion between the light-emitting device 1601-2n and the light-emitting device 1601-2n+1, the pitch of the lower electrodes at the ends between different light-emitting devices (the distance between the centers of two light-emitting elements) is substantially 21.16 μm, that is, the pitch at a resolution of 1200 dpi.

[0145] Reference will be made to ​ and ​ to describe the light-emitting device 1601 in further detail. ​ and ​ The X direction in

[0146] ​ is along ​ an enlarged relevant portion diagram of a schematic cross-sectional view taken along line A-A in ​ is a schematic diagram of the lower electrodes 1700-1 to 1700-748 when viewed in the Z direction (described later). As ​ shown in

[0147] The silicon circuit board 1703 is a driving circuit board on which a driving circuit including driving parts respectively corresponding to the lower electrodes 1700-1 to 1700-748 (to be described later) is formed in a manufacturing process. The driving circuit has a structure in which the driving circuit described in the first embodiment is configured to support a one-dimensional array light-emitting device, and there is no significant difference in the relevant part, so the description is omitted.

[0148] As ​ shown, the lower electrodes 1700-1 to 1700-748 (negative electrodes) are a plurality of electrodes formed as a layer (first electrode layer) on the silicon circuit board 1703. By using Si integrated circuit processing technology together with the manufacturing process for manufacturing the silicon circuit board 1703, the lower electrodes 1700-1 to 1700-748 are respectively formed on the plurality of driving parts incorporated in the silicon circuit board 1703. As in the case of the first embodiment, the lower electrodes 1700-1 to 1700-748 are preferably made of a metal having a high reflectivity for the emission wavelength of the light-emitting layer 1701 (to be described later). Therefore, the lower electrodes 1700-1 to 1700-748 preferably contain silver (Ag), aluminum (Al), their alloys, silver-magnesium alloys, etc.

[0149] As ​ and ​ shown, the lower electrodes 1700-1 to 1700-748 are electrodes corresponding to the pixels in the X direction. In other words, each of the lower electrodes 1700-1 to 1700-748 is an electrode set to form one pixel.

[0150] In the present embodiment, the width W in the X direction of the lower electrodes 1700-1 to 1700-748 corresponds to the width of one pixel. The gap d is the distance between the lower electrodes in the X direction. Since the lower electrodes 1700-1 to 1700-748 are formed on the silicon circuit board 1703 with the gap d, the plurality of driving parts formed in the silicon circuit board 1703 can independently control the voltages of the lower electrodes 1700-1 to 1700-748 respectively. The organic material of the light-emitting layer 1701 is filled in the gap d, and the lower electrodes are separated by the organic material.

[0151] In the light-emitting device 1601 according to the present embodiment, the width W of each of the lower electrodes 1700-1 to 1700-748 is set to a nominal size of 20.90 μm, and the gap d is set to a nominal size of 0.26 μm. In other words, the light-emitting device 1601 according to the present embodiment includes one lower electrode 1700 every 21.16 μm in the X direction. Since 21.16 μm is the size of one pixel at 1200 dpi, the width of each lower electrode 1700 in the X direction is equivalent to the size of one pixel corresponding to the output resolution of the image forming apparatus according to the present embodiment. The processing rule in the light-emitting device 1601 according to the present embodiment is about 0.2 μm and has high precision, and a width d1 can be formed with a resolution of 0.26 μm.

[0152] The width of the lower electrodes 1700-1 to 1700-748 in the Y direction, which is the rotation direction of the photoconductive drum, is W. In other words, the lower electrodes 1700-1 to 1700-748 according to the present embodiment each have a square shape with a side length of 20.90 μm, and the area of the lower electrode 1700 is 436.81 μm 2 . This occupies about 97.6% of the area of one pixel, that is, 447.7456 μm 2 . The amount of light of the organic light-emitting material is less than that of the LED. In contrast, when the square-shaped lower electrodes are formed on the silicon circuit board 1703 with a reduced distance between adjacent lower electrodes as described above, a light-emitting area for obtaining an amount of light sufficient to change the potential of the photoconductive drum can be ensured. It is desirable to ensure a lower electrode area that occupies 90% or more of the area of one pixel. Therefore, it is desirable to form the width of one side of the lower electrode 1700 to be about 20.07 μm or more for an image forming apparatus with an output resolution of 1200 dpi, and it is desirable to form the width of one side of the lower electrode 1700 to be about 10.04 μm or more for an image forming apparatus with an output resolution of 2400 dpi.

[0153] On the other hand, the upper limit of the occupied area of the lower electrode 1700 should be set according to the transmittance of the upper electrode and the rod lens array (described later), and in this embodiment, the upper limit is set to 110% of the occupied area of one pixel. When the occupied area of the lower electrode 1700 is designed to be greater than 110% of the occupied area of one pixel, the size of the pixel formed when exposing the photoconductor drum with high sensitivity may significantly exceed the resolution. Therefore, the upper limit value of the occupied area of the lower electrode 1700 is set to 110%. Therefore, it is desirable that for an image forming apparatus with an output resolution of 1200 dpi, the width of one side of the lower electrode 1700 is formed to be about 22.19 μm or less, and it is desirable that for an image forming apparatus with an output resolution of 2400 dpi, the width of one side of the lower electrode 1700 is formed to be about 11.10 μm or less. In other words, the range of the occupied area of the lower electrode with respect to the occupied area of one pixel is preferably higher than or equal to 90% and lower than or equal to 110%.

[0154] The shape of the lower electrode is not limited to a square shape, and it may be a shape such as a polygon shape other than a quadrilateral shape, a circular shape, and an elliptical shape as long as it emits light with a dot size corresponding to the output resolution of the image forming apparatus and the quality of the output image satisfies the design specifications of the image forming apparatus.

[0155] Next, the light emitting layer 1701 will be described. The light emitting layer 1701 is formed to be laminated on the silicon circuit board 1703 on which the lower electrodes 1700-1 to 1700-748 are formed. In other words, in the area where the lower electrodes 1700-1 to 1700-748 are formed, the light emitting layer 1701 is formed on the lower electrodes 1700-1 to 1700-748, and in the area where the lower electrodes 1700-1 to 1700-748 are not formed, it is formed on the silicon circuit board 1703. In this embodiment, in the light emitting device 1601, the light emitting layer 1701 is formed to bridge all the lower electrodes 1700-1 to 1700-748; however, this embodiment is not limited thereto. For example, the light emitting layer 1701 may be formed to be laminated on each lower electrode separately as in the case of the lower electrodes 1700-1 to 1700-748, or the lower electrodes 1700-1 to 1700-748 may be divided into multiple groups, and for each divided group, one light emitting layer may be laminated on the lower electrodes belonging to the same group.

[0156] For example, an organic material can be used for the light-emitting layer 1701. The light-emitting layer 1701 of the organic EL film is a stacked structure including functional layers such as an electron transport layer, a hole transport layer, an electron injection layer, a hole injection layer, an electron blocking layer, and a hole blocking layer. In addition to the organic material, an inorganic material can be used for the light-emitting layer 1701. The upper electrode 1702 (positive electrode) is stacked on the light-emitting layer 1701 (as the second electrode layer). The upper electrode 1702 is an electrode capable of transmitting light having the emission wavelength of the light-emitting layer 1701. Therefore, the upper electrode 1702 according to the present embodiment uses a material containing indium tin oxide (ITO) as the transparent electrode. The electrode made of indium tin oxide has a light transmittance of 80% or higher in the visible light range, so this electrode is suitable as an electrode of the organic EL device. [[ID=Z]]

[0157] The upper electrode 1702 is formed on at least one side of the lower electrodes 1700-1 to 1700-748 across the light-emitting layer 1701. In other words, the light-emitting layer 1701 is disposed between the upper electrode 1702 and the lower electrodes 1700-1 to 1700-748 in the Z direction, and when the lower electrodes 1700-1 to 1700-748 are projected onto the upper electrode 1702 in the Z direction, the region where the lower electrodes 1700-1 to 1700-748 are formed is embedded in the region where the upper electrode 1702 is formed. The transparent electrode does not need to be stacked over the entire light-emitting layer 1701; however, in order to emit the light generated in the light-emitting layer 1701 and effectively emit it to the outside of the light-emitting device 1601, the occupied area of the upper electrode 1702 is preferably higher than or equal to 100%, and more preferably higher than or equal to 120% with respect to the occupied area of one pixel. Optionally, the upper limit value of the occupied area of the upper electrode 1702 is designed based on the area of the silicon circuit board 1703 and the light-emitting layer 1701. Wiring can be disposed in regions other than the region where light passes through in the upper electrode 1702.

[0158] The upper electrode 1702 according to the present embodiment is a common positive electrode provided for the lower electrodes 1700-1 to 1700-748; however, the upper electrode 1702 can be independently provided for each of the lower electrodes 1700-1 to 1700-748, or one upper electrode can be provided for each group of lower electrodes.

[0159] The driving circuit controls the potential of each of the lower electrodes 1700-1 to 1700-748 according to the image data so as to generate a potential difference between the upper electrode 1702 and the selected lower electrode among the lower electrodes 1700-1 to 1700-748.

[0160] The upper electrode 1702 is formed on at least one side of the lower electrodes 1700-1 to 1700-748 across the light-emitting layer 1701. In other words, the light-emitting layer 1701 is disposed between the upper electrode 1702 and the lower electrodes 1700-1 to 1700-748 in the Z direction, and when the lower electrodes 1700-1 to 1700-748 are projected onto the upper electrode 1702 in the Z direction, the areas where the lower electrodes 1700-1 to 1700-748 are formed are embedded in the area where the upper electrode 1702 is formed. The transparent electrode does not need to be laminated over the entire light-emitting layer 1701; however, in order to emit the light generated in the light-emitting layer 1701 and effectively emit it to the outside of the light-emitting device 1601, the occupied area of the upper electrode 1702 is preferably higher than or equal to 100% and more preferably higher than or equal to 120% with respect to the occupied area of one pixel. Optionally, the upper limit value of the occupied area of the upper electrode 1702 is designed by the area of the silicon circuit board 1703 and the light-emitting layer 1701. The wiring can be disposed in areas other than the area where light passes through in the upper electrode 1702.

[0161] The upper electrode 1702 according to the present embodiment is a positive electrode commonly provided for the lower electrodes 1700-1 to 1700-748; however, the upper electrode 1702 can be independently provided for each of the lower electrodes 1700-1 to 1700-748, or one upper electrode can be provided for each group of lower electrodes.

[0162] The driving circuit controls the potential of each of the lower electrodes 1700-1 to 1700-748 according to the image data so as to generate a potential difference between the upper electrode 1702 and the selected lower electrode among the lower electrodes 1700-1 to 1700-748.

[0163] When a transparent electrode made of indium tin oxide or the like is used as the upper electrode 1702, the aperture ratio indicating the light transmittance of the electrode can be made substantially equivalent to the transmittance of the upper electrode 1702. In other words, since there is substantially no area that attenuates or blocks light other than the upper electrode 1702, the light generated from the light-emitting layer 1701 becomes emission light that is as little attenuated or blocked as possible.

[0164] As described above, when the lower electrodes 1700-1 to 1700-748 are formed by high-precision Si integrated circuit processing technology, the lower electrodes 1700-1 to 1700-748 can be densely deployed. Therefore, almost all of the area of the light-emitting portion (here, the sum of the areas of the lower electrodes 1700-1 to 1700-748 and the areas between the adjacent lower electrodes) can be allocated to the lower electrodes 1700-1 to 1700-748. In other words, the utilization efficiency of the light-emitting area per unit area of the exposure head is high.

[0165] When a light-emitting material that is easily affected by moisture, such as an organic EL layer and an inorganic EL layer, is used for the light-emitting layer 1701, it is desirable to perform sealing to prevent moisture from entering the light-emitting portion. As a sealing method, for example, a separate thin film or a laminated sealing film made of silicon oxide, silicon nitride, and aluminum oxide is formed. As a method for forming the sealing film, a method with excellent performance for structures such as steps is preferably used, and for example, an atomic layer deposition method (ALD method) or the like can be used. The material, structure, formation method, etc. of the sealing film are an example, and the embodiments are not limited to the above examples. Appropriate materials, structures, formation methods, etc. can be selected as needed.

[0166] According to this embodiment, an exposure head that can be driven at high speed with a high light output can be proposed.

[0167] Embodiments of the present invention are not limited to the above-described embodiments. Various changes or modifications are applicable without departing from the spirit and scope of the present invention. Therefore, the appended claims are attached to indicate the scope of the present invention.

[0168] This application claims the benefit of Japanese Patent Application No. 2019-153102 filed on August 23, 2019, and Japanese Patent Application No. 2019-153103 filed on August 23, 2019, the entire contents of which are incorporated herein by reference.

Claims

1. An image forming apparatus, comprising: A photoconductor configured to be driven to rotate about a rotation axis; And An exposure head including a light emitting device and a lens array, the lens array being configured to guide light emitted from the light emitting device to the surface of the photoconductor, wherein, The light emitting device includes A silicon substrate including a drive circuit configured to drive the light emitting device, A first electrode layer including a plurality of electrodes, the plurality of electrodes being arranged in a two-dimensional array in the rotation direction of the photoconductor and in a direction substantially parallel to the rotation axis and being separately formed on the silicon substrate, A light emitting layer formed as a layer on the first electrode layer and configured to generate light when a voltage is applied, and A second electrode layer provided in common for the plurality of electrodes of the first electrode layer on the opposite side across the light emitting layer from the side where the silicon substrate and the first electrode layer are disposed, and the second electrode layer being configured to be able to transmit light, The drive circuit is configured to control the voltage of each electrode included in the first electrode layer according to image data so that the light emitting layer generates light, and The lens array is disposed between the second electrode layer and the surface of the photoconductor so that the light transmitted through the second electrode layer is guided to the photoconductor.

2. The image forming apparatus according to claim 1, wherein, The plurality of electrodes include a first electrode and a second electrode adjacent to the first electrode on the downstream side in the rotation direction of the photoconductor, and The drive circuit is configured to control the timing according to image data to control the potential of the first electrode and the potential of the second electrode so that the exposure area exposed by driving the first electrode in the photoconductor is further exposed by driving the second electrode.

3. The image forming apparatus according to claim 1, wherein, To form a pixel of the output resolution of the image forming apparatus, each pixel is formed by driving the first electrode and the second electrode according to the same pixel data to perform multiple exposures.

4. The image forming apparatus according to any one of claims 1 to 3, wherein, Each of the plurality of electrodes included in the first electrode layer is provided corresponding to a pixel of the output resolution of the image forming apparatus, and With respect to the occupied area of the one pixel, the area of each of the plurality of electrodes is higher than or equal to 80% and lower than or equal to 110%.

5. The image forming apparatus according to any one of claims 1 to 4, wherein, The plurality of electrodes included in the first electrode layer have a square shape.

6. The image forming apparatus according to any one of claims 1 to 5, wherein, When the first electrode layer is projected onto the second electrode layer in the stacking direction of the silicon substrate, the first electrode layer, the light emitting layer, and the second electrode layer, the plurality of electrodes in the first electrode layer are embedded in the second electrode layer.

7. The image forming apparatus according to any one of claims 1 to 6, wherein, The second electrode layer contains indium tin oxide.

8. The image forming apparatus according to claim 7, wherein, The plurality of electrodes included in the first electrode layer contain silver.

9. The image forming apparatus according to claim 7 or 8, wherein, The plurality of electrodes included in the first electrode layer contain aluminum.

10. The image forming apparatus according to claim 7, wherein, The plurality of electrodes included in the first electrode layer contain an alloy of silver and magnesium.

11. An image forming apparatus, comprising: A photoconductor configured to be driven to rotate about a rotation axis; And An exposure head including a light emitting device and a lens array, the lens array being configured to guide light emitted from the light emitting device to the surface of the photoconductor, wherein, The light emitting device includes A silicon substrate including a drive circuit configured to drive the light emitting device, A first electrode layer, including a plurality of electrodes, the plurality of electrodes being arranged in a direction substantially parallel to the rotation axis and separately formed on a silicon substrate, A light-emitting layer, formed as a layer on the first electrode layer and configured to generate light when a voltage is applied, and A second electrode layer, disposed on a side opposite to the side where the silicon substrate and the first electrode layer are deployed across the light-emitting layer for the plurality of electrodes of the first electrode layer, and the second electrode layer is configured to be able to transmit light, A driving circuit is configured to control the potential of each electrode included in the first electrode layer according to image data so that the light-emitting layer generates light, and A lens array is deployed between the second electrode layer and the surface of the photoconductor so that the light transmitted through the second electrode layer is guided onto the photoconductor.

12. The image forming apparatus according to claim 11, wherein, Each of the plurality of electrodes included in the first electrode layer is provided corresponding to one pixel of the output resolution of the image forming apparatus, and With respect to the occupied area of the one pixel, the area of each of the plurality of electrodes is higher than or equal to 80% and lower than or equal to 110%.

13. The image forming apparatus according to claim 11 or 12, wherein, The plurality of electrodes included in the first electrode layer have a square shape.

14. The image forming apparatus according to any one of claims 11 to 13, wherein, When the first electrode layer is projected onto the second electrode layer in the stacking direction of the silicon substrate, the first electrode layer, the light-emitting layer, and the second electrode layer, the plurality of electrodes in the first electrode layer are embedded in the second electrode layer.

15. The image forming apparatus according to any one of claims 11 to 14, wherein, The second electrode layer contains indium tin oxide.

16. The image forming apparatus according to claim 15, wherein, The plurality of electrodes included in the first electrode layer contain silver.

17. The image forming apparatus according to claim 15 or 16, wherein, The plurality of electrodes included in the first electrode layer contain aluminum.

18. The image forming apparatus according to claim 15, wherein, The plurality of electrodes included in the first electrode layer contain an alloy of silver and magnesium.

Images