Power supply control method and device, electronic equipment, chip and storage medium

By receiving and parsing command code value information, executing power control commands, and accurately controlling the power supply of the chip system, the problem of low power management efficiency is solved, intelligent and automated power management is realized, and the operation efficiency and reliability of the chip system are improved.

CN120406703APending Publication Date: 2025-08-01BEIJING X RING TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202510474893.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-15
Publication Date
2025-08-01

AI Technical Summary

Technical Problem

In the prior art, the power management efficiency of the chip system is low, resulting in high power consumption, slow response speed, and increased power control complexity, affecting the equipment life and energy efficiency ratio.

Method used

By receiving the command code value information sent by the chip, analyzing and executing power control commands, the power supply to be controlled is accurately switched, including power-on and power-off processes, optimizing the accuracy and timeliness of power management, and reducing manual intervention.

Benefits of technology

It improves the accuracy and timeliness of power control, realizes the intelligence and automation of power management, reduces power consumption, and improves the operating efficiency and reliability of the chip system.

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Abstract

The invention provides a power supply control method and device, electronic equipment, a chip and a storage medium, and the method comprises the steps: receiving command code value information sent by the chip; analyzing the command code value information to obtain a power supply control command; the power supply control command is adopted to carry out on-off control on the to-be-controlled power supply, so that through accurate analysis and execution of command code value information, the accuracy and timeliness of power supply control are improved, the power supply problem caused by misoperation or delay is avoided, meanwhile, intelligentization and automation of power supply management are realized, manual intervention is reduced, and the power supply management efficiency is improved. And the operation efficiency and reliability of the chip system are improved.
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Description

Technical Field

[0001] The present disclosure relates to the technical field of power management, and particularly to a power control method, apparatus, electronic device, chip, and storage medium. Background Art

[0002] With the rapid development of electronic technology, the performance and complexity of chip systems have been continuously increasing, making reasonable power management a core element for modern chip systems to achieve efficient and stable operation. By regulating the on / off state of the power supply, it is possible to minimize power consumption while ensuring that the performance of the chip system is not affected, thereby achieving the optimization of energy utilization. This ability not only helps to improve the energy efficiency ratio of the chip system and extend the battery life, but also is a key factor in promoting the development of electronic devices towards more energy-efficient and environmentally friendly directions. Summary of the Invention

[0003] The present disclosure aims to solve one of the technical problems in the related art to a certain extent.

[0004] To this end, the present disclosure provides a power control method, apparatus, electronic device, chip, and storage medium. By receiving the command code value information sent by the chip, parsing the command code value information to obtain a power control command, and then using the power control command to perform on / off control on the power supply to be controlled. Thus, through the accurate parsing and execution of the command code value information, the accuracy and timeliness of power control are improved, power supply problems caused by misoperation or delay are avoided, and at the same time, the intelligence and automation of power management are realized, manual intervention is reduced, and the operation efficiency and reliability of the chip system are improved.

[0005] An embodiment of one aspect of the present disclosure provides a power control method, including:

[0006] Receiving the command code value information sent by the chip;

[0007] Parsing the command code value information to obtain a power control command;

[0008] Using the power control command to perform on / off control on the power supply to be controlled; the controlled power supply is used to supply power to the chip.

[0009] An embodiment of another aspect of the present disclosure provides a power control apparatus, including:

[0010] A receiving module, configured to receive the command code value information sent by the chip;

[0011] An analysis module, configured to parse the command code value information to obtain a power control command;

[0012] A control module, configured to use the power control command to perform on-off control on the power supply to be controlled; the control power supply is used to supply power to the chip.

[0013] Another embodiment of the present disclosure provides an electronic device, including: a processor, and a memory communicatively connected to the processor; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory to implement the power control method as described in the foregoing embodiment of one aspect.

[0014] Another embodiment of the present disclosure provides a chip, including a processing circuit, and the processing circuit is configured to execute the power control method as described in the foregoing embodiment of one aspect.

[0015] Another embodiment of the present disclosure provides a computer-readable storage medium, in which computer-executable instructions are stored, and when the computer-executable instructions are executed by a processor, they are used to implement the power control method as described in the foregoing embodiment of one aspect.

[0016] Another embodiment of the present disclosure provides a computer program product, on which a computer program is stored, and when the program is executed by a processor, it implements the power control method as described in the foregoing embodiment of one aspect.

[0017] The power control method provided by the present disclosure includes receiving command code value information sent by a chip; parsing the command code value information to obtain a power control command; using the power control command to perform on-off control on the power supply to be controlled. Thus, through the accurate parsing and execution of the command code value information, the accuracy and timeliness of power control are improved, power supply problems caused by misoperation or delay are avoided, and at the same time, the intelligentization and automation of power management are realized, manual intervention is reduced, and the operation efficiency and reliability of the chip system are improved.

[0018] Additional aspects and advantages of the present disclosure will be given in part in the following description, become apparent in part from the following description, or be understood through the practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and / or additional aspects and advantages of the present disclosure will become apparent and be readily understood from the following description of the embodiments in conjunction with the drawings, where:

[0020] Figure 1 is a schematic flowchart of a power control method provided by an embodiment of the present disclosure;

[0021] Figure 2 is a schematic flowchart of another power control method provided by an embodiment of the present disclosure;

[0022] Figure 3Schematic flowchart of another power control method provided by an embodiment of the present disclosure;

[0023] Figure 4 Schematic diagram for comparing the principles of power-on of a traditional power supply and the power supply of the present disclosure provided by an embodiment of the present disclosure;

[0024] Figure 5 Schematic diagram for comparing the time of power-on of a traditional power supply and the power supply of the present disclosure provided by an embodiment of the present disclosure;

[0025] Figure 6 Schematic diagram for comparing the principles of power-off of a traditional power supply and the power supply of the present disclosure provided by an embodiment of the present disclosure;

[0026] Figure 7 Schematic diagram for comparing the time of power-off of a traditional power supply and the power supply of the present disclosure provided by an embodiment of the present disclosure;

[0027] Figure 8 Schematic diagram of the structure of a power control device provided by an embodiment of the present disclosure;

[0028] Figure 9 Block diagram of an electronic device provided by an embodiment of the present disclosure;

[0029] Figure 10 Schematic diagram of the structure of a chip proposed by an embodiment of the present disclosure. Detailed implementation manners

[0030] The embodiments of the present disclosure will be described in detail below. Examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present disclosure, and should not be construed as limiting the present disclosure.

[0031] Currently, all chips require an external power supply, so it is necessary to effectively manage these power supplies. The main dynamic management includes: switching and voltage regulation. Therefore, the power management efficiency directly affects the response speed and power consumption of the chip system.

[0032] In the related art, power management mainly includes the following three aspects: First, for the power supply module of a Power Management IC (PMIC), the process of optimizing its soft start speed; for example, driving the control circuit with a faster clock and optimizing the architecture of the analog power supply to compress the turn-on time of the power supply (Buck&LDO). However, the above optimization process is often accompanied by an increase in circuit complexity, and the increase in complexity will lead to an increase in costs in various aspects such as design, manufacturing, testing, and maintenance; Second, adding an additional discharge circuit to the PMIC power supply (Buck&LDO) to quickly reduce the voltage after the power supply is turned off. Although adding a discharge circuit can greatly compress the turn-off time of the power supply, adding an additional discharge circuit is an analog design with an area overhead. To avoid excessive discharge current, the discharge time still needs to be several hundred microseconds, and the shorter the time, the larger the area of the discharge circuit; Third, by optimizing the interaction control method between the System on Chip (SOC) and the PMIC, reducing the number of communications, thereby reducing the power control management time. However, the low efficiency of the SOC multi-core software interaction control leads to frequent power state switching, which will not only increase power consumption but also may cause an additional burden on the power supply module and affect its service life.

[0033] In addition, in the SOC of mobile electronic devices (such as mobile phones), due to the uneven operation of the business load of the Central Processing Unit (CPU) subsystem software, the CPU often appears in an idle state during operation. To save the load power consumption of the CPU in the idle state, the CPU subsystem will frequently power on and off. To be able to respond to sudden interrupts in a timely manner, the power switches of each power supply path of the CPU need to be as fast as possible. Since there are sequential requirements for the power switches of each path of the CPU, this means that the time delay of the power switch will relatively affect the total turn-on and turn-off time of multiple power supplies. For example, it is necessary to first turn off the power supply of the CPU small core, and then turn off the power supply of the Static Random Access Memory (SRAM) of the CPU small core, and the power-on sequence is the opposite; in this way, the total turn-on and turn-off time is the superposition of the times of the two power supplies, and the time is often up to several tens of milliseconds or even several seconds at most.

[0034] In view of the above problems, the present disclosure proposes a power control method, device, electronic device, chip, and storage medium.

[0035] The following describes the power control method, device, electronic device, chip, and storage medium according to the embodiments of the present disclosure with reference to the accompanying drawings.

[0036] Figure 1 It is a schematic flowchart of a power control method provided by an embodiment of the present disclosure.

[0037] It should be noted that the power control method of the present disclosure embodiments can be applied to a power control device. In some possible embodiments, the power control device can be configured in an electronic device so that the electronic device can perform a power control function. Additionally, in some possible embodiments, the power control device can also be software in the electronic device, etc.

[0038] In any one of the embodiments of the present disclosure, the power control device can be configured in a PMIC.

[0039] In any one of the embodiments of the present disclosure, the PMIC can be integrated into a chip. The chip includes a Central Processing Unit (abbreviated as CPU), Image Signal Processing (abbreviated as ISP), Application-Specific Integrated Circuit (abbreviated as ASIC), Digital Signal Processor (abbreviated as DSP), Field-Programmable Gate Array (abbreviated as FPGA), System On A Chip (abbreviated as SOC), Reduced Instruction Set Computer (abbreviated as RISC), etc., which are not listed one by one here.

[0040] As Figure 1 shown, the power control method may include the following steps:

[0041] Step 101, receive the command code value information sent by the chip.

[0042] To improve the efficiency of power management, in the embodiments of the present disclosure, the chip sends the command code value information to the PMIC through a communication interface (such as I 2 C, SPI, PMBus, etc.). The command code value information is usually composed of a series of bytes or bits, which are encoded according to a specific format and protocol. The command code value information may include the identification information of the power to be controlled and the power control commands associated with each identification information.

[0043] Step 102, parse the command code value information to obtain the power control command.

[0044] To improve the accuracy of power control, in the embodiments of the present disclosure, by parsing the command code value, the power control device can accurately identify the power to be controlled and perform corresponding operations according to the specific power control commands.

[0045] To improve the flexibility of power management, the command code value information may include power control commands for each power supply to be controlled. In the embodiments of the present disclosure, power control commands adapted to each power supply to be controlled are extracted from the command code value information.

[0046] Step 103: Use the power control command to perform on / off control on the power supply to be controlled.

[0047] Furthermore, use the power control commands adapted to each power supply to be controlled to perform on / off control on the corresponding power supply to be controlled.

[0048] Exemplarily, the control power supply is used to supply power to the chip.

[0049] The power control method of the embodiments of the present disclosure receives the command code value information sent by the chip, parses the command code value information to obtain the power control command, and then uses the power control command to perform on / off control on the power supply to be controlled. Thus, through the accurate parsing and execution of the command code value information, the accuracy and timeliness of power control are improved, power supply problems caused by misoperation or delay are avoided, at the same time, the intelligence and automation of power management are realized, manual intervention is reduced, and the operation efficiency and reliability of the chip system are improved.

[0050] To clearly illustrate how the power control command is used to perform on / off control on the power supply to be controlled for supplying power to the chip in the above embodiments, the present disclosure proposes another power control method.

[0051] Figure 2 It is a schematic flowchart of another power control method provided by the embodiments of the present disclosure.

[0052] As Figure 2 shown, the power control method may include the following steps:

[0053] Step 201: Receive the command code value information sent by the chip.

[0054] Step 202: Parse the command code value information to obtain the power control command.

[0055] Step 203: Query the voltage threshold adapted to the power control command.

[0056] In the embodiments of the present disclosure, the power control command may include a power-on command or a power-off command. The voltage threshold adapted to the power-on command is the first voltage threshold, and the voltage threshold adapted to the power-off command is the second voltage threshold. The first voltage threshold and the second voltage threshold may be equal (e.g., 035V) or not equal. The present disclosure does not make specific limitations.

[0057] Step 204: Adjust the voltage of the power supply to be controlled based on the voltage threshold.

[0058] To achieve the accuracy and timeliness of power supply control, targeted adjustment of the power supply is realized according to different power supply control commands.

[0059] As an example, when the power supply control command includes a power-on command and the power supply to be controlled is in the off state, control the power supply to be controlled to turn on, and control the power supply to be controlled to gradually rise to the first voltage threshold (e.g., 0.35V) within the first set period.

[0060] In some embodiments, the duration of the first set period is greater than the first duration threshold; that is, the power supply is slowly started up to the first voltage threshold.

[0061] As another example, when the power supply control command includes a power-off command, control the power supply to be controlled to step down to the second voltage threshold within the third set period; in some embodiments, the duration of the third set period is less than the third duration threshold; that is, quickly reduce the voltage of the power supply to be controlled to the second voltage threshold (e.g., 0.35V).

[0062] Step 205: In response to the voltage of the power supply to be controlled reaching the voltage threshold, perform a target operation on the power supply to be controlled that is adapted to the power supply control command.

[0063] To improve the accuracy of power supply control and shorten the waiting time for power supply control, as a possible implementation, when the voltage of the power supply to be controlled reaches the voltage threshold, perform the corresponding target operation on the power supply to be controlled according to the power supply control command.

[0064] As an example, when the power supply control command includes a power-on command and the voltage of the power supply to be controlled rises to the first voltage threshold, query the target operating voltage adapted to the power supply to be controlled, and based on the target operating voltage, perform a boost operation on the power supply to be controlled. For example, control the power supply to be controlled to boost to the target operating voltage within the second set period; in some embodiments, the duration of the second set period is less than the second duration threshold, that is, control the power supply to be controlled to quickly boost to the target operating voltage (e.g., 0.75V).

[0065] As another example, when the power supply control command includes a power-off command, when the voltage of the power supply to be controlled drops to the second voltage threshold, perform a power-off operation on the power supply to be controlled, that is, turn off the power supply to be controlled when the voltage of the power supply to be controlled drops to the second voltage threshold.

[0066] It should be noted that the execution processes of steps 201 to 202 can be implemented in any of the ways in the various embodiments of the present disclosure. The embodiments of the present disclosure do not make any limitations in this regard and will not be elaborated further.

[0067] The power control method according to the embodiments of the present disclosure realizes precise control of the power supply by querying the voltage threshold adapted to the power control command, adjusting the power supply voltage based on the voltage threshold, and executing the corresponding power control command, thereby improving the reliability and timeliness of power control.

[0068] To clearly illustrate how the command code value information is parsed in the above embodiments to obtain the power control command, the present disclosure proposes another power control method.

[0069] Figure 3 It is a schematic flowchart of another power control method provided by the embodiments of the present disclosure.

[0070] As Figure 3 shown, the power control method may include the following steps:

[0071] Step 301, receive the command code value information sent by the chip.

[0072] Step 302, parse the command code value information to obtain the identification information of at least one power supply to be controlled and the power control command associated with each identification information.

[0073] In order to improve the accuracy of power control, in the embodiments of the present disclosure, by parsing the command code value information, the identification information of at least one power supply to be controlled is extracted from the command code value information, and the power control instruction matching each identification information is identified.

[0074] Step 303, use the power control command to perform on-off control on the power supply to be controlled.

[0075] As an example, according to the identification information of at least one power supply to be controlled, the power supply to be controlled is determined from the power supplies supplying power to the chip, and the power control instructions corresponding to the power supplies to be controlled are used to perform on-off control on the power supply to be controlled.

[0076] It should be noted that the execution process of step 301 can be implemented in any one of the ways in the embodiments of the present disclosure. The embodiments of the present disclosure do not make any limitations in this regard and will not be elaborated further.

[0077] The power control method according to the embodiments of the present disclosure parses the command code value information to obtain the identification information of at least one power supply to be controlled and the power control command associated with each identification information, and thus uses the power control instructions corresponding to the power supplies to be controlled to perform on-off control on the power supply to be controlled, realizing precise control of the power supply.

[0078] In any embodiment of the present disclosure, as Figure 4 shown, taking the power-on of the power supply and the power control device being configured in the PMIC as an example, compared with the traditional power-on of the power supply, the power-on of the power supply in the present disclosure mainly includes the following steps:

[0079] 1. Slowly start the power supply to a sufficiently low voltage (the first voltage threshold);

[0080] 2. Control the power supply to boost to the target operating voltage again;

[0081] Furthermore, as Figure 5 shown, curve S1 represents the curve of the power-on voltage of the power supply of the present disclosure changing with time, and curve S2 represents the curve of the power-on voltage of the power supply in the traditional scheme changing with time. Among them, V1 represents the lowest voltage output by the power supply (the first voltage threshold, e.g., 0.35V), V2 represents the target operating voltage output by the power supply (e.g., 0.75V), T1 represents the time taken for the power supply of the present disclosure to slowly start to the lowest voltage output, T2 represents the time taken for the power supply of the present disclosure to boost to the target operating voltage (e.g., 0.75V) after slowly starting; T3 represents the time taken for the power supply to reach the target operating voltage after slowly starting under traditional control. Thus, compared with the traditional power-on of the power supply, the power supply control method of the present disclosure reduces the waiting time for power-on.

[0082] In any embodiment of the present disclosure, as Figure 6 shown, taking the power supply being powered off and the power supply control device being configured in the PMIC as an example, compared with the traditional power-off of the power supply, the power-off of the power supply of the present disclosure mainly includes the following steps:

[0083] 1. Control the power supply to step down to a sufficiently low voltage (the second voltage threshold);

[0084] 2. Turn off the power supply;

[0085] Furthermore, as Figure 7 shown, curve S3 represents the curve of the power-off voltage of the power supply of the present disclosure changing with time, and curve S4 represents the curve of the power-off voltage of the power supply in the traditional scheme changing with time. Among them, V1 represents a voltage lower than Vth (the set threshold voltage of the chip) (e.g., 0.2V); V2 represents the lowest voltage output by the power supply, e.g., 0.35V, V3 represents the target operating voltage output by the power supply (e.g., 0.75V); T1 represents the time taken for the power supply of the present disclosure to actively step down from voltage V3 (e.g., 0.75V) to a lower voltage V2 (e.g., 0.35V), T2 represents the time taken for the power supply of the present disclosure to drop from voltage V3 to V1 (e.g., 0.2V); T3 represents the time taken for the power supply to slowly drop from voltage V3 to V1 under traditional control. Thus, compared with the traditional power-off of the power supply, the power supply control method of the present disclosure reduces the waiting time for power-off.

[0086] To implement the above embodiments, the embodiments of the present disclosure also propose a power supply control device.

[0087] Figure 8 It is a schematic structural diagram of a power supply control device provided by an embodiment of the present disclosure.

[0088] As shown Figure 8 in FIG. 2, the power control device 800 includes: a receiving module 810, an analysis module 820, and a control module 830.

[0089] Among them, the receiving module 810 is configured to receive the command code value information sent by the chip; the analysis module 820 is configured to analyze the command code value information to obtain a power control command; the control module 830 is configured to use the power control command to perform on / off control on the power supply to be controlled; the control power supply is used to supply power to the chip.

[0090] As a possible implementation, the control module 830 is configured to query a voltage threshold adapted to the power control command; based on the voltage threshold, adjust the voltage of the power supply to be controlled; in response to the voltage of the power supply to be controlled reaching the voltage threshold, perform a target operation adapted to the power control command on the power supply to be controlled.

[0091] As a possible implementation, the power control command includes a power-on command, and the control module 830 is configured to, in response to the voltage of the power supply to be controlled rising to a first voltage threshold, query a target operating voltage adapted to the power supply to be controlled; based on the target operating voltage, perform a boosting operation on the power supply to be controlled.

[0092] As a possible implementation, the control module 830 is configured to, in response to the power supply to be controlled being in a closed state, control the power supply to be controlled to turn on; control the power supply to be controlled to gradually rise to the first voltage threshold within a first set time period.

[0093] As a possible implementation, the control module 830 is configured to control the power supply to be controlled to boost to the target operating voltage within a second set time period.

[0094] As a possible implementation, the power control command includes a power-off command, the voltage threshold includes a second voltage threshold, and the control module 830 is configured to, in response to the voltage of the power supply to be controlled dropping to the second voltage threshold, perform a power-off operation on the power supply to be controlled.

[0095] As a possible implementation, the control module 830 is configured to control the power supply to be controlled to step down to the second voltage threshold within a third set time period.

[0096] As a possible implementation, the analysis module 820 is configured to analyze the command code value information to obtain identification information of at least one power supply to be controlled and a power control command associated with each identification information.

[0097] The power control device according to the embodiments of the present disclosure receives the command code value information sent by the chip, parses the command code value information to obtain a power control command, and then uses the power control command to perform on-off control on the power supply to be controlled. Thus, by accurately parsing and executing the command code value information, the accuracy and timeliness of power control are improved, power supply problems caused by misoperation or delay are avoided, and at the same time, the intelligentization and automation of power management are realized, manual intervention is reduced, and the operation efficiency and reliability of the chip system are improved.

[0098] To implement the above embodiments, the present disclosure also provides an electronic device, including a processor and a memory communicatively connected to the processor; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory to implement the power control method as described in the foregoing method embodiments.

[0099] To implement the above embodiments, the present disclosure also provides a chip, where the chip includes a processing circuit configured to execute the power control method as described in the foregoing method embodiments.

[0100] To implement the above embodiments, the present disclosure also provides a computer-readable storage medium storing computer-executable instructions, and when the computer-executable instructions are executed by a processor, they are used to implement the power control method as described in the foregoing method embodiments.

[0101] To implement the above embodiments, the present disclosure also provides a computer program product having a computer program stored thereon, and when the computer program is executed by a processor, it implements the power control method as described in the foregoing method embodiments.

[0102] Figure 9 It is a block diagram of an electronic device provided by the embodiments of the present disclosure. For example, the electronic device 900 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0103] Refer to Figure 9 , the electronic device 900 may include one or more of the following components: a processing component 902, a memory 904, a power component 906, a multimedia component 908, an audio component 910, an input / output (I / O) interface 912, a sensor component 914, and a communication component 916.

[0104] The processing component 902 generally controls the overall operation of the electronic device 900, such as operations associated with display, telephone calls, data communication, camera operations, and recording operations. The processing component 902 may include one or more processors 920 to execute instructions to complete all or part of the steps of the above methods. In addition, the processing component 902 may include one or more modules to facilitate the interaction between the processing component 902 and other components. For example, the processing component 902 may include a multimedia module to facilitate the interaction between the multimedia component 908 and the processing component 902.

[0105] The memory 904 is configured to store various types of data to support the operation of the electronic device 900. Examples of such data include instructions for any application or method operating on the electronic device 900, contact data, phone book data, messages, pictures, videos, etc. The memory 904 may be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disks, or optical disks.

[0106] The power component 906 provides power to various components of the electronic device 900. The power component 906 may include a power management system, one or more power sources, and other components associated with generating, managing, and distributing power for the electronic device 900.

[0107] The multimedia component 908 includes a screen that provides an output interface between the electronic device 900 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may not only sense the boundaries of touch or swipe actions but also detect the duration and pressure associated with the touch or swipe operation. In some embodiments, the multimedia component 908 includes a front camera and / or a rear camera. When the electronic device 900 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each of the front camera and the rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0108] The audio component 910 is configured to output and / or input audio signals. For example, the audio component 910 includes a microphone (MIC), which is configured to receive external audio signals when the electronic device 900 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals can be further stored in the memory 904 or transmitted via the communication component 916. In some embodiments, the audio component 910 further includes a speaker for outputting audio signals.

[0109] The I / O interface 912 provides an interface between the processing component 902 and a peripheral interface module, which may be a keyboard, a click wheel, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a power button, and a lock button.

[0110] The sensor component 914 includes one or more sensors for providing an assessment of various aspects of the status of the electronic device 900. For example, the sensor component 914 can detect the on / off state of the electronic device 900, the relative positioning of components, such as the display and keypad of the electronic device 900. The sensor component 914 can also detect a change in the position of the electronic device 900 or a component of the electronic device 900, the presence or absence of user contact with the electronic device 900, the orientation or acceleration / deceleration of the electronic device 900, and a change in the temperature of the electronic device 900. The sensor component 914 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor component 914 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor component 914 may further include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0111] The communication component 916 is configured to facilitate communication between the electronic device 900 and other devices in a wired or wireless manner. The electronic device 900 can access a wireless network based on communication standards, such as WiFi, 4G, or 5G, or a combination thereof. In an exemplary embodiment, the communication component 916 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 916 further includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0112] In an exemplary embodiment, the electronic device 900 may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing the above method.

[0113] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 904 including instructions, and the above instructions can be executed by a processor 920 of the electronic device 900 to complete the above method. For example, the non-transitory computer-readable storage medium may be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0114] Figure 10 is a schematic structural diagram of a chip proposed by an embodiment of the present disclosure. Reference may be made to Figure 10 the schematic structural diagram of the chip 1000 shown, but not limited thereto.

[0115] The chip 1000 includes a processing circuit 1001, and the processing circuit 1001 is configured to execute any of the above methods.

[0116] In some embodiments, the chip 1000 further includes one or more interface circuits 1002. Optionally, the interface circuit 1002 is connected to a memory 1003. The interface circuit 1002 can be used to receive signals from the memory 1003 or other devices, and the interface circuit 1002 can be used to send signals to the memory 1003 or other devices. For example, the interface circuit 1002 can read instructions stored in the memory 1003 and send the instructions to the processing circuit 1001.

[0117] In some embodiments, the interface circuit 1002 executes at least one of the communication steps such as sending and / or receiving in the above method, and the processing circuit 1001 executes other steps.

[0118] In some embodiments, terms such as interface circuit, interface, transceiver pin, transceiver, etc. may be used interchangeably.

[0119] In some embodiments, the chip 1000 further includes one or more memories 1003 for storing instructions. Optionally, all or part of the memories 1003 may be outside the chip 1000.

[0120] In the description of this specification, the descriptions referring to terms such as "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc., mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0121] In addition, the terms "first" and "second" are used only for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0122] Any process or method description in a flowchart or described in other ways herein can be understood to represent a module, segment, or portion of code including one or more executable instructions for implementing a customized logic function or process, and the scope of the preferred embodiments of the present disclosure includes additional implementations, where the functions can be executed in a substantially simultaneous manner or in a reverse order according to the involved functions, rather than in the order shown or discussed, which should be understood by those skilled in the art to which the embodiments of the present disclosure pertain.

[0123] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a definable sequence list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other systems that can fetch instructions from the instruction execution system, apparatus, or device and execute the instructions), or used in combination with these instruction execution systems, apparatus, or devices. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transmit a program for use by an instruction execution system, apparatus, or device or in combination with these instruction execution systems, apparatus, or devices. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection portion with one or more wirings (electronic device), a portable computer disk cartridge (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or other suitable processing as necessary, and then stored in a computer memory.

[0124] It should be understood that various parts of the present disclosure can be implemented by hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits having logic gate circuits for implementing logical functions on data signals, application-specific integrated circuits having suitable combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), etc.

[0125] Those of ordinary skill in the art of this technology can understand that all or part of the steps carried by the method of implementing the above embodiments can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiments.

[0126] In addition, each functional unit in various embodiments of the present disclosure may be integrated into one processing module, may exist separately as individual physical units, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0127] The above-mentioned storage medium may be a read-only memory, a magnetic disk, an optical disc, etc. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present disclosure.

Claims

1. A power control method, characterized in that, including: Receiving command code value information sent by a chip; Parsing the command code value information to obtain a power control command; Using the power control command to perform on / off control on a power supply to be controlled; the power supply to be controlled is used to supply power to the chip.

2. The method according to claim 1, wherein The using the power control command to perform on / off control on a power supply to be controlled includes: Querying a voltage threshold adapted to the power control command; Adjusting the voltage of the power supply to be controlled based on the voltage threshold; In response to the voltage of the power supply to be controlled reaching the voltage threshold, performing a target operation adapted to the power control command on the power supply to be controlled.

3. The method according to claim 2, wherein The power control command includes a power-on command, and the voltage threshold includes a first voltage threshold; The in response to the voltage of the power supply to be controlled reaching the voltage threshold, performing a target operation adapted to the power control command on the power supply to be controlled includes: In response to the voltage of the power supply to be controlled rising to the first voltage threshold, querying a target operating voltage adapted to the power supply to be controlled; Performing a boosting operation on the power supply to be controlled based on the target operating voltage.

4. The method according to claim 3, wherein The adjusting the voltage of the power supply to be controlled based on the voltage threshold includes: In response to the power supply to be controlled being in an off state, controlling the power supply to be controlled to turn on; Controlling the power supply to be controlled to gradually rise to the first voltage threshold within a first set time period.

5. The method according to claim 3, wherein The performing a boosting operation on the power supply to be controlled based on the target operating voltage includes: Controlling the power supply to be controlled to boost to the target operating voltage within a second set time period.

6. The method according to claim 2, wherein The power control command includes a power-off command, and the voltage threshold includes a second voltage threshold; The in response to the voltage of the power supply to be controlled reaching the voltage threshold, performing a target operation adapted to the power control command on the power supply to be controlled includes: In response to the voltage of the power supply to be controlled dropping to the second voltage threshold, performing a power-off operation on the power supply to be controlled.

7. The method according to claim 6, wherein The adjusting the voltage of the power supply to be controlled based on the voltage threshold includes: Controlling the power supply to be controlled to step down to the second voltage threshold within a third set time period.

8. The method according to any one of claims 1-7, characterized in that, The parsing the command code value information to obtain a power control command includes: Parsing the command code value information to obtain identification information of at least one power supply to be controlled and a power control command associated with each piece of identification information.

9. A power control device, characterized in that, including: A receiving module, configured to receive command code value information sent by a chip; An analysis module, configured to parse the command code value information to obtain a power control command; A control module, configured to use the power control command to perform on / off control on a power supply to be controlled; the power supply to be controlled is used to supply power to the chip.

10. An electronic device, characterized in that, including: A processor and a memory communicatively connected to the processor; The memory stores computer execution instructions; The processor executes the computer execution instructions stored in the memory to implement the method according to any one of claims 1-8.

11. A chip, characterized in that, The chip includes a processing circuit configured to execute the method according to any one of claims 1-8.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which when executed by a processor are used to implement the method according to any one of claims 1-8.