Analysis method and analysis device for semiconductor processing technology
Through the semiconductor process process analysis device with graphical processing technology, the machine record files are automatically analyzed and bound, which solves the problem of time-consuming development of Parser programs in the existing technology, and achieves the effect of quickly identifying the bottlenecks of the process process.
Patent Information
- Application Number
- CN202410137436.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-31
- Publication Date
- 2025-08-01
AI Technical Summary
In the prior art, semiconductor process process optimization requires the development of Parser programs, resulting in waste of human resources and difficulty in smooth progress.
Using graphical processing technology, the semiconductor process process analysis device includes a reading unit, an action definition unit, a mobile information graphic unit, a binding unit and a tracking information graphic unit, and automatically analyzes and binds the machine record file to generate wafer movement path and action tracking map.
Without writing Parser programs, users can quickly identify process technology bottlenecks through a graphical interface to achieve process technology optimization.
Smart Images
Figure CN120406926A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an analysis method and an analysis device for a manufacturing process, and particularly to an analysis method and an analysis device for a semiconductor manufacturing process. Background Art
[0002] In the process of constructing the big data system of Industry 4.0, the pre-processing of data accounts for 70% to 80% of the work. For example, the machine log file records the time when multiple wafers of multiple lot numbers on the machine perform various different actions at different positions. If one wants to analyze the wait time waste of the manufacturing process for process optimization, a series of pre-processings of the machine log file are required to obtain the time series of several actions of the wafer in the machine. The formats and contents of the log files of each machine are not completely the same, and it takes 2 to 3 months of manpower to develop a Parser program for the pre-processing of each machine log file. Therefore, it often causes the project of process optimization to be unable to proceed smoothly. Summary of the Invention
[0003] The present invention relates to an analysis method and an analysis device for a semiconductor manufacturing process, which uses graphical processing technology to replace the development of the Parser. Analysts can complete the analysis of the semiconductor manufacturing process through a graphical interface without writing a Parser program.
[0004] According to one aspect of the present invention, an analysis method for a semiconductor manufacturing process is provided. The analysis method for a semiconductor manufacturing process includes the following steps. Loading a semiconductor machine log file. Defining several machine action events from the semiconductor manufacturing process record file. Generating a wafer movement path diagram according to a wafer movement information file. Binding several account point information to each machine action event according to the wafer movement path diagram. Generating a wafer action tracking diagram according to the machine action events with the bound account point information.
[0005] According to another aspect of the present invention, an analysis device for a semiconductor manufacturing process is provided. The analysis device for a semiconductor manufacturing process includes a reading unit, an action definition unit, a movement information graphing unit, a binding unit, and a tracking information graphing unit. The reading unit is used to load a semiconductor machine log file. The action definition unit is used to provide an operation interface to define several machine action events from the semiconductor manufacturing process record file. The movement information graphing unit is used to generate a wafer movement path diagram according to a wafer movement information file. The binding unit is used to bind several account point information to each machine action event according to the wafer movement path diagram. The tracking information graphing unit is used to generate a wafer action tracking diagram according to the machine action events with the bound account point information.
[0006] To have a better understanding of the above and other aspects of the present invention, specific embodiments are given below and described in detail with reference to the accompanying drawings as follows: Description of the Drawings
[0007] Figure 1 A schematic diagram showing an analysis method of a semiconductor manufacturing process according to an embodiment of the present disclosure.
[0008] Figure 2 A diagram showing an analysis device for a semiconductor manufacturing process according to an embodiment of the present disclosure.
[0009] Figure 3 A flowchart showing an analysis method of a semiconductor manufacturing process according to an embodiment.
[0010] Figure 4 An example to illustrate step S110.
[0011] Figure 5 An example to illustrate an operation interface according to an embodiment of the present disclosure.
[0012] Figure 6 An example to illustrate a wafer movement path diagram according to an embodiment of the present disclosure.
[0013] Figure 7 An example to illustrate a wafer motion tracking diagram according to an embodiment of the present disclosure.
[0014] Symbols:
[0015] 100: Analysis device
[0016] 110: Reading unit
[0017] 120: Action definition unit
[0018] 130: Movement information graphing unit
[0019] 140: Binding unit
[0020] 150: Tracking information graphing unit
[0021] 800: Semiconductor machine
[0022] 900: Database
[0023] ACj: Account point information
[0024] CT: Wafer motion tracking diagram
[0025] EV1, EV2, EV3, EV4, EV5, EV6, EVi, EVi’: Action events
[0026] LMC: Wafer movement information file
[0027] LG: Semiconductor Machine Record File
[0028] MP: Wafer Movement Path Diagram
[0029] NDk: Mechanism Node
[0030] PHt: Path
[0031] RCn: Semiconductor Machine Record
[0032] S110, S120, S130, S140, S150: Steps
[0033] SRi: Search Conditions
[0034] UI: Operation Interface
[0035] W1: Original Record Window
[0036] W2: Condition Window
[0037] W3: Event Window
[0038] WT1, WT2, WT3, WT4: Critical Waiting Time Detailed Implementation Manner
[0039] The technical terms in this specification refer to the customary terms in this technical field. If this specification explains or defines some terms, the explanations of these terms shall prevail according to the explanations or definitions in this specification. Each embodiment of the present disclosure has one or more technical features. On the premise of possible implementation, those skilled in the art can selectively implement some or all of the technical features in any embodiment, or selectively combine some or all of the technical features in these embodiments.
[0040] Please refer to Figure 1 , which shows a schematic diagram of an analysis method for semiconductor manufacturing processes according to an embodiment of the present disclosure. In this embodiment, the analysis device 100 for semiconductor manufacturing processes can automatically obtain a semiconductor machine record file LG and a wafer movement information file LMC from the semiconductor machine 800 and the database 900 in the background, and then perform analysis and binding. Users only need to perform simple operations on the operation interface UI to complete the analysis of semiconductor manufacturing processes. For example, to analyze the waste of process waiting time (Wait Time Waste), through the technology of the present disclosure, users who do not know how to write programs can also smoothly analyze where the bottleneck points / improvement opportunities of machine operation are in just a few hours, and then can perform process optimization.
[0041] Please refer to Figure 2, which shows an analysis device 100 for a semiconductor manufacturing process according to an embodiment of the present disclosure. The analysis device 100 for a semiconductor manufacturing process includes a reading unit 110, an action definition unit 120, a movement information graphing unit 130, a binding unit 140, and a tracking information graphing unit 150. The reading unit 110 is used to read data, such as a wireless network transmission unit, a wired network transmission unit, or a transmission line.
[0042] The action definition unit 120, the movement information graphing unit 130, the binding unit 140, and the tracking information graphing unit 150 are used to execute various data and graphic processing programs. The action definition unit 120, the movement information graphing unit 130, the binding unit 140, and / or the tracking information graphing unit 150 are, for example, a circuit, a circuit board, a storage device storing program codes, or a chip. The chip is, for example, a central processing unit (CPU), or other programmable general-purpose or special-purpose micro control units (MCUs), microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), graphics processing units (GPUs), image signal processors (ISPs), image processing units (IPUs), arithmetic logic units (ALUs), complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs), or other similar components or combinations of the above components.
[0043] In the present disclosure, after the reading unit 110 automatically obtains the semiconductor machine record file LG and the wafer movement information file LMC from the semiconductor machine 800 and the database 900 in the background, the action definition unit 120, the movement information graphing unit 130, the binding unit 140, and the tracking information graphing unit 150 are used to analyze and bind the semiconductor machine record file LG and the wafer movement information file LMC. The user only needs to perform simple operations on the operation interface UI to complete the analysis of the semiconductor manufacturing process. The following further details the operation modes of the above components with a flowchart.
[0044] Please refer to Figure 3 , which shows a flowchart of an analysis method for a semiconductor manufacturing process according to an embodiment. The analysis method for the semiconductor manufacturing process includes steps S110 to S150. In step S110, the reading unit 110 loads the semiconductor tool log file LG. Please refer to Figure 4 , which exemplifies step S110. The semiconductor tool 800 usually processes multiple wafers in multiple lots continuously. And the semiconductor tool 800 usually has multiple chambers, and the wafers will also be controlled by a robotic arm at various positions within the cassette, chamber, or transfer space. Therefore, the semiconductor tool log file LG usually mixes the time information of multiple lots, multiple wafers, multiple actions, and multiple positions. Generally speaking, it is difficult to directly analyze the bottleneck points / improvement opportunity points of the semiconductor manufacturing process from the complex semiconductor tool log file LG.
[0045] Next, in step S120, the action definition unit 120 provides an operation interface UI to define several tool action events EVi from the semiconductor manufacturing process log file LG. Please refer to Figure 5 , which exemplifies the operation interface UI according to an embodiment of the present disclosure. The operation interface UI is, for example, a raw record window W1, a condition window W2, and an event window W3. The raw record window W1 displays the semiconductor tool log file LG. The semiconductor tool log file LG is, for example, a list of thousands or even tens of thousands of semiconductor tool records RCn. Although these semiconductor tool records RCn have time information, they correspond to multiple lots, multiple wafers, multiple actions, and multiple positions, so it is difficult to directly analyze the bottleneck points / improvement opportunity points of the semiconductor manufacturing process.
[0046] The condition window W2 is used to set at least one search condition SRi. The user can set the search condition SRi in the condition window W2 by typing or using a menu. Alternatively, in another embodiment, the search condition SRi can also be automatically set using artificial intelligence technology.
[0047] After the user clicks on the search condition SRi in the condition window W2, the event window W3 will display the tool action event EVi corresponding to this search condition SRi.
[0048] Then, in step S130, the movement information graphing unit 130 generates a wafer movement path map MP based on the wafer movement information file LMC. Please refer to Figure 6, and its example illustrates a wafer movement path diagram MP according to an embodiment of the present disclosure. The wafer movement path diagram MP may correspond to one wafer or multiple wafers. The wafer movement path diagram MP includes several mechanism nodes NDk and several paths PHt. These paths PHt connect these mechanism nodes NDk. The mechanism nodes NDk are, for example, the wafer stop points or structural units of the semiconductor machine 800. As Figure 6 shown, the wafer movement path diagram MP is a closed path diagram.
[0049] Next, in step S140, the binding unit 140 binds several account point information ACj to each machine operation event EVi according to the wafer movement path diagram MP. These account point information ACj include a lot number information (LotID), a program name (PPID), a cavity information (ChID), a cavity program (ChPPID), a location information (Site), and a step information (StepNo.). The wafer movement information file LMC has relatively complete account point information ACj, while the semiconductor machine record file LG lacks account point information ACj. Through the correspondence of the wafer movement path diagram MP, the account point information ACj can be successfully bound to each machine operation event EVi.
[0050] In addition, as Figure 6 shown, the wafer movement path diagram MP has the advantage of being graphical. The user can directly click on the path PHt on the wafer movement path diagram MP, and the corresponding machine operation event EVi can be displayed.
[0051] Then, in step S150, the tracking information graphing unit 150 generates a wafer movement tracking diagram CT based on the machine operation event EVi' bound with the account point information ACj. Please refer to Figure 7, and its example illustrates a wafer motion tracking chart CT according to an embodiment of the present disclosure. The wafer motion tracking chart CT shows the start and end times of each motion event EVi' in the form of a Gantt chart. For example, the user can select to display the motion event EV3 of "chamber operation" and the motion event EV4 of "recipe step". Then, the user can further select to display the motion events EV1, EV2, EV5, and EV6 of "robot arm operation". From the Gantt charts of these motion events EV1 to EV6, it can be clearly found that: the motion event EV2 of "robot arm operation" does not connect to the motion event EV3 of "chamber operation" or the motion event EV4 of "recipe step", and there are key waiting times WT1 before "chamber operation" and WT2 before "recipe step"; the motion event EV3 of "chamber operation" or the motion event EV4 of "recipe step" does not connect to the motion event EV2 of "robot arm operation", and there are key waiting times WT3 after "recipe step" and WT4 after "chamber operation". These key waiting times WT1 to WT4 are the bottleneck points / improvement opportunity points for optimizing the semiconductor manufacturing process.
[0052] In addition, in another embodiment, the wafer motion tracking chart CT can also be used to compare between motion events EVi to analyze the key time-consuming actions.
[0053] Through the analysis method and analysis device 100 for the semiconductor manufacturing process of the above embodiments, after the analysis device 100 automatically obtains the semiconductor machine record file LG and the wafer movement information file LMC from the semiconductor machine 800 and the database 900 in the background, it performs data analysis, binding, and imaging processing on the semiconductor machine record file LG and the wafer movement information file LMC. The user can complete the analysis of the semiconductor manufacturing process by simply operating through the imaging interface. Therefore, through the technology of the present disclosure, users who cannot write programs can also smoothly analyze where the bottleneck points / improvement opportunity points of the machine operation are in just a few hours, and then can optimize the manufacturing process.
[0054] The above disclosure provides different features for implementing some embodiments or examples of the present disclosure. The specific examples (such as the numerical values or names mentioned) of the described components and configurations are used to simplify / schematically illustrate some embodiments of the present disclosure. Of course, these components and configurations are only examples and are not intended to be restrictive. In addition, some embodiments of the present disclosure may repeat reference symbols and / or letters in various examples. This repetition is for simplicity and clarity purposes, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.
[0055] In summary, although the present disclosure has been disclosed above by way of examples, it is not intended to limit the present disclosure. Those skilled in the art to which the present disclosure pertains can make various modifications and refinements without departing from the spirit and scope of the present disclosure. Therefore, the scope of protection of the present disclosure shall be determined by the scope defined in the appended claims.
Claims
1. A method for analyzing a semiconductor manufacturing process, comprising: Loading a semiconductor tool record file; Defining a plurality of tool action events from the semiconductor manufacturing process record file; Generating a wafer movement path diagram based on the wafer movement information file; Binding a plurality of account point information to each of the tool action events according to the wafer movement path diagram; And Generating a wafer action tracking diagram based on the tool action events to which the account point information has been bound.
2. The method for analyzing a semiconductor manufacturing process according to claim 1, wherein in the step of defining the tool action events, the operation interface includes an original record window, a condition window, and an event window. The original record window displays the semiconductor tool record file, the condition window is used to set at least one search condition, and the event window W3 is used to display the tool action events.
3. The method for analyzing a semiconductor manufacturing process according to claim 1, wherein the wafer movement path diagram includes a plurality of mechanism nodes and a plurality of paths, and the paths connect the mechanism nodes.
4. The method for analyzing a semiconductor manufacturing process according to claim 3, wherein the wafer movement path diagram is a closed path diagram.
5. The method for analyzing a semiconductor manufacturing process according to claim 1, wherein the account point information includes lot number information, program name, chamber information, chamber program, position information, and step information.
6. The method for analyzing a semiconductor manufacturing process according to claim 1, wherein the wafer action tracking diagram corresponds to a wafer.
7. The method for analyzing a semiconductor manufacturing process according to claim 1, wherein the wafer action tracking diagram corresponds to a plurality of wafers.
8. The method for analyzing a semiconductor manufacturing process according to claim 1, wherein the wafer action tracking diagram is used to analyze key waiting times.
9. The method for analyzing a semiconductor manufacturing process according to claim 1, wherein the wafer action tracking diagram is used to analyze key time-consuming actions.
10. An apparatus for analyzing a semiconductor manufacturing process, comprising: A reading unit for loading a semiconductor tool record file; An action defining unit for providing an operation interface to define a plurality of tool action events from the semiconductor manufacturing process record file; A movement information graphing unit for generating a wafer movement path diagram based on the wafer movement information file; A binding unit for binding a plurality of account point information to each of the tool action events according to the wafer movement path diagram; And A tracking information graphing unit for generating a wafer action tracking diagram based on the tool action events to which the account point information has been bound.
11. The apparatus for analyzing a semiconductor manufacturing process according to claim 10, wherein the operation interface includes an original record window, a condition window, and an event window. The original record window displays the semiconductor tool record file, the condition window is used to set at least one search condition, and the event window is used to display the tool action events.
12. The apparatus for analyzing a semiconductor manufacturing process according to claim 10, wherein the wafer movement path diagram includes a plurality of mechanism nodes and a plurality of paths, and the paths connect the mechanism nodes.
13. The analysis device for semiconductor manufacturing process according to claim 12, wherein the wafer movement path diagram is a closed path diagram.
14. The analysis device for semiconductor manufacturing process according to claim 10, wherein the account point information includes lot number information, program name, chamber information, chamber program, position information, and step information.
15. The analysis device for semiconductor manufacturing process according to claim 10, wherein the wafer movement tracking diagram corresponds to the wafer.
16. The analysis device for semiconductor manufacturing process according to claim 10, wherein the wafer movement tracking diagram corresponds to multiple wafers.
17. The analysis device for semiconductor manufacturing process according to claim 10, wherein the wafer movement tracking diagram is used to analyze the critical waiting time.
18. The analysis device for semiconductor manufacturing process according to claim 10, wherein the wafer movement tracking diagram is used to analyze the critical time-consuming actions.