Data prefetching method and related device

Abstract

The embodiment of the invention provides a data pre-fetching method, which is characterized in that a pre-fetching operation is executed based on a pre-constructed preset data table, and the preset data table can record an address difference relationship among adjacent data points (namely a first data point, a second data point and a third data point) in a first data stream. A plurality of third data points can be recorded in each data set, and when a plurality of branches exist behind the second data points, the address difference records and statistical requirements of the multi-branch data can also be recorded in the data sets, so that based on the preset data table, after the processor uses the target data, the multi-branch data can be recorded; according to the data pre-fetching method, the preset data table corresponding to the target data can be queried based on the pre-fetching parameter, the pre-fetching step length can be determined, the data pre-fetching operation can be performed based on the pre-fetching step length and the target data, the data pre-fetching requirements of non-fixed address difference and multi-branch data flow can be met through the data pre-fetching method, the data pre-fetching accuracy is improved, and the data pre-fetching efficiency is improved. And the applicability of the data prefetching method is improved.

Description

Technical Field

[0001] This specification relates to the field of computer application technologies. Specifically, it relates to data prefetching technologies in the field of computer application technologies, and more specifically, to a data prefetching method and related devices. Background Art

[0002] Data prefetching is a technology used to improve the performance of computer systems. Data prefetching can predict the data that the processor may need during future execution and load this data from storage devices (such as memory, disks, etc.) into the cache or a storage area closer to the processor in advance. In this way, when the processor actually needs to use this data, it can obtain and use this data faster, thereby reducing the waiting time of the processor and improving the operating efficiency of the entire system.

[0003] However, currently, the applicable scenarios of data prefetching technologies are few, and the data prefetching accuracy is poor in some scenarios. It is necessary to improve the applicability of data prefetching technologies. Summary of the Invention

[0004] Embodiments of this specification provide a data prefetching method and related devices to achieve the purpose of improving the applicability of data prefetching methods.

[0005] To achieve the above technical purpose, the embodiments of this specification provide the following technical solutions:

[0006] In a first aspect, this specification provides a data prefetching method applied to a processor. The data prefetching method includes:

[0007] In response to the processor using target data, query a preset data table corresponding to the target data based on prefetching parameters to determine a prefetching step; the prefetching parameters include a target step, and the target step includes the first address difference between the previous data and the target data, and the previous data includes the data used by the processor before using the target data;

[0008] Perform a data prefetching operation based on the prefetching step and the target data;

[0009] The preset data table is determined based on a first data stream including the target data. The preset data table includes: multiple data groups, and each data group includes a second address difference and a third address difference corresponding to the second address difference; the second address difference includes the address difference between a first data point and a second data point, and the third address difference includes the address difference between the second data point and a third data point; the first data point, the second data point, and the third data point are data points arranged in sequence in the first data stream; the number of the third address differences is positively correlated with the number of the third data points.

[0010] In a second aspect, this specification provides a system-on-chip, comprising: a memory and a processor;

[0011] The memory is configured to store data;

[0012] The processor is configured to:

[0013] In response to the processor using target data, query a preset data table corresponding to the target data based on a prefetch parameter to determine a prefetch step; the prefetch parameter includes a target step, the target step includes a first address difference between the previous data and the target data, and the previous data includes the data used by the processor before using the target data;

[0014] Perform a data prefetch operation on the data stored in the memory based on the prefetch step and the target data;

[0015] The preset data table is determined based on a first data stream including the target data, and the preset data table includes: a plurality of data groups, the data groups include a second address difference and a third address difference corresponding to the second address difference; the second address difference includes an address difference between a first data point and a second data point, and the third address difference includes an address difference between the second data point and a third data point; the first data point, the second data point, and the third data point are data points arranged in sequence in the first data stream; the quantity of the third address differences is positively correlated with the quantity of the third data points.

[0016] In a third aspect, an embodiment of this specification further provides a computing device, comprising the system-on-chip as described above.

[0017] As can be seen from the above technical solution, the data prefetching method provided by the embodiments of this specification performs prefetching operations based on a preset data table constructed in advance. The preset data table is determined based on a first data stream containing target data. The preset data table includes: multiple data groups, and each data group includes a second address difference and a third address difference corresponding to the second address difference. The second address difference includes the address difference between a first data point and a second data point, and the third address difference includes the address difference between the second data point and a third data point. The first data point, the second data point, and the third data point are data points arranged in sequence in the first data stream. The number of the third address differences is positively correlated with the number of the third data points. In this way, the preset data table can record the address difference relationships between adjacent data points (i.e., the first data point, the second data point, and the third data point) in the first data stream, and multiple third data points can be recorded in each data group. When there are multiple branches after the second data point, the address difference records and statistical requirements of multi-branch data can also be recorded in the data group. Therefore, based on this preset data table, when the processor uses the target data, it can query the preset data table corresponding to the target data based on prefetching parameters to determine the prefetching step size, and perform data prefetching operations based on the prefetching step size and the target data. Through the data prefetching method, the data prefetching requirements for non-fixed address differences and multi-branch data streams can be met, improving the accuracy of data prefetching while enhancing the applicability of the data prefetching method. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of this specification or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of this specification. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the provided drawings.

[0019] Figure 1 Schematic diagram of a first data stream provided for an embodiment of this specification;

[0020] Figures 2 to 6 Schematic diagram of the construction process of a preset data table provided for an embodiment of this specification;

[0021] Figure 7 Schematic diagram of the flow of a data prefetching method provided for an embodiment of this specification;

[0022] Figure 8 Schematic diagram of the structure of a computing device provided for an embodiment of this specification. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] Unless otherwise defined, the technical terms or scientific terms used in the embodiments of this specification shall have the ordinary meanings as understood by those of ordinary skill in the art to which this specification pertains. The "first", "second" and similar terms used in the embodiments of this specification do not denote any order, quantity or importance, but are merely used to avoid confusion of components.

[0024] Unless the context otherwise requires, throughout the specification, "a plurality of" means "at least two", and "comprising" is interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples", "specific examples" or "some examples", etc. are intended to indicate that the specific features, structures, materials or characteristics related to the embodiment or example are included in at least one embodiment or example of this specification. The schematic representations of the above terms do not necessarily refer to the same embodiment or example.

[0025] The technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this specification. Obviously, the described embodiments are only a part of the embodiments of this specification, rather than all of them. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in this specification without creative efforts shall fall within the scope of protection of this specification.

[0026] Overview

[0027] The data prefetching technology can be implemented based on the principle of program locality. Program locality includes temporal locality and spatial locality. Among them, temporal locality means that if a data item is being accessed, it is very likely to be accessed again in the near future. For example, in a loop, the loop variable and the data used in the loop body are accessed in each loop iteration. Spatial locality means that if a data item is accessed, the data items adjacent to its address are also very likely to be accessed in the near future. For example, when accessing an array element, it is very likely that the adjacent elements in the array will be accessed next. Based on the above program locality, the data prefetching technology can preload the data that the processor may use from the storage device into the cache through a certain algorithm to reduce the time required for the processor to obtain data. In the related technology, the data prefetching technology can perform data prefetching based on a fixed stride (i.e., the address difference between adjacent data). For example, assuming that the address of data A currently used by the processor is 2, the data prefetching technology prefetches data B from address 4 according to the fixed stride of 2. When the processor uses data B, the data prefetching technology can prefetch data C from address 6. This data prefetching technology can only achieve data prefetching with a fixed address difference (stride). When there is no fixed address difference relationship between the data required to be processed by the processor, the accuracy of the data prefetched using this data prefetching technology is poor and cannot meet the actual application requirements, resulting in poor applicability of this data prefetching technology.

[0028] To solve this problem, the inventor found through research that the data prefetching technology can be made to perform data prefetching based on a non-fixed but regular address difference to extend the accuracy of the data prefetched by the data prefetching technology and the applicability of the data prefetching technology. For example, assuming that there is the following address difference relationship between the data used by the processor: 2, 2, 4, 2, 2, 4...; when the address of the first data used by the processor is 2, the following data can be prefetched based on the above address difference relationship: 2, 4, 6, 10, 12, 14, 18... In this way, this prefetching technology can be applied to the scenario where the address difference is non-fixed but there is a certain repeating relationship between the used data. However, this method still cannot be applied to the data prefetching of data streams with multiple branches, resulting in limited applicability of the data prefetching technology.

[0029] The inventor found through research that in a data stream as Figure 1 shown, there are multiple data branches. The data prefetching technology based on the above repeating address difference relationship cannot identify the address difference relationship in different data branches, resulting in the inapplicability or poor use effect of the data prefetching technology. To solve this problem, the inventor found through research that a preset data table can be established based on the data stream, and the address difference relationship between adjacent data points is recorded through the data groups in this table. The structure of this preset data table can be as Figure 2As shown, each line of data can be used as a data group to record adjacent data points (i.e., the first data point, the second data point, and the third data point that are adjacent in the access order in the data stream, where the number of the third data points is greater than or equal to 1). The depth of the table entry can be customized according to the data stream. The table header can be used to record the address difference between the first data point and the second data point among the adjacent data points (hereinafter referred to as the second address difference). The table behind the table header can be used to record the address difference between the second data point and the third data point (represented by the subsequent step amplitude a in the table, hereinafter referred to as the third address difference). If there are multiple third data points after the second data point (i.e., there are multiple data branches after the second data point), the second third address difference (i.e., the subsequent step amplitude b) can be continuously recorded in this data group. In some embodiments, the confidence levels of each second address difference (i.e., the table header confidence level) and the confidence levels of each third address difference (i.e., the subsequent step amplitude a confidence level and the subsequent step amplitude b confidence level) can also be recorded in the table. These confidence levels can be used to characterize the accuracy when prefetching data based on the address difference corresponding to the confidence level. The confidence level can be characterized by the frequency / occurrence frequency of the address difference corresponding to it in the data stream.

[0030] Combined with Figure 1 the data stream of Figure 1 in which the letters A to O in the circles represent different data points, and deltax (x = 2, 3, 4, 5, 6, 7) on the connecting lines between the data points represents the address difference between these two data points. Then starting from data A, from data A to data K, the difference between the two data points is 2, so this address difference is represented by delta2. In Figure 2 the table shown, a table header is assigned to delta2, and the preset data table as shown in Figure 3 is obtained. From data K to data L, the difference between the two data points is 3, so this address difference is represented by delta3. Among the adjacent data points A, K, and L, the preset data table as shown in Figure 4 is obtained. In the preset data table with confidence levels, since both delta2 and delta3 appear for the first time, their confidence levels are both represented by 0. At the same time, a table header is established for delta3 to obtain the first data in the next data group. According to the above method, based on the data chain A, K, L, B, and J, the preset data table as shown in Figure 5 is obtained. At this time, delta2 appears twice, and the confidence level corresponding to delta2 can be adjusted to 1. Based on the above method, by traversing the data stream as shown in Figure 1 the preset data table as shown in Figure 6 is obtained. It should be noted that Figure 6 the second group of data shown in Figure 6The second row of data in ) characterizes the address difference relationship between adjacent data points K, L, B, and C. The address difference from data K to data L is 3, so the header of the second set of data is delta3. Since there are two data branches after data L (from L→B and from L→C respectively), two third address differences can be included after delta3. These two third address differences can include delta4 from data L to data B and delta5 from data L to data C. In this way, by presetting a data table, the address difference relationships of multiple data branches in the data stream can be recorded. In some embodiments, the corresponding relationship between the address difference and the confidence level can also be added to the preset data table. Based on the obtained preset data table, it can provide a basis for data prefetching of data streams with non-fixed compensation and multiple branches, and increase the applicability of data prefetching technology in various scenarios while ensuring the accuracy of data prefetching.

[0031] Specifically, based on this preset data table, when the processor uses the target data, it can query the preset data table corresponding to the target data based on the prefetching parameters to determine the prefetching step length, and perform a data prefetching operation based on the prefetching step length and the target data. Through this data prefetching method, the data prefetching requirements for non-fixed address differences and multi-branch data streams can be met, improving the accuracy of data prefetching while enhancing the applicability of the data prefetching method.

[0032] Based on the above concept, the embodiments of this specification provide a data prefetching method. Next, the data prefetching method provided by the embodiments of this specification will be described exemplarily in conjunction with the accompanying drawings.

[0033] Exemplary Method

[0034] Taking the processor in the Figure 7 system-on-chip as an example, some embodiments of this specification exemplarily illustrate the data prefetching method. The data prefetching method includes:

[0035] S701: In response to the processor using the target data, query the preset data table corresponding to the target data based on the prefetching parameters to determine the prefetching step length; the prefetching parameters include the target step length, and the target step length includes the first address difference between the previous data and the target data, and the previous data includes the data used by the processor before using the target data;

[0036] S702: Perform a data prefetching operation based on the prefetching step length and the target data;

[0037] The preset data table is determined based on a first data stream including the target data. The preset data table includes: a plurality of data groups, where each data group includes a second address difference and a third address difference corresponding to the second address difference; the second address difference includes the address difference between a first data point and a second data point, and the third address difference includes the address difference between the second data point and a third data point; the first data point, the second data point, and the third data point are data points arranged in sequence in the first data stream; the number of the third address differences is positively correlated with the number of the third data points.

[0038] The number of preset data tables can include a plurality, and each preset data table can correspond to a first data stream including a plurality of data. As Figure 1 shown in the first data stream, when data A or other data in the first data stream has a cache miss, a preset data table as shown in Figure 6 can be established for the first data stream. Thus, assuming the target data is data K, the previous data is data A, and the first address difference is delta2, then by querying the preset data table as shown in Figure 6 , it can be determined that the prefetch step size can be delta3. At this time, the data L can be prefetched from the storage device and placed in the cache according to the prefetch step size to improve the processing efficiency of the processor for the data.

[0039] In this embodiment, as described above, the preset data table can describe the address difference situation in the first data stream including multiple branches. Through the preset data table, data basis can be provided for data prefetching, meeting the data prefetching requirements of non-fixed stride and multi-branch data streams, and improving the applicability of the data prefetching method.

[0040] In an optional embodiment, to improve the accuracy of data prefetching, each data group further includes: a confidence level corresponding to the second address difference and a confidence level corresponding to the third address difference;

[0041] The confidence level corresponding to the second address difference is positively correlated with the number of times the second address difference appears in the first data stream;

[0042] The confidence level corresponding to the third address difference is positively correlated with the number of times the third address difference appears in the first data stream.

[0043] In this embodiment, setting the confidence level corresponding to each address difference to be positively correlated with the number of times the data difference appears in the first data stream can make the confidence level represent, to a certain extent, the probability of the address difference corresponding to it appearing in the first data stream. Combining Figures 1 to 6It can be found that the address difference delta2 appears 3 times as the second data difference in the first data stream, so its corresponding confidence level can be 2, while the address difference 6 appears 2 times as the second data difference in the first data stream, so its corresponding confidence level can be 1; for the third address difference, the third address difference delta3 appears 3 times in the first data stream, its corresponding confidence level can be 2, and the third address difference delta6 appears 1 time in the first data stream, so its corresponding confidence level can be 0. Thus, the frequency of each address difference can be characterized by the confidence level. When determining the prefetch step size, the third address difference with a high confidence level can be used as the prefetch step size, which is beneficial to improving the accuracy of the data prefetch method.

[0044] Specifically, in one embodiment, the querying a preset data table based on the prefetch parameter to determine the prefetch step size includes:

[0045] Querying a preset data table based on the prefetch parameter to determine a target data group, where the target data group includes a second address difference that matches the first address difference;

[0046] Determining the prefetch step size according to the confidence level of the third address difference in the target data group.

[0047] For example, in one embodiment, the preset data table is as Figure 6 shown. The prefetch parameter includes a target step size of delta3. Then, by looking up the table, it is found that the third address differences corresponding to delta3 include delta4 and delta5. At this time, it can be determined whether to use delta4 or delta5 as the prefetch step size according to the respective confidence levels of delta4 and delta5. Thus, in the case of multiple third address differences, the prefetch step size can be selected through the confidence level and data prefetch can be performed, which is beneficial to improving the prefetch accuracy of the data prefetch method. In an alternative embodiment, the determining the prefetch step size according to the confidence level of the third address difference in the target data group includes:

[0048] Determining the third address difference with the highest confidence level in the target data group as the prefetch step size.

[0049] That is, in the above example, when the third address differences corresponding to the target step size include delta4 and delta5, delta4 with a higher confidence level can be determined as the prefetch step size, and Figure 1 data B in it can be prefetched. By this method, it is beneficial to improve the hit rate of the data prefetch technology and reduce the occurrence of cache misses.

[0050] Optionally, referring to Figure 6 , the data group includes data rows, and the second address differences included in each data row are different.

[0051] As Figure 6 shown, by determining whether each second address difference in the data row matches the first address difference, the data row to be searched can be quickly located, which is beneficial to improving the search efficiency.

[0052] In one embodiment, a process for determining a preset data table is provided, and the process includes:

[0053] In response to a cache miss of the target data and the absence of the preset data table corresponding to the target data, traverse the first data stream and construct the preset data table corresponding to the target data;

[0054] The process of traversing the first data stream includes:

[0055] Traverse adjacent data points in the first data stream, where the adjacent data points include the first data point, the second data point, and the third data point, and determine the second address difference and the third address difference;

[0056] Based on the second address difference and the third address difference, construct the data group.

[0057] This embodiment provides a way and a timing for constructing a preset data table. When a cache miss occurs for a certain target data and there is no preset data table corresponding to the target data, a preset data table corresponding to the target data can be constructed. Subsequently, a data prefetch operation can be performed based on the preset data table corresponding to the target data. In this way, there is no need to uniformly construct corresponding preset data tables for a large number of data streams together, avoiding the problem of excessive computational load in a short period of time.

[0058] In a feasible embodiment, the process of traversing the first data stream further includes:

[0059] Determine the confidence level of the second address difference according to the number of occurrences of the second address difference in the first data stream;

[0060] Determine the confidence level of the third address difference according to the number of occurrences of the third address difference in the first data stream.

[0061] For the construction process of the preset data table, reference can be made to Figures 1 to 6 and in combination with the corresponding description, which will not be elaborated in this specification.

[0062] In an alternative embodiment, to meet the requirements of a multi-branch data stream, the number of the third data points is multiple, and the multiple third data points are located in different branches, and the number of the third address differences is the same as that of the third data points.

[0063] Combined withFigure 1 and Figure 6 as shown Figure 6 In the data group of the second row in, the number of the third data points is two, corresponding to two different branches after the data L. It can be understood that, in some embodiments, Figure 6 the number of columns in the preset data table as shown may be positively correlated with the number of the third data points to meet the construction requirements of the preset data table including data streams with different numbers of branches.

[0064] Exemplary Apparatus

[0065] In an exemplary embodiment of the present specification, a data processing device is further provided, which is applied to a processor. The data prefetching device includes:

[0066] a step size determination module, configured to, in response to the processor using target data, query a preset data table corresponding to the target data based on prefetching parameters to determine a prefetching step size; the prefetching parameters include a target step size, and the target step size includes a first address difference between the previous data and the target data, and the previous data includes the data used by the processor before using the target data;

[0067] a data prefetching module, configured to perform a data prefetching operation based on the prefetching step size and the target data;

[0068] The preset data table is determined based on a first data stream including the target data. The preset data table includes: a plurality of data groups, and each data group includes a second address difference and a third address difference corresponding to the second address difference; the second address difference includes an address difference between a first data point and a second data point, and the third address difference includes an address difference between the second data point and the third data point; the first data point, the second data point, and the third data point are data points arranged in sequence in the first data stream; the number of the third address differences is positively correlated with the number of the third data points.

[0069] For the specific limitations on the data processing device, reference may be made to the limitations on the data prefetching method in the foregoing text, which will not be elaborated herein. Each module in the foregoing data processing device may be implemented in whole or in part by software, hardware, and their combination. The foregoing modules may be embedded in or independent of a processor in a computer device in the form of hardware, or may be stored in a memory in the computer device in the form of software, so as to facilitate the processor to call and execute the operations corresponding to the foregoing modules.

[0070] Exemplary Device

[0071] An embodiment of the present application further provides a system on a chip, including: a memory and a processor;

[0072] The memory is configured to store data;

[0073] The processor is configured to:

[0074] In response to the processor using target data, query a preset data table corresponding to the target data based on a prefetch parameter to determine a prefetch step; the prefetch parameter includes a target step, and the target step includes a first address difference between the previous data and the target data, and the previous data includes the data used by the processor before using the target data;

[0075] Based on the prefetch step and the target data, perform a data prefetch operation on the data stored in the memory;

[0076] The preset data table is determined based on a first data stream including the target data, and the preset data table includes: a plurality of data groups, and each data group includes a second address difference and a third address difference corresponding to the second address difference; the second address difference includes an address difference between a first data point and a second data point, and the third address difference includes an address difference between the second data point and a third data point; the first data point, the second data point, and the third data point are data points arranged in sequence in the first data stream; the number of the third address differences is positively correlated with the number of the third data points.

[0077] Another embodiment of the present application further provides a computing device. Refer to Figure 8 As shown, an exemplary embodiment of the present specification further provides a computing device, including: a system-on-chip as described in any of the above embodiments, and the system-on-chip includes a processor.

[0078] The internal structure of the computing device may be as Figure 8 As shown, the computing device includes a processor, a memory, a network interface, and an input device connected through a system bus. Among them, the processor of the computing device is used to provide computing and control capabilities. The memory of the computing device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computing device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, it provides the corresponding functions provided by the computer program.

[0079] The processor may include a main processor, and may also include a baseband chip, a modem, etc.

[0080] The memory stores a program for implementing the technical solution of the present invention, and may also store an operating system and other key services. Specifically, the program may include program code, and the program code includes computer operation instructions. More specifically, the memory may include a read-only memory (ROM), other types of static storage devices that can store static information and instructions, a random access memory (RAM), other types of dynamic storage devices that can store information and instructions, a disk memory, a flash memory, etc.

[0081] The processor may be a general-purpose processor, such as a general-purpose central processing unit (CPU), a microprocessor, etc., or may be an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the present invention. It may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0082] The input device may include a device for receiving user input data and information, such as a keyboard, a mouse, a camera, a scanner, a light pen, a voice input device, a touch screen, a pedometer or a gravity sensor, etc.

[0083] The output device may include a device for allowing output of information to the user, such as a display screen, a printer, a speaker, etc.

[0084] The communication interface may include a device of any transceiver type for communicating with other devices or communication networks, such as an Ethernet, a radio access network (RAN), a wireless local area network (WLAN), etc.

[0085] The processor executes the program stored in the memory and calls other devices, and can be used to execute each step of any one of the data prefetch methods provided in the above embodiments of the present application.

[0086] The computing device may further include a display component and a voice component. The display component may be a liquid crystal display screen or an electronic ink display screen. The input device of the computing device may be a touch layer covered on the display component, or may be a button, a trackball or a touchpad provided on the housing of the computing device, or may also be an external keyboard, a touchpad or a mouse, etc.

[0087] Those skilled in the art can understand, Figure 8The structures shown are merely block diagrams of some of the structures related to the solutions in this specification, and do not constitute a limitation on the computing devices to which the solutions in this specification are applied. Specific computing devices may include more or fewer components than those shown in the figures, or combine certain components, or have different component arrangements.

[0088] Those of ordinary skill in the art can understand that all or part of the processes of implementing the methods in the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, data table, or other medium used in the embodiments provided in this specification can include non-volatile and / or volatile memories. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0089] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.

[0090] The above-described embodiments only represent several implementation manners of this specification. Their descriptions are relatively specific and detailed, but should not be construed as limiting the scope of the solutions provided by the embodiments of this specification. It should be noted that for those of ordinary skill in the art, without departing from the concept of this specification, several modifications and improvements can still be made, and these all belong to the protection scope of this specification. Therefore, the protection scope of the patent of this specification should be subject to the appended claims.

Claims

1. A data prefetching method, characterized in that, Applied to a processor, the data prefetching method includes: In response to the processor using target data, query a preset data table corresponding to the target data based on prefetch parameters to determine a prefetch step size; the prefetch parameters include a target step size, and the target step size includes a first address difference between a previous data and the target data, and the previous data includes data used by the processor before using the target data; Based on the prefetch step size and the target data, perform a data prefetch operation; The preset data table is determined based on a first data stream including the target data, and the preset data table includes: a plurality of data groups, and each data group includes a second address difference and a third address difference corresponding to the second address difference; the second address difference includes an address difference between a first data point and a second data point, and the third address difference includes an address difference between the second data point and a third data point; the first data point, the second data point, and the third data point are data points arranged in sequence in the first data stream; the number of the third address differences is positively correlated with the number of the third data points.

2. The method according to claim 1, wherein Each data group further includes: a confidence level corresponding to the second address difference and a confidence level corresponding to the third address difference; The confidence level corresponding to the second address difference is positively correlated with the number of times the second address difference appears in the first data stream; The confidence level corresponding to the third address difference is positively correlated with the number of times the third address difference appears in the first data stream.

3. The method according to claim 2, characterized in that, The querying the preset data table based on the prefetch parameters to determine the prefetch step size includes: Query the preset data table based on the prefetch parameters to determine a target data group, and the target data group includes a second address difference matching the first address difference; Determine the prefetch step size according to the confidence level of the third address difference in the target data group.

4. The method according to claim 3, characterized in that The determining the prefetch step size according to the confidence level of the third address difference in the target data group includes: Determine the third address difference with the highest confidence level in the target data group as the prefetch step size.

5. The method according to claim 1, characterized in that Each data group includes data rows, and the second address differences included in each data row are different from each other.

6. The method according to any one of claims 1 to 5, characterized in that The determining process of the preset data table includes: In response to a cache miss occurring for the target data and there being no preset data table corresponding to the target data, traverse the first data stream to construct the preset data table corresponding to the target data; The process of traversing the first data stream includes: Traverse adjacent data points in the first data stream, and the adjacent data points include the first data point, the second data point, and the third data point, to determine the second address difference and the third address difference; Based on the second address difference and the third address difference, construct the data group.

7. The method according to claim 6, characterized in that, The process of traversing the first data stream further includes: Determine the confidence level of the second address difference according to the number of times the second address difference appears in the first data stream; Determine the confidence level of the third address difference according to the number of times the third address difference appears in the first data stream.

8. The method according to any one of claims 1 to 5, characterized in that The number of the third data points is multiple, and the multiple third data points are located in different branches. The number of the third address differences is the same as that of the third data points.

9. A system on a chip, characterized in that, Comprising: a memory and a processor; The memory is configured to store data; The processor is configured to: in response to the processor using target data, query a preset data table corresponding to the target data based on a prefetch parameter to determine a prefetch step; the prefetch parameter includes a target step, and the target step includes a first address difference between a previous data and the target data, and the previous data includes the data used by the processor before using the target data; perform a data prefetch operation on the data stored in the memory based on the prefetch step and the target data; The preset data table is determined based on a first data stream including the target data. The preset data table includes: multiple data groups, and each data group includes a second address difference and a third address difference corresponding to the second address difference; The second address difference includes an address difference between a first data point and a second data point, and the third address difference includes an address difference between the second data point and a third data point; the first data point, the second data point, and the third data point are data points arranged in sequence in the first data stream; the number of the third address differences is positively correlated with the number of the third data points.

10. A computing device, characterized in that, Comprising the system on chip as claimed in claim 9.

Images