Display device and integrated driving circuit

Abstract

Embodiments of the present disclosure relate to a display device and an integrated driving circuit, and more particularly, may provide a display device including: a display panel in which a plurality of sub-pixels defined by a plurality of data lines, a plurality of reference voltage lines, and a plurality of gate lines are arranged; a display device includes a plurality of data lines and a plurality of reference voltage lines, a source driver integrated circuit configured to drive the plurality of data lines and the plurality of reference voltage lines, and an integrated driving unit alternately outputting a data voltage and a reference voltage to one line shared by one of the plurality of data lines and one of the plurality of reference voltage lines.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2024 - 0015370, filed on January 31, 2024, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical field

[0003] Embodiments of the present disclosure relate to a display device and an integrated driving circuit. Background art

[0004] Recently, an organic light - emitting display device, which has attracted attention as a display device, has advantages such as a fast response speed, high luminous efficiency, brightness, and viewing angle by adopting self - emitting organic light - emitting diodes (OLEDs). Summary of the invention

[0005] Embodiments of the present disclosure provide a display device and an integrated driving circuit that can increase the number of lines between a source driver integrated circuit and a display panel.

[0006] Embodiments of the present disclosure provide a display device and an integrated driving circuit that can receive a data voltage and a reference voltage for data driving through the same integrated line.

[0007] Embodiments of the present disclosure can provide a display device and an integrated driving circuit that can reduce the number of wiring lines by configuring data lines and reference voltage lines as an integrated structure.

[0008] A display device according to an embodiment of the present disclosure may include: a display panel in which a plurality of sub - pixels defined by a plurality of data lines, a plurality of reference voltage lines, and a plurality of gate lines are arranged; a source driver integrated circuit configured to drive the plurality of data lines and the plurality of reference voltage lines, and an integrated driving unit that alternately outputs a data voltage and a reference voltage to a single line shared by one of the plurality of data lines and one of the plurality of reference voltage lines.

[0009] An integrated driving circuit according to an embodiment of the present disclosure may include a first input node disposed in a source driver integrated circuit to receive a data voltage, a second input node disposed in the source driver integrated circuit to receive a reference voltage, an integrated line commonly electrically connecting the first input node and the second input node, a first output node disposed in a display panel and connected between the integrated line and a data line, a second output node disposed in the display panel and connected between the integrated line and a reference voltage line, a first switching element for switching the connection between the first output node and the data line, a second switching element for switching the connection between the second output node and the reference voltage line, a third switching element for switching the connection between the first input node and the integrated line, and a fourth switching element for switching the connection between the second input node and the integrated line.

[0010] According to an embodiment of the present disclosure, a data voltage for data driving and a reference voltage for reference voltage driving can be output to the same integrated line IL1, and data driving and reference voltage driving can be integrated and provided by using an integrated driving unit. Therefore, the number of output lines of the integrated driving unit can be significantly reduced.

[0011] Therefore, since the integrated driving unit according to the present embodiment has only a small number of output channels, the circuit design can be easy and simplified.

[0012] In addition, by using the integrated driving unit according to the present embodiment, the number of lines between the display panel and the source driver integrated circuit can be reduced. Therefore, compared with the conventional technology, the display device can be made lighter by increasing the usage efficiency with respect to the area occupied by the data line and the reference voltage line. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The above and other objects, features and advantages of the present disclosure will be more clearly understood from the following detailed description in conjunction with the accompanying drawings, in which:

[0014] Figure 1 is a diagram schematically showing a system configuration of a display device according to an embodiment of the present disclosure;

[0015] Figure 2 is a diagram schematically showing a configuration of a display device according to an embodiment of the present disclosure;

[0016] Figure 3 shows an example structure of sub-pixels arranged on a display panel when the display panel is an organic light emitting display panel;

[0017] Figure 4A and 4BShows the corresponding circuits when data voltage lines and reference voltage lines are formed separately instead of being shared in a display device;

[0018] Figure 5A 、 5B and 5C show the circuits in which data voltage lines and reference voltage lines are shared according to an embodiment of the present disclosure;

[0019] Figure 6A and 6B is a diagram showing an example of data driving of integrated driving of an integrated driving circuit according to a first embodiment of the present disclosure;

[0020] Figure 7A and 7B is a diagram showing an example of reference voltage driving of integrated driving of an integrated driving circuit according to a second embodiment of the present disclosure;

[0021] Figure 8A is a diagram showing an example circuit of a display device for integrated driving according to an embodiment of the present disclosure;

[0022] Figure 8B is a diagram showing the waveform of a main signal through integrated driving according to an embodiment of the present disclosure; and

[0023] Figure 8C is a diagram showing the waveform of the current flowing through a light-emitting element through integrated driving according to an embodiment of the present disclosure. Detailed Description

[0024] In the following description of examples or embodiments of the present disclosure, reference will be made to the accompanying drawings, in which specific examples or embodiments that can be implemented are shown by way of illustration, and in which, even when the same or similar components are shown in different drawings, the same reference numerals and symbols can be used to represent the same or similar components. Further, in the following description of examples or embodiments of the present disclosure, when it is determined that a detailed description of well-known functions and components incorporated herein may make the subject matter in some embodiments of the present disclosure rather unclear, the description thereof will be omitted. Terms such as "including", "having", "containing", "constituting", "comprising", and "formed of" as used herein are generally intended to allow the addition of other components, unless these terms are used together with the term "only". As used herein, the singular form is intended to include the plural form unless the context clearly dictates otherwise.

[0025] Terms such as "first", "second", "A", "B", "(A)", or "(B)" may be used herein to describe elements of the present disclosure. Each of these terms does not define the essence, order, sequence, or quantity, etc. of the element, but is only used to distinguish the corresponding element from other elements.

[0026] When referring to the first element being "connected or coupled to", "contacting or overlapping", etc. the second element, it should be interpreted that not only can the first element be "directly connected or coupled to" or "directly contacting or overlapping" the second element, but also a third element can be "inserted" between the first and second elements, or the first and second elements can be "connected or coupled", "contacting or overlapping", etc. with each other via a fourth element. Here, the second element can include at least one of two or more elements that are "connected or coupled", "contacting or overlapping", etc. with each other.

[0027] When using time - relative terms such as "after", "subsequently", "next", "before", etc. to describe a process or operation of an element or configuration, or a flow or step in an operation, process, manufacturing method, these terms can be used to describe a non - continuous or non - sequential process or operation, unless the terms "directly" or "immediately" are used together.

[0028] In addition, when referring to any dimension, relative size, etc., the numerical value or corresponding information of an element or feature (e.g., horizontal, range, etc.) should be considered to include a tolerance or error range that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.) even when the relevant description is not specified. Furthermore, the term "may" fully encompasses all the meanings of the term "can".

[0029] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0030] Figure 1 is a diagram schematically showing the system configuration of a display device according to an embodiment of the present disclosure.

[0031] Referring to Figure 1 , the display device 100 according to the present embodiment may include a display panel 110 and a driving circuit for driving the display panel 110. A plurality of data lines DL and a plurality of gate lines GL are arranged in the display panel 110, and a plurality of sub - pixels SP defined by the plurality of data lines DL and the plurality of gate lines GL are arranged in a matrix type.

[0032] From a functional perspective, the driving circuit may include a data driving circuit 120 for driving the plurality of data lines DL, a gate driving circuit 130 for driving the plurality of gate lines GL, and a controller 140 for controlling the data driving circuit 120 and the gate driving circuit 130.

[0033] In the display panel 110, a plurality of data lines DL and a plurality of gate lines GL may be arranged to cross each other. For example, the plurality of gate lines GL may be arranged in rows or columns, and the plurality of data lines DL may be arranged in columns or rows. For ease of description, it is assumed below that the plurality of gate lines GL are arranged in rows and the plurality of data lines DL are arranged in columns.

[0034] In the display panel 110, in addition to the plurality of data lines DL and the plurality of gate lines GL, other types of lines may also be provided.

[0035] The controller 140 may supply image data DATA to the data driving circuit 120.

[0036] In addition, the controller 140 may control the operations of the data driving circuit 120 and the gate driving circuit 130 by providing various data control signals DCS and gate control signals GCS required for the driving operations of the data driving circuit 120 and the gate driving circuit 130.

[0037] The controller 140 starts scanning according to the timing achieved in each frame, converts the input image data input from the outside into image data DATA in a data signal format suitable for use in the data driving circuit 120, outputs the image data DATA, and controls the data driving at an appropriate time suitable for scanning.

[0038] To control the data driving circuit 120 and the gate driving circuit 130, the controller 140 receives timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, an input data enable signal (data enable, DE), or a clock signal CLK from the outside (e.g., a host system), generates various control signals, and outputs the control signals to the data driving circuit 120 and the gate driving circuit 130.

[0039] As an example, to control the gate driving circuit 130, the controller 140 outputs various gate control signals GCS including a gate start pulse GSP, a gate shift clock GSC, and a gate output enable signal (gate output enable, GOE).

[0040] To control the data driving circuit 120, the controller 140 outputs various data control signals DCS including, for example, a source start pulse SSP, a source sampling clock SSC, and a source output enable signal (source output enable, SOE).

[0041] The controller 140 may be a timing controller used in typical display technologies, or may be a control device that can perform other control functions as well as the functions of a timing controller.

[0042] The controller 140 can be implemented as a component separate from the data driving circuit 120, or the controller 140 and the data driving circuit 120 together can be implemented as an integrated circuit.

[0043] The data driving circuit 120 receives image data DATA from the controller 140 and supplies data voltages to a plurality of data lines DL, thereby driving the plurality of data lines DL. Here, the data driving circuit 120 is also referred to as a "source driving circuit".

[0044] The data driving circuit 120 may include a shift register, a latch circuit, a digital-to-analog converter (DAC), and an output buffer.

[0045] In some cases, the data driving circuit 120 may further include one or more analog-to-digital converters ADC.

[0046] The gate driving circuit 130 drives a plurality of gate lines GL in sequence by sequentially supplying scan signals to the plurality of gate lines GL. Here, the gate driving circuit 130 is also referred to as a "scan driving circuit".

[0047] The gate driving circuit 130 may include, for example, a shift register and a level shifter.

[0048] The gate driving circuit 130 supplies scan signals of on-voltage or off-voltage to the plurality of gate lines GL in sequence under the control of the controller 140.

[0049] When the gate driving circuit 130 turns on a specific gate line, the data driving circuit 120 converts the image data DATA received from the controller 140 into an analog data voltage and supplies the analog data voltage to the plurality of data lines DL.

[0050] The data driving circuit 120 may be located only on one side (e.g., the top side or the bottom side) of the display panel 110. In some cases, the data driving circuit 120 may be located on each of two opposite sides (e.g., the top side and the bottom side) of the display panel 110, depending on, for example, the driving scheme or the panel design.

[0051] The gate driving circuit 130 may be located only on one side (e.g., the left side or the right side) of the display panel 110. In some cases, the gate driving circuit 130 may be located on each of two opposite sides (e.g., the left side and the right side) of the display panel 110, depending on, for example, the driving scheme or the panel design.

[0052] The data driving circuit 120 may include at least one source driver integrated circuit SDIC.

[0053] Each source driver integrated circuit (SDIC) can be connected to the bonding pads of the display panel 110 in a tape automated bonding (TAB) type or a chip on glass (COG) type, or can be directly disposed on the display panel 110. In some cases, each source driver integrated circuit (SDIC) can be integrated and disposed on the display panel 110. Each source driver integrated circuit (SDIC) can be implemented in a chip on film (COF) type. In this case, each source driver integrated circuit (SDIC) can be mounted on a circuit film and electrically connected to the data lines DL of the panel 110 through the circuit film.

[0054] In the gate driving circuit 130, one or more gate driver integrated circuits (ICs) (GDIC) can be connected to the bonding pads of the display panel 110 in a TAB or COG type. In addition, the gate driving circuit 130 can be implemented in a gate in panel (GIP) type and directly disposed on the display panel 110. In addition, the gate driving circuit 130 can be implemented in a chip on film (COF) type. In this case, each gate driver integrated circuit (GDIC) included in the gate driving circuit 130 can be mounted on a circuit film and electrically connected to the gate lines GL of the display panel 110 through the circuit film.

[0055] Figure 2 is a diagram schematically showing the configuration of a display device according to an embodiment of the present disclosure.

[0056] Reference Figure 2 , in the display device 100 according to an embodiment of the present disclosure, the source driver integrated circuit (SDIC) included in the data driving circuit 130 and the gate driver integrated circuit (GDIC) included in the gate driving circuit 120 are implemented in a chip on film (COF) type among various types (e.g., TAB, COG, or COF).

[0057] Each of one or more gate driver integrated circuits (GDICs) included in the gate driving circuit 120 can be mounted on a gate film GF, and one side of the gate film GF can be electrically connected to the display panel 110. A line for electrically connecting the gate driver integrated circuit (GDIC) and the display panel 110 can be provided on the gate film GF.

[0058] According to the driving method, the gate driving circuit 120 can be located only on one side of the display panel 110, or on each of two opposite sides. The gate driving circuit 120 can be implemented in a gate in panel (GIP) form embedded in the border area of the display panel 110.

[0059] Similarly, each of one or more source driver integrated circuits (SDICs) included in the data driving circuit 130 may be mounted on the source film SF, and one side of the source film SF may be electrically connected to the display panel 110. A line for electrically connecting the source driver integrated circuit SDIC and the display panel 110 may be provided on the source film SF.

[0060] The display device 100 may include a plurality of source driver integrated circuits SDICs and a printed circuit board for circuit connection between other devices. The printed circuit board may include, for example, at least one source printed circuit board SPCB and a control printed circuit board CPCB for mounting control components and various electrical devices.

[0061] In an embodiment, the other side of the source film SF on which the source driver integrated circuit SDIC is mounted may be connected to at least one source printed circuit board SPCB. That is, one side of the source film SF on which the source driver integrated circuit SDIC is mounted may be electrically connected to the display panel 110, and the other side thereof may be electrically connected to the source printed circuit board SPCB.

[0062] The controller 140 and the power management circuit (power management IC) 150 may be mounted on the control printed circuit board CPCB. The controller 140 may control the operations of the data driving circuit 130 and the gate driving circuit 120. The power management circuit 150 may supply a driving voltage or current to the display panel 110, the data driving circuit 130, and the gate driving circuit 120, and control the supplied voltage or current.

[0063] At least one source printed circuit board SPCB and the control printed circuit board CPCB may be circuit-connected through at least one connection member. The connection member may include, for example, a flexible printed circuit FPC or a flexible flat cable FFC.

[0064] In this case, the connection member connecting at least one source printed circuit board SPCB and the control printed circuit board CPCB may vary according to the size and type of the display device 100. At least one source printed circuit board SPCB and the control printed circuit board CPCB may be integrated into a single printed circuit board.

[0065] In the display device 100 configured as such, the power management circuit 150 transmits a driving voltage required for display driving or characteristic value sensing to the source printed circuit board SPCB through the flexible printed circuit FPC or the flexible flat cable FFC. The driving voltage transmitted to the source printed circuit board SPCB is provided to emit light or sense specific sub-pixels SP in the display panel 110 through the source driver integrated circuit SDIC.

[0066] Figure 3Shows an example structure of a sub-pixel SP arranged on a display panel 110 when the display panel 110 is an organic light-emitting display panel.

[0067] Reference Figure 3 , each of the plurality of sub-pixels SP may include an organic light-emitting diode OLED, a driving transistor DRT for driving the organic light-emitting diode OLED, a first transistor T1 for transmitting a data voltage Vdata to a first node N1 which is a gate node of the driving transistor DRT, and a storage capacitor Cst for holding a voltage during one frame period.

[0068] The organic light-emitting diode OLED may include a first electrode, an organic light-emitting layer, and a second electrode. The first electrode may be an anode electrode. The second electrode may be a cathode electrode to which a low-potential driving voltage EVSS is applied. In some cases, the first electrode may be a cathode electrode and the second electrode may be an anode electrode. The driving transistor DRT may be electrically connected between the first electrode of the organic light-emitting diode OLED and a driving voltage line DVL.

[0069] In the driving transistor DRT, the first node N1 is a gate node and may be electrically connected to a source node or a drain node of the first transistor T1 and receive the data voltage Vdata. The second node N2 is a source node or a drain node and may be electrically connected to the first electrode of the organic light-emitting diode OLED. The third node N3 may be electrically connected to the driving voltage line DVL. The first transistor T1 may be controlled by a first scan signal SCAN1 provided through a gate line GL and is electrically connected between the gate node N1 of the driving transistor DRT and a data line DL. The first transistor T1 may be turned on to apply the data voltage Vdata provided to the data line DL to the first node N1 which is the gate node of the driving transistor DRT. The storage capacitor Cst may be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT. The plurality of lines SL arranged on the display panel 110 may include a data line DL, a driving voltage line DVL, and a gate line GL. Each sub-pixel SP in the display panel 110 may have a 2T (transistor) 1C (capacitor) structure including two driving transistors DRT, a first transistor T1, and one capacitor CST. Each sub-pixel SP in the display panel 110 may also include one or more transistors, or may also include one or more capacitors.

[0070] For example, as Figure 3 shown, each sub-pixel SP may be controlled by a second scan signal SCAN2 and may also include a second transistor T2 electrically connected between the second node N2 of the driving transistor DRT and a reference voltage line REFL.

[0071] Figure 4AThe circuit, Figure 4B The circuits and signal waveforms of φH2O2 correspond to the case where the data voltage line and the reference voltage line are formed separately without sharing in the display device 100 .

[0072] refer to Figure 4A and 4B A plurality of data lines DL1 to DLn and a plurality of reference voltage lines REFL1 to REFn are respectively formed between the display panel PANEL and the source driving integrated circuit SDIC.

[0073] That is, a number of signal lines corresponding to the number of data lines and reference voltage lines is provided between the display panel PANEL and the source driver integrated circuit SDIC. The number of data lines DL1 to DLn and the plurality of reference voltage lines REFL1 to REFLn may be increased according to the size and resolution of the display panel PANEL. Increasing the number of signal lines not only makes the design of the display device 100 more difficult, but also complicates the structure of the driver circuit.

[0074] Therefore, an embodiment of the present disclosure discloses a method for reducing the number of signal lines to solve the problem.

[0075] Figure 5A 、 5B 5C show a circuit in which a data voltage line and a reference voltage line are shared according to an embodiment of the present disclosure.

[0076] Hereinafter, a method of reducing the number of lines in the display apparatus 100 is described.

[0077] Hereinafter, as an example of a method for reducing the number of lines, an integrated driving method for integrating and providing data voltage driving and reference voltage driving by utilizing an integrated line IL, a signal line connection structure for the integrated driving method, and an integrated driving circuit are proposed. This is based on the assumption that the reference voltage line REFL and the data line DL are arranged in the same direction.

[0078] According to the integrated driving of this embodiment, the data voltage for data driving and the reference voltage for reference voltage driving may be provided to the display panel 110 through the same line (hereinafter referred to as the integration line IL) between the source driver integrated circuit SDIC and the display panel 110 .

[0079] Figure 5A A display panel 110 including a plurality of sub-pixels, a source driver integrated circuit 120 connected to the display panel 110 , and a plurality of integrated driving cells IDC1 , IDC2 are shown.

[0080] refer to Figure 5A , the display device 100 (see Figure 1) may include a display panel 110, a source driver integrated circuit 120, and a plurality of integrated driving units IDC1 and IDC2. Other components included in the display device 100 have been described above with reference to Figure 1 and 2 , and thus their descriptions are omitted.

[0081] In Figure 5A , for ease of description, it is illustrated that there are four data lines DL1 to DL4 and two integrated driving units (integrated driving circuits) IDC1 and IDC2, but the present disclosure is not limited thereto.

[0082] Referring to Figure 5A , an integrated driving system for data voltage driving and reference voltage driving according to an embodiment of the present disclosure may include a plurality of integrated driving units IDC1 and IDC2 for driving a plurality of data lines DL1 to DL4 and a plurality of reference voltage lines REFL1 and REFL2. Hereinafter, for ease of description, a method for integrally driving the data line DL1 and the reference voltage line REFL1 by the integrated driving unit IDC1 will be described. The method for integrally driving the data line DL2 and the reference voltage line REFL2 by the integrated driving unit IDC2 is the same as the driving method of the integrated driving unit IDC1.

[0083] The integrated driving unit IDC1 may integrate and provide the functions of the data line DL1 and the reference voltage line REFL1.

[0084] An integrated driving system for data voltage driving and reference voltage driving according to an embodiment of the present disclosure includes a signal line connection structure for integrally driving the data line DL1 and the reference voltage line REFL1.

[0085] Figure 5B is a circuit diagram schematically showing a source driver integrated circuit, an integrated driving unit, and a display panel according to a first embodiment of the present disclosure.

[0086] Referring to Figure 5B , the source driver integrated circuit SDIC may output a data voltage Vdata1 to be provided to the data line DL1 during a display mode period, and may output a reference voltage Vref to be provided to the reference voltage line REFL. In this case, the source driver integrated circuit SDIC may allow the data voltage Vdata1 and the reference voltage Vref to be alternately transmitted to the display panel 110 through the integrated line IL1 during the display mode period.

[0087] The source driver integrated circuit SDIC may include one or more latches, a digital-to-analog converter ADC, an output buffer, etc.

[0088] The integrated drive unit IDC1 according to the first embodiment may include a first input node IN1, a second input node IN2, an integrated line IL1, a first output node OUT1, a second output node OUT2, and a plurality of switching elements SW1 to SW4.

[0089] The first input node IN1 may be disposed in the source driver integrated circuit 120 to receive a data voltage. That is, the first input node IN1 may receive the data voltage Vdata1 output from the source driver integrated circuit SDIC.

[0090] The second input node IN2 may be disposed in the source driver integrated circuit 120 to receive a reference voltage Vref1. That is, the second input node IN2 receives the reference voltage Vref1 output from the source driver integrated circuit SDIC. The reference voltage Vref1 may be applied to the source driver integrated circuit SDIC from an external power supply.

[0091] The integrated line IL1 may commonly electrically connect the first input node IN1 and the second input node IN2.

[0092] The first output node OUT1 may be disposed in the display panel 110 and may be connected between the integrated line IL1 and the data line DL1. The first output node OUT1 may be connected to one end of the integrated line IL1 and, when the first switching element SW1 is turned on, transmits the data voltage Vdata1 transmitted from the integrated line IL1 to the data line DL1. [[ID=I4]]

[0093] The first switching element SW1 may switch the connection between the first output node OUT1 and the data line DL1.

[0094] The second output node OUT2 may be disposed in the display panel 110 and may be connected between the integrated line IL1 and the reference voltage line REFL1. The second output node OUT2 may be connected to one end of the integrated line IL1 and, when the second switching element SW2 is turned on, transmits the reference voltage Vref1 transmitted from the integrated line IL1 to the reference voltage line REFL1.

[0095] The second switching element SW2 may switch the connection between the second output node OUT2 and the reference voltage line REFL1.

[0096] The third switching element SW3 may switch the connection between the first input node IN1 and the integrated line IL1.

[0097] The fourth switching element SW4 may switch the connection between the second input node IN2 and the integrated line IL1.

[0098] The first switching element SW1 to the fourth switching element SW4 may be configured as transistors.

[0099] The integrated line IL1 can be shared by the data line DL1 and the reference voltage line REFL1 through the source driver integrated circuit SDIC or the controller 140.

[0100] With the above structure, the integrated line IL1 can be disposed between the display panel 110 and the source driver integrated circuit 120, and can be commonly electrically connected to the data line DL1 and the reference voltage line REFL1.

[0101] Therefore, since there is no need to separately form the data line DL1 and the reference voltage line REFL1 between the display panel 110 and the source driver integrated circuit 120, the number of lines can be significantly reduced.

[0102] That is, the total number of lines in the display panel 110 can be reduced by the number of reference voltage lines REFL.

[0103] Figure 5C is a circuit diagram showing a connection structure between an integrated driving unit and a display panel according to a second embodiment of the present disclosure. Compared with Figure 5B the circuit diagram of the first embodiment shown, Figure 5C the circuit diagram of the second embodiment shown also includes an inverter INV and an additional line for connecting the inverter INV to the integrated driving unit IDC1.

[0104] The inverter INV can be connected between the first node Nd1 and the second node Nd2. The first node Nd1 is a node connected between the first switching element SW1 and the third switching element SW3, and the second node Nd2 is a node connected between the second switching element SW2 and the fourth switching element SW4.

[0105] The inverter INV can be disposed in the integrated driving unit IDC1 such that the signal applied to the first input node IN1 is not transmitted to the reference voltage line REFL1 and the signal applied to the second input node IN2 is not transmitted to the data line DL1.

[0106] When the signal of the first node Nd1 is at a high level, since the signal of the first node Nd1 is inverted by the inverter INV and a low-level signal is input to the second node Nd2, signal leakage can be prevented by preventing the signal of the first input node IN1 from being transmitted to the second input node IN2.

[0107] Hereinafter, reference Figure 6A and 6B is made to describe the integrated data driving of the integrated driving circuit according to the first embodiment of the present disclosure.

[0108] Figure 6Ais a circuit diagram showing data driving based on an integrated driving unit IDC1 according to a first embodiment of the present disclosure, Figure 6B is a circuit diagram showing reference voltage driving based on an integrated driving unit IDC1 according to a first embodiment of the present disclosure.

[0109] Reference Figure 6A , as shown in the driving waveform diagram, one horizontal period 1H includes a data driving period DT and a reference voltage driving period RT.

[0110] The data voltage Vdata1 can be applied to the first input node IN1 during the data driving period DT of one horizontal period. When the first switching element SW1 and the third switching element SW3 are turned on during the data driving period DT, the first input node IN1, the integrated line IL1, and the data line DL1 can be electrically connected. Therefore, the data voltage Vdata1 applied to the first input node IN1 can be provided from the first input node IN1 to the data line DL1 connected to the sub-pixel via the integrated line IL1.

[0111] During the data driving period DT, the source driving integrated circuit SDIC can turn off the second switching element SW2 and the fourth switching element SW4, thereby deactivating the reference voltage line REFL1.

[0112] Reference Figure 6B , when the reference voltage driving period RT arrives after the data driving period DT, the source driving integrated circuit SDIC can apply the reference voltage Vref1 to the second input node IN2.

[0113] When the second switching element SW2 and the fourth switching element SW4 are turned on during the reference voltage driving period RT, the second input node IN2, the integrated line IL1, and the reference voltage line REFL1 can be electrically connected. Therefore, the reference voltage Vref1 applied to the second input node IN2 can be provided from the second input node IN2 to the reference voltage line REFL1 via the integrated line IL1.

[0114] During the reference voltage driving period RT, the source driving integrated circuit SDIC can turn off the first switching element SW1 and the third switching element SW3, thereby deactivating the data line DL1.

[0115] When one horizontal period is repeated in this way, the source driving integrated circuit SDIC can alternately provide the data voltage Vdata1 and the reference voltage Vref1 to the sub-pixel through the integrated driving unit IDC.

[0116] This is possible because the integrated line IL1 is commonly connected to the data line DL1 and the reference voltage line REFL1, so this integrated line IL1 can be shared for data driving and reference voltage driving.

[0117] By using the above integrated driving unit IDC1, data driving and reference voltage driving can be integrated and provided, and the data voltage Vdata1 for data driving and the reference voltage Vref for reference voltage driving can be output to the same integrated line IL1. Therefore, the number of output lines of the integrated driving unit IDC can be significantly reduced.

[0118] Therefore, since the integrated driving unit IDC according to the present embodiment can have only a small number of output channels, the circuit design can be easy and simple. In addition, by using the integrated driving unit IDC according to the present embodiment, the number of lines of the display panel 110 can be reduced.

[0119] Hereinafter, with reference to Figure 7A and Figure 7B the reference voltage driving of the integrated driving of the integrated driving circuit according to the second embodiment of the present disclosure will be described.

[0120] Figure 7A FIG. is a circuit diagram showing data driving based on the integrated driving unit IDC11 according to the second embodiment of the present disclosure, Figure 7B is a circuit diagram showing reference voltage driving based on the integrated driving unit IDC11 according to the second embodiment of the present disclosure.

[0121] With reference to Figure 7A , as shown in the driving waveform diagram, one horizontal period 1H includes a data driving period DT and a reference voltage driving period RT.

[0122] The data voltage Vdata1 can be applied to the first input node IN1 during the data driving period DT of one horizontal period. When the first switching element SW1 and the third switching element SW3 are turned on during the data driving period DT, the first input node IN1, the integrated line IL1, and the data line DL1 can be electrically connected. Therefore, the data voltage Vdata1 applied to the first input node IN1 can be provided from the first input node IN1 to the data line DL1 connected to the sub-pixel via the integrated line IL1.

[0123] During the data driving period DT, the source driving integrated circuit SDIC can turn off the second switching element SW2 and the fourth switching element SW4, thereby deactivating the reference voltage line REFL1.

[0124] In this case, when the signal of the first node Nd1 is at a high level, since the signal of the first node Nd1 is inverted by the inverter INV and a low-level signal is input to the second node Nd2, signal leakage can be prevented by preventing the signal of the first input node IN1 from being transmitted to the second input node IN2.

[0125] Reference Figure 7B When the reference voltage driving period RT arrives after the data driving period DT, the source driver integrated circuit SDIC may apply the reference voltage Vref1 to the second input node IN2.

[0126] When the second switching element SW2 and the fourth switching element SW4 are turned on during the reference voltage driving period RT, the second input node IN2, the integration line IL1, and the reference voltage line REFL1 may be electrically connected. Accordingly, the reference voltage Vref1 applied to the second input node IN2 may be provided from the second input node IN2 to the reference voltage line REFL1 via the integration line IL1.

[0127] During the reference voltage driving period RT, the source driver integrated circuit SDIC may turn off the first switching element SW1 and the third switching element SW3, thereby deactivating the data line DL1.

[0128] When one horizontal period is repeated in this manner, the source driver integrated circuit SDIC may alternately provide the data voltage Vdata1 and the reference voltage Vref1 to the sub-pixels through the integrated driving unit IDC.

[0129] This is possible because the integration line IL1 is commonly connected to the data line DL1 and the reference voltage line REFL1, and thus the integration line IL1 may be shared for driving for providing the data voltage and driving for providing the reference voltage.

[0130] Figure 8A is a diagram showing an example circuit of a display device for integrated driving according to an embodiment of the present disclosure. Figure 8B is a diagram showing waveforms of main signals through integrated driving according to an embodiment of the present disclosure. Figure 8C is a diagram showing waveforms of currents flowing through a light-emitting element through integrated driving according to an embodiment of the present disclosure.

[0131] Reference Figure 8A and 8B and, in the display mode period, the N scanning transistors SCAN11 to SCAN321 may determine connections between the gate nodes of the driving transistors DRT11 to DRT32 and the corresponding data lines among the plurality of data lines in response to the scan signals SCAN1, SCAN2, and SCAN3 sequentially provided from the corresponding scan lines among the plurality of scan lines.

[0132] During the display mode, the source driver integrated circuit SDIC sequentially outputs the data voltage Vdata1 to be provided to the n sub-pixels SP11…SP32 to one data line DL1.

[0133] Therefore, the data voltage can be applied from the source driver integrated circuit SDIC to the enabled data line DL1 every one horizontal period, and the reference voltage can be applied after the data voltage is applied.

[0134] Specifically, as shown in Figure 6A and 7A described, the data voltage Vdata1 can be applied to the first input node IN1 during the data driving period DT of one horizontal period. When the first switching element SW1 and the third switching element SW3 are turned on during the data driving period DT, the first input node IN1, the integrated line IL1, and the data line DL1 can be electrically connected. Therefore, the data voltage Vdata1 applied to the first input node IN1 can be provided to the data line DL1 connected to the sub-pixel from the first input node IN1 via the integrated line IL1.

[0135] During the data driving period DT, the source driver integrated circuit SDIC can turn off the second switching element SW2 and the fourth switching element SW4, thereby deactivating the reference voltage line REFL1.

[0136] Referring to Figure 7B , when the reference voltage driving period RT arrives after the data driving period DT, the source driver integrated circuit SDIC can apply the reference voltage Vref1 to the second input node IN2. In the Figure 8B waveform diagram, it can be recognized that during the data driving period DT, the waveforms of the data driving period DT and the reference voltage driving period RT appear alternately, and the waveforms of the first data voltage Vdata1 and the second data voltage Vdata2 appear simultaneously.

[0137] When the second switching element SW2 and the fourth switching element SW4 are turned on during the reference voltage driving period RT, the second input node IN2, the integrated line IL1, and the reference voltage line REFL1 can be electrically connected. Therefore, the reference voltage Vref1 applied to the second input node IN2 can be provided to the reference voltage line REFL1 from the second input node IN2 via the integrated line IL1.

[0138] During the reference voltage driving period RT, the source driver integrated circuit SDIC can turn off the first switching element SW1 and the third switching element SW3, thereby deactivating the data line DL1.

[0139] When one horizontal period is repeated in this way, the source driver integrated circuit SDIC can alternately provide the data voltage Vdata1 and the reference voltage Vref1 to the sub-pixels through the integrated driving unit IDC.

[0140] Since the integrated line IL1 is commonly connected to the data line DL1 and the reference voltage line REFL1, the integrated line IL1 can be shared for driving to provide a data voltage and for driving to provide a reference voltage.

[0141] As a result of supplying a data voltage and a reference voltage to the sub-pixels through the integrated line IL1, as Figure 8C shown, it can be recognized that the current flowing through the organic light-emitting elements OLED11 to OLED31 is normally saturated to a predetermined current to emit light.

[0142] Embodiments of the present disclosure described above are briefly described below.

[0143] A display device according to an embodiment of the present disclosure may include: a display panel in which a plurality of sub-pixels defined by a plurality of data lines, a plurality of reference voltage lines, and a plurality of gate lines are arranged; a source driver integrated circuit configured to drive the plurality of data lines and the plurality of reference voltage lines, and an integrated driving unit that alternately outputs a data voltage and a reference voltage to one line shared by one data line among the plurality of data lines and one reference voltage line among the plurality of reference voltage lines.

[0144] The integrated driving unit may include a first input node provided in the source driver integrated circuit to receive a data voltage, a second input node provided in the source driver integrated circuit to receive a reference voltage, an integrated line commonly electrically connecting the first input node and the second input node, a first output node provided in the display panel and connected between the integrated line and the data line, and a second output node provided in the display panel and connected between the integrated line and the reference voltage line.

[0145] The integrated driving unit may further include a first switching element that switches the connection between the first output node and the data line, a second switching element that switches the connection between the second output node and the reference voltage line, a third switching element that switches the connection between the first input node and the integrated line, and a fourth switching element that switches the connection between the second input node and the integrated line.

[0146] The display device may further include a first node connected between the first switching element and the third switching element, a second node connected between the second switching element and the fourth switching element, and an inverter connected between the first node and the second node.

[0147] The integrated line may be provided between the display panel and the source driver integrated circuit.

[0148] The integrated line may extend to the data line or may be electrically connected to the data line.

[0149] The source driver integrated circuit may sequentially apply the data voltage and the reference voltage to the integrated line within one horizontal period.

[0150] The source driver integrated circuit may alternately apply the data voltage and the reference voltage to the integrated line while repeating one horizontal period.

[0151] During a data voltage providing period of one horizontal period, the data voltage may be applied to the first input node, and the first switching element and the third switching element may be turned on to electrically connect the first input node, the integrated line, and the data line.

[0152] During a data voltage providing period of one horizontal period, the second switching element and the fourth switching element may be turned off.

[0153] When the reference voltage providing period arrives after the data voltage providing period of one horizontal period, the reference voltage may be applied to the second input node, and the second switching element and the fourth switching element may be turned on to electrically connect the second input node, the integrated line, and the reference voltage line.

[0154] During a reference voltage providing period of one horizontal period, the first switching element and the third switching element may be turned off.

[0155] An integrated driving circuit according to an embodiment of the present disclosure may include a first input node provided in a source driver integrated circuit to receive a data voltage, a second input node provided in the source driver integrated circuit to receive a reference voltage, an integrated line commonly electrically connecting the first input node and the second input node, a first output node provided in a display panel and connected between the integrated line and the data line, a second output node provided in the display panel and connected between the integrated line and the reference voltage line, a first switching element for switching the connection between the first output node and the data line, a second switching element for switching the connection between the second output node and the reference voltage line, a third switching element for switching the connection between the first input node and the integrated line, and a fourth switching element for switching the connection between the second input node and the integrated line.

[0156] The foregoing description has been presented to enable any person skilled in the art to make and use the inventive concept of the present disclosure, and has been provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. The foregoing description and the drawings have provided examples of the inventive concept of the present disclosure for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the inventive concept of the present disclosure.

Claims

1. A display device, comprising: A display panel in which a plurality of sub-pixels defined by a plurality of data lines, a plurality of reference voltage lines, and a plurality of gate lines are arranged; A source driver integrated circuit configured to drive the plurality of data lines and the plurality of reference voltage lines; And An integrated driving unit that alternately outputs a data voltage and a reference voltage to a line shared by one of the plurality of data lines and one of the plurality of reference voltage lines.

2. The display device according to claim 1, wherein, The integrated driving unit includes: A first input node provided in the source driver integrated circuit to receive the data voltage; A second input node provided in the source driver integrated circuit to receive the reference voltage; An integrated line commonly electrically connecting the first input node and the second input node; A first output node provided in the display panel and connected between the integrated line and the data line; and A second output node provided in the display panel and connected between the integrated line and the reference voltage line.

3. The display device according to claim 2, wherein, The integrated driving unit further includes: A first switching element that switches the connection between the first output node and the data line; A second switching element that switches the connection between the second output node and the reference voltage line; A third switching element that switches the connection between the first input node and the integrated line; and A fourth switching element that switches the connection between the second input node and the integrated line.

4. The display device according to claim 3, further comprising: A first node connected between the first switching element and the third switching element; A second node connected between the second switching element and the fourth switching element; And An inverter connected between the first node and the second node.

5. The display device according to claim 2, wherein, The integrated line is provided between the display panel and the source driver integrated circuit.

6. The display device according to claim 2, wherein, The integrated line extends to or is electrically connected to the data line.

7. The display device according to claim 2, wherein, The source driver integrated circuit sequentially applies the data voltage and the reference voltage to the integrated line within one horizontal period.

8. The display device according to claim 7, wherein, The source driver integrated circuit alternately applies the data voltage and the reference voltage to the integrated line while repeating one horizontal period.

9. The display device according to claim 3, wherein, During the data voltage providing period of one horizontal period, the data voltage is applied to the first input node, and the first switching element and the third switching element are turned on to electrically connect the first input node, the integrated line, and the data line.

10. The display device according to claim 3, wherein, During the data voltage providing period of one horizontal period, the second switching element and the fourth switching element are turned off.

11. The display device according to claim 3, wherein, When the reference voltage supply period arrives after the data voltage supply period of one horizontal period, the reference voltage is applied to the second input node, and the second switching element and the fourth switching element are turned on to electrically connect the second input node, the integration line, and the reference voltage line.

12. The display device according to claim 3, wherein, During the reference voltage supply period of one horizontal period, the first switching element and the third switching element are turned off.

13. An integrated driving circuit, comprising: A first input node provided in a source driver integrated circuit to receive a data voltage; A second input node provided in the source driver integrated circuit to receive a reference voltage; An integration line commonly electrically connecting the first input node and the second input node; A first output node provided in a display panel and connected between the integration line and the data line; A second output node provided in the display panel and connected between the integration line and the reference voltage line; A first switching element for switching the connection between the first output node and the data line; A second switching element for switching the connection between the second output node and the reference voltage line; A third switching element for switching the connection between the first input node and the integration line; And A fourth switching element for switching the connection between the second input node and the integration line.

14. The integrated driving circuit according to claim 13, further comprising: A first node connected between the first switching element and the third switching element; A second node connected between the second switching element and the fourth switching element; And An inverter connected between the first node and the second node.

15. The integrated drive circuit according to claim 13, wherein, The integration line is provided between the display panel and the source driver integrated circuit.

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