A topological sorting-based directed acyclic graph (DAG) loop detection method

By using a DAG cycle detection method based on topology sorting, the method determines whether the DAG generation meets the standard by considering factors such as time consumption and total number of nodes. This solves the problem of low DAG generation efficiency in existing technologies and achieves accurate detection and efficiency improvement.

CN120430427BActive Publication Date: 2025-11-11北京科杰科技有限公司
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202510930338.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-07-07
Publication Date
2025-11-11
Estimated Expiration
2045-07-07

AI Technical Summary

Technical Problem

Existing technologies cannot accurately detect the generated DAG, resulting in low DAG generation efficiency.

Method used

By constructing a DAG based on topological sorting, the sequence of event nodes is obtained sequentially, the traversal processing time is statistically analyzed, and it is determined whether the generation of the DAG meets the standard. Processing instructions are generated based on factors such as processing time, total number of nodes, and vertex ratio, and the preset processing time, event vertex priority, batch processing scale, and memory usage ratio are corrected to achieve accurate detection.

Benefits of technology

It enables timely and accurate determination of DAG generation, avoids misjudgment, and improves the efficiency of DAG generation.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120430427B_ABST
    Figure CN120430427B_ABST
Patent Text Reader

Abstract

This invention relates to the field of information technology, and more particularly to a method for detecting cycles in directed acyclic graphs (DAGs) based on topological sorting. The invention constructs a DAG based on demand events and topological sorting, sequentially obtains the sequence of each event node in the DAG, traverses the sequence of each event node, and calculates the time required for each traversal to determine the time consumed by each event node's sequence. Based on the time consumed, it determines whether the DAG generation meets the standards, including determining whether the DAG generation meets the standards and the reasons for non-compliance. Based on the determination results, corresponding processing instructions are generated, and based on the received processing instructions, the preset time consumed, the priority of event vertices, the batch processing scale, and the proportion of running memory are re-determined. This invention effectively achieves accurate detection of the generated DAG and significantly improves the efficiency of DAG generation.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of information technology, and in particular to a method for detecting cycles in directed acyclic graphs (DAGs) based on topological sorting. Background Technology

[0002] A directed acyclic graph (DAG) is a graph consisting of a set of vertices and a set of directed edges. It contains no cycles, meaning that starting from any vertex and traversing along any directed edge, it is impossible to return to that vertex. Topological sorting is an algorithm for sorting the vertices of a DAG. Topological sorting-based DAGs refers to using the topological sorting algorithm to sort the vertices of a DAG to clarify the order of vertices in the graph. Topological sorting-based DAGs have significant research value in contributing to the development of computer science and information technology, and promoting the advancement of data analysis and processing technologies. Furthermore, the rapid detection of cycles in generated DAGs is increasingly becoming an important development direction in this field.

[0003] Chinese Patent Publication No. CN115391614A discloses a topological sorting method based on DAG, including the following steps: S1, obtaining a first set of head nodes without direct predecessors, wherein the head nodes without direct predecessors are nodes without predecessors, and the set of head nodes without direct predecessors is the collection of nodes without predecessors; S2, iterating through the head nodes without direct predecessors in the first set of head nodes without direct predecessors, for all edges derived from each head node without direct predecessors, obtaining the second node connected to each edge, removing each edge one by one, and judging: if the in-degree of the obtained second node is 0 after removing the edge, then the second node is placed into the first set of head nodes without direct predecessors in the current batch; through the above scheme, the data storage efficiency is geometrically improved, completely solving the problem of low efficiency of single-chain linear storage in traditional blockchain, thus breaking through and solving the bottleneck problem of blockchain.

[0004] Therefore, the above scheme achieves a geometric improvement in data storage efficiency through topological sorting, thus overcoming and innovating upon the bottleneck issues of blockchain. However, the above scheme cannot accurately detect the generated DAG, thereby failing to guarantee the efficiency of DAG generation. Summary of the Invention

[0005] To address this issue, the present invention provides a method for detecting cycles in directed acyclic graphs (DAGs) based on topological sorting, thereby overcoming the problem of low generation efficiency of DAGs due to the inability to accurately detect generated DAGs in existing technologies.

[0006] To achieve the above objectives, this invention provides a method for detecting cycles in directed acyclic graphs (DAGs) based on topological sorting, comprising:

[0007] Construct a DAG based on demand events and topological sorting;

[0008] Sequentially obtain the sequence of each event node in the DAG;

[0009] The sequence of each event node is traversed.

[0010] The time required for statistical traversal processing is used to determine the time consumption of the sequence of each event node;

[0011] The generation of the DAG is determined based on the time consumption to determine whether it meets the standard;

[0012] Based on the judgment result, generate the corresponding processing instructions.

[0013] Alternatively, the determination of the generation of the DAG can be completed;

[0014] The determination includes determining whether the generation of the DAG conforms to the standard and determining the reason why it does not conform to the standard;

[0015] Based on the received processing instructions, the preset processing time, the priority of the event vertex, the batch processing scale, and the percentage of running memory are re-determined.

[0016] The process of determining whether the generation of the DAG conforms to the standard based on the time consumption includes:

[0017] The time consumed is compared with the preset time consumed;

[0018] When the time taken is less than or equal to the first preset time taken, it is determined that the generation of the DAG meets the standard, and the determination of the generation of the DAG is completed;

[0019] When the time taken is greater than the first preset time taken but less than or equal to the second preset time taken, it is determined that the generation of the DAG does not meet the standard, and the generation of the DAG is determined to meet the standard based on the total number of nodes of the event nodes.

[0020] If the time taken exceeds the second preset time, it is determined that the generation of the DAG does not meet the standard, and the reason why the generation of the DAG does not meet the standard is determined based on the time taken.

[0021] Furthermore, the process of determining whether the generation of the DAG conforms to the standard based on the total number of the event nodes includes:

[0022] Obtain the total number of nodes for the event node, and record the obtained total number of nodes as the total number of event nodes;

[0023] The generation of the DAG is determined based on the total number of event nodes to determine whether it conforms to the standard.

[0024] When the total number of event nodes is greater than or equal to the preset total number of event nodes, it is determined that the generation of the DAG meets the standard, and the preset time consumption is adjusted based on the total number of event nodes;

[0025] When the total number of event nodes is less than the preset total number of event nodes, it is determined that the generation of the DAG does not meet the standard, and the reason why the generation of the DAG does not meet the standard is determined based on the time consumption.

[0026] Furthermore, the process of adjusting the preset duration based on the total number of event nodes includes:

[0027] Calculate the difference between the total number of event nodes and the preset total number of event nodes, and record the obtained difference as the node total difference;

[0028] The preset time duration is increased based on the difference in the total number of nodes, and the increase in the preset time duration is proportional to the difference in the total number of nodes.

[0029] Furthermore, the process of determining why the generation of the DAG does not meet the standard based on the time consumption includes:

[0030] Calculate the difference between the time consumed and the second preset time consumed, and record the obtained difference as the time consumption difference;

[0031] The reason why the generation of the DAG does not meet the standard is determined based on the difference in the time consumption.

[0032] When the difference in the time consumption is less than or equal to the first preset time consumption difference, the reason why the generation of the DAG does not meet the standard is determined based on the number of vertices of each event node.

[0033] When the difference in the duration of the event is greater than the first preset difference in duration of the event and less than or equal to the second preset difference in duration of the event, the reason why the generation of the DAG does not meet the standard is determined based on the number of sequences of each event node.

[0034] When the time difference is greater than the second preset time difference, it is determined that the reason why the generation of the DAG does not meet the standard is that the memory occupied by the system does not meet the standard, and the running memory ratio is corrected based on the time difference.

[0035] Furthermore, the process of determining why the generation of the DAG does not meet the standard based on the number of vertices of each event node includes:

[0036] The event nodes with an in-degree of zero are denoted as event vertices;

[0037] Count the number of vertices in the event and record the obtained number as the vertex count;

[0038] Calculate the ratio of the number of vertices to the total number of event nodes, and record the obtained ratio as the vertex percentage;

[0039] The reason why the generation of the DAG does not meet the standard is determined based on the vertex ratio.

[0040] When the proportion of the stated vertex is less than or equal to the preset proportion of the stated vertex, the priority of the event vertex is determined based on the out-degree of the event vertex;

[0041] When the percentage of vertices is greater than the preset percentage of vertices, the batch processing scale is adjusted based on the percentage of vertices.

[0042] Furthermore, the process of batch processing scale based on the vertex proportion correction sequence includes:

[0043] Calculate the difference between the vertex percentage and the preset vertex percentage, and record the obtained difference as the vertex percentage difference;

[0044] The batch processing scale of the sequence is increased based on the difference in the proportion of vertices, and the increase in the batch processing scale is proportional to the difference in the proportion of vertices.

[0045] Furthermore, the process of adjusting the batch processing size based on the total number of event nodes after the batch processing size has been increased includes:

[0046] The batch processing size is increased and then recorded as the second batch processing size.

[0047] The secondary batch processing scale is increased based on the total number of event nodes, and the increase in the secondary batch processing scale is proportional to the total number of event nodes.

[0048] Furthermore, the process of determining why the generation of the DAG does not meet the standard based on the number of sequences of each event node includes:

[0049] Count the number of sequences for each event node, and record the obtained number as the sequence count;

[0050] The reason why the generation of the DAG does not meet the standard is determined based on the number of sequences.

[0051] When the number of sequences is greater than or equal to the preset number of sequences, the reason why the generation of the DAG does not meet the standard is determined based on the number of vertices of each event node;

[0052] When the number of sequences is less than the preset number of sequences, it is determined that the generation of the DAG does not meet the standard because the memory occupied by the system does not meet the standard, and the running memory ratio is corrected based on the difference in the time consumption.

[0053] Furthermore, the process of adjusting the percentage of running memory based on the difference in the time consumed includes:

[0054] Calculate the ratio of the second preset time difference to the time difference, and record the obtained ratio as the time difference ratio;

[0055] The percentage of running memory is increased based on the time difference ratio, and the increase in the percentage of running memory is inversely proportional to the time difference.

[0056] Compared with the prior art, the beneficial effects of the present invention are that it determines whether the generation of a DAG meets the standard based on the time consumption, which can timely and accurately determine whether the generation of a DAG meets the standard, effectively realizing the accurate detection of the generated DAG, and determining the reason when the generation of a DAG does not meet the standard, generating corresponding processing instructions based on the determined reasons, and re-determining the preset time consumption, the priority of event vertices, the batch processing scale, and the proportion of running memory based on the corresponding processing instructions, thus further realizing the accurate detection of the generated DAG and effectively improving the generation efficiency of DAG.

[0057] Furthermore, this invention compares the time taken with the preset time taken to determine whether the generated DAG meets the standard in a timely and accurate manner. The accurate determination result is beneficial to the generation of subsequent processing instructions, thereby further realizing the precise detection of the generated DAG and further improving the generation efficiency of DAG.

[0058] Furthermore, this invention determines whether the generation of a DAG meets the standard based on the total number of event nodes, accurately determines whether the preset time duration meets the standard, avoids misjudgment between the preset time duration not meeting the standard and the reason why the DAG needs to be determined to not meet the standard, and further realizes accurate detection of the generated DAG, thereby further improving the generation efficiency of DAG.

[0059] Furthermore, this invention increases the preset time duration based on the difference in the total number of nodes, effectively avoiding the situation where the generation of DAG does not meet the standard due to the preset time duration not meeting the standard, ensuring the matching accuracy between the preset time duration and the total number of time nodes, further realizing accurate detection of the generated DAG, and further improving the generation efficiency of DAG.

[0060] Furthermore, this invention determines the reasons why the DAG generation does not meet the standards based on the time taken, accurately completes the determination of the reasons for non-compliance, avoids misjudgment, and further realizes accurate detection of the generated DAG, thereby further improving the generation efficiency of DAG.

[0061] Furthermore, this invention determines the reasons why the generation of a DAG does not meet the standard based on the vertex ratio, and promptly and accurately determines the priority of event vertices that need to be determined or the batch processing scale that needs to be adjusted. This further enables accurate detection of the generated DAG and improves the generation efficiency of DAG.

[0062] Furthermore, this invention increases the batch processing scale of the sequence based on the difference in vertex proportions, which can accurately correct the batch processing scale, effectively ensure the matching accuracy between the batch processing scale and the vertex proportions, and avoid misjudgment of whether the DAG generation meets the standard due to the batch processing scale not meeting the standard. It further realizes accurate detection of the generated DAG and further improves the generation efficiency of DAG.

[0063] Furthermore, this invention increases the secondary batch processing scale based on the total number of event nodes, and corrects the secondary batch processing scale based on the total number of event nodes, further ensuring the matching accuracy between the batch processing scale and the vertex ratio. In addition, it avoids the occurrence of misjudgment of whether the DAG generation meets the standard due to the batch processing scale not meeting the standard. Furthermore, it achieves accurate detection of the generated DAG and further improves the DAG generation efficiency.

[0064] Furthermore, this invention determines the reason why the DAG generation does not meet the standard based on the number of vertices of each event node, avoiding the misjudgment that occurs when determining the reason why the DAG generation does not meet the standard based on the number of vertices of each event node and correcting the memory ratio based on the difference in time consumption. This further enables accurate detection of the generated DAG and further improves the efficiency of DAG generation.

[0065] Furthermore, this invention increases the proportion of running memory based on the time difference ratio, effectively avoiding the situation where the judgment result for the generation of DAG is non-compliant due to the non-compliance of the running memory occupied during the judgment. This further enables accurate detection of the generated DAG and further improves the generation efficiency of DAG. Attached Figure Description

[0066] Figure 1 This is a structural block diagram of a system using a topological sorting-based method for detecting loops in a directed acyclic graph (DAG) according to an embodiment of the present invention.

[0067] Figure 2 This is a flowchart of a method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting, according to an embodiment of the present invention.

[0068] Figure 3 This is a flowchart illustrating how to determine whether the generation of a DAG conforms to a standard and the reasons for non-compliance, as per an embodiment of the present invention.

[0069] Figure 4 This is a flowchart illustrating the reasons why the generation of a DAG does not meet the standard, as described in an embodiment of the present invention. Detailed Implementation

[0070] To make the objectives and advantages of the present invention clearer, the present invention will be further described below with reference to embodiments; it should be understood that the specific embodiments described herein are merely for explaining the present invention and are not intended to limit the present invention.

[0071] Preferred embodiments of the present invention will now be described with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are merely illustrative of the technical principles of the present invention and are not intended to limit the scope of protection of the present invention.

[0072] Furthermore, it should be noted that, in the description of this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0073] Please see Figure 1 The diagram shown is a structural block diagram of a directed acyclic graph (DAG) cycle detection system based on topological sorting according to an embodiment of the present invention. The system of this embodiment includes a node sorting module, a sequence acquisition module, a node traversal module, a time consumption statistics module, a cycle detection module, and an adjustment module; wherein,

[0074] The node sorting module is used to construct a DAG based on demand events and topological sorting.

[0075] The sequence acquisition module is connected to the node sorting module and is used to sequentially acquire the sequence of each event node in the DAG;

[0076] The node traversal module is connected to the sequence acquisition module and is used to traverse the sequence of each event node.

[0077] The time consumption statistics module is connected to the node traversal module and is used to count the time required for traversal processing to determine the time consumption of the sequence of each event node.

[0078] The ring formation detection module is connected to the time consumption statistics module, and is used to determine whether the generation of DAG meets the standard based on the time consumption.

[0079] The ring formation detection module is also used to generate corresponding processing instructions based on the judgment result.

[0080] Alternatively, the determination of the generation of the DAG can be completed;

[0081] The determination includes determining whether the generation of the DAG conforms to the standard and determining the reason why it does not conform to the standard;

[0082] The adjustment module is connected to the node traversal module and the ring detection module respectively, and is used to redetermine the preset processing time, the priority of event vertices, the batch processing scale and the percentage of running memory based on the received processing instructions.

[0083] Please see Figure 2 The diagram shows a flowchart of a method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting, according to an embodiment of the present invention. The method described in this embodiment includes:

[0084] Construct a DAG based on demand events and topological sorting;

[0085] Sequentially obtain the sequence of each event node in the DAG;

[0086] The sequence of each event node is traversed.

[0087] The time required for statistical traversal processing is used to determine the time consumption of the sequence of each event node;

[0088] The generation of the DAG is determined based on the time consumption to determine whether it meets the standard;

[0089] Generate corresponding processing instructions based on the judgment results.

[0090] Alternatively, the determination of the generation of the DAG can be completed;

[0091] The determination includes determining whether the generation of the DAG conforms to the standard and determining the reason why it does not conform to the standard;

[0092] Based on the received processing instructions, the preset processing time, the priority of the event vertex, the batch processing scale, and the percentage of running memory are redefined.

[0093] Please see Figure 3 The diagram shows a flowchart illustrating how an embodiment of the present invention determines whether the generation of a DAG conforms to a standard and the reasons for non-compliance. The process of determining whether the generation of the DAG conforms to a standard based on the time consumption in this embodiment includes:

[0094] The time consumed is compared with the preset time consumed;

[0095] When the time taken is less than or equal to the first preset time taken T1, it is determined that the generation of the DAG meets the standard, and the determination of the generation of the DAG is completed. In this embodiment, the first preset time taken T1 = 12 seconds.

[0096] When the time taken is greater than the first preset time taken T1 and less than or equal to the second preset time taken T2, it is determined that the generation of the DAG does not meet the standard, and the generation of the DAG is determined based on the total number of nodes of the event nodes. In this embodiment, the second preset time taken T2 = 24.3 seconds.

[0097] When the time taken exceeds the second preset time T2, it is determined that the generation of the DAG does not meet the standard, and the reason why the generation of the DAG does not meet the standard is determined based on the time taken.

[0098] Please continue reading. Figure 3 As shown, the process of determining whether the generation of the DAG conforms to the standard based on the total number of the event nodes in this embodiment of the invention includes:

[0099] Obtain the total number of nodes for the event node, and record the obtained total number of nodes as the total number of event nodes;

[0100] The generation of the DAG is determined based on the total number of event nodes to determine whether it conforms to the standard.

[0101] When the total number of event nodes is greater than or equal to the preset total number of event nodes Q, it is determined that the generation of the DAG meets the standard, and the preset time consumption is adjusted based on the total number of event nodes. In this embodiment, the preset total number of event nodes Q = 1380000.

[0102] When the total number of event nodes is less than the preset total number of event nodes Q, it is determined that the generation of the DAG does not meet the standard, and the reason why the generation of the DAG does not meet the standard is determined based on the time consumption.

[0103] Please continue reading. Figure 3 As shown, the process of correcting the preset duration based on the total number of event nodes in this embodiment of the invention includes:

[0104] Calculate the difference between the total number of event nodes and the preset total number of event nodes, and record the obtained difference as the node total difference;

[0105] The preset time duration is increased based on the difference in the total number of nodes;

[0106] When the difference in the total number of nodes is greater than the second preset difference in the total number of nodes △U2, the preset time duration is increased to 1.78 times the initial preset time duration, wherein, in this embodiment, the second preset difference in the total number of nodes △U2 = 990000;

[0107] When the difference in the total number of nodes is less than or equal to the second preset difference in the total number of nodes △U2 and greater than the first preset difference in the total number of nodes △U1, the preset time consumption is increased to 1.49 times the initial preset time consumption. In this embodiment, the first preset difference in the total number of nodes △U1 = 570000.

[0108] When the difference in the total number of nodes is less than or equal to the first preset difference in the total number of nodes △U1, the preset time duration is increased to 1.27 times the initial preset time duration.

[0109] Please see Figure 4 The diagram shows a flowchart illustrating the process of determining why the generation of a DAG does not meet the standard according to an embodiment of the present invention. The process of determining why the generation of the DAG does not meet the standard based on the time consumption includes:

[0110] Calculate the difference between the time consumed and the second preset time consumed, and record the obtained difference as the time consumption difference;

[0111] The reason why the generation of the DAG does not meet the standard is determined based on the difference in the time consumption.

[0112] When the time difference is less than or equal to the first preset time difference △J1, the reason why the generation of the DAG does not meet the standard is determined based on the number of vertices of each event node. In this embodiment, the first preset time difference △J1 = 2.95S.

[0113] When the difference in the time consumed is greater than the first preset time consumed difference △J1 and less than or equal to the second preset time consumed difference △J2, the reason why the generation of the DAG does not meet the standard is determined based on the number of sequences of each event node. In this embodiment, the second preset time consumed difference △J2 ​​= 5.33S.

[0114] When the time difference is greater than the second preset time difference △J2, it is determined that the reason why the generation of the DAG does not meet the standard is that the memory occupied by the system does not meet the standard, and the running memory ratio is corrected based on the time difference.

[0115] Please continue reading. Figure 4 As shown, the process of determining why the generation of the DAG does not meet the standard based on the number of vertices of each event node in this embodiment of the invention includes:

[0116] The event nodes with an in-degree of zero are denoted as event vertices;

[0117] Count the number of vertices in the event and record the obtained number as the vertex count;

[0118] Calculate the ratio of the number of vertices to the total number of event nodes, and record the obtained ratio as the vertex percentage;

[0119] The reason why the generation of the DAG does not meet the standard is determined based on the vertex ratio.

[0120] When the percentage of the event vertex is less than or equal to a preset percentage of the event vertex R, the priority of the event vertex is determined based on the out-degree of the event vertex. In this embodiment, the preset percentage of the event vertex R is 27%.

[0121] When the vertex percentage is greater than the preset vertex percentage R, the batch processing scale is adjusted based on the vertex percentage;

[0122] Specifically, when determining the priority of an event vertex based on its out-degree, the event vertices are sorted from smallest to largest according to their out-degree, and the priority of the event vertices is determined according to this ascending order. The event vertex with the smallest out-degree has the highest priority, and the event vertex with the largest out-degree has the lowest priority. For event vertices with the same out-degree, the one with the highest out-degree has the highest priority, and the one with the lowest out-degree has the lowest priority.

[0123] Please continue reading. Figure 4 As shown, the process of batch processing scale based on the vertex proportion correction sequence in this embodiment of the invention includes:

[0124] Calculate the difference between the vertex percentage and the preset vertex percentage, and record the obtained difference as the vertex percentage difference;

[0125] The batch processing scale of the sequence is increased based on the difference in the proportion of vertices.

[0126] When the difference in the percentage of vertices is greater than or equal to the second preset difference in the percentage of vertices ΔX2, the batch processing size is increased to 1.687 times the initial batch processing size. In this embodiment, the second preset difference in the percentage of vertices ΔX2 = 4.38%.

[0127] When the vertex percentage difference is less than the second preset vertex percentage difference △X2 and greater than or equal to the first preset vertex percentage difference △X1, the batch processing scale is increased to 1.458 times the initial batch processing scale. In this embodiment, the first preset vertex percentage difference △X1 = 2.67%.

[0128] When the difference in the percentage of vertices is less than the first preset difference in the percentage of vertices △X1, the batch processing size is increased to 1.235 times the initial batch processing size.

[0129] Please continue reading. Figure 4 As shown, the process of adjusting the batch processing scale based on the total number of event nodes after the batch processing scale has been increased in this embodiment of the invention includes:

[0130] The batch processing size is increased and then recorded as the second batch processing size.

[0131] The secondary batch processing scale is increased based on the total number of event nodes.

[0132] When the total number of event nodes is greater than the second preset total number of event nodes B2, the secondary batch processing scale is increased to 1.211 times the initial secondary batch processing scale, wherein, in this embodiment, the second preset total number of event nodes B2 = 1788300;

[0133] When the total number of event nodes is less than or equal to the second preset total number of event nodes B2 and greater than the first preset total number of event nodes B1, the secondary batch processing scale is increased to 1.146 times the initial secondary batch processing scale, wherein, in this embodiment, the first preset total number of event nodes B1 = 1371000;

[0134] When the total number of event nodes is less than or equal to the first preset total number of event nodes B1, the secondary batch processing scale is increased to 1.038 times the initial secondary batch processing scale.

[0135] Please continue reading. Figure 4 As shown, the process of determining why the generation of the DAG does not meet the standard based on the number of sequences of each event node in this embodiment of the invention includes:

[0136] Count the number of sequences for each event node, and record the obtained number as the sequence count;

[0137] The reason why the generation of the DAG does not meet the standard is determined based on the number of sequences.

[0138] When the number of sequences is greater than or equal to the preset number of sequences N, the reason why the generation of the DAG does not meet the standard is determined based on the number of vertices of each event node, wherein the preset number of sequences N = 721315;

[0139] When the number of sequences is less than the preset number of sequences N, it is determined that the generation of the DAG does not meet the standard because the memory occupied by the system does not meet the standard, and the running memory ratio is corrected based on the difference in the time consumption.

[0140] Please continue reading. Figure 4 As shown, the process of correcting the percentage of running memory based on the difference in time consumption in this embodiment of the invention includes:

[0141] Calculate the ratio of the second preset time difference to the time difference, and record the obtained ratio as the time difference ratio;

[0142] The percentage of running memory is increased based on the time difference ratio;

[0143] When the time difference ratio is greater than the second preset time difference ratio E2, the running memory ratio is increased to 1.19 times the initial running memory ratio, wherein, in this embodiment, the second preset time difference ratio E2 = 86.2%;

[0144] When the duration difference ratio is less than or equal to the second preset duration difference ratio E2 and greater than the first preset duration difference ratio E1, the percentage of running memory is increased to 1.49 times the initial running memory percentage. In this embodiment, the first preset duration difference ratio E1 = 65.7%.

[0145] When the duration difference ratio is less than or equal to the first preset duration difference ratio E1, the percentage of running memory is increased to 1.64 times the initial percentage of running memory. Example 1

[0146] Based on a computer graph algorithm, a Directed Acyclic Graph (DAG) is constructed using topological sorting. The sequence of each event node in the DAG is sequentially obtained, and the sequence of each event node is traversed. The time required for traversal processing is calculated to determine the time consumed for each event node's sequence. The calculated time is 13.8 seconds. This time is compared with preset time limits. The time consumed is greater than the first preset time limit of 12 seconds and less than or equal to the second preset time limit of 24.3 seconds. The total number of event nodes is then calculated and recorded as the total number of event nodes. The total number of nodes determines whether the generation of the DAG meets the standard. The total number of nodes is 1,826,531. The total number of event nodes is greater than or equal to the preset total number of event nodes of 1,380,000. Based on the difference in the total number of nodes, the preset time duration is increased. The difference between the total number of event nodes of 1,826,531 and the preset total number of event nodes of 1,380,000 is recorded as the difference in the total number of nodes. The difference in the total number of nodes is 446,531. The difference in the total number of nodes is less than the first preset difference in the total number of nodes of 570,000. The preset time duration is increased to 1.27 times the initial preset time duration. Example 2

[0147] Based on computer data flow analysis, a Directed Acyclic Graph (DAG) is constructed using topological sorting. The sequence of each event node in the DAG is sequentially obtained, and each event node sequence is traversed. The time required for traversal processing is calculated to determine the time consumption of each event node sequence. The calculated time consumption is 25.7 seconds. This time consumption is compared with a preset time consumption. If the time consumption is greater than the second preset time consumption of 24.3 seconds, the DAG generation is determined to be non-compliant. The reason for this non-compliance is determined based on the time consumption. The difference between the time consumption of 25.7 seconds and the second preset time consumption of 24.3 seconds is calculated and recorded as the time consumption difference. If the time consumption difference is 1.4 seconds, the reason for the non-compliance is determined based on the time consumption difference. If the time consumption difference is less than the first preset time consumption difference of 2.95 seconds, the reason for the non-compliance is determined based on the number of vertices in each event node. Event nodes with an in-degree of zero are recorded as event vertices, and the number of event vertices is counted. The obtained quantity is recorded as the vertex count, which is 366,485. The ratio of the vertex count (366,485) to the total number of event nodes (1,295,000) is calculated and recorded as the vertex percentage, which is 28.3%. The vertex percentage is greater than the preset vertex percentage (27%). Based on the vertex percentage, the batch processing scale is adjusted. The difference between the vertex percentage (28.3%) and the preset vertex percentage (27%) is calculated and recorded as the vertex percentage difference, which is 1.3%. Based on the vertex percentage difference, the batch processing scale of the sequence is increased. The vertex percentage difference is less than the first preset vertex percentage difference (2.67%), so the batch processing scale is increased to 1.235 times the initial batch processing scale. After the batch processing scale is increased, it is recorded as the secondary batch processing scale. Based on the total number of event nodes (1,295,000), the secondary batch processing scale is increased. The total number of event nodes is less than the first preset total number of event nodes (1,371,000), so the secondary batch processing scale is increased to 1.038 times the initial secondary batch processing scale.

[0148] The technical solution of the present invention has been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of the present invention is obviously not limited to these specific embodiments. Without departing from the principles of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will all fall within the scope of protection of the present invention.

[0149] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting, characterized in that, include: Construct a DAG based on demand events and topological sorting; Sequentially obtain the sequence of each event node in the DAG; The sequence of each event node is traversed. The time required for statistical traversal processing is used to determine the time consumption of the sequence of each event node; The generation of the DAG is determined based on the time consumption to determine whether it meets the standard; Generate corresponding processing instructions based on the judgment results. Alternatively, the determination of the generation of the DAG can be completed; The determination includes determining whether the generation of the DAG conforms to the standard and determining the reason why it does not conform to the standard; Based on the received processing instructions, the preset processing time, the priority of the event vertex, the batch processing scale, and the percentage of running memory are re-determined. The process of determining whether the generation of the DAG conforms to the standard based on the time consumption includes: The time consumed is compared with the preset time consumed; When the time taken is less than or equal to the first preset time taken, it is determined that the generation of the DAG meets the standard, and the determination of the generation of the DAG is completed; When the time taken is greater than the first preset time taken but less than or equal to the second preset time taken, it is determined that the generation of the DAG does not meet the standard, and the generation of the DAG is determined to meet the standard based on the total number of nodes of the event nodes. If the time taken exceeds the second preset time, it is determined that the generation of the DAG does not meet the standard, and the reason why the generation of the DAG does not meet the standard is determined based on the time taken.

2. The method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting according to claim 1, characterized in that, The process of determining whether the generation of the DAG conforms to the standard based on the total number of the event nodes includes: Obtain the total number of nodes for the event node, and record the obtained total number of nodes as the total number of event nodes; The generation of the DAG is determined based on the total number of event nodes to determine whether it conforms to the standard. When the total number of event nodes is greater than or equal to the preset total number of event nodes, it is determined that the generation of the DAG meets the standard, and the preset time consumption is adjusted based on the total number of event nodes; When the total number of event nodes is less than the preset total number of event nodes, it is determined that the generation of the DAG does not meet the standard, and the reason why the generation of the DAG does not meet the standard is determined based on the time consumption.

3. The method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting according to claim 2, characterized in that, The process of adjusting the preset duration based on the total number of event nodes includes: Calculate the difference between the total number of event nodes and the preset total number of event nodes, and record the obtained difference as the node total difference; The preset time duration is increased based on the difference in the total number of nodes, and the increase in the preset time duration is proportional to the difference in the total number of nodes.

4. The method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting according to claim 1, characterized in that, The process of determining why the generation of the DAG does not meet the standard based on the time consumption includes: Calculate the difference between the time consumed and the second preset time consumed, and record the obtained difference as the time consumption difference; The reason why the generation of the DAG does not meet the standard is determined based on the difference in the time consumption. When the difference in the time consumption is less than or equal to the first preset time consumption difference, the reason why the generation of the DAG does not meet the standard is determined based on the number of vertices of each event node. When the difference in the duration of the event is greater than the first preset difference in duration of the event and less than or equal to the second preset difference in duration of the event, the reason why the generation of the DAG does not meet the standard is determined based on the number of sequences of each event node. When the time difference is greater than the second preset time difference, it is determined that the reason why the generation of the DAG does not meet the standard is that the memory occupied by the system does not meet the standard, and the running memory ratio is corrected based on the time difference.

5. The method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting according to claim 4, characterized in that, The process of determining why the generation of the DAG does not meet the standard based on the number of vertices of each event node includes: The event nodes with an in-degree of zero are denoted as event vertices; Count the number of vertices in the event and record the obtained number as the vertex count; Calculate the ratio of the number of vertices to the total number of event nodes, and record the obtained ratio as the vertex percentage; The reason why the generation of the DAG does not meet the standard is determined based on the vertex ratio. When the proportion of the vertex is less than or equal to the preset proportion of the vertex, the priority of the event vertex is determined based on the out-degree of the event vertex; When the vertex percentage is greater than the preset vertex percentage, the batch processing scale is adjusted based on the vertex percentage.

6. The method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting according to claim 5, characterized in that, The process of batch processing based on the vertex proportion correction sequence includes: Calculate the difference between the vertex percentage and the preset vertex percentage, and record the obtained difference as the vertex percentage difference; The batch processing scale of the sequence is increased based on the difference in the proportion of vertices, and the increase in the batch processing scale is proportional to the difference in the proportion of vertices.

7. The method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting according to claim 6, characterized in that, The process of adjusting the batch processing size based on the total number of event nodes after the batch processing size has been increased includes: The batch processing size is increased and then recorded as the second batch processing size. The secondary batch processing scale is increased based on the total number of event nodes, and the increase in the secondary batch processing scale is proportional to the total number of event nodes.

8. The method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting according to claim 4, characterized in that, The process of determining why the generation of the DAG does not meet the standard based on the number of sequences of each event node includes: Count the number of sequences for each event node, and record the obtained number as the sequence count; The reason why the generation of the DAG does not meet the standard is determined based on the number of sequences. When the number of sequences is greater than or equal to the preset number of sequences, the reason why the generation of the DAG does not meet the standard is determined based on the number of vertices of each event node; When the number of sequences is less than the preset number of sequences, it is determined that the generation of the DAG does not meet the standard because the memory occupied by the system does not meet the standard, and the running memory ratio is corrected based on the difference in the time consumption.

9. The method for detecting cycles in a directed acyclic graph (DAG) based on topological sorting according to claim 8, characterized in that, The process of adjusting the running memory ratio based on the difference in the time consumed includes: Calculate the ratio of the second preset time difference to the time difference, and record the obtained ratio as the time difference ratio; The percentage of running memory is increased based on the time difference ratio, and the increase in the percentage of running memory is inversely proportional to the time difference.

Citation Information

Patent Citations

  • Topological sorting method based on DAG

    CN115391614A

  • Computational graph processing method and device, electronic equipment and readable storage medium

    CN120179866A