Data packet electric port transmission system and method, chip, RE and base station

Abstract

The embodiment of the invention provides a data packet electric port transmission system and method, a chip, an RE and a base station, and relates to the technical field of communication, the system comprises a sending end and a receiving end which are connected through an electric port, and the sending end and the receiving end are data processing devices in the RE in the base station; the sending end is used for acquiring a data packet and adding a preset packet header corresponding to the type of the data packet for the data packet; sending a data packet added with a preset packet header to a receiving end, wherein the type of the data packet comprises a PSCH type; and the receiving end is used for receiving the data packet, caching the data packet and removing the preset packet header. By applying the scheme provided by the embodiment of the invention, the utilization rate of electric port transmission resources can be improved.

Description

Technical Field

[0001] This application relates to the field of communication technologies, and particularly to a data packet electrical interface transmission system, method, chip, RE, and base station. Background Art

[0002] A base station is divided into two parts, REC (Radio Equipment Control), which can specifically be a BBU (Broadband Module Unit, baseband processing unit), and RE (Radio Equipment), which can specifically be an RRU (Remote Radio Unit, remote radio unit). In some base stations, the RE is split into two units. When data is transmitted, the two units act as the sender and receiver for each other. For example, if the two units are divided into unit a and unit b, when unit a sends data to unit b, unit a is the sender and unit b is the receiver; when unit b sends data to unit a, unit b is the sender and unit a is the receiver. In the related art, the two units often perform electrical interface communication based on the CPRI (Common Public Radio Interface) protocol.

[0003] However, since the size of the basic unit of CPRI, that is, the chip (basic frame), is fixed, data packets in the CPRI protocol need to be transmitted in units of chips. However, due to the small size of the chip, when transmitting, a data packet often needs to be split into multiple chips for transmission. But since the size of the data packet may not be an integer multiple of the chip size, there may be idle space in the chips obtained after splitting. In this case, transmitting the data packet will result in waste of transmission resources. Summary of the Invention

[0004] The purpose of the embodiments of this application is to provide a data packet electrical interface transmission system, method, chip, RE, and base station to improve the utilization rate of electrical interface transmission resources. The specific technical solutions are as follows:

[0005] In a first aspect, the embodiments of this application provide a data packet electrical interface transmission system. The system includes a sender and a receiver connected through an electrical interface. The sender and the receiver are data processing components within a radio equipment RE in a base station.

[0006] The sender is configured to obtain a data packet, add a preset packet header corresponding to the type of the data packet; and send the data packet with the preset packet header added to the receiver. The types of the data packet include: physical shared channel PSCH type.

[0007] The receiving end is used to receive the data packet, cache the data packet, and remove the preset packet header.

[0008] In one embodiment of the present application, the sending end is specifically used for:

[0009] When the current data transmission mode is the time domain mode, send a first data packet of the PSCH time domain type with a preset packet header added to the receiving end;

[0010] And / or

[0011] When the configured data transmission mode is the frequency domain mode, send a second data packet of the PSCH frequency domain type with a preset packet header added to the receiving end according to a preset period.

[0012] In one embodiment of the present application, the sending end is further used for:

[0013] Send a data packet of a non-PSCH type with a preset packet header added during the period when the second data packet is not sent.

[0014] In one embodiment of the present application, the non-PSCH type includes at least one of the following types: long physical random access channel (PRACH) type, short PRACH type, antenna calibration (AC) control word type, and the length of the data packet of the long PRACH type is greater than the length of the data packet of the short PRACH type.

[0015] In one embodiment of the present application, the sending end is specifically used for:

[0016] When the current PRACH sending mode is the long PRACH mode, send a data packet of the long PRACH type with a preset packet header added to the receiving end in a first period, where the first period is: a preset period for receiving the data packet of the PSCH frequency domain type sent by the receiving end.

[0017] In one embodiment of the present application, the sending end is specifically used for:

[0018] When the current PRACH sending mode is the short PRACH mode, send a data packet of the short PRACH type with a preset packet header added during the idle period within a second period, where the second period is: a preset period for sending the data packet of the PSCH frequency domain type.

[0019] In one embodiment of the present application, when the sending end sends uplink data, the non-PSCH type includes: long PRACH type and / or short PRACH type;

[0020] When the transmitting end sends downlink data, the non-PSCH type includes: the AC control word type.

[0021] In one embodiment of the present application, when the transmitting end sends uplink data, the transmitting end is specifically configured to:

[0022] When the configured data transmission mode is the frequency domain mode, send a second data packet of the PSCH frequency domain type with a preset header added to the receiving end according to a preset period, store a data packet of the non-PSCH type with a preset header added, and send the stored data packet of the non-PSCH type with a preset header added during the period when the second data packet is not sent.

[0023] In one embodiment of the present application, the transmitting end is specifically configured to:

[0024] Determine whether the remaining storage space of the transmitting end is greater than or equal to the data volume of the data packet of the non-PSCH type with a preset header added. If so, store the data packet.

[0025] In one embodiment of the present application, the preset header corresponding to the PSCH frequency domain type includes at least one of the following information:

[0026] A first identifier for indicating that the data packet is data or control information, a second identifier for indicating the base station type of the system, a third identifier for indicating the type of the data packet, an FDM identifier in the case where the PRACH channel supports frequency division multiplexing (FDM), the lower 4 bits of the infinite frame number, the subframe number, the slot number, the symbol identifier, the automatic gain control (AGC) factor of the fast Fourier transform (FFT), the number of channels, the antenna count for in-channel serial transmission, the data payload length in the data packet, the reserved field, and / or

[0027] The preset header corresponding to the long PRACH type and / or the short PRACH type includes at least one of the following information:

[0028] A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, the system frame number of the system frame where the data packet is located, the half-frame number of the half-frame where the data packet is located, the subframe number of the subframe where the data packet is located, the identifier of the slot where the data packet is located, the PRACH time domain resource number, the starting symbol number of the PRACH time domain resource, the AGC of each antenna in the channel, the first antenna number in the channel, the FDM identifier, the reserved field;

[0029] and / or

[0030] The preset header corresponding to the PSCH time domain type includes at least one of the following information:

[0031] A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, the data packet count within a preset duration, the data payload length in the data packet, a reserved field;

[0032] and / or

[0033] The preset packet header corresponding to the AC control word type includes at least one of the following information:

[0034] A first identifier for indicating that the data packet is data or control information, the calibration type represented by the AC control word, a second identifier for indicating the base station type where the system is located, the calibration switch fields of each antenna, the transceiver sequence amplitude factor, the calibration enable bits and calibration sequence numbers of each antenna, a reserved field.

[0035] In one embodiment of the present application, the sending end is specifically used for:

[0036] Convert the data packet with the preset packet header from the original type to the target data type, insert a start control character before the data packet, insert an end control character after the data packet, insert an idle control character in the time period when the data packet is not transmitted, and send the data of the target data type with the inserted control characters to the receiving end, where the target data type is: a data type that can be transmitted between the sending end and the receiving end;

[0037] The receiving end is specifically used for:

[0038] Convert the received data from the target data type to the original type, parse the data of the original type, determine the position of the start control character as the start position of the data packet, determine the position of the end control character as the end position of the data packet, and determine the position of the idle control character as the position where the data packet is not transmitted.

[0039] In one embodiment of the present application, the sending end is specifically used for:

[0040] Add a check code after the data packet and send the data packet with the added check code to the receiving end;

[0041] The receiving end is specifically used for:

[0042] Receive the data packet with the added check code and perform verification on the data packet based on the check code.

[0043] In one embodiment of the present application, the receiving end is further used for:

[0044] Determine whether the information of the data packet matches the expected information. If not, report an error. The information of the data packet includes at least one of the following: antenna number, packet number, length of the data packet, type of the data packet;

[0045] and / or

[0046] If there is a read-write conflict during the caching of the data packet, report an error.

[0047] In a second aspect, an embodiment of the present application provides a method for transmitting a data packet through an electrical interface, which is applied to a sending end. The sending end and the receiving end are connected through an electrical interface. The sending end and the receiving end are data processing components in a radio device (RE) in a base station. The method includes:

[0048] Obtain a data packet;

[0049] Add a preset packet header corresponding to the type of the data packet to the data packet. The types of the data packet include: physical shared channel (PSCH) type;

[0050] Send the data packet with the preset packet header added to the receiving end.

[0051] In an embodiment of the present application, the sending the data packet with the preset packet header added to the receiving end includes:

[0052] When the current data transmission mode is the time domain mode, send a first data packet of the PSCH time domain type with the preset packet header added to the receiving end;

[0053] and / or

[0054] When the configured data transmission mode is the frequency domain mode, send a second data packet of the PSCH frequency domain type with the preset packet header added to the receiving end according to a preset period.

[0055] In an embodiment of the present application, when the configured data transmission mode is the frequency domain mode, the method further includes:

[0056] Send a data packet of a non-PSCH type with the preset packet header added during a period when the second data packet is not sent.

[0057] In an embodiment of the present application, the non-PSCH type includes at least one of the following types: long physical random access channel (PRACH) type, short PRACH type, antenna calibration (AC) control word type. The length of the data packet of the long PRACH type is greater than the length of the data packet of the short PRACH type.

[0058] In one embodiment of the present application, sending a non-PSCH type data packet with a preset header added during the period when the second data packet is not sent includes:

[0059] When the current PRACH transmission mode is the long PRACH mode, sending a long PRACH type data packet with a preset header added to the receiving end during a first period, where the first period is a preset period for receiving a PSCH frequency domain type data packet sent by the receiving end.

[0060] In one embodiment of the present application, sending a non-PSCH type data packet with a preset header added during the period when the second data packet is not sent includes:

[0061] When the current PRACH transmission mode is the short PRACH mode, sending a short PRACH type data packet with a preset header added during an idle period within a second period, where the second period is a preset period for sending a PSCH frequency domain type data packet.

[0062] In one embodiment of the present application, when the sending end sends uplink data, the non-PSCH type includes: long PRACH type and / or short PRACH type;

[0063] When the sending end sends downlink data, the non-PSCH type includes: AC control word type.

[0064] In one embodiment of the present application, when the sending end sends uplink data, sending a non-PSCH type data packet with a preset header added during the period when the second data packet is not sent includes:

[0065] Storing a non-PSCH type data packet with a preset header added, and sending the stored non-PSCH type data packet with a preset header added during the period when the second data packet is not sent.

[0066] In one embodiment of the present application, storing a non-PSCH type data packet with a preset header added includes:

[0067] Judging whether the remaining storage space of the sending end is greater than or equal to the data volume of the non-PSCH type data packet with a preset header added. If so, storing the data packet.

[0068] In one embodiment of the present application, the preset header corresponding to the PSCH frequency domain type includes at least one of the following information:

[0069] A first identifier for indicating that the data packet is data or control information, a second identifier for indicating the type of base station where the system is located, a third identifier for indicating the type of the data packet, an FDM identifier in the case where the PRACH channel supports frequency division multiplexing (FDM), the lower 4 bits of the infinite frame number, the sub-frame number, the time slot number, the symbol identifier, the automatic gain control (AGC) factor of the fast Fourier transform (FFT), the number of channels, the antenna count for in-channel serial transmission, the data payload length in the data packet, a reserved field;

[0070] and / or

[0071] The preset header corresponding to the long PRACH type and / or the short PRACH type contains at least one of the following information:

[0072] A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, the system frame number of the system frame where the data packet is located, the half-frame number of the half-frame where the data packet is located, the sub-frame number of the sub-frame where the data packet is located, the identifier of the time slot where the data packet is located, the PRACH time-domain resource number, the starting symbol number of the PRACH time-domain resource, the AGC of each antenna in the channel, the first antenna number of the channel, the FDM identifier, a reserved field;

[0073] and / or

[0074] The preset header corresponding to the PSCH time-domain type contains at least one of the following information:

[0075] A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, the data packet count within a preset duration, the data payload length in the data packet, a reserved field;

[0076] and / or

[0077] The preset header corresponding to the AC control word type contains at least one of the following information:

[0078] A first identifier for indicating that the data packet is data or control information, the calibration type represented by the AC control word, a second identifier for indicating the type of base station where the system is located, the calibration switch field for each antenna, the transceiver sequence amplitude factor, the calibration enable bit and calibration sequence number for each antenna, a reserved field.

[0079] In one embodiment of the present application, the sender sends data to the receiver in the following manner:

[0080] Convert the data packet with the preset packet header added from the original type to the target data type, insert a start control character before the data packet, insert an end control character after the data packet, and insert an idle control character during the period when the data packet is not transmitted, so that the receiving end converts the received data from the target data type to the original type, analyzes the data of the original type, determines the position of the start control character as the start position of the data packet, determines the position of the end control character as the end position of the data packet, and determines the position of the idle control character as the position of the non-transmitted data packet;

[0081] Wherein, the target data type is: a data type that can be transmitted between the sending end and the receiving end.

[0082] In one embodiment of the present application, the sending end sends a data packet to the receiving end in the following manner:

[0083] Add a check code after the data packet, and send the data packet with the check code added to the receiving end, so that the receiving end receives the data packet with the check code added and verifies the data packet based on the check code.

[0084] In a third aspect, an embodiment of the present application provides a chip, the chip includes an electrical port, and the chip is used to execute the data packet electrical port transmission method in any one of the second aspect.

[0085] In a fourth aspect, an embodiment of the present application provides a RE, and the radio device RE includes the data packet electrical port transmission system in any one of the first aspect.

[0086] In a fifth aspect, an embodiment of the present application provides a base station, including: a memory, a radio device RE, a processor:

[0087] The memory is used to store a computer program; the RE includes the data packet electrical port transmission system in any one of the first aspect; the processor is used to read the computer program in the memory and control the operation of the base station.

[0088] Beneficial effects of the embodiments of the present application:

[0089] An embodiment of the present application provides a data packet electrical port transmission system. The above system includes a sending end and a receiving end, and the sending end and the receiving end are data processing devices in the RE of the base station. That is, the system is applicable to the bidirectional data packet sending between the data processing devices in the RE.

[0090] In the embodiments of the present application, the sending end adds different preset packet headers to different types of data packets. The sending end sends complete data packets to the receiving end without splitting the data packets, so there will be no problems existing when transmitting data packets using the CPRI protocol, thereby improving the utilization rate of electrical interface transmission resources. Description of the Drawings

[0091] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings.

[0092] Figure 1 A schematic diagram of a CPRI frame structure provided by the related art;

[0093] Figure 2 A schematic diagram of a 5G 30K subcarrier spacing frame structure provided by the related art;

[0094] Figure 3 A schematic diagram of the structure of a slot provided by the related art;

[0095] Figure 4 A schematic diagram of the time-domain data structure of data transmission in the TDD working mode provided by the related art;

[0096] Figure 5A A schematic diagram of the structure of the first data packet electrical interface transmission system provided by the embodiments of the present application;

[0097] Figure 5B A schematic flowchart of a data packet electrical interface transmission method provided by the embodiments of the present application;

[0098] Figure 6 A schematic diagram of the first data packet structure provided by the embodiments of the present application;

[0099] Figure 7 A schematic diagram of the second data packet structure provided by the embodiments of the present application;

[0100] Figure 8 A schematic diagram of the third data packet structure provided by the embodiments of the present application;

[0101] Figure 9 A schematic diagram of the fourth data packet structure provided by the embodiments of the present application;

[0102] Figure 10 A schematic diagram of the fifth data packet structure provided by the embodiments of the present application;

[0103] Figure 11Schematic diagram of the first data packet time-domain insertion process provided by an embodiment of the present application;

[0104] Figure 12 Schematic diagram of the second data packet time-domain insertion process provided by an embodiment of the present application;

[0105] Figure 13 Schematic diagram of the data packet format after adding a check code provided by an embodiment of the present application;

[0106] Figure 14 Schematic diagram of the structure of the second data packet electrical interface transmission system provided by an embodiment of the present application;

[0107] Figure 15 Schematic diagram of the output timing of a pkg_tx sub-module provided by an embodiment of the present application;

[0108] Figure 16 Schematic diagram of the flow of a data packet transmission method applied to a sending end provided by an embodiment of the present application;

[0109] Figure 17 Schematic diagram of the structure of a base station provided by an embodiment of the present application. Detailed implementation manners

[0110] In the embodiments of the present application, the term "and / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects before and after.

[0111] In the embodiments of the present application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0112] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0113] The embodiments of the present application provide a data packet electrical interface transmission system, method, chip, RE, and base station to improve the utilization rate of electrical interface transmission resources.

[0114] Among them, the system, method, chip, RE, and base station are based on the same application concept. Since the principles of solving problems by the system, method, chip, RE, and base station are similar, the implementations of the system, method, chip, RE, and base station can be referred to each other, and the repeated parts will not be elaborated.

[0115] In order to more specifically illustrate the problems existing in the related technologies, this application document first describes the related technologies.

[0116] First, the current CPRI protocol specifies line bit rate options, including option 1 - 10, as well as the encoding methods, parallel clock rates, and data bit widths corresponding to various line bit rate options. Refer to Table 1, which provides a CPRI protocol line bit rate option table.

[0117] Table 1

[0118]

[0119]

[0120] Taking 5G (5th Generation Mobile Communication Technology) transmission as an example, the commonly used line bit rates in current 5G are option 9 (12.5G / s) and option 10 (25G / s). CPRI uses a chip as the minimum transmission granularity, with a transmission frequency of 3.84M / s and a 10ms wireless frame as the transmission period. Each wireless frame is divided into 150 supergroups, each supergroup is divided into 256 chips, and each chip basic frame contains 96 DWs (Double Words) at the option 10 line bit rate. The CPRI frame structure of option 10 is as follows Figure 1 , and each basic frame is divided into three transmission channels according to the different carried contents: the CM (Control and Management) channel, the VP (Virtual Peripheral Component Interconnect Express) channel, and the IQ (In-phase Quadrature) channel.

[0121] Refer to Figure 1, It is a schematic diagram of the CPRI frame structure provided by the related technology. The figure schematically includes radio frames N - N + 2. Taking radio frame N as an example in the figure, the supergroups 0 - 149 between the arrows at the start of radio frame N indicate that radio frame N contains 150 supergroups. In addition, the leftmost supergroup 149 outside the arrows represents the supergroup contained in radio frame N - 1, and the rightmost supergroup 0 outside the arrows represents the supergroup contained in radio frame N + 1. Taking supergroup 79 as an example in the figure, the chips 0 - 255 between the arrows at the start of supergroup 79 indicate that supergroup 79 contains 256 chips. The leftmost chip 255 outside the arrows represents the chip contained in supergroup 78, and the rightmost chip 0 outside the arrows represents the chip contained in supergroup 80. Taking chip 127 as an example in the figure, the DWs 0 - 95 between the arrows at the start of chip 127 indicate that chip 127 contains 96 DWs. Among them, DWs 0 - 1 belong to the CM channel, DW3 belongs to the VP channel, and DWs 4 - 95 belong to the IQ channel. The leftmost DW95 outside the arrows is the DW contained in chip 126, and the rightmost DW0 outside the arrows is the DW contained in chip 128. Each DW is 64 bits.

[0122] In addition, the length of a 5G frame (radio frame) is 10 ms. One frame contains 20 slots (time slots), and one slot contains 14 symbols (symbols). Among them, the first symbol in each slot is a long CP (Cyclic Prefix) symbol, and the remaining symbols are short CP symbols.

[0123] See Figure 2 , It is a schematic diagram of the 5G 30K sub - carrier spacing frame structure provided by the related technology.

[0124] In the figure, a frame contains 20 slots from slot0 - slot19. Taking slot9 as an example, each slot contains 14 symbols from symb0 - symb13. Symb0 (i.e., the first symbol) contains a long CP and FFT (Fast Fourier Transform). Taking symb7 as an example, the remaining symbols contain a short CP and FFT.

[0125] The length of the long CP is 352, the length of the short CP is 288. Under a 100M bandwidth, the effective length of one symbol is 273 * 12 = 3276, and a 4096 - point FFT is performed.

[0126] See Figure 3 , It is a schematic diagram of the structure of a slot provided by the related technology.

[0127] The figure contains symb0 - symb13, a total of 14 symbs. Each symb consists of two parts, namely the preceding CP and the following FFT. In the CP of symb0, N = 352 and T = 2.8646 us, indicating that this CP has 352 points and the transmission duration is 2.8646 us. In the CP of other symbs, N = 288 and T = 2.3437 us, indicating that this CP has 288 points and the transmission duration is 2.3437 us. It can be seen that the CP in symb0 is a long CP, and the CPs in other symbs are short CPs. In addition, the lengths of the FFTs in each symb are the same, all N = 4096 and T = 33.33333 us. Then the total transmission duration of the data in symb0 is 36.1979 us, and that of other symbs is 35.6771 us. In addition, the maximum sampling rate Fs is 122.88 MSPS.

[0128] When using the CPRI protocol to transmit IQ data, since the FFT - IP needs to serially process data of multiple channels within one symb time. When the system clock fclk = 491.52 M / s, within the symb time, the number of data packets chn_num serially processed by the FFT - IP is chn_num = fclk / fs.

[0129] Due to the configuration of the 5G NR (New Radio) 30K sub - carrier spacing, FS = 122.88 M / s. In hardware implementation, fclk = 491.52 M / s, and one data channel serially processes 4 - antenna data.

[0130] Taking the transmission of PDSCH data packets based on the CPRI protocol as an example, in terms of data volume, when the CPRI protocol is used for the electrical interface, the frequency - domain data is not compressed by PRB (Physical Resource Block). The effective data volume of a single antenna for 1 symb is 3276 RE (Resource Element). 32 - bit IQ (16 bit + 16 bit) is truncated to 28 - bit IQ (14 bit + 14 bit). The data of 4 antennas in 1 cell is serially transmitted on a single CPRI.

[0131] In terms of the data packet duration, since one symbol corresponds to 137 chips or 139 chips (for symbols with long CP) in terms of time. CPRI needs to serially transmit 4 antennas within the symbol duration. The FFT duration of a single antenna is 4096 cycles, corresponding to 32 chips. Therefore, for a single antenna, it needs to be transmitted within 32 consecutive chip durations. Since the main application scenario of the current 5G NR is the TDD working mode: it is divided into uplink symbols and downlink symbols in terms of time, that is, PDSCH is only transmitted in downlink symbols, PUSCH is only transmitted in uplink symbols, and invalid symbols are filled with invalid chips.

[0132] In terms of packet assembly, taking PUSCH as an example, 99 REs (Resource Element) are transmitted in chip0, and 104 REs are transmitted in chips 1 - 31. So in total, 99 + 104×31 = 3323 REs can be transmitted, which is greater than the effective data volume of 3276 REs for a single antenna in one cymb.

[0133] See Figure 4 , which is a schematic diagram of the time-domain data structure for data transmission in a TDD (Time Division Duplex) working mode provided by the related technology.

[0134] In the time domain, there are symbols arranged in sequence, namely A0 - A12. Taking A0 as an example in the figure, each symbol contains 32 chips, transmitting RE0 - RE3275, a total of 3276 REs. 32 chips are associated as a PKG (package, data packet). Among them, the first chip transmits 99 REs of IQ data, and each of the other chips transmits 104 REs of IQ data.

[0135] UL-PKG-CHIP0 (UpLink-Package-chip0) in the figure represents chip0 obtained by dividing the data packet transmitted on the uplink, that is, the first chip obtained by division. Its bit width is 32 bits, with a total of 96 DW, including 4 DW of CM data, 5 DW of header, and 87 DW of service data with a data truncation of 28 bits. Specifically, excluding the CM data, it includes: 1 DW of PUSCH_HD (Physical Uplink Shared Channel-Head) which is the service data header for carrying service data-related information; 1 DW of PUSCH-fft-prb-agc which is the AGC (Automatic Gain Control) factor of the 8-bit block floating-point FFT output, and PUSCH-data which is the service data. In addition, it also includes the following data that may or may not exist: 1 DW of PRACH-HD1 and 1 DW of PRACH-HD2 which are the PRACH service data headers; 1 DW of PRACH-fft-prb-agc which is the AGC factor of the 8-bit block floating-point FFT output for carrying service data-related information. Since PRACH supports 4FDM (Frequency Division Multiplexing), it is 4 * 8 = 32 bits; long PRACH-data; short PRACH-data. In addition, the gray part in this chip is an idle area that does not transmit any data.

[0136] UL-PKG-CHIP(n) (UpLink-Package-chipn) in the figure represents chipn obtained by dividing the data packet transmitted on the uplink. It is the chip other than chip0, with a bit width of 32 bits, a total of 96 DW, including 4 DW of CM data, 1 DW of header, and 91 DW of service data with a data truncation of 28 bits. The header is PUSCH_HD.

[0137] In the figure, DL-PKG-CHIP0 (DownLink-Package-chip0) represents chip0 obtained by dividing the data packet for downlink transmission. It is the first chip obtained by division, with a bit width of 32 bits, a total of 96 DW, including 4 DW of CM data, 1 DW of header, and 91 DW of PDSCH-data service data with a data truncation of 28 bits. The header is PDSCH_HD (Physical Downlink Shared Channel-Head), representing the service data header.

[0138] In the figure, DL-PKG-CHIP(n) (DownLink-Package-chipn) represents chipn obtained by dividing the data packet for downlink transmission. It is a chip other than chip0, with a bit width of 32 bits, a total of 96 DW, including 4 DW of CM data, 1 DW of header, and 91 DW of PDSCH-data service data with a data truncation of 28 bits. The header is PDSCH_HD, representing the service data header.

[0139] As can be seen from the figure, in this transmission mode, in order to save data bandwidth, only various data headers, fft-prb-agc, etc. are filled in the first chip of the data packet.

[0140] Referring to Table 2, it is an information table of the registers included in a service data header provided by an embodiment of this application. The service data header is PUSCH-HD or PDSCH-HD.

[0141] Table 2

[0142]

[0143]

[0144] Since the CPRI bandwidth and the service data bandwidth do not fully match, empty chips will periodically appear on the CPRI. Except for the CM channel in the CPRI protocol, the data in the empty chips is all 0, which are invalid chips. The existence of empty chips causes a large waste of electrical port transmission resources.

[0145] To solve the above problems, an embodiment of this application provides a data packet electrical port transmission system, method, RE, and base station.

[0146] See Figure 5A, which is a schematic structural diagram of the first data packet electrical interface transmission system provided by the embodiment of the present application, including a transmitter 501 and a receiver 502 connected by an electrical interface in the RE of the base station. The above transmitter and receiver are data processing devices in the RE of the base station.

[0147] Exemplarily, the RE contains data processing devices that implement the functions of beamforming and physical layer front-end, which can be called AIU (Active antenna IR interface Unit, active antenna IR interface unit), and data processing devices that implement the intermediate frequency signal processing function, which can be called ARU (Active antenna RF Unit, active antenna radio frequency unit). The above transmitter is an AIU or an ARU, and the above receiver is a data processing device different from the above transmitter among the above AIU and the above ARU.

[0148] That is, when the AIU is used as the transmitter, the ARU is used as the receiver. In this case, the data sent by the AIU to the ARU is downlink data. According to the service requirements of the RE, the downlink data includes PDSCH frequency domain type data packets that have not been processed by IFFT (Inverse Fast Fourier Transform) in the AIU, PDSCH time domain type data packets that have been processed by IFFT in the AIU, and AC control words (ac_cmd, Antenna Calibration_command).

[0149] When the ARU is used as the transmitter, the AIU is used as the receiver. In this case, the data sent by the ARU to the AIU is uplink data. According to the service requirements of the RE, the uplink data includes PUSCH time domain type data packets that have not been processed by FFT in the ARU, PUSCH frequency domain type data packets that have been processed by FFT in the ARU, and PRACH type data packets that have been processed by FFT in the ARU, which are divided into long PRACH type data packets and short PRACH type data packets.

[0150] See Figure 5B , which is a schematic flowchart of a data packet electrical interface transmission method provided by the embodiment of the present application. Among them, the above transmitter is used to execute the following steps A-step B, and the above receiver is used to execute the following step C.

[0151] Step A: Obtain a data packet and add a preset packet header corresponding to the type of the data packet.

[0152] Among them, the above preset packet header is a packet header designed according to data transmission requirements in the embodiment of the present application and adapted to the system provided by the embodiment of the present application.

[0153] Specifically, the types of the above data packets include the PSCH type, and may also include non-PSCH types. The PSCH type includes the PSCH frequency-domain type and / or the PSCH time-domain type. The non-PSCH types include at least one of the following types: long PRACH type, short PRACH type, and AC control word type. The length of the data packet of the long PRACH type is greater than the length of the data packet of the short PRACH type.

[0154] It should be noted that when the sending end is AIU and the sent data packet is a downlink data packet, the data packet of the PSCH frequency-domain type is a PDSCH frequency-domain data packet, and the data packet of the PSCH time-domain type is a PDSCH time-domain data packet. The above non-PSCH types include: AC control word type.

[0155] When the sending end is ARU and the sent data packet is an uplink data packet, the data packet of the PSCH frequency-domain type is a PUSCH frequency-domain data packet, and the data packet of the PSCH time-domain type is a PUSCH time-domain data packet. The above non-PSCH types include: long PRACH type and / or short PRACH type.

[0156] In the embodiments of the present application, the forms of the preset packet headers corresponding to different data packet types can be seen in the following description, and will not be elaborated here.

[0157] Step B: Send the data packet with the preset packet header added to the above receiving end.

[0158] Specifically, the data packet of the PSCH type includes: the data packet of the PSCH frequency-domain type and the data packet of the PSCH time-domain type. The above step B can be implemented through the following step D and / or step E.

[0159] Step D: When the current data transmission mode is the time-domain mode, send the first data packet of the PSCH time-domain type with the preset packet header added to the above receiving end.

[0160] Specifically, the above data transmission mode can be pre-configured as the time-domain mode or the frequency-domain mode, and can be modified by adjusting the value of the parameter in the register reg_sel that indicates the data transmission mode. When the data transmission mode is the time-domain mode, step D is executed. When the transmission mode is the frequency-domain mode, step E is executed. The sending end sends the first data packet of the PSCH time-domain type to the receiving end, and uses the first data packet as the basic unit of transmission during transmission, and continuously sends it in the time domain.

[0161] Step E: When the configured data transmission mode is the frequency-domain mode, send the second data packet of the PSCH frequency-domain type with the preset packet header added to the above receiving end according to a preset period.

[0162] Specifically, when the data transmission mode is the frequency domain mode, the sending end sends a second data packet of the PSCH frequency domain type to the receiving end, and the second data packet is sent according to a preset period. Specifically, in the preset period, it is divided into a time period for sending data packets and a time period for receiving data packets, and the two time periods have the same duration and appear alternately.

[0163] In addition, during the process of transmitting the first data packet, there is no need to transmit data packets of non-PSCH types, and only the first data packet of the PSCH time domain type needs to be transmitted. However, during the process of transmitting the second data packet, there may be a need to transmit data packets of non-PSCH types. Therefore, when the data transmission mode configured at the sending end is the frequency domain mode, the sending end can also send data packets of non-PSCH types through the following step F.

[0164] Step F: Send non-PSCH type data packets with a preset packet header added during the time period when the above-mentioned second data packet is not sent.

[0165] If the sending end is an AIU, the AIU sends a PDSCH frequency domain data packet to the ARU in time period 1 and receives a PUSCH frequency domain data packet sent by the ARU in time period 2. Then, for the AIU, the time period when the PDSCH frequency domain data packet is not sent in time period 1 and time period 2 both belong to the time period when the above-mentioned second data packet is not sent.

[0166] If the sending end is an ARU, the ARU sends a PUSCH frequency domain data packet to the AIU in time period 2 and receives a PDSCH frequency domain data packet sent by the AIU in time period 1. Then, for the ARU, the time period when the PUSCH frequency domain data packet is not sent in time period 2 and time period 1 both belong to the time period when the above-mentioned second data packet is not sent.

[0167] After the sending end finishes sending the second data packet, before the next time period for sending the second data packet arrives, it can send non-PSCH type data packets.

[0168] As can be seen from the above, in the embodiments of the present application, non-PSCH type data packets are sent during the time period when PSCH type data packets are not sent. That is, the idle time when PSCH type data packets are not sent can be utilized to send non-PSCH type data packets. Without affecting the normal transmission of PSCH type data packets, the idle time is utilized to complete the transmission of non-PSCH type data packets, further utilizing the idle time domain resources when transmitting PSCH type data packets, and further improving the utilization rate of the electrical interface transmission resources.

[0169] For the specific method of sending non-PSCH type data packets, reference can be made to step G and step H below, which will not be elaborated here for the time.

[0170] The receiving end described above performs the following step C.

[0171] Step C: Receive the above data packet, cache the above data packet, and remove the above preset packet header.

[0172] In one embodiment of the present application, the receiving end may store data packets with different antenna numbers and / or packet numbers into different RAM (Random Access Memory) spaces according to the antenna number and / or packet number of the data packet. The above RAM may be a dual-port RAM, which has the functions of data cross-clock domain and bit-width conversion. For frequency-domain data packets, the buffer may be set to a space of 4 * 4096 * 32; for time-domain data packets, the buffer may be set to a space of 32 * 128 * 32. The size of the above space is only an example, and the embodiments of the present application do not specifically limit this.

[0173] As can be seen from the above, in the embodiment of the present application, the sending end adds different preset packet headers to different types of data packets. The sending end sends the complete data packet to the receiving end without splitting the data packet, so there will be no problems existing when transmitting data packets using the CPRI protocol, thereby improving the utilization rate of electrical interface transmission resources.

[0174] In one embodiment of the present application, the preset packet header corresponding to the above PSCH frequency-domain type (including PUSCH frequency-domain type and PDSCH frequency-domain type) includes at least one of the following information:

[0175] The first identifier for indicating that the above data packet is data or control information, the second identifier for indicating the type of base station where the above system is located, the third identifier for indicating the type of the above data packet, the FDM identifier in the case where the PRACH channel supports FDM, the lower 4 bits of the infinite frame number, the subframe number, the slot number, the symbol identifier, the AGC factor of the FFT, the number of channels, the antenna count for in-channel serial transmission, the data payload length in the data packet, the reserved field.

[0176] Referring to Table 3, it is a PSCH frequency-domain type packet header information table provided by the embodiment of the present application.

[0177] Table 3

[0178]

[0179] The structure of the PSCH frequency-domain type data packet after adding the packet header can be seen below Figure 6 .

[0180] Referring to Figure 6 , it is the first schematic diagram of the data packet structure provided by the embodiment of the present application.

[0181] In the figure, two data packets are used as examples. It can be seen that the data packet of the PSCH frequency domain type after adding the packet header contains 64-bit PKG_HD (Package_Head, data packet header), freq_data (frequency domain data) with a length of 3276 bits and a bit width of 32 bits. When the data packets are transmitted in the time domain, there is IDLE (idle) between them. Data_vld represents the signal level. In the embodiment shown in the figure, the data packet is transmitted when the signal level is high, and it is idle when the signal level is low. Additionally, it can also be that the data packet is transmitted when the level is low and it is idle when the level is high. The embodiment of the present application does not limit the setting of the level.

[0182] In another embodiment of the present application, the preset packet header corresponding to the above long PRACH type and / or short PRACH type contains at least one of the following information:

[0183] The first identifier for indicating that the above data packet is data or control information, the third identifier for indicating the type of the above data packet, the system frame number of the system frame where the data packet is located, the half-frame number of the half-frame where the data packet is located, the sub-frame number of the sub-frame where the data packet is located, the identifier of the time slot where the data packet is located, the number of PRACH time domain resources, the starting symbol number of the PRACH time domain resources, the AGC of each antenna in the channel, the first antenna number of the channel, the FDM identifier, the reserved field.

[0184] Refer to Table 4, which is a PSCH frequency domain type packet header information table provided by the embodiment of the present application.

[0185] Table 4

[0186]

[0187]

[0188] Refer to Figure 7 , which is the schematic diagram of the second data packet structure provided by the embodiment of the present application.

[0189] Specifically, this figure shows the data structure of the data packet of the short PRACH type. It can be seen that the data packet of the short PRACH type after adding the packet header contains 64-bit PKG_HD and short_prach_data (short PRACH data) with a length of 558 bits and a bit width of 32 bits. Data_vld represents the signal level. In the embodiment shown in the figure, the data packet is transmitted when the signal level is high, and it is idle when the signal level is low. Additionally, it can also be that the data packet is transmitted when the level is low and it is idle when the level is high. The embodiment of the present application does not limit the setting of the level.

[0190] Refer to Figure 8, which is the schematic diagram of the third data packet structure provided by the embodiment of the present application.

[0191] Specifically, this figure shows the data structure of the long PRACH type data packet. It can be seen that the long PRACH type data packet after adding the packet header contains 64-bit PKG_HD, long_prach_data (long PRACH data) with a length of 3358 bits and a bit width of 32 bits, and includes 4FDM of all antennas in 1 channel. Data_vld represents the signal level. In the embodiment shown in the figure, the data packet is transmitted when the signal level is high, and it is idle when the signal level is low. Additionally, it can also be that the data packet is transmitted when the level is low and idle when the level is high. The embodiment of the present application does not limit the setting of the level.

[0192] In another embodiment of the present application, the preset packet header corresponding to the above PSCH time domain type includes at least one of the following information:

[0193] The first identifier for indicating that the above data packet is data or control information, the third identifier for indicating the type of the above data packet, the data packet count within a preset duration, the data payload length in the data packet, and the reserved field.

[0194] Refer to Table 5, which is the PSCH time domain type packet header information table provided by the embodiment of the present application.

[0195] Table 5

[0196]

[0197] Refer to Figure 9 , which is the schematic diagram of the fourth data packet structure provided by the embodiment of the present application.

[0198] Specifically, this figure shows the data structure of the PSCH time domain type data packet. It can be seen that the PSCH time domain type data packet after adding the packet header contains 64-bit info (information), that is, the packet header, and time_cmpr_data (time domain PSCH data) with a length of 128 bits and a bit width of 23 bits. Data_vld represents the signal level. In the embodiment shown in the figure, the data packet is transmitted when the signal level is high, and it is idle when the signal level is low. Additionally, it can also be that the data packet is transmitted when the level is low and idle when the level is high. The embodiment of the present application does not limit the setting of the level.

[0199] In another embodiment of the present application, the preset packet header corresponding to the above AC control word type includes at least one of the following information:

[0200] The first identifier for indicating that the above data packet is data or control information, the calibration type represented by the AC control word, the second identifier for indicating the base station type where the above system is located, the calibration switch fields of each antenna, the transceiver sequence amplitude factor, the calibration enable bits and calibration sequence numbers of each antenna, and the reserved field. Refer to Table 6, which is a table of the header information of the AC control word type provided by an embodiment of the present application.

[0201] Table 6

[0202]

[0203]

[0204] Refer to Figure 10 , which is a schematic diagram of the fifth data packet structure provided by an embodiment of the present application.

[0205] Specifically, this figure shows the data structure of the data packet of the AC control word type. It can be seen that the bit width of the AC control word is 64bit. The data packet of the AC control word type after adding the header contains 64bit of info (information), that is, the header, AC_cmd, and there is IDLE after the data packet. Data_vld represents the signal level. In the embodiment shown in the figure, the data packet is transmitted when the signal level is high, and it is idle when the signal level is low. Additionally, it can also be that the data packet is transmitted when the level is low and it is idle when the level is high. The embodiment of the present application does not limit the setting of the level.

[0206] In addition, for the AC control word, in the case where there is a need to send the AC control, after encapsulating the AC control word with the above preset header, the generated 64bit data packet is not stored and is directly sent to the receiving end as long as there is no conflict with the sending of other data packets.

[0207] It should be noted that the above limitations on the lengths and bit widths of various types of data packets are only examples. In the embodiments of the present application, the lengths and bit widths of various types of data packets can be modified by adjusting relevant configuration parameters, so as to achieve custom packet lengths. For example, for PUSCH data packets and PDSCH data packets with a 30K subcarrier spacing in the frequency domain, the packet length is 3276 data / packet under a 100M bandwidth, 2604 data / packet under an 80M bandwidth, and 1944 data / packet under a 60M bandwidth. The packet length of the short PRACH type data packet is 556 data / packet, and the packet length of the long PRACH type data packet is 3356 data / packet. The bit width of the data packet can also be flexibly specified, such as 28bit or 23bit for compressed data packets and 32bit for uncompressed data packets, etc., so as to improve the scalability of the interface between the AIU and the ARU.

[0208] In one embodiment of the present application, the sending end sends a long PRACH type data packet with a preset packet header to the receiving end through the following step G.

[0209] Step G: When the current PRACH transmission mode is the long PRACH mode, send a long PRACH type data packet with a preset packet header to the receiving end in the first time period.

[0210] Wherein, the first time period is: a preset time period for receiving a PSCH frequency domain type data packet sent by the receiving end.

[0211] Specifically, when the PRACH transmission mode is the long PRACH mode, the sending end sends a long PRACH type data packet to the receiving end. Since the length of the long PRACH type data packet is relatively long, it is difficult for the sending end to send both a PSCH frequency domain type data packet and a long PRACH type data packet within a relatively short preset period. Therefore, the long PRACH type data packet can be sent within the first time period with a relatively long duration, that is, the long PRACH type data packet is sent to the receiving end during the time period when the sending end receives the PSCH frequency domain type data packet sent by the receiving end. For example, if the preset period is 10 ms, due to the limitation of the RE traffic volume, there are at most two long PRACH type data packets that need to be transmitted within 10 ms. Therefore, two or less than two long PRACH type data packets can be transmitted within the first time period within 10 ms.

[0212] In one embodiment of the present application, the system can preset a system specified moment for inserting a long PRACH type data packet in the first time period. When transmitting the long PRACH type data packet, insert the data packet to the system specified moment. The system specified moment can be any moment within the subsequent duration in the first time period that is sufficient to transmit the data packet.

[0213] In addition, within the time period for sending the long PRACH type data packet, theoretically, there should not be a PUSCH frequency domain type data packet that needs to be sent and is written to the sending end. At this time, if there is an abnormally written PUSCH frequency domain type data packet, it indicates an abnormality, and at this time, the PUSCH frequency domain type data packet can be discarded.

[0214] See Figure 11 , which is the schematic diagram of the first data packet time domain insertion process provided by the embodiment of the present application.

[0215] The figure includes a time period for transmitting packets of the PSCH frequency domain type, a CP (Cyclic Prefix), and a first time period that is preset and used for receiving packets of the PSCH frequency domain type sent by the above receiving end. The long PRACH type packets included in the figure are inserted at the system-specified moment.

[0216] As can be seen from the above, in the embodiment of the present application, the sending end sends long PRACH type packets to the receiving end within the first time period fixed for the receiving end to send packets of the PSCH frequency domain type to the sending end, that is, it utilizes the time when the sending end receives packets of the PSCH frequency domain type to send long PRACH type packets to the receiving end, and the duration of the first time period is relatively long, which can complete the sending of long PRACH type packets. That is, without affecting the normal sending of packets of the PSCH frequency domain type, it utilizes the idle transmission resources in the direction from the sending end to the receiving end, further improving the utilization rate of transmission resources.

[0217] In another embodiment of the present application, the sending end sends short PRACH type packets with a preset packet header to the receiving end through the following step H.

[0218] Step H: When the current PRACH sending mode is the short PRACH mode, send short PRACH type packets with a preset packet header during the idle time period within the second time period.

[0219] Among them, the above second time period is: a preset time period for sending packets of the PSCH frequency domain type.

[0220] In an embodiment of the present application, when the above PRACH sending mode is the short PRACH mode, the sending end sends short PRACH type packets to the receiving end. Since the length of the short PRACH type packets is short, the sending end can send packets of the PSCH frequency domain type in a shorter preset cycle, and then send short PRACH type packets within the second time period of the preset cycle. Therefore, the sending end can send short PRACH type packets after sending packets of the PSCH frequency domain type within the second time period. Specifically, after sending each packet of the PSCH frequency domain type, it can be detected whether there are short PRACH type packets to be sent. If so, they are inserted and sent after the packet of the PSCH frequency domain type. Specifically, the short PRACH type packets can be inserted into the last CP time period of adjacent PSCH frequency domain symbols. The short PRACH type packets of all antennas of 1 FDM are inserted at the end of each symbol. If the configuration is 2 FDM, it takes 2 symbol times to complete the insertion of short PRACH 2 FDM.

[0221] See Figure 12 , which is the schematic diagram of the second data packet time domain insertion process provided by the embodiment of the present application.

[0222] The first row in the figure contains 2 data packets of the short PRACH type. The second row is the arrangement order of the data packets of the PSCH frequency domain type in the time domain before inserting the data packets of the short PRACH type. Among them, each symbol is separated by a dotted line. The gray part is the data packet of the PSCH frequency domain type, the black part is the interval between the data packets of the PSCH frequency domain type, and the white part is the cp time period at the end of each symbol. After inserting the data packets of the short PRACH type into the cp time period, the third row shows the arrangement order of each data packet in the time domain after inserting the data packets of the short PRACH type. The difference from the second row is the newly added gray area in the cp time period of the symbol, which is the position where the data packets of the short PRACH type are inserted.

[0223] As can be seen from the above, in the embodiment of the present application, during the second time period fixed for the sending end to send the data packets of the PSCH frequency domain type to the receiving end, the sending end additionally sends the data packets of the short PRACH type to the receiving end, that is, it makes full use of the idle time when the sending end sends the data packets of the PSCH frequency domain type to send the data packets of the short PRACH type with a shorter length to the receiving end. That is, without affecting the normal sending of the data packets of the PSCH frequency domain type, it makes full use of the idle transmission resources in the direction from the sending end to the receiving end, and further improves the utilization rate of the transmission resources.

[0224] In addition, in one embodiment of the present application, when the sending end sends uplink data, the non-PSCH type data packets can be sent through the following step I.

[0225] Step I: When the configured data transmission mode is the frequency domain mode, send the second data packets of the PSCH frequency domain type with a preset header added to the receiving end according to a preset period, store the non-PSCH type data packets with a preset header added, and send the stored non-PSCH type data packets with a preset header added during the time period when the second data packets are not sent.

[0226] When the sending end sends uplink data, the non-PSCH type data packets are data packets of the long PRACH type and / or data packets of the segment PRACH type. Since the above two types of data packets may not be directly sent but need to wait for the time period when the sending end does not send the PSCH type data packets to be sent, the above non-PSCH type data packets can be stored first.

[0227] In one embodiment of the present application, the sending end can execute the following step J to store the non-PSCH frequency domain type data packets.

[0228] Step J: Determine whether the remaining storage space of the above-mentioned sending end is greater than or equal to the data volume of the non-PSCH type data packet with the preset packet header added. If so, store the data packet.

[0229] In an embodiment of the present application, if the remaining storage space of the above-mentioned sending end is less than the data volume of the non-PSCH type data packet, the remaining storage space of the sending end cannot store the data packet, and the currently written data packet can be discarded. On the contrary, the remaining storage space of the sending end can store the data packet, and only then is the data packet stored.

[0230] As can be seen from the above, in the solution provided by the embodiment of the present application, the sending end first determines whether the remaining storage space of the sending end can store the non-PSCH type data packet before storing the data packet, and stores it only if it can be stored, so as to prevent the failure of data overflow when the sending end stores the data packet.

[0231] In order to enable the receiving end to detect valid data, the sending end needs to insert control characters between data packets before sending the data packets. In addition, the data packets that the sending end needs to send are the data packets received from the user-side interface, and the interface between the AIU501 and the ARU502 is a SERDES IP (SERializer / DESerializer Internet Protocol) interface, and the data transmission formats of the two interfaces are different. Therefore, before transmitting the data packets to the receiving end, the sending end needs to perform format conversion on the data packets.

[0232] To achieve the above purpose, the sending end can execute Step K to send a data packet to the receiving end, and the receiving end can execute Step L to receive the data packet sent by the sending end.

[0233] Step K: Convert the data packet with the preset packet header added from the original type to the target data type, insert a start control character before the data packet, insert an end control character after the data packet, and insert an idle control character during the period when the data packet is not transmitted, and send the data of the above target data type with the control characters inserted to the above receiving end.

[0234] Among them, the above target data type is: the data type that can be transmitted between the above AIU and the above ARU, and the data obtained after converting the data type includes the pcs_tx_ctrl signal containing control information and the pcs_tx_data signal containing the transmitted data.

[0235] Specifically, in order to be able to insert control characters between data packets, at least enough space to insert the termination control character of the previous data packet and the start control character of the subsequent data packet needs to be reserved between two adjacent data packets. For example, if the data volume of both the termination control character and the start control character is 1 cycle, the reserved space is at least 2 cycles. The above start control character can be represented as / S / , the termination control character can be represented as / T / , and the idle control character can be represented as / IDLE / . When inserting the / S / character, pcs_tx_ctrl = 8'h01, pcs_tx_data = {56'b0, 8'hfb}; when inserting the / T / character, pcs_tx_ctrl = 8'h80, pcs_tx_data = {8'hfd, 56'b0}; when inserting the / IDLE / character, pcs_tx_ctrl = 8'hff, pcs_tx_data = {8{8'h07}}; when transmitting data, pcs_tx_ctrl = 8'h00, pcs_tx_data = the actually transmitted data. The above signal values are only one example, and in specific embodiments, the actual values can be adjusted according to requirements, as long as the values can distinguish different control characters.

[0236] In addition, in one embodiment, if the sending end transmits data packets when Data_vld is at a high level and does not transmit data packets when it is at a low level, then at the start position of a data packet, the / S / control character is inserted at the rising edge of Data_vld; at the end position of a data packet, the / T / control character is inserted at the falling edge of Data_vld; when no data packet is being sent, that is, when Data_vld is at a low level, the / IDLE / control character is inserted.

[0237] Step L: Convert the received data from the above target data type to the above original type, parse the data of the above original type, determine the position of the above start control character as the start position of the data packet, determine the position of the above termination control character as the end position of the data packet, and determine the position of the above idle control character as the position of the non-transmitted data packet.

[0238] In one embodiment of the present application, corresponding to the description of step M above, if / S / is parsed, then determine this position as the start position of the data packet and set Data_vld to the rising edge; if / T / is parsed, then determine this position as the end position of the data packet and set Data_vld to the falling edge; if / IDLE / is parsed, then set Data_vld to the low level.

[0239] Specifically, the pcs_tx_ctrl signal and the pcs_tx_data signal can be parsed, the values of the signals can be read, and the positions of / S / , / T / , and / IDLE / can be determined according to the values of / S / , / T / , and / IDLE / set above.

[0240] In another embodiment of the present application, when the receiving end parses the pcs_tx_ctrl signal and the pcs_tx_data signal, if the parsed signal values are different from the values of all preset control characters, an error indication signal error can be output for alarm, and the level of error can be a high level.

[0241] It should be noted that in the embodiment of the present application, it is only necessary that the level of Data_vld when transmitting a data packet is different from the level of Data_vld when not transmitting a data packet, and the specific situation of the level in different cases is not limited in this embodiment.

[0242] As can be seen from the above, in the solution provided by the embodiment of the present application, a start control character is added before the data packet at the sending end before transmitting the data packet, an end control character is added after the data packet, and an idle control character is added when no data packet is transmitted, so as to distinguish the position of the transmitted data packet and the position of the non-transmitted data packet in the time domain. Moreover, the sending end first performs data type conversion before sending the data packet, so that the data packet can be transmitted between the sending end and the receiving end.

[0243] In an embodiment of the present application, the above sending end executes the following step M to send a data packet, and the receiving end executes the following step N to receive the data packet.

[0244] Step M: Add a check code after the above data packet and send the data packet with the check code added to the above receiving end.

[0245] Specifically, before sending the data packet, the sending end adds a check code to the data packet to improve the security of the data packet.

[0246] In an embodiment of the present application, the above check code can be a CRC check code, specifically, it can be obtained by using IP calculation.

[0247] See Figure 13 , which is a schematic diagram of the format of a data packet with a check code added provided by the embodiment of the present application.

[0248] The bit width of this data packet is 64 bits, and it includes a 64-bit packet header info, the payload data Data included in the data packet, CRC, and a reserved field rsv.

[0249] Step N: Receive the data packet with the check code added and check the data packet based on the above check code.

[0250] As can be seen from the above, in the solution provided by the embodiment of the present application, the sender adds a check code to the data packet, and the receiver checks the data packet based on the check code after receiving the data packet, so as to ensure the security and integrity of the data packet and prevent errors from occurring during the process of sending the data packet from the sender to the receiver.

[0251] In an embodiment of the present application, after receiving and storing the data packet, the receiver may further perform the following step O and / or step P.

[0252] Step O: Determine whether the information of the above data packet matches the expected information. If not, report an error.

[0253] Among them, the information of the above data packet includes at least one of the following information: antenna number, packet number, length of the data packet, type of the data packet.

[0254] Specifically, the expected information is the information jointly set by the system for the sender and the receiver in advance. If the information of the above data packet does not match the expected information, it means that the data packet received by the receiver does not meet the expectation, which may be due to an error in sending by the sender or an error occurring during the process of sending the data packet from the sender to the receiver. Then the receiver can report an error.

[0255] In an embodiment of the present application, the information of the above data packet can be read from the header of the data packet.

[0256] Step P: If there is a read-write conflict during the process of caching the data packet, report an error.

[0257] After reporting the error, the receiver can store the data packet for subsequent processing.

[0258] As can be seen from the above, in the embodiment of the present application, after receiving the data packet, the receiver will also check the information of the data packet. When it is determined that the information of the data packet does not match the expected information, that is, when an error occurs in the data packet, an error is reported. In addition, if there is a read-write conflict during the process of caching the data packet, it means that there is an error in the receiver when caching the data packet, and the receiver can also report an error. The receiver monitors the errors in the data transmission process by reporting errors to improve the stability of data transmission.

[0259] See Figure 14 , which is a schematic structural diagram of the second data packet electrical interface transmission system provided by the embodiment of the present application, and is the same as the foregoing Figure 2Compared with the shown embodiments, both the AIU and the ARU include a pkg_tx module, a pkg_rx module, and an elc_top module. The pkg_tx module included in the AIU is different from the pkg_tx module included in the ARU, and the pkg_rx module included in the AIU is different from the pkg_rx module included in the ARU.

[0260] Within each unit, in the order of data packet transmission, the pkg_tx module is located before the elc_top module, and the pkg_rx module is located after the elc_top module.

[0261] The function of the pkg_tx module is to receive data packets, add a header to the data packets, send the data packets to another unit, and detect and report errors that occur during the data packet transmission process.

[0262] Specifically, the pkg_tx module of the ARU includes a write_ctrl sub-module, a write_ctrl_prach sub-module, a CYCBUF sub-module, a read_arbitra sub-module, and an add_crc sub-module.

[0263] The pkg_tx module of the AIU includes a write_ctrl sub-module, a CYCBUF sub-module, a read_arbitra sub-module, and an add_crc sub-module.

[0264] Among them, the write_ctrl sub-module is used to perform write CYCBUF control, and determine whether the remaining storage space can accommodate the data packet according to the information of the remaining storage space (freesize) transmitted by the CYCBUF, that is, execute the aforementioned step O.

[0265] The write_ctrl_prach sub-module in the ARU is used to determine whether to generate a time period for sending data packets of the long PRACH type according to the long PRACH period, frame header information, and packet length information of the data packet configured by the register, and transmit the generated control signal representing the time period to other sub-modules for use. Since only the ARU will send data packets of the PRACH type to the AIU, and the AIU will not send data packets of the PRACH type to the ARU, the write_ctrl_prach sub-module only exists in the ARU.

[0266] The CYCBUF sub-module in the ARU is used to cache data packets of the long PRACH type and the short PRACH type, perform bit-width conversion and cross-clock domain on the data packets, and provide the information of the remaining storage space to the write_ctrl sub-module. The CYCBUF sub-module in the AIU is used to perform bit-width conversion and cross-clock domain on the data packets.

[0267] Specifically, the bit-width conversion refers to the conversion from 32 bits to 64 bits, and the cross-clock domain refers to the conversion from 491.52 MHz to 204.8 MHz.

[0268] The read_arbitra sub-module is used to arbitrate the transmission order of various types of data packets. The frequency-domain data packet or time-domain data packet to be sent to the receiving end is selected through the configuration register reg_sel. Moreover, the read_arbitra sub-module in the ARU is also used to coordinate the transmission timing of the data packets of the frequency-domain PSCH type and PRACH type.

[0269] The add_crc sub-module is used to add a check code to the data packet generated by the read_arbitra sub-module, that is, to implement the aforementioned step K.

[0270] There are two data packet processing paths in the pkg_tx of the AIU, which are respectively used to process the PDSCH data packet and the packet header, and to process the time-domain data packet and the packet header.

[0271] There are three data packet processing paths in the pkg_tx of the ARU, which respectively process the PUSCH data packet and the packet header after FFT processing, process the PRACH data packet and the packet header after FFT processing, and process the time-domain data packet and the packet header.

[0272] See Figure 15 , which is a schematic diagram of the output timing of a pkg_tx sub-module provided by an embodiment of this application.

[0273] The figure includes the clock signal clk, the signal level o_trf_tx_vld, and the data signal o_trf_tx_data. The white part in the data signal o_trf_tx_data is the time period for transmitting the data packet, and the slanted grid part is the idle time period. The time period for transmitting the data packet starts with info, that is, the packet header, and ends with CRC, that is, the check code. The time period corresponding to the high level in the figure is the time period for transmitting the data packet, and the time period corresponding to the low level is the idle time period.

[0274] In addition, the elc_top module includes a con_tx sub-module, a con_rx sub-module, and a SERDES sub-module.

[0275] Among them, the con_tx sub-module implements the data format conversion from the user-side interface (i_tx_data, i_tx_vld) to the SERDES IP interface (i_txdata, i_txdatak), and inserts control characters into the data, that is, to implement the aforementioned step G.

[0276] The con_rx sub-module implements the data format conversion from the SERDES IP interface (o_rxdata, o_rxdatak) to the user-side interface (o_rx_data, o_rx_vld) for the data (i_txdata, i_txdatak), and analyzes the data to determine the positions of the control characters, thereby determining the start position, end position, and position of the untransmitted data packet of the data packet, that is, implementing the aforementioned step H.

[0277] The SERDES sub-module is used to perform serial and deserialization processing on the data and perform data transmission and reception.

[0278] Furthermore, the pkg_rx module includes the pkg_analysis sub-module, buf_wctrl sub-module, data_buffer sub-module, and buf_rctrl sub-module.

[0279] The pkg_analysis sub-module includes the head_analysis component for performing header analysis and the CRC_check component for verifying the data packet based on the check code, and can extract the BFN (NodeB Frame Number Counter) number and ac_cmd.

[0280] The buf_wctrl sub-module is used to report errors, that is, to execute the aforementioned step M and / or step N.

[0281] The data_buffer sub-module consists of a dual-port RAM and is used for cross-clock domain and bit-width conversion.

[0282] The buf_rctrl sub-module is a read buffer control module that analyzes and controls the read buffer interface signals of the lower-level module and transfers the RAM signal that is currently being read to the buf_wctrl sub-module for its read-write conflict judgment.

[0283] The pkg_rx sub-module in the AIU includes three data packet processing paths, which respectively process PUSCH data packets, PRACH data packets, and time-domain data packets.

[0284] The pkg_rx sub-module in the ARU includes two data packet processing paths, which respectively process PDSCH data packets and time-domain data packets.

[0285] The technical solutions provided by the embodiments of this application can be applied to various systems, especially 5G systems. For example, the applicable systems can be the Global System of Mobile Communication (GSM) system, Code Division Multiple Access (CDMA) system, Wideband Code Division Multiple Access (WCDMA) General Packet Radio Service (GPRS) system, Long Term Evolution (LTE) system, LTE Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD) system, Long Term Evolution Advanced (LTE-A) system, Universal Mobile Telecommunication System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) system, 5G New Radio (NR) system, etc. These various systems all include terminal devices and network devices. The system can also include a core network part, such as the Evolved Packet System (EPS), 5G System (5GS), etc.

[0286] Corresponding to the foregoing data packet electrical interface transmission system, the embodiments of this application also provide a data packet electrical interface transmission method applied to the sending end.

[0287] See Figure 16 , which is a schematic flowchart of a data packet transmission method applied to the sending end provided by the embodiments of this application, including the following steps S1601 - S1603.

[0288] S1601: Obtain a data packet.

[0289] S1602: Add a preset packet header corresponding to the type of the above data packet to the above data packet.

[0290] Among them, the types of the above data packets include: PSCH type.

[0291] S1603: Send the data packet with the preset packet header added to the above receiving end.

[0292] As can be seen from the above, in the embodiment of the present application, the sending end adds different preset packet headers to different types of data packets. The sending end sends complete data packets to the receiving end without splitting the data packets, so the problems existing when transmitting data packets using the CPRI protocol will not occur, thereby improving the utilization rate of the electrical interface transmission resources.

[0293] In one embodiment of the present application, the sending of the data packet with the preset packet header to the receiving end includes:

[0294] In the case where the current data transmission mode is the time domain mode, send a first data packet of the PSCH time domain type with a preset packet header to the receiving end;

[0295] And / or

[0296] In the case where the configured data transmission mode is the frequency domain mode, send a second data packet of the PSCH frequency domain type with a preset packet header to the receiving end at a preset period.

[0297] In one embodiment of the present application, in the case where the configured data transmission mode is the frequency domain mode, the method further includes:

[0298] Send a data packet of a non-PSCH type with a preset packet header during the period when the second data packet is not sent.

[0299] As can be seen from the above, in the embodiment of the present application, a data packet of a non-PSCH type is sent during the period when a data packet of the PSCH type is not sent. That is, the idle time when the data packet of the PSCH type is not sent can be used to send the data packet of the non-PSCH type. Without affecting the normal transmission of the data packet of the PSCH type, the idle time is used to complete the transmission of the data packet of the non-PSCH type, further utilizing the idle time domain resources when transmitting the data packet of the PSCH type, and further improving the utilization rate of the electrical interface transmission resources.

[0300] In one embodiment of the present application, the non-PSCH type includes at least one of the following types: long physical random access channel (PRACH) type, short PRACH type, antenna calibration (AC) control word type, and the length of the data packet of the long PRACH type is greater than the length of the data packet of the short PRACH type.

[0301] In one embodiment of the present application, the sending of the data packet of a non-PSCH type with a preset packet header during the period when the second data packet is not sent includes:

[0302] When the current PRACH transmission mode is the long PRACH mode, a data packet of the long PRACH type with a preset header added is transmitted to the receiving end in a first time period, where the first time period is a preset time period for receiving a data packet of the PSCH frequency domain type transmitted by the receiving end.

[0303] As can be seen from the above, in the embodiment of the present application, the sending end transmits a data packet of the long PRACH type to the receiving end within the first time period fixedly used for the receiving end to transmit a data packet of the PSCH frequency domain type to the sending end. That is, the time for the sending end to receive a data packet of the PSCH frequency domain type is utilized to transmit a data packet of the long PRACH type to the receiving end. Moreover, the duration of the first time period is relatively long, which can complete the transmission of a data packet of the long PRACH type. That is, without affecting the normal transmission of a data packet of the PSCH frequency domain type, the idle transmission resources in the direction from the sending end to the receiving end are utilized, further improving the utilization rate of transmission resources.

[0304] In one embodiment of the present application, the transmitting of a non-PSCH type data packet with a preset header added in the time period when the second data packet is not transmitted includes:

[0305] When the current PRACH transmission mode is the short PRACH mode, a data packet of the short PRACH type with a preset header added is transmitted in the idle time period within a second time period, where the second time period is a preset time period for transmitting a data packet of the PSCH frequency domain type.

[0306] As can be seen from the above, in the embodiment of the present application, the sending end additionally transmits a data packet of the short PRACH type to the receiving end within the second time period fixedly used for the sending end to transmit a data packet of the PSCH frequency domain type to the receiving end. That is, the idle time when the sending end transmits a data packet of the PSCH frequency domain type is fully utilized to transmit a data packet of the short PRACH type with a shorter length to the receiving end. That is, without affecting the normal transmission of a data packet of the PSCH frequency domain type, the idle transmission resources in the direction from the sending end to the receiving end are fully utilized, further improving the utilization rate of transmission resources.

[0307] In one embodiment of the present application, when the sending end transmits uplink data, the non-PSCH type includes: the long PRACH type and / or the short PRACH type;

[0308] When the sending end transmits downlink data, the non-PSCH type includes: the AC control word type.

[0309] In one embodiment of the present application, when the sending end transmits uplink data, the transmitting of a non-PSCH type data packet with a preset header added in the time period when the second data packet is not transmitted includes:

[0310] Store non-PSCH type data packets with a preset packet header added, and send the stored non-PSCH type data packets with the preset packet header added during the period when the second data packet is not sent.

[0311] In one embodiment of the present application, the storing of non-PSCH type data packets with a preset packet header added includes:

[0312] Judge whether the remaining storage space of the sending end is greater than or equal to the data volume of the non-PSCH type data packet with the preset packet header added. If so, store the data packet.

[0313] As can be seen from the above, in the solution provided by the embodiment of the present application, the sending end first judges whether the remaining storage space of the sending end can store the non-PSCH type data packet before storing the non-PSCH type data packet. If it can store, then store it, so as to prevent the failure of data overflow when the sending end stores the data packet.

[0314] In one embodiment of the present application, the preset packet header corresponding to the PSCH frequency domain type includes at least one of the following information:

[0315] The first identifier for indicating that the data packet is data or control information, the second identifier for indicating the type of base station where the system is located, the third identifier for indicating the type of the data packet, the FDM identifier in the case where the PRACH channel supports frequency division multiplexing FDM, the lower 4 bits of the infinite frame number, the subframe number, the slot number, the symbol identifier, the automatic gain control AGC factor of the fast Fourier transform FFT, the number of channels, the antenna count for in-channel serial transmission, the data payload length in the data packet, the reserved field;

[0316] And / or

[0317] The preset packet header corresponding to the long PRACH type and / or the short PRACH type includes at least one of the following information:

[0318] The first identifier for indicating that the data packet is data or control information, the third identifier for indicating the type of the data packet, the system frame number of the system frame where the data packet is located, the half-frame number of the half-frame where the data packet is located, the subframe number of the subframe where the data packet is located, the identifier of the slot where the data packet is located, the PRACH time domain resource number, the starting symbol number of the PRACH time domain resource, the AGC of each antenna in the channel, the first antenna number of the channel, the FDM identifier, the reserved field;

[0319] And / or

[0320] The preset packet header corresponding to the PSCH time domain type includes at least one of the following information:

[0321] A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, the data packet count within a preset duration, the data payload length in the data packet, a reserved field;

[0322] and / or

[0323] The preset packet header corresponding to the AC control word type includes at least one of the following information:

[0324] A first identifier for indicating that the data packet is data or control information, the calibration type represented by the AC control word, a second identifier for indicating the base station type where the system is located, the calibration switch fields of each antenna, the transceiver sequence amplitude factor, the calibration enable bits and calibration sequence numbers of each antenna, a reserved field.

[0325] In one embodiment of the present application, the sending end sends data to the receiving end in the following manner:

[0326] Convert the data packet with the above preset packet header from the original type to the target data type, insert a start control character before the data packet, insert an end control character after the data packet, and insert an idle control character during the time period when the data packet is not transmitted, so that the receiving end converts the received data from the target data type to the original type, analyzes the data of the original type, determines the position of the start control character as the start position of the data packet, determines the position of the end control character as the end position of the data packet, and determines the position of the idle control character as the position of the non-transmitted data packet;

[0327] Wherein, the target data type is: a data type that can be transmitted between the sending end and the receiving end.

[0328] As can be seen from the above, in the solution provided by the embodiment of the present application, a start control character is added before the data packet, an end control character is added after the data packet, and an idle control character is added when the data packet is not transmitted before the data packet is transmitted at the sending end, so that the position of the transmitted data packet and the position of the non-transmitted data packet can be distinguished in the time domain. Moreover, the sending end first performs data type conversion before sending the data packet, so that the data packet can be transmitted between the sending end and the receiving end.

[0329] In one embodiment of the present application, the sending end sends a data packet to the receiving end in the following manner:

[0330] Add a check code after the data packet, and send the data packet with the check code added to the receiving end, so that the receiving end receives the data packet with the check code added and performs verification on the data packet based on the check code.

[0331] As can be seen from the above, in the solution provided by the embodiment of the present application, the sending end adds a check code to the data packet, and the receiving end checks the data packet based on the check code after receiving the data packet, so as to ensure the security and integrity of the data packet and prevent errors from occurring during the process of the data packet being sent from the sending end to the receiving end.

[0332] Corresponding to the foregoing data packet transmission method, an embodiment of the present application further provides a chip. The chip includes an electrical port, and the chip is used to execute the foregoing data packet electrical port transmission method.

[0333] As can be seen from the above, the chip in the embodiment of the present application adds different preset packet headers to different types of data packets. The chip sends a complete data packet to the receiving end without splitting the data packet, so there will be no problems existing when using the CPRI protocol to transmit data packets, thereby improving the utilization rate of electrical port transmission resources.

[0334] Corresponding to the foregoing data packet electrical port transmission system, an embodiment of the present application further provides a RE, and the RE includes any one of the foregoing data packet electrical port transmission systems.

[0335] As can be seen from the above, the sending end in the RE in the embodiment of the present application adds different preset packet headers to different types of data packets. The sending end sends a complete data packet to the receiving end without splitting the data packet, so there will be no problems existing when using the CPRI protocol to transmit data packets, thereby improving the utilization rate of electrical port transmission resources.

[0336] Corresponding to the foregoing data packet electrical port transmission system, an embodiment of the present application further provides a base station.

[0337] See Figure 17 , which is a schematic structural diagram of a base station provided by an embodiment of the present application, including a memory 1701, a RE 1702, and a processor 1703:

[0338] The memory 1701 is used to store computer programs; the RE 1702 includes any one of the foregoing data packet electrical port transmission systems; the processor 1703 is used to read the computer programs in the memory 1701 and control the operation of the base station.

[0339] Among them, in Figure 17Among them, the bus architecture may include any number of interconnected buses and bridges, which are specifically linked together by various circuits of one or more processors represented by the processor 1703 and the memory represented by the memory 1701. The bus architecture can also link together various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and will not be further described herein. The bus interface provides an interface. RE1702 provides a unit for communicating with various other devices on the transmission medium, and these transmission mediums include wireless channels, wired channels, optical fiber cables, and other transmission mediums. The processor 1703 is responsible for managing the bus architecture and general processing, and the memory 1701 can store the data used by the processor 1703 when performing operations.

[0340] The processor 1703 can be a central processing unit (CPU), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD), and the processor can also adopt a multi-core architecture.

[0341] As can be seen from the above, in the embodiment of the present application, the sending end in the RE of the base station adds different preset packet headers to different types of data packets. The sending end sends the complete data packet to the receiving end without splitting the data packet, so there will be no problems existing when transmitting data packets using the CPRI protocol, thereby improving the utilization rate of the electrical interface transmission resources.

[0342] The base stations involved in the embodiments of the present application may include multiple cells that provide services to terminals. Depending on specific application scenarios, the base station may also be referred to as an access point, or may be a device in the access network that communicates with wireless terminal devices through one or more sectors over the air interface, or other names. The network device can be used to mutually replace the received air frames and Internet Protocol (IP) packets, and act as a router between the wireless terminal device and the rest of the access network, where the rest of the access network may include an Internet Protocol (IP) communication network. The network device can also coordinate the management of the attributes of the air interface. For example, the network device involved in the embodiments of the present application may be a network device (Base Transceiver Station, BTS) in a Global System for Mobile Communications (GSM) or Code Division Multiple Access (CDMA), or a network device (NodeB) in a Wide-band Code Division Multiple Access (WCDMA), or an evolved network device (evolutional Node B, eNB or e-NodeB) in a Long Term Evolution (LTE) system, a 5G base station (gNB) in a 5G network architecture (next generation system), or a Home evolved Node B (HeNB), a relay node, a femto, a pico, etc. The embodiments of the present application do not limit this. In some network architectures, the network device may include a centralized unit (centralized unit, CU) node and a distributed unit (distributed unit, DU) node, and the centralized unit and the distributed unit may also be arranged separately geographically.

[0343] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0344] This application is described by referring to the flowcharts and / or block diagrams of systems and base stations according to the embodiments of this application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer-executable instructions. These computer-executable instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the functions specified in the process Figure 1 one process or multiple processes and / or blocks Figure 1 or the functions of the device specified in multiple blocks.

[0345] These processor-executable instructions can also be stored in a processor-readable memory that can guide a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the processor-readable memory generate a manufactured article including an instruction device, and the instruction device implements the functions specified in the process Figure 1 one process or multiple processes and / or blocks Figure 1 or the functions of the device specified in multiple blocks.

[0346] These processor-executable instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in the process Figure 1 one process or multiple processes and / or blocks Figure 1 or the functions of the device specified in multiple blocks.

[0347] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalent technologies, this application is also intended to include these modifications and variations.

Claims

1. A data packet electrical port transmission system, characterized in that: The system includes a transmitting end and a receiving end connected via an electrical port, wherein the transmitting end and the receiving end are data processing devices in a radio equipment RE in a base station; The sending end is used to obtain a data packet and add a preset packet header corresponding to the type of the data packet to the data packet; Sending the data packet with a preset header added to the receiving end, where the type of the data packet includes: a physical shared channel PSCH type; The receiving end is used to receive the data packet, buffer the data packet, and remove the preset packet header.

2. The system according to claim 1, wherein: The sending end is specifically configured to: When the current data transmission mode is the time domain mode, sending a first data packet of the PSCH time domain type with a preset packet header added to the receiving end; and / or In a case where the configured data transmission mode is the frequency domain mode, a second data packet of the PSCH frequency domain type with a preset packet header added thereto is sent to the receiving end according to a preset period.

3. The system according to claim 2, characterized in that When the configured data transmission mode is the frequency domain mode, the transmitting end is further configured to: A non-PSCH type data packet with a preset header is sent during a time period when the second data packet is not sent.

4. The system according to claim 3, characterized in that The non-PSCH type includes at least one of the following types: a long physical random access channel PRACH type, a short PRACH type, and an antenna calibration AC control word type, and the length of the data packet of the long PRACH type is greater than the length of the data packet of the short PRACH type.

5. The system according to claim 4, characterized in that The sending end is specifically used for: When the current PRACH transmission mode is the long PRACH mode, a long PRACH type data packet with a preset packet header added is sent to the receiving end in a first time period, wherein the first time period is: a preset time period for receiving PSCH frequency domain type data packets sent by the receiving end.

6. The system according to claim 4, characterized in that The sending end is specifically used for: When the current PRACH transmission mode is the short PRACH mode, a short PRACH type data packet with a preset header added is sent in an idle time period within the second time period, wherein the second time period is: a preset time period for sending PSCH frequency domain type data packets.

7. The system according to claim 4, wherein: In the case where the transmitting end sends uplink data, the non-PSCH type includes: a long PRACH type and / or a short PRACH type; In the case where the transmitting end sends downlink data, the non-PSCH type includes: an AC control word type.

8. The system according to claim 7, characterized in that When the transmitting end sends uplink data, the transmitting end is specifically configured to: When the configured data transmission mode is the frequency domain mode, a second data packet of the PSCH frequency domain type with a preset packet header added is sent to the receiving end according to a preset period, a non-PSCH type data packet with a preset packet header added is stored, and the stored non-PSCH type data packet with a preset packet header added is sent during the time period when the second data packet is not sent.

9. The system according to claim 8, characterized in that The sending end is specifically configured to: It is determined whether the remaining storage space of the transmitting end is greater than or equal to the data volume of the non-PSCH type data packet with the preset header added, and if so, the data packet is stored.

10. The system according to claim 4, wherein: The preset packet header corresponding to the PSCH frequency domain type includes at least one of the following information: A first identifier for indicating that the data packet is data or control information, a second identifier for indicating the type of base station in which the system is located, a third identifier for indicating the type of the data packet, an FDM identifier in the case where the PRACH channel supports frequency division multiplexing FDM, the lower 4 bits of the infinite frame number, the subframe number, the time slot number, the symbol identifier, the automatic gain control AGC factor of the fast Fourier transform FFT, the number of channels, the antenna count for serial transmission within the channel, the data payload length in the data packet, and a reserved field; and / or The preset packet header corresponding to the long PRACH type and / or the short PRACH type includes at least one of the following information: A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, the system frame number of the system frame in which the data packet is located, the half-frame number of the half-frame in which the data packet is located, the subframe number of the subframe in which the data packet is located, an identifier of the time slot in which the data packet is located, the number of PRACH time domain resources, the number of starting symbols of PRACH time domain resources, the AGC of each antenna in the channel, the first antenna number of the channel, an FDM identifier, and a reserved field; and / or The preset packet header corresponding to the PSCH time domain type includes at least one of the following information: A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, a data packet count within a preset time length, a data payload length in the data packet, and a reserved field; and / or The preset packet header corresponding to the AC control word type includes at least one of the following information: A first identifier used to indicate that the data packet is data or control information, a calibration type indicated by an AC control word, a second identifier used to indicate the base station type in which the system is located, a calibration switch field for each antenna, a transceiver sequence amplitude factor, a calibration enable bit and calibration sequence number for each antenna, and a reserved field.

11. The system according to any one of claims 1 to 10, characterized in that The sending end is specifically configured to: Converting the data packet with the preset header added thereto from an original type to a target data type, inserting a start control character before the data packet, inserting a stop control character after the data packet, inserting an idle control character during a time period when no data packet is transmitted, and sending data of the target data type after the control characters are inserted to the receiving end, wherein the target data type is a data type that can be transmitted between the sending end and the receiving end; The receiving end is specifically configured to: Convert the received data from the target data type to the original type, parse the data of the original type, determine the position of the start control character as the start position of the data packet, determine the position of the end control character as the end position of the data packet, and determine the position of the idle control character as the position of the untransmitted data packet.

12. The system according to any one of claims 1 to 10, characterized in that The receiving end is further configured to: Determining whether the information of the data packet is consistent with expected information, and if not, reporting an error, wherein the information of the data packet includes at least one of the following information: antenna number, packet number, length of the data packet, and type of the data packet; and / or If a read-write conflict occurs during the process of caching the data packet, an error is reported.

13. A data packet electrical port transmission method, characterized in that: Applied to a transmitting end, the transmitting end and the receiving end are connected via an electrical interface, and the transmitting end and the receiving end are data processing devices in a radio equipment RE in a base station, the method comprising: Get the data packet; Adding a preset packet header corresponding to the type of the data packet to the data packet, the type of the data packet including: a physical shared channel PSCH type; The data packet with the preset packet header added is sent to the receiving end.

14. The method according to claim 13, wherein: The sending the data packet with the preset header added thereto to the receiving end comprises: When the current data transmission mode is the time domain mode, sending a first data packet of the PSCH time domain type with a preset packet header added to the receiving end; and / or In a case where the configured data transmission mode is the frequency domain mode, a second data packet of the PSCH frequency domain type with a preset packet header added thereto is sent to the receiving end according to a preset period.

15. The method according to claim 14, characterized in that In the case where the configured data transmission mode is the frequency domain mode, the method further includes: A non-PSCH type data packet with a preset header is sent during a time period when the second data packet is not sent.

16. The method according to claim 15, characterized in that The non-PSCH type includes at least one of the following types: a long physical random access channel PRACH type, a short PRACH type, and an antenna calibration AC control word type, and the length of the data packet of the long PRACH type is greater than the length of the data packet of the short PRACH type.

17. The method according to claim 15, characterized in that The sending of a non-PSCH type data packet with a preset header added during a time period when the second data packet is not sent includes: When the current PRACH transmission mode is the long PRACH mode, a long PRACH type data packet with a preset packet header added is sent to the receiving end in a first time period, wherein the first time period is: a preset time period for receiving PSCH frequency domain type data packets sent by the receiving end.

18. The method according to claim 15, characterized in that The sending of a non-PSCH type data packet with a preset header added during a time period when the second data packet is not sent includes: When the current PRACH transmission mode is the short PRACH mode, a short PRACH type data packet with a preset header added is sent in an idle time period within the second time period, wherein the second time period is: a preset time period for sending PSCH frequency domain type data packets.

19. The method according to claim 15, characterized in that In the case where the transmitting end sends uplink data, the non-PSCH type includes: a long PRACH type and / or a short PRACH type; In the case where the transmitting end sends downlink data, the non-PSCH type includes: an AC control word type.

20. The method according to claim 19, characterized in that In a case where the transmitting end sends uplink data, sending a non-PSCH type data packet with a preset header added thereto during a time period when the second data packet is not sent includes: The non-PSCH type data packet with the preset header added thereto is stored, and the stored non-PSCH type data packet with the preset header added thereto is sent during a time period when the second data packet is not sent.

21. The method according to claim 20, characterized in that The storing of a non-PSCH type data packet with a preset header includes: It is determined whether the remaining storage space of the transmitting end is greater than or equal to the data volume of the non-PSCH type data packet with the preset header added, and if so, the data packet is stored.

22. The method according to claim 16, wherein The preset packet header corresponding to the PSCH frequency domain type includes at least one of the following information: A first identifier for indicating that the data packet is data or control information, a second identifier for indicating the type of base station in which the system is located, a third identifier for indicating the type of the data packet, an FDM identifier in the case where the PRACH channel supports frequency division multiplexing FDM, the lower 4 bits of the infinite frame number, the subframe number, the time slot number, the symbol identifier, the automatic gain control AGC factor of the fast Fourier transform FFT, the number of channels, the antenna count for serial transmission within the channel, the data payload length in the data packet, and a reserved field; and / or The preset packet header corresponding to the long PRACH type and / or the short PRACH type includes at least one of the following information: A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, the system frame number of the system frame in which the data packet is located, the half-frame number of the half-frame in which the data packet is located, the subframe number of the subframe in which the data packet is located, an identifier of the time slot in which the data packet is located, the number of PRACH time domain resources, the number of starting symbols of PRACH time domain resources, the AGC of each antenna in the channel, the first antenna number of the channel, an FDM identifier, and a reserved field; and / or The preset packet header corresponding to the PSCH time domain type includes at least one of the following information: A first identifier for indicating that the data packet is data or control information, a third identifier for indicating the type of the data packet, a data packet count within a preset time length, a data payload length in the data packet, and a reserved field; and / or The preset packet header corresponding to the AC control word type includes at least one of the following information: A first identifier used to indicate that the data packet is data or control information, a calibration type indicated by an AC control word, a second identifier used to indicate the base station type in which the system is located, a calibration switch field for each antenna, a transceiver sequence amplitude factor, a calibration enable bit and calibration sequence number for each antenna, and a reserved field.

23. The method according to any one of claims 13 to 22, characterized in that The sending end sends data to the receiving end in the following manner: Converting a data packet to which the preset packet header is added from an original type to a target data type, inserting a start control character before the data packet, inserting a stop control character after the data packet, and inserting an idle control character during a time period when no data packet is transmitted, so that the receiving end converts the received data from the target data type to the original type, parses the data of the original type, determines the position of the start control character as the starting position of the data packet, determines the position of the stop control character as the ending position of the data packet, and determines the position of the idle control character as the position of the data packet not transmitted; The target data type is a data type that can be transmitted between the sending end and the receiving end.

24. A chip, characterized in that: The chip includes an electrical port, and the chip is used to execute the data packet electrical port transmission method according to any one of claims 13 to 23.

25. A RE, characterized in that The radio equipment RE comprises the data packet electrical interface transmission system according to any one of claims 1 to 12.

26. A base station, characterized in that: include: Memory, Radio Equipment RE, Processor: A memory for storing a computer program; the RE comprises the data packet electrical port transmission system according to any one of claims 1 to 12; a processor for reading the computer program in the memory and controlling the operation of the base station.

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