Flip-chip light emitting diode and manufacturing method thereof

Abstract

The invention provides a manufacturing method of a flip-chip light-emitting diode. The manufacturing method comprises the following steps: providing a first substrate; performing an epitaxial process to form a semiconductor structure on the first substrate, wherein the semiconductor structure comprises a current conducting layer forming a bonding surface and defining a first electrode projection area and a second electrode projection area; performing a diffusion process towards the bonding surface by using a diffusion material so as to form at least one path region with high doping concentration in the current conducting layer; performing a bonding process to bond the second substrate on the bonding surface; and removing the first substrate and forming a first electrode and a second electrode on one side of the semiconductor structure adjacent to the first substrate. The position of the first electrode corresponds to the first electrode projection area, and the position of the second electrode corresponds to the second electrode projection area.

Description

Technical Field

[0001] The present invention relates to a flip-chip light emitting diode and a manufacturing method thereof, and in particular to a flip-chip light emitting diode and a manufacturing method thereof that can increase the light emitting area and reduce the current density. Background Art

[0002] like Figure 1 As shown, a conventional flip-chip LED 200 mainly arranges a P-metal electrode 210 and an N-metal electrode 220 below a semiconductor light-emitting structure 230 and a current-conducting layer 240 (i.e., toward the bottom of the figure), and covers a transparent substrate 250 above the current-conducting layer 240. When the P-metal electrode 210 and the N-metal electrode 220 are conductive, current can flow through the current-conducting layer 240 and drive the semiconductor light-emitting structure 230 to emit light, and finally the light passes through the transparent substrate 250 to achieve a luminous effect.

[0003] Figure 2 For oneself Figure 1 The top view of the transparent substrate 250 and the current conducting layer 240 is shown in FIG. 2 , wherein the dotted rectangular box on the left corresponds to Figure 1 The projection position 241 of the P metal electrode 210 is set in the figure, and the dotted rectangle on the right is the corresponding Figure 1 The projection position 242 of the N metal electrode 220 is set in FIG. Figure 1 and Figure 2 As shown, when the P metal electrode 210 and the N metal electrode 220 are conductive, the current transmission path is almost straight between the projection position 241 of the P metal electrode 210 and the projection position 242 of the N metal electrode 220, thus presenting the following Figure 2 The narrow, long, and narrow surface light source shown diverges. Even if the overall design of the light-emitting surface is changed or the area of the light-emitting surface is increased, the current will still be conducted along the shortest path, resulting in the same narrow, long surface light source, which will not improve the luminous efficiency. Furthermore, because the current is concentrated in a straight line between the projection position 241 of the P-metal electrode 210 and the projection position 242 of the N-metal electrode 220, the current density will be too high, which will easily cause problems such as overheating, poor electrostatic discharge, and excessive leakage.

[0004] Therefore, how to design a flip-chip light emitting diode and a manufacturing method thereof that can improve the above-mentioned problems is indeed a topic worth studying. Summary of the Invention

[0005] The object of the present invention is to provide a method for manufacturing a flip-chip light emitting diode which increases the light emitting area and reduces the current density.

[0006] Another object of the present invention is to provide a method for manufacturing a flip-chip light emitting diode that effectively improves heat dissipation and anti-static capability.

[0007] To achieve the above objectives, the present invention provides a method for manufacturing a flip-chip light-emitting diode, including the following steps: providing a first substrate; performing an epitaxial growth process to form a semiconductor structure on the first substrate, the semiconductor structure comprising, in order from a position adjacent to the first substrate, a first semiconductor epitaxial layer, a light-emitting layer, a second semiconductor epitaxial layer, and a current-conducting layer, wherein the current-conducting layer forms a junction surface and defines a first electrode projection area and a second electrode projection area; performing a diffusion process toward the junction surface using a diffusion material to form at least one path region with a high doping concentration within the current-conducting layer; performing a bonding process to cover and bond a second substrate to the junction surface; and removing the first substrate and forming a first electrode and a second electrode on a side of the semiconductor structure adjacent to the first substrate, wherein the first electrode is positioned corresponding to the first electrode projection area and is electrically connected to the first semiconductor epitaxial layer, and the second electrode is positioned corresponding to the second electrode projection area and is electrically connected to the current-conducting layer.

[0008] In one embodiment of the present invention, at least one path area is located at a position other than the shortest connection path between the first electrode projection area and the second electrode projection area.

[0009] In one embodiment of the present invention, the at least one path area is further located on the shortest connection path between the first electrode projection area and the second electrode projection area.

[0010] In one embodiment of the present invention, each path region is a square region, a strip region, a circular region, an elliptical region, a grid-shaped region, a dendritic-shaped region, or a radial-shaped region.

[0011] In one embodiment of the present invention, the doping concentration of each path region is 10 to 10 times the doping concentration of other regions of the current conducting layer outside the at least one path region. 3 times.

[0012] In one embodiment of the present invention, before performing the bonding process, at least one bonding material is coated on the bonding surface.

[0013] In one embodiment of the present invention, the diffusion material is selected from one of the following material groups: beryllium, magnesium, zinc, and iron.

[0014] In one embodiment of the present invention, the diffusion material is selected to be a material of the same type as the doping material of the current conducting layer.

[0015] In one embodiment of the present invention, the current conducting path formed by each path region has a resistance within a set range.

[0016] The present invention also includes a flip-chip light-emitting diode manufactured using the above-mentioned flip-chip light-emitting diode manufacturing method.

[0017] With this design, the flip-chip LED manufacturing method of the present invention forms at least one highly doped path region at a predetermined location within the current-conducting layer through a diffusion process. This facilitates current conduction through these paths, preventing excessive current density concentration and thereby increasing the light-emitting area and brightness of the resulting flip-chip LED. Furthermore, the flip-chip LED manufactured using the flip-chip LED manufacturing method of the present invention exhibits enhanced heat dissipation and anti-static properties. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 Schematic diagram of the structure of a traditional flip-chip light-emitting diode.

[0019] Figure 2 For example Figure 1 Schematic diagram of a traditional flip-chip light-emitting diode in a light-emitting state.

[0020] Figure 3 The flowchart of the manufacturing method of the flip-chip light emitting diode of the present invention is shown.

[0021] Figure 4 It is a schematic diagram of the manufacturing structure corresponding to each step in the manufacturing method of the flip-chip light emitting diode of the present invention.

[0022] Figure 5A A schematic diagram of a first embodiment of at least one path area planned according to the present invention.

[0023] Figure 5B A schematic diagram of a second embodiment of at least one path area planned according to the present invention.

[0024] Figure 5C A schematic diagram of a third embodiment of at least one path area planned according to the present invention.

[0025] Figure 6 The diagram is a structural diagram of a flip-chip light emitting diode manufactured by the method for manufacturing a flip-chip light emitting diode according to the present invention.

[0026] Description of Reference Numerals

[0027] 1…Flip-chip LED

[0028] 10…first substrate

[0029] 20…Semiconductor structure

[0030] 21…first semiconductor epitaxial layer

[0031] 22…luminescent layer

[0032] 23…Second semiconductor epitaxial layer

[0033] 24…current conducting layer

[0034] 24a…Joint surface

[0035] 30…Second substrate

[0036] 40…first electrode

[0037] 50…Second electrode

[0038] A1…first electrode projection area

[0039] A2…Second electrode projection area

[0040] M…Joint material

[0041] P…Path Area

[0042] S1~S5…steps

[0043] (Traditional Technology)

[0044] 200...Flip-chip LEDs

[0045] 210…P metal electrode

[0046] 220…N metal electrode

[0047] 230…Semiconductor light-emitting structure

[0048] 240…current conducting layer

[0049] 241, 242…projection position

[0050] 250...Transparent substrate. DETAILED DESCRIPTION

[0051] Since the various schemes and embodiments are merely illustrative and non-limiting, after reading this specification, a person with ordinary skill in the art may also devise other schemes and embodiments without departing from the scope of the present invention. The features and advantages of these embodiments will be further apparent according to the following detailed description and claims.

[0052] Herein, the terms "a" or "an" are used to describe elements and components described herein. This is merely for convenience of description and to provide a general sense of the scope of the present invention. Therefore, unless otherwise apparent, such descriptions should be understood to include one or at least one, and expressions in the singular also include the plural.

[0053] In this document, the terms "first" or "second" and similar ordinal numbers are primarily used to distinguish or refer to identical or similar elements or structures, and do not necessarily imply a spatial or temporal order of these elements or structures. It should be understood that in certain situations or configurations, ordinal numbers can be used interchangeably without affecting the practice of the present invention.

[0054] As used herein, the terms "including," "having," or any similar terms are intended to cover a non-exclusive inclusion. For example, a component or structure comprising multiple elements is not limited to only those elements listed herein but may include other elements not expressly listed but that are generally inherent to the component or structure.

[0055] Please refer to Figures 3 to 5A ,in Figure 3 is a flow chart of the method for manufacturing a flip-chip light-emitting diode according to the present invention, Figure 4 Schematic diagram of the structure corresponding to each step in the method for manufacturing a flip-chip light-emitting diode of the present invention. Figure 5A Schematic diagram of a first embodiment of at least one path area planned by the present invention. Figures 3 to 5A As shown, the method for manufacturing a flip-chip light-emitting diode of the present invention comprises the following steps:

[0056] Step S1: providing a first substrate.

[0057] First, the present invention provides a first substrate 10 as a temporary substrate for the flip-chip LED 1 of the present invention, supporting other components of the flip-chip LED 1. The first substrate 10 is a flat plate. In one embodiment, the first substrate 10 is a gallium arsenide (GaAs) substrate. However, the first substrate 10 may also be made of other semiconductor materials or commonly used substrate materials, and the present invention is not limited thereto.

[0058] Step S2: Perform an epitaxial process to form a semiconductor structure on the first substrate, wherein the semiconductor structure includes a first semiconductor epitaxial layer, a light-emitting layer, a second semiconductor epitaxial layer and a current conduction layer in sequence from adjacent to the first substrate, and the current conduction layer forms a bonding surface and defines a first electrode projection area and a second electrode projection area.

[0059] After providing the first substrate 10 in step S1, the present invention can then perform an epitaxial growth process on the first substrate 10 to form a semiconductor structure 20 on the first substrate 10. The semiconductor structure 20 is sequentially stacked with a first semiconductor epitaxial layer 21, a second semiconductor epitaxial layer 23, and a current conducting layer 24 through the epitaxial growth process starting from the portion adjacent to the first substrate 10. A light-emitting layer 22 is formed at the interface between the first semiconductor epitaxial layer 21 and the second semiconductor epitaxial layer 23, so that the semiconductor structure 20 primarily provides a conductive and then luminescent effect. In one embodiment of the present invention, the first semiconductor epitaxial layer 21 is formed of an N-type semiconductor material, such as N-type aluminum indium gallium phosphide (AlGaInP), the light-emitting layer 22 is a multiple-quantum well (MQW) layer, the second semiconductor epitaxial layer 23 is formed of a P-type semiconductor material, such as P-type aluminum indium gallium phosphide (AlGaInP), and the current conducting layer 24 is formed of P-type gallium phosphide (GaP) (e.g., doped with magnesium (Mg)). However, the materials of the layers of the semiconductor structure 20 are not limited to the aforementioned materials.

[0060] Because the current-conducting layer 24 is stacked on top of the semiconductor structure 20, the current-conducting layer 24 forms an exposed, large-area bonding surface 24a. In subsequent manufacturing processes, a first electrode 40 and a second electrode 50 are formed on the surface of the semiconductor structure 20 adjacent to the first substrate 10. Therefore, a first electrode projected area A1 is formed by extending from the location where the first electrode 40 is preformed along a straight line perpendicular to the surface of that side to correspond to the projection of the bonding surface 24a onto the current-conducting layer 24. Furthermore, a second electrode projected area A2 is formed by extending from the location where the second electrode 50 is preformed along a straight line perpendicular to the surface of that side to correspond to the projection of the bonding surface 24a onto the current-conducting layer 24. In one embodiment of the present invention, the cross-sections of the first and second electrodes 40, 50 parallel to the bonding surface 24a are rectangular, resulting in the first and second electrode projected areas A1 and A2 being rectangular regions, but the present invention is not limited thereto.

[0061] Step S3: performing a diffusion process toward the bonding surface using a diffusion material to form at least one path region with a high doping concentration in the current conducting layer.

[0062] After forming the semiconductor structure 20 in step S2, the present invention can then perform a diffusion process on the current conducting layer 24. The diffusion process primarily utilizes diffusion of a diffusion material toward the junction surface 24a of the current conducting layer 24, allowing the diffusion material to penetrate the junction surface 24a and be doped into the current conducting layer 24, thereby changing the doping concentration of the current conducting layer 24. The diffusion material is selected to be of the same type as the doping material of the current conducting layer 24. In one embodiment of the present invention, since the material of the current conducting layer 24 is P-type gallium phosphide, the diffusion material is selected from one of the following material groups: beryllium (Be), magnesium (Mg), zinc (Zn), and iron (Fe). However, other common P-type diffusion materials may also be used.

[0063] In the present invention, before performing the diffusion process, the area of the current conduction layer 24 where the doping concentration is to be changed can be planned in advance, so that after performing the diffusion process, at least one path area P with a high doping concentration is formed in the current conduction layer 24. Each path area P can be regarded as a current conduction path in a three-dimensional space. Since the conduction current of the traditional flip-chip light-emitting diode is mainly concentrated in the straight line connecting the two electrodes, the aforementioned at least one path area P can be planned to be located at other positions outside the shortest connection path of the first electrode projection area A1 and the second electrode projection area A2 (on both sides of the aforementioned shortest connection path). In other words, the aforementioned at least one path area P will be planned at a position where the conduction current of the traditional flip-chip light-emitting diode is less likely to pass through, so as to improve the problem of excessive concentration of the conduction current of the traditional flip-chip light-emitting diode. Since each path area P has a high doping concentration to reduce the impedance of the original material, each path area P can form a path where the current is more easily conducted, so that the current can be conducted through. In one embodiment of the present invention, the doping concentration of each path area P is 10 to 10 times the doping concentration of the current conduction layer 24 in other areas outside the at least one path area P. 3 The doping concentration of each path region P is greater than 1E+18atoms / cm 3 .

[0064] Each path area P can change its path length and shape according to different design requirements. In one embodiment of the present invention, each path area P is a square area, a long strip area, a circular area, an elliptical area, a curved area, a grid pattern area, a dendritic pattern area or a radial pattern area. Figure 5A In the description, each path region P is described as a curved region, but the present invention is not limited thereto.

[0065] Furthermore, the current conduction path formed by each path region P is designed to have a resistance within a predetermined range. That is, in the present invention, the resistance formed by any path region P is similar to the resistance formed by another path region P, and both are designed to fall within the same predetermined resistance range. This ensures that the resistance formed by any two path regions P will not differ significantly, allowing current to be conducted through these path regions P, achieving optimal current dispersion and preventing current from being excessively concentrated in any one path region P.

[0066] by Figure 5A For example, at least one path area P includes two curved areas, and is respectively located on both sides of the shortest connection path of the first electrode projection area A1 and the second electrode projection area A2. In the traditional design, the shortest connection path between the first electrode projection area A1 and the second electrode projection area A2 is short, while the paths on both sides are long and have higher resistance, so the current will choose the shortest path to be transmitted. The present invention sets the path area P through a diffusion process so that each path area P has a resistance within a set range (for example, the set range is the same as or similar to the resistance of the aforementioned shortest path). Therefore, when the current is transmitted, it will be dispersed through these path areas P and the aforementioned shortest path, thereby increasing the current passing area and increasing the luminous area and brightness.

[0067] Please refer to Figure 5B Schematic diagram of a second embodiment of at least one path area planned by the present invention. Figure 5B As shown, in this embodiment, if the resistance values of the path regions P located on both sides of the shortest path are much smaller than the resistance value of the shortest path, at least one path region P may be further located on the shortest connection path between the first electrode projection area A1 and the second electrode projection area A2, so that the resistance values of the path regions P are close to or similar to the resistance value of the aforementioned shortest path.

[0068] Please refer to Figure 5C FIG. 1 is a schematic diagram of a third embodiment of at least one path area planned by the present invention. Figure 5C As shown, in this embodiment, each path region P is a grid-shaped pattern region, so that the distribution range of each path region P covers the entire area of the current conducting layer 24 as much as possible, allowing current to pass through a larger area to increase the light-emitting area.

[0069] Step S4: performing a bonding process to bond the second substrate to the bonding surface.

[0070] After performing the diffusion process in step S3, the present invention can then perform a bonding process on the semiconductor structure 20 to cover and bond the second substrate 30 to the bonding surface 24a of the current conducting layer 24, thereby completing the bonding between the second substrate 30 and the semiconductor structure 20. In one embodiment of the present invention, the second substrate 30 is a sapphire substrate. However, the second substrate 30 can also be made of other transparent materials, and the present invention is not limited thereto.

[0071] To facilitate smooth bonding of the second substrate 30 to the bonding surface 24a of the current conducting layer 24, in one embodiment of the present invention, at least one bonding material M may be applied to the bonding surface 24a before the bonding process is performed. The at least one bonding material M is a viscous, colloid-like material. For example, the at least one bonding material M may be a laminated coating of silicon dioxide (SiO2) and aluminum oxide (Al2O3), but the present invention is not limited thereto.

[0072] Step S5: Remove the first substrate and form a first electrode and a second electrode on a side of the semiconductor structure adjacent to the first substrate, wherein the position of the first electrode corresponds to the first electrode projection area and is electrically connected to the first semiconductor epitaxial layer, and the position of the second electrode corresponds to the second electrode projection area and is electrically connected to the current conduction layer.

[0073] After performing the bonding process in the aforementioned step S4, the present invention can remove the first substrate 10 adjacent to the semiconductor structure 20, and then perform etching and electrode forming processes on the side of the semiconductor structure 20 originally adjacent to the first substrate 10 to form a first electrode 40 and a second electrode 50 on the semiconductor structure 20. The first electrode 40 is electrically connected to the first semiconductor epitaxial layer 21, and the position of the first electrode 40 corresponds to the aforementioned first electrode projection area A1; the second electrode 50 is electrically connected to the current conducting layer 24, and the position of the second electrode 50 corresponds to the aforementioned second electrode projection area A2. In one embodiment of the present invention, the first electrode 40 is an N-metal electrode, and the second electrode 50 is a P-metal electrode. Since the structural configuration of the first electrode 40 and the second electrode 50 is a common design of traditional flip-chip light-emitting diodes, they will not be described in detail here.

[0074] Accordingly, the flip-chip LED manufacturing method of the present invention can be applied to produce the flip-chip LED 1 of the present invention. When power is supplied to the first electrode 40 and the second electrode 50 of the flip-chip LED 1 of the present invention, current is transmitted through the second electrode 50 along at least one path region P designed in the current conducting layer 24, then through the light-emitting layer 22 to emit light, and finally to the first electrode 40. Light emitted by the light-emitting layer 22 is then emitted from the second substrate 30. Because the designed path region P allows current to flow through locations that would otherwise be difficult to conduct (such as the edge near the bonding surface 24a), the overall light-emitting area of the flip-chip LED 1 of the present invention is increased, and the current is evenly distributed throughout the current conducting layer 24, reducing current density and improving heat dissipation and anti-static capabilities.

[0075] Please refer to Figures 3 to 6 ,in Figure 6 Schematic diagram of a flip-chip light-emitting diode manufactured using the flip-chip light-emitting diode manufacturing method of the present invention. Figures 3 to 6 As shown, the present invention also includes a flip-chip LED 1 manufactured using the aforementioned flip-chip LED manufacturing method. During the manufacturing process, the flip-chip LED 1 of the present invention undergoes a diffusion process to form at least one path region P in the current conducting layer 24. Since the structural elements and functions of the flip-chip LED 1 of the present invention have been described in the aforementioned steps, they will not be further elaborated here.

[0076] The above embodiments are essentially only illustrative and are not intended to limit the embodiments of the subject matter of the application or the applications or uses of such embodiments. In addition, although at least one exemplary embodiment has been proposed in the aforementioned embodiments, it should be understood that the present invention is still subject to a large number of variations. It should also be understood that the embodiments described herein are not intended to limit the scope, use or configuration of the requested claims in any way. On the contrary, the aforementioned embodiments will provide a simple guide for those with ordinary knowledge in the art to implement one or more of the described embodiments. Furthermore, various changes can be made to the functions and arrangements of the components without departing from the scope defined by the claims, and the claims include known equivalents and all foreseeable equivalents at the time of filing this patent application.

Claims

1. A method for manufacturing a flip-chip light-emitting diode, comprising the following steps: providing a first substrate; Performing an epitaxial growth process to form a semiconductor structure on the first substrate, wherein the semiconductor structure includes, in order from adjacent to the first substrate, a first semiconductor epitaxial layer, a light-emitting layer, a second semiconductor epitaxial layer, and a current conducting layer, and the current conducting layer forms a junction surface and defines a first electrode projected area and a second electrode projected area; Performing a diffusion process toward the joint surface using a diffusion material to form at least one path region with a high doping concentration in the current conducting layer; performing a bonding process to bond a second substrate to the bonding surface; as well as The first substrate is removed and a first electrode and a second electrode are formed on a side of the semiconductor structure adjacent to the first substrate, wherein the position of the first electrode corresponds to the first electrode projection area and is electrically connected to the first semiconductor epitaxial layer, and the position of the second electrode corresponds to the second electrode projection area and is electrically connected to the current conduction layer. 2 . The method for manufacturing a flip-chip light emitting diode according to claim 1 , wherein the at least one path region is located at a position other than the shortest connection path between the first electrode projection region and the second electrode projection region. 3 . The method for manufacturing a flip-chip light emitting diode according to claim 2 , wherein the at least one path region is further located on a shortest connection path between the first electrode projection region and the second electrode projection region. 4 . The method for manufacturing a flip-chip light emitting diode according to claim 1 , wherein each of the path regions is a square region, a strip region, a circular region, an elliptical region, a curved region, a grid pattern region, a dendritic pattern region, or a radial pattern region.

5. The method for manufacturing a flip-chip light emitting diode according to claim 1 , wherein the doping concentration of each of the path regions is 10 to 10 times the doping concentration of other regions of the current conducting layer outside the at least one path region. 3 times. 6 . The method for manufacturing a flip-chip light emitting diode as claimed in claim 1 , wherein before performing the bonding process, at least one bonding material is coated on the bonding surface. 7 . The method for manufacturing a flip-chip light emitting diode as claimed in claim 1 , wherein the diffusion material is selected from one of the following material groups: beryllium, magnesium, zinc, and iron. 8 . The method for manufacturing a flip-chip light emitting diode as claimed in claim 1 , wherein the diffusion material is selected to be of the same type as the doping material of the current conducting layer. 9 . The method for manufacturing a flip-chip light emitting diode as claimed in claim 1 , wherein the current conducting path formed by each path region has a resistance within a set range.

10. A flip-chip light emitting diode manufactured by the method for manufacturing a flip-chip light emitting diode according to any one of claims 1 to 9.

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