Display panel and display device

Abstract

The invention provides a display panel and a display device, and relates to the technical field of display. The display panel comprises a substrate, the substrate comprises a virtual pixel area and a normal pixel area, and the virtual pixel area and the normal pixel area are arranged in the first direction; the display panel further comprises a first cathode auxiliary line and a second cathode auxiliary line, the first cathode auxiliary line comprises at least a part extending in the first direction, and the first cathode auxiliary line comprises a part located in the normal pixel area and a part located in the virtual pixel area; the second cathode auxiliary line comprises at least a part extending along a second direction, and the second direction is intersected with the first direction; the second cathode auxiliary line is located in the virtual pixel area, and the second cathode auxiliary line is coupled with the first cathode auxiliary line.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the continuous development of display technology, the application fields of display products are becoming increasingly extensive. By reducing the IR drop (voltage drop) of the functional film layer used to transmit signals within the display product, it is possible to reduce voltage loss, thereby better improving the power consumption of the display product and making the display product adaptable to the needs of more application scenarios.

[0003] The cathode layer in a display product provides a VSS signal to the light-emitting elements within each sub-pixel. Reducing the voltage drop in the cathode layer helps reduce the overall power consumption of the display panel. Therefore, how to better reduce the IR drop in the cathode layer has become a pressing technical issue. Summary of the Invention

[0004] An object of the present invention is to provide a display panel and a display device for reducing IR Drop of a cathode layer in a display product.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] A first aspect of the present invention provides a display panel, comprising a base substrate, the base substrate comprising a dummy pixel region and a normal pixel region, the dummy pixel region and the normal pixel region being arranged along a first direction; the display panel further comprising:

[0007] a first cathode auxiliary line, the first cathode auxiliary line including at least a portion extending along the first direction, the first cathode auxiliary line including a portion located in the normal pixel area and a portion located in the dummy pixel area;

[0008] The second cathode auxiliary line includes at least a portion extending along a second direction, the second direction intersecting the first direction; the second cathode auxiliary line is located in the virtual pixel area, and the second cathode auxiliary line is coupled to the first cathode auxiliary line.

[0009] Optionally, the first cathode auxiliary line includes a first cathode auxiliary portion and a second cathode auxiliary portion arranged along the first direction, the first cathode auxiliary portion includes at least a portion extending along the first direction, the second cathode auxiliary portion includes at least a portion extending along the first direction, the first cathode auxiliary portion is located in the dummy pixel area, and the second cathode auxiliary portion is at least located in the normal pixel area;

[0010] At least part of the orthographic projection of the second cathode auxiliary line on the base substrate is located between the orthographic projection of the first cathode auxiliary part and the orthographic projection of the second cathode auxiliary part on the base substrate, and the second cathode auxiliary line is coupled to the first cathode auxiliary part.

[0011] Optionally, the first cathode auxiliary line and the second cathode auxiliary line are provided in the same layer and made of the same material, and the second cathode auxiliary line and the first cathode auxiliary part form an integrated structure.

[0012] Optionally, the first cathode auxiliary portion and the second cathode auxiliary portion are arranged along the first direction, and the first cathode auxiliary portion and the second cathode auxiliary portion are coupled via a first switching pattern.

[0013] Optionally, the first end of the first switching pattern is coupled to an end of the first cathode auxiliary part away from the second cathode auxiliary line, and the second end of the first switching pattern is coupled to an end of the second cathode auxiliary part close to the second cathode auxiliary line.

[0014] Optionally, the first cathode auxiliary part and the second cathode auxiliary part are formed as an integral structure.

[0015] Optionally, the display panel further includes a virtual sub-pixel, the virtual sub-pixel being located in the virtual pixel region, the virtual sub-pixel including a virtual sub-pixel driving circuit, the virtual sub-pixel driving circuit including a driving transistor and a compensation transistor, a first electrode of the compensation transistor being coupled to a second electrode of the driving transistor, and the second electrode of the compensation transistor being coupled to a gate of the driving transistor via a second switching pattern;

[0016] The orthographic projection of the first switching pattern on the base substrate and the orthographic projection of the second switching pattern on the base substrate are arranged along the second direction.

[0017] Optionally, the first cathode auxiliary part and the second cathode auxiliary part are formed as an integral structure.

[0018] Optionally, the display panel further includes a first power bus and a plurality of power branches;

[0019] The first power bus extends along the second direction and is located on a side of the dummy pixel area away from the normal pixel area;

[0020] The multiple power branches are arranged along the second direction, and the power branches include a first power part and a second power part spaced apart along the first direction, and the first power part and the second power part extend along the first direction; the orthographic projection of the second cathode auxiliary line on the substrate is located between the orthographic projection of the first power part on the substrate and the orthographic projection of the second power part on the substrate, and the first power part and the second power part are coupled through a third switching pattern.

[0021] Optionally, the display panel further includes a first initialization compensation line; the display panel further includes a dummy sub-pixel, the dummy sub-pixel being located in the dummy pixel region, the dummy sub-pixel including a dummy sub-pixel driving circuit, the dummy sub-pixel driving circuit including a driving transistor and a first reset transistor, a first electrode of the first reset transistor being coupled to the first initialization compensation line, and a second electrode of the first reset transistor being coupled to a gate of the driving transistor;

[0022] The first initialization compensation line includes a first initialization part and a second initialization part spaced apart along the first direction, and the orthographic projection of the second cathode auxiliary line on the base substrate is located between the orthographic projection of the first initialization part on the base substrate and the orthographic projection of the second initialization part on the base substrate.

[0023] Optionally, the display panel further includes a second initialization compensation line; the display panel further includes a virtual sub-pixel, the virtual sub-pixel being located in the virtual pixel region, the virtual sub-pixel including a virtual sub-pixel driving circuit and a virtual light-emitting element, the virtual sub-pixel driving circuit including a second reset transistor, a first electrode of the second reset transistor being coupled to the second initialization compensation line, and a second electrode of the second reset transistor being coupled to an anode of the virtual light-emitting element;

[0024] The second initialization compensation line includes a third initialization part and a fourth initialization part spaced apart along the first direction, and the orthographic projection of the second cathode auxiliary line on the base substrate is located between the orthographic projection of the third initialization part on the base substrate and the orthographic projection of the fourth initialization part on the base substrate.

[0025] Optionally, the second cathode auxiliary line is a whole signal line extending along the second direction.

[0026] Optionally, the second cathode auxiliary line includes a plurality of second cathode auxiliary patterns sequentially arranged along the second direction, with a spacing area between adjacent second cathode auxiliary patterns; the second cathode auxiliary patterns are coupled to corresponding first cathode auxiliary portions;

[0027] At least a portion of the orthographic projection of the third switching pattern on the base substrate overlaps with the orthographic projection of the spacing area on the base substrate.

[0028] Optionally, the display panel further includes a first source-drain metal layer and a second source-drain metal layer stacked in sequence in a direction away from the base substrate, and the second transfer pattern, the first cathode auxiliary part, the second cathode auxiliary part and the second cathode auxiliary line included in the display panel are arranged in the same layer and material as the first source-drain metal layer; the first transfer pattern and the third transfer pattern included in the display panel are arranged in the same layer and material as the second source-drain metal layer.

[0029] Based on the technical solution of the above-mentioned display panel, a second aspect of the present invention provides a display device including the above-mentioned display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0031] Figure 1 A circuit schematic diagram of a sub-image driving circuit provided in an embodiment of the present invention;

[0032] Figure 2 A schematic cross-sectional view of a film layer of a display panel provided by an embodiment of the present invention;

[0033] Figure 3 A schematic diagram of the layout of the light shielding layer, the active layer, and the first gate metal layer in the display panel provided by an embodiment of the present invention;

[0034] Figure 4 For Figure 3 A schematic diagram of a layout with a second gate metal layer added on the basis of FIG.

[0035] Figure 5a A schematic diagram of a first layout of a first source-drain metal layer and a second source-drain metal layer in a display panel provided by an embodiment of the present invention;

[0036] Figure 5b for Figure 5a Schematic diagram of the layout of the second source and drain metal layer;

[0037] Figure 6 For Figure 4 On the basis of FIG5 , a schematic diagram of the layout of the membrane layer is added;

[0038] Figure 7 A second schematic diagram of the layout of the first source-drain metal layer and the second source-drain metal layer in the display panel provided by an embodiment of the present invention;

[0039] Figure 8 For Figure 4 On the basis of increase Figure 7 Schematic diagram of the membrane layer layout;

[0040] Figure 9 A third schematic diagram of the layout of the first source-drain metal layer and the second source-drain metal layer in the display panel provided by an embodiment of the present invention;

[0041] Figure 10 For Figure 4 On the basis of increase Figure 9 Schematic diagram of the membrane layer layout;

[0042] Figure 11 A fourth schematic diagram of the layout of the first source-drain metal layer and the second source-drain metal layer in the display panel provided by an embodiment of the present invention;

[0043] Figure 12 For Figure 4 On the basis of increase Figure 11 Schematic diagram of the membrane layer layout;

[0044] Figure 13a A fifth schematic diagram of the layout of the first source-drain metal layer and the second source-drain metal layer in the display panel provided by an embodiment of the present invention;

[0045] Figure 13b for Figure 13a Schematic diagram of the layout of the second source and drain metal layer;

[0046] Figure 14 For Figure 4 On the basis of FIG13 , a schematic diagram of the layout of the membrane layer is added. DETAILED DESCRIPTION

[0047] In order to further illustrate the display panel and the display device provided by the embodiments of the present invention, they are described in detail below with reference to the accompanying drawings.

[0048] See also Figures 5a to 14 An embodiment of the present invention provides a display panel, including a base substrate, wherein the base substrate includes a dummy pixel area 10 and a normal pixel area 20, wherein the dummy pixel area 10 and the normal pixel area 20 are arranged along a first direction; the display panel further includes:

[0049] a first cathode auxiliary line 30, wherein the first cathode auxiliary line 30 includes at least a portion extending along the first direction, and the first cathode auxiliary line 30 includes a portion located in the normal pixel area 20 and a portion located in the dummy pixel area 10;

[0050] The second cathode auxiliary line 40 includes at least a portion extending along a second direction, the second direction intersecting the first direction; the second cathode auxiliary line 40 is located in the virtual pixel area 10 , and the second cathode auxiliary line 40 is coupled to the first cathode auxiliary line 30 .

[0051] It should be noted that Figure 7 、 Figure 9 、 Figure 11 The layout diagram of the second source and drain metal layer in Figure 5b same.

[0052] Exemplarily, the base substrate includes a dummy pixel area 10 and a normal pixel area 20 , and the dummy pixel area 10 is close to the upper frame area of the display panel, but is not limited thereto.

[0053] Exemplarily, the virtual pixel area 10 includes a plurality of virtual sub-pixels, which are not used for display. For example, the virtual sub-pixels may include an anode layer but not a light-emitting functional layer, and the anode layer may not be connected to the underlying virtual sub-pixel driving circuit, but is not limited thereto. The normal pixel area 20 includes a plurality of normal sub-pixels, which are used for display.

[0054] Exemplarily, the virtual sub-pixel includes a virtual sub-pixel driving circuit, and the normal sub-pixel includes a normal sub-pixel driving circuit. The virtual sub-pixel driving circuit and the normal sub-pixel driving circuit adopt the same circuit structure, for example: adopting a 7T1C (i.e., including 7 transistors and 1 capacitor) circuit structure, an 8T1C (i.e., including 8 transistors and 1 capacitor) circuit structure, a 9T1C (i.e., including 9 transistors and 1 capacitor) circuit structure, etc., but not limited to this.

[0055] The specific circuit structures of the virtual sub-pixel driving circuit and the normal sub-pixel driving circuit are described below by taking the 7T1C circuit structure as an example.

[0056] like Figure 1 、 Figure 3 and Figure 4 As shown, the virtual sub-pixel driving circuit and the normal sub-pixel driving circuit include: a driving transistor T3, a first reset transistor T1, a second reset transistor T7, a compensation transistor T2, a data writing transistor T4, a power control transistor T5, a light emitting control transistor T6 and a storage capacitor Cst.

[0057] A gate of the first reset transistor T1 is coupled to the corresponding reset signal line Rst, a first electrode of the first reset transistor T1 is coupled to the corresponding first initialization signal line Vinit1, and a second electrode of the first reset transistor T1 is coupled to the gate of the driving transistor T3.

[0058] The gate of the compensation transistor T2 is coupled to the corresponding scan line GA, the first electrode of the compensation transistor T2 is coupled to the second electrode of the driving transistor T3 , and the second electrode of the compensation transistor T2 is coupled to the gate of the driving transistor T3 .

[0059] A gate of the data writing transistor T4 is coupled to the corresponding scan line GA, a first electrode of the data writing transistor T4 is coupled to the corresponding data line DA, and a second electrode of the data writing transistor T4 is coupled to the first electrode of the driving transistor T3.

[0060] The gate of the power control transistor T5 is coupled to the corresponding light emitting control signal line EM1, the first electrode of the power control transistor T5 is coupled to the corresponding power line VDD, and the second electrode of the power control transistor T5 is coupled to the first electrode of the driving transistor T3.

[0061] The gate of the light-emitting control transistor T6 is coupled to the corresponding light-emitting control signal line EM1, the first electrode of the light-emitting control transistor T6 is coupled to the second electrode of the driving transistor T3, and the second electrode of the light-emitting control transistor T6 is coupled to the anode of the corresponding light-emitting element. The cathode of the light-emitting element receives the VSS signal.

[0062] The gate of the second reset transistor T7 is coupled to the corresponding reset signal line Rst', the first electrode of the second reset transistor T7 is coupled to the second initialization signal line Vinit2, and the second electrode of the second reset transistor T7 is coupled to the anode of the light-emitting element. It is worth noting that the gate of the second reset transistor T7 in the current sub-pixel driving circuit can be coupled to the same reset signal line as the first reset transistor T1 in the sub-pixel driving circuit of the next adjacent row.

[0063] The first plate of the storage capacitor Cst is multiplexed as the gate of the third transistor T3 , and the second plate of the storage capacitor Cst is coupled to the power line VDD.

[0064] Exemplarily, the display panel includes a plurality of first cathode auxiliary lines 30, and the plurality of first cathode auxiliary lines 30 are arranged along a second direction, and each of the first cathode auxiliary lines 30 includes at least a portion extending along the first direction, and the second direction intersects with the first direction; for example: the first direction includes a longitudinal direction, and the second direction includes a transverse direction, but is not limited to this.

[0065] Exemplarily, the display panel includes at least one second cathode auxiliary line 40, and the second cathode auxiliary line 40 includes at least a portion extending along the second direction, for example: the second cathode auxiliary line 40 can extend from one side of the display panel along the second direction to the other side of the display panel along the second direction.

[0066] According to the specific structure of the above-mentioned display panel, the display panel provided in the embodiment of the present invention includes a first cathode auxiliary line 30 and a second cathode auxiliary line 40. The first cathode auxiliary line 30 and the second cathode auxiliary line 40 are arranged crosswise, and the first cathode auxiliary line 30 and the second cathode auxiliary line 40 are coupled. In this way, the first cathode auxiliary line 30 and the second cathode auxiliary line 40 can form a grid structure, and then the grid structure is coupled to the cathode layer in the display panel, which can effectively reduce the overall IR Drop of the cathode layer, thereby effectively reducing the overall power consumption of the display product.

[0067] Moreover, in the display panel provided by the embodiment of the present invention, the second cathode auxiliary line 40 is located in the virtual pixel area 10, so that the second cathode auxiliary line 40 does not occupy the layout space of the normal pixel area 20, thereby avoiding increasing the layout difficulty of the normal pixel area 20.

[0068] In addition, in the display panel provided by an embodiment of the present invention, the second cathode auxiliary line 40 is arranged in the virtual pixel area 10, so that the second cathode auxiliary line 40 is close to the edge area of the display panel. Since ESD is prone to occur in the edge area of the display panel, this setting method helps to reduce ESD risks and improve the competitiveness of display products.

[0069] like Figures 5a to 14 As shown, in some embodiments, the first cathode auxiliary line 30 includes a first cathode auxiliary portion 301 and a second cathode auxiliary portion 302 arranged along the first direction, the first cathode auxiliary portion 301 includes at least a portion extending along the first direction, the second cathode auxiliary portion 302 includes at least a portion extending along the first direction, the first cathode auxiliary portion 301 is located in the dummy pixel area 10, and the second cathode auxiliary portion 302 is at least located in the normal pixel area 20;

[0070] At least part of the orthographic projection of the second cathode auxiliary line 40 on the base substrate is located between the orthographic projection of the first cathode auxiliary part 301 on the base substrate and the orthographic projection of the second cathode auxiliary part 302 on the base substrate, and the second cathode auxiliary line 40 is coupled to the first cathode auxiliary part 301.

[0071] For example, Figure 5a and Figure 7As shown, the first cathode auxiliary portion 301 and the second cathode auxiliary portion 302 are spaced apart along the first direction, that is, there is a spaced area between the first cathode auxiliary portion 301 and the second cathode auxiliary portion 302; or Figure 9 、 Figure 11 and Figure 13a As shown, the first cathode auxiliary part 301 and the second cathode auxiliary part 302 are arranged along the first direction, and the first cathode auxiliary part 301 and the second cathode auxiliary part 302 form an integrated structure, that is, there is no spacing area between the first cathode auxiliary part 301 and the second cathode auxiliary part 302.

[0072] Exemplarily, the second cathode auxiliary portion 302 is at least located in the normal pixel area 20 , that is, the second cathode auxiliary portion 302 may be located only in the normal pixel area 20 , or may extend from the normal pixel area 20 to the dummy pixel area 10 .

[0073] Exemplarily, the display panel also includes a cathode layer and a cathode bus, and the cathode bus is located in the border area of the display panel. For example, the cathode bus extends along the border area of the display panel, and the cathode bus may include two ends and a middle part located between the two ends, the two ends are located at the lower border of the display panel for receiving the cathode signal, and the middle part extends along the left border, upper border and right border of the display panel; the cathode layer is coupled to the cathode bus.

[0074] Exemplarily, the second cathode auxiliary line 40 is coupled to the cathode bus lines located at the left frame and the right frame; the first cathode auxiliary part 301 is coupled to the cathode bus line located at the upper frame.

[0075] Exemplarily, the first cathode auxiliary line 30 and the second cathode auxiliary line 40 are provided in the same layer and the same material, and the second cathode auxiliary line 40 forms an integral structure with the first cathode auxiliary part 301. For example, the first cathode auxiliary line 30 and the second cathode auxiliary line 40 are provided in the same layer and the same material as the first source / drain metal layer in the display panel. Since the first source / drain metal layer has a relatively small film resistance, this arrangement is not only conducive to reducing the resistance of the first cathode auxiliary line 30 and the second cathode auxiliary line 40, further improving IR Drop, but also enables the first cathode auxiliary line 30 and the second cathode auxiliary line 40 to be formed simultaneously with the first source / drain metal layer in the same patterning process, effectively simplifying the manufacturing process of the display panel and reducing the manufacturing cost of the display panel.

[0076] At least a portion of the orthographic projection of the second cathode auxiliary line 40 on the substrate is positioned between the orthographic projection of the first cathode auxiliary portion 301 and the orthographic projection of the second cathode auxiliary portion 302 on the substrate, and the second cathode auxiliary line 40 is coupled to the first cathode auxiliary portion 301. This allows both the second cathode auxiliary line 40 and the first cathode auxiliary portion 301 to be arranged in the virtual pixel area 10 without affecting the layout of the normal pixel area 20. Furthermore, this ensures that both the second cathode auxiliary line 40 and the first cathode auxiliary portion 301 can be coupled to the cathode bus. Furthermore, the second cathode auxiliary portion 302 can extend along the first direction within the normal pixel area 20 and can be coupled to the first cathode auxiliary portion 301 by direct coupling or switching, thereby improving IR drop in sight.

[0077] like Figures 5a to 12 As shown, in some embodiments, the first cathode auxiliary portion 301 and the second cathode auxiliary portion 302 are arranged along the first direction, and the first cathode auxiliary portion 301 and the second cathode auxiliary portion 302 are coupled via a first switching pattern 51 .

[0078] Illustratively, the first cathode auxiliary portion 301 and the second cathode auxiliary portion 302 are arranged at intervals along the first direction.

[0079] Exemplarily, the display panel also includes a virtual sub-pixel, which is located in the virtual pixel area 10. The virtual sub-pixel includes a virtual sub-pixel driving circuit, and the virtual sub-pixel driving circuit includes a driving transistor and a compensation transistor. The first pole of the compensation transistor is coupled to the second pole of the driving transistor, and the second pole of the compensation transistor is coupled to the gate of the driving transistor through a second switching pattern 52; the orthographic projection of the first switching pattern 51 on the base substrate and the orthographic projection of the second switching pattern 52 on the base substrate are arranged along the second direction.

[0080] Exemplarily, the first end 51a of the first transition graphic 51 is coupled to the end of the first cathode auxiliary part 301 away from the second cathode auxiliary line 40 (e.g., through the first via Via1), and the second end 51b of the first transition graphic 51 is coupled to the end of the second cathode auxiliary part 302 close to the second cathode auxiliary line 40 (e.g., through the second via Via2). Since the end of the first cathode auxiliary part 301 away from the second cathode auxiliary line 40 is closer to the edge of the virtual pixel area 10, by setting the first end of the first transition graphic 51 to be coupled to the end of the first cathode auxiliary part 301 away from the second cathode auxiliary line 40, the coupling position is closer to the edge of the virtual pixel area 10. Since the edge of the virtual pixel area 10 has a larger available layout space, this helps to reduce the layout difficulty of the connection when the two are coupled through vias.

[0081] Similarly, since the end of the second cathode auxiliary part 302 close to the second cathode auxiliary line 40 can be as far away from the normal pixel area 20 as possible, by setting the second end of the first transfer graphic 51 to be coupled with the end of the second cathode auxiliary part 302 close to the second cathode auxiliary line 40, the coupling position can be as far away from the normal pixel area 20 as possible, which is beneficial to reducing the layout difficulty of the connection when the two are coupled through vias.

[0082] Exemplarily, one end of the first cathode auxiliary portion 301 away from the second cathode auxiliary line 40 is coupled to the cathode bus through a first conductive connection portion 54 . The first conductive connection portion 54 can be provided in the same layer and material as the second source / drain metal layer.

[0083] The above arrangement couples the first cathode auxiliary portion 301 and the second cathode auxiliary portion 302 via the first adapter pattern 51, thereby enabling cathode signal access to the second cathode auxiliary portion 302. Furthermore, by providing the first adapter pattern 51 on different layers from the first cathode auxiliary portion 301 and the second cathode auxiliary portion 302, compared to directly forming the first cathode auxiliary portion 301 and the second cathode auxiliary portion 302 as an integrated structure, it is possible to reduce layout difficulty while ensuring connection performance.

[0084] like Figures 9 to 12 As shown, in some embodiments, the first cathode auxiliary part 301 and the second cathode auxiliary part 302 are arranged along the first direction, and the first cathode auxiliary part 301 and the second cathode auxiliary part 302 are coupled to each other through a first transition pattern 51; at the same time, the first cathode auxiliary part 301 and the second cathode auxiliary part 302 form an integrated structure.

[0085] This configuration allows the first cathode auxiliary part 301 and the second cathode auxiliary part 302 to be connected in two ways: one is a direct connection of an integral structure, and the other is an indirect connection through the first transition pattern 51 , which helps to further reduce the IR Drop of the entire cathode layer.

[0086] like Figures 9 to 14 As shown, in some embodiments, the first cathode auxiliary part 301 and the second cathode auxiliary part 302 are formed into an integral structure. This configuration not only ensures the connection performance between the first cathode auxiliary part 301 and the second cathode auxiliary part 302, but also helps to reduce the IR drop of the entire cathode layer.

[0087] like Figures 5a to 14 As shown, in some embodiments, the display panel further includes a first power bus VDD1 and a plurality of power branch lines VDD2;

[0088] The first power bus VDD1 extends along the second direction and is located on a side of the dummy pixel area 10 away from the normal pixel area 20;

[0089] The multiple power supply branches VDD2 are arranged along the second direction, and the power supply branch line VDD2 includes a first power supply part VDD21 and a second power supply part VDD22 arranged at intervals along the first direction, and the first power supply part VDD21 and the second power supply part VDD22 extend along the first direction; the orthographic projection of the second cathode auxiliary line 40 on the substrate is located between the orthographic projection of the first power supply part VDD21 on the substrate and the orthographic projection of the second power supply part VDD22 on the substrate, and the first power supply part VDD21 and the second power supply part VDD22 are coupled through a third switching graphic 53.

[0090] like Figure 5a As shown, the third transfer pattern 53 is coupled to the first power supply part VDD21 through the third via Via3, and the third transfer pattern 53 is coupled to the second power supply part VDD22 through the fourth via Via4.

[0091] Exemplarily, the first power bus VDD1 and the power branch line VDD2 are both provided in the same layer and with the same material as the first source / drain metal layer.

[0092] The above configuration can avoid a short circuit between the power branch line VDD2 and the second cathode auxiliary line 40 .

[0093] like Figure 1 、 Figures 5a to 14As shown, in some embodiments, the display panel further includes a first initialization compensation line V1; the display panel further includes a virtual sub-pixel, the virtual sub-pixel is located in the virtual pixel area 10, the virtual sub-pixel includes a virtual sub-pixel driving circuit, the virtual sub-pixel driving circuit includes a driving transistor and a first reset transistor T1, a first electrode of the first reset transistor T1 is coupled to the first initialization compensation line V1, and a second electrode of the first reset transistor T1 is coupled to the gate of the driving transistor;

[0094] The first initialization compensation line V1 includes a first initialization part V11 and a second initialization part V12 spaced apart along the first direction, and the orthographic projection of the second cathode auxiliary line 40 on the base substrate is located between the orthographic projection of the first initialization part V11 on the base substrate and the orthographic projection of the second initialization part V12 on the base substrate.

[0095] Exemplarily, the display panel further includes a plurality of first initialization signal lines Vinit1, the first initialization signal lines Vinit1 extending along the second direction, the first initialization compensation lines V1 being coupled to at least part of the first initialization signal lines Vinit1 respectively to form a grid structure for transmitting the first initialization signal.

[0096] Exemplarily, a first electrode of the first reset transistor T1 is coupled to a corresponding first initialization signal line Vinit1 .

[0097] Exemplarily, the first initialization compensation line V1 and the first source / drain metal layer are provided in the same layer and with the same material.

[0098] The above configuration can prevent a short circuit between the first initialization compensation line V1 and the second cathode auxiliary line 40 .

[0099] like Figure 1 、 Figures 5a to 14 As shown, in some embodiments, the display panel further includes a second initialization compensation line V2; the display panel further includes a virtual sub-pixel, the virtual sub-pixel is located in the virtual pixel area 10, the virtual sub-pixel includes a virtual sub-pixel driving circuit and a virtual light-emitting element, the virtual sub-pixel driving circuit includes a second reset transistor T7, a first electrode of the second reset transistor T7 is coupled to the second initialization compensation line V2, and a second electrode of the second reset transistor T7 is coupled to the anode of the virtual light-emitting element;

[0100] The second initialization compensation line V2 includes a third initialization part V21 and a fourth initialization part V22 spaced apart along the first direction, and the orthographic projection of the second cathode auxiliary line 40 on the base substrate is located between the orthographic projection of the third initialization part V21 on the base substrate and the orthographic projection of the fourth initialization part V22 on the base substrate.

[0101] Exemplarily, the display panel further includes a plurality of second initialization signal lines Vinit2, the second initialization signal lines Vinit2 extend along the second direction, and the second initialization compensation lines V2 are respectively coupled to at least part of the second initialization signal lines Vinit2 to form a grid structure for transmitting the second initialization signal.

[0102] Exemplarily, a first electrode of the second reset transistor T7 is coupled to the corresponding second initialization signal line Vinit2.

[0103] Exemplarily, the second initialization compensation line V2 is provided in the same layer and with the same material as the first source / drain metal layer.

[0104] Exemplarily, the second initialization compensation line V2 , the first cathode auxiliary line 30 , the first initialization compensation line V1 , and the first cathode auxiliary line 30 are sequentially arranged in a cyclic manner along the second direction.

[0105] The above configuration can prevent a short circuit between the second initialization compensation line V2 and the second cathode auxiliary line 40 .

[0106] like Figure 7 、 Figure 8 、 Figures 11 to 14 As shown, in some embodiments, the second cathode auxiliary line 40 is a whole signal line extending along the second direction. This configuration is beneficial to reducing the IR Drop of the entire cathode layer.

[0107] like Figure 5a 、 Figure 6 、 Figure 9 and Figure 10 As shown, in some embodiments, the second cathode auxiliary line 40 includes a plurality of second cathode auxiliary graphics 401 arranged in sequence along the second direction, with a spacing area between adjacent second cathode auxiliary graphics 401; the second cathode auxiliary graphics 401 are coupled to the corresponding first cathode auxiliary part 301.

[0108] Illustratively, at least a portion of the orthographic projection of the third switching pattern 53 on the base substrate overlaps with the orthographic projection of the spacing region on the base substrate.

[0109] This arrangement is beneficial for reducing the parasitic capacitance formed between the second cathode auxiliary line 40 and the third transfer pattern 53, that is, it is beneficial for reducing the parasitic capacitance formed between the second cathode auxiliary line 40 and the power branch line VDD2, thereby effectively reducing the IR Drop of the entire cathode layer and the IR Drop of the entire power layer (including the power bus and the power branch line VDD2).

[0110] In some embodiments, the display panel also includes a first source-drain metal layer and a second source-drain metal layer stacked in sequence in a direction away from the base substrate, and the second switching pattern 52, the first cathode auxiliary part 301, the second cathode auxiliary part 302 and the second cathode auxiliary line 40 are arranged in the same layer and material as the first source-drain metal layer; the first switching pattern 51 and the third switching pattern 53 included in the display panel are arranged in the same layer and material as the second source-drain metal layer.

[0111] like Figure 2 As shown, exemplarily, the display panel includes a buffer layer BF, an active layer poly, a first gate insulating layer GI1, a first gate metal layer gate1, a second gate insulating layer GI2, a second gate metal layer gate2, an interlayer insulating layer ILD, a first source / drain metal layer SD1, a first planarizing layer PLN1, a second source / drain metal layer SD2, a second planarizing layer PLN2, an anode layer ANO, a pixel defining layer PDL, a light-emitting functional layer EL, a cathode layer cath, a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP, and a second inorganic encapsulation layer CVD2, which are sequentially stacked in a direction away from the base substrate 70. The display substrate may further include a passivation layer PVX, but is not limited thereto.

[0112] Exemplarily, the data line DA and the first conductive connection portion 54 in the display panel are both provided in the same layer and made of the same material as the second source / drain metal layer. The first initialization compensation line V1, the second initialization compensation line V2, the first power bus VDD1, and the power branch line VDD2 are also provided in the same layer and made of the same material as the first source / drain metal layer.

[0113] Because both the first source-drain metal layer and the second source-drain metal layer have relatively low film resistance, the above arrangement facilitates reducing the resistance of the first cathode auxiliary portion 301, the second cathode auxiliary portion 302, the second cathode auxiliary line 40, the first transfer pattern 51, the second transfer pattern 52, and the third transfer pattern 53. Furthermore, the above arrangement enables the second transfer pattern 52, the first cathode auxiliary portion 301, the second cathode auxiliary portion 302, and the second cathode auxiliary line 40 to be formed simultaneously with the first source-drain metal layer in the same patterning process. Consequently, the first transfer pattern 51 and the third transfer pattern 53 included in the display panel can be formed simultaneously with the second source-drain metal layer in the same patterning process, thereby simplifying the display panel manufacturing process and reducing the display panel manufacturing cost.

[0114] In some embodiments, the display panel also includes a first source-drain metal layer and a second source-drain metal layer stacked in sequence in a direction away from the base substrate, and the second transfer pattern, the first cathode auxiliary part, the second cathode auxiliary part and the second cathode auxiliary line are all arranged in the same layer and material as the second source-drain metal layer; the first transfer pattern and the third transfer pattern included in the display panel are both arranged in the same layer and material as the first source-drain metal layer.

[0115] The above-mentioned setting method enables the second transfer pattern, the first cathode auxiliary part, the second cathode auxiliary part and the second cathode auxiliary line to be formed simultaneously with the second source-drain metal layer in the same composition process, so that the first transfer pattern and the third transfer pattern included in the display panel can be formed simultaneously with the first source-drain metal layer in the same composition process, thereby simplifying the manufacturing process flow of the display panel and reducing the manufacturing cost of the display panel.

[0116] An embodiment of the present invention further provides a display device, comprising the display panel provided by the above embodiment.

[0117] It should be noted that the display device can be any product or component with a display function, such as a television, a monitor, a digital photo frame, a mobile phone, a tablet computer, etc., wherein the display device also includes a flexible circuit board, a printed circuit board and a backplane.

[0118] The display panel provided in the above embodiment includes a first cathode auxiliary line 30 and a second cathode auxiliary line 40. The first cathode auxiliary line 30 and the second cathode auxiliary line 40 are arranged crosswise, and the first cathode auxiliary line 30 and the second cathode auxiliary line 40 are coupled. In this way, the first cathode auxiliary line 30 and the second cathode auxiliary line 40 can form a grid structure, and then the grid structure is coupled to the cathode layer in the display panel, which can effectively reduce the overall IR Drop of the cathode layer, thereby effectively reducing the overall power consumption of the display product.

[0119] In the display panel provided by the above embodiment, the second cathode auxiliary line 40 is located in the virtual pixel area 10 so that the second cathode auxiliary line 40 does not occupy the layout space of the normal pixel area 20 , thereby avoiding increasing the layout difficulty of the normal pixel area 20 .

[0120] In the display panel provided in the above embodiment, the second cathode auxiliary line 40 is arranged in the virtual pixel area 10, so that the second cathode auxiliary line 40 is close to the edge area of the display panel. Since ESD is prone to occur in the edge area of the display panel, this setting method helps to reduce ESD risks and improve the competitiveness of display products.

[0121] Therefore, the display device provided by the embodiment of the present invention also has the above-mentioned beneficial effects when it includes the above-mentioned display panel, which will not be described in detail here.

[0122] It should be noted that the signal line extends along a certain direction means that: the signal line includes a main part and a secondary part connected to the main part, the main part is a line, a line segment or a strip-shaped body, the main part extends along a certain direction, and the length of the main part extended along the certain direction is greater than the length of the secondary part extended along other directions.

[0123] It should be noted that in the embodiments of the present invention, "the same layer" may refer to film layers on the same structural layer. Alternatively, for example, the film layers on the same layer may be formed using the same film-forming process to form a specific pattern, and then patterned using the same mask through a single patterning process to form the film layer. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the resulting layer structure may be continuous or discontinuous. These specific patterns may also be at different heights or have different thicknesses.

[0124] In the various method embodiments of the present invention, the serial numbers of the steps cannot be used to limit the order of the steps. For ordinary technicians in this field, without paying any creative work, changes to the order of the steps are also within the scope of protection of the present invention.

[0125] It should be noted that the various embodiments in this specification are described in a progressive manner. Similar parts between the various embodiments can be referred to in conjunction with each other. Each embodiment focuses on the differences from other embodiments. In particular, the method embodiments are described briefly because they are generally similar to the product embodiments. For relevant parts, refer to the description of the product embodiments.

[0126] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which the invention belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect", "couple" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0127] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” or “under” another element, it can be “directly on” or “under” the other element or intervening elements may be present.

[0128] In the description of the above embodiments, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0129] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A display panel, characterized in that: The display panel includes a base substrate, the base substrate includes a dummy pixel area and a normal pixel area, and the dummy pixel area and the normal pixel area are arranged along a first direction; the display panel further includes: a first cathode auxiliary line, the first cathode auxiliary line including at least a portion extending along the first direction, the first cathode auxiliary line including a portion located in the normal pixel area and a portion located in the dummy pixel area; The second cathode auxiliary line includes at least a portion extending along a second direction, the second direction intersecting the first direction; the second cathode auxiliary line is located in the virtual pixel area, and the second cathode auxiliary line is coupled to the first cathode auxiliary line.

2. The display panel according to claim 1, wherein: The first cathode auxiliary line includes a first cathode auxiliary portion and a second cathode auxiliary portion arranged along the first direction, the first cathode auxiliary portion includes at least a portion extending along the first direction, the second cathode auxiliary portion includes at least a portion extending along the first direction, the first cathode auxiliary portion is located in the dummy pixel area, and the second cathode auxiliary portion is at least located in the normal pixel area; At least part of the orthographic projection of the second cathode auxiliary line on the base substrate is located between the orthographic projection of the first cathode auxiliary part and the orthographic projection of the second cathode auxiliary part on the base substrate, and the second cathode auxiliary line is coupled to the first cathode auxiliary part.

3. The display panel according to claim 2, wherein: The first cathode auxiliary line and the second cathode auxiliary line are provided in the same layer and made of the same material, and the second cathode auxiliary line and the first cathode auxiliary part form an integrated structure.

4. The display panel according to claim 2, wherein: The first cathode auxiliary portion and the second cathode auxiliary portion are arranged along the first direction, and the first cathode auxiliary portion and the second cathode auxiliary portion are coupled via a first switching pattern.

5. The display panel according to claim 4, wherein: The first end of the first switching pattern is coupled to an end of the first cathode auxiliary portion away from the second cathode auxiliary line, and the second end of the first switching pattern is coupled to an end of the second cathode auxiliary portion close to the second cathode auxiliary line.

6. The display panel according to claim 4, wherein: The first cathode auxiliary portion and the second cathode auxiliary portion are formed as an integral structure.

7. The display panel according to claim 4, wherein: The display panel further includes a dummy sub-pixel, the dummy sub-pixel being located in the dummy pixel region, the dummy sub-pixel including a dummy sub-pixel driving circuit, the dummy sub-pixel driving circuit including a driving transistor and a compensation transistor, a first electrode of the compensation transistor being coupled to a second electrode of the driving transistor, and the second electrode of the compensation transistor being coupled to a gate of the driving transistor via a second switching pattern; The orthographic projection of the first switching pattern on the base substrate and the orthographic projection of the second switching pattern on the base substrate are arranged along the second direction.

8. The display panel according to claim 2, wherein: The first cathode auxiliary portion and the second cathode auxiliary portion are formed as an integral structure.

9. The display panel according to any one of claims 2 to 8, wherein: The display panel further comprises a first power bus and a plurality of power branches; The first power bus extends along the second direction and is located on a side of the dummy pixel area away from the normal pixel area; The plurality of power supply branches are arranged along the second direction, the power supply branches include a first power supply portion and a second power supply portion spaced apart along the first direction, and the first power supply portion and the second power supply portion extend along the first direction; The orthographic projection of the second cathode auxiliary line on the base substrate is located between the orthographic projection of the first power supply part on the base substrate and the orthographic projection of the second power supply part on the base substrate, and the first power supply part and the second power supply part are coupled through a third switching pattern.

10. The display panel according to any one of claims 2 to 8, wherein: The display panel further includes a first initialization compensation line; the display panel further includes a dummy sub-pixel, the dummy sub-pixel being located in the dummy pixel region, the dummy sub-pixel including a dummy sub-pixel driving circuit, the dummy sub-pixel driving circuit including a driving transistor and a first reset transistor, a first electrode of the first reset transistor being coupled to the first initialization compensation line, and a second electrode of the first reset transistor being coupled to a gate of the driving transistor; The first initialization compensation line includes a first initialization part and a second initialization part spaced apart along the first direction, and the orthographic projection of the second cathode auxiliary line on the base substrate is located between the orthographic projection of the first initialization part on the base substrate and the orthographic projection of the second initialization part on the base substrate.

11. The display panel according to any one of claims 2 to 8, wherein: The display panel further includes a second initialization compensation line; the display panel further includes a dummy sub-pixel, the dummy sub-pixel being located in the dummy pixel region, the dummy sub-pixel including a dummy sub-pixel driving circuit and a dummy light-emitting element, the dummy sub-pixel driving circuit including a second reset transistor, a first electrode of the second reset transistor being coupled to the second initialization compensation line, and a second electrode of the second reset transistor being coupled to an anode of the dummy light-emitting element; The second initialization compensation line includes a third initialization part and a fourth initialization part spaced apart along the first direction, and the orthographic projection of the second cathode auxiliary line on the base substrate is located between the orthographic projection of the third initialization part on the base substrate and the orthographic projection of the fourth initialization part on the base substrate.

12. The display panel according to any one of claims 1 to 8, wherein: The second cathode auxiliary line is a whole signal line extending along the second direction.

13. The display panel according to claim 9, wherein: The second cathode auxiliary line includes a plurality of second cathode auxiliary patterns sequentially arranged along the second direction, with a spacing area between adjacent second cathode auxiliary patterns; the second cathode auxiliary patterns are coupled to corresponding first cathode auxiliary portions; At least a portion of the orthographic projection of the third switching pattern on the base substrate overlaps with the orthographic projection of the spacing area on the base substrate.

14. The display panel according to claim 9, wherein: The display panel also includes a first source-drain metal layer and a second source-drain metal layer stacked in sequence in a direction away from the base substrate, and the second transfer pattern, the first cathode auxiliary part, the second cathode auxiliary part and the second cathode auxiliary line included in the display panel are arranged in the same layer and material as the first source-drain metal layer; the first transfer pattern and the third transfer pattern included in the display panel are arranged in the same layer and material as the second source-drain metal layer.

15. A display device, characterized in that: The display panel comprises the display panel according to any one of claims 1 to 14.

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