Display device

Abstract

A display device according to an embodiment of the present disclosure may include: a substrate; a first protective layer on the substrate; a first insulating layer on the first protective layer; a second insulating layer on the first protective layer and disposed on one side of the first insulating layer; the N first pixel electrodes are positioned on the first insulating layer; k second pixel electrodes on the first protective layer and disposed between one side of the first insulating layer and the other side of the second insulating layer; and M third pixel electrodes on the second insulating layer.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2024 - 0016853, filed on February 2, 2024, which is incorporated herein by reference in its entirety for all purposes as if fully set forth herein. Technical field

[0003] Embodiments of the present disclosure relate to a display device. Background art

[0004] In a display device, there is a self - emissive display device in which a display panel emits light by itself. In the case of a self - emissive display device, the display panel may include light - emitting devices for each sub - pixel.

[0005] Meanwhile, light generated from the light - emitting devices of the display panel may pass through various components within the display panel and exit the display panel. However, among the light generated from the light - emitting devices, there may be light that does not exit the display panel and is trapped inside the display panel.

[0006] Among the light generated from the light - emitting devices, the more light that does not exit the display panel and is trapped inside the display panel, the lower the brightness of the corresponding sub - pixel may be. As a result, the quality of the image displayed on the display panel may deteriorate. Summary of the invention

[0007] Embodiments of the present disclosure may provide a display device having a light extraction structure that enables a greater amount of light in the light generated by light - emitting devices in a display panel to be emitted toward a viewing surface.

[0008] Embodiments of the present disclosure may provide a display device having a light extraction structure suitable for a high - resolution display panel.

[0009] Embodiments of the present disclosure may provide a display device having a compensation function that can reduce the brightness deviation of each sub - pixel according to a light extraction structure suitable for a high - resolution display panel.

[0010] A display device according to an embodiment of the present disclosure may include: a substrate; a first protective layer on the substrate; a first insulating layer on the first protective layer; a second insulating layer on the first protective layer and disposed on one side of the first insulating layer; N first pixel electrodes on the first insulating layer; K second pixel electrodes on the first protective layer and disposed between one side of the first insulating layer and the side of the second insulating layer adjacent to the one side of the first insulating layer; and M third pixel electrodes on the second insulating layer. Here, N may be a natural number greater than or equal to 2, K may be a natural number greater than or equal to 1, and M may be a natural number greater than or equal to 2.

[0011] A display device according to an embodiment of the present disclosure may include: a substrate; first, second, and third pixel electrodes on the substrate; an intermediate layer on the first, second, and third pixel electrodes; and a common electrode on the intermediate layer, wherein the first pixel electrode and the third pixel electrode are positioned higher from the substrate than the second pixel electrode.

[0012] In a display device according to an embodiment of the present disclosure, the common electrode may include: an inclined surface extending from above the first pixel electrode, passing through one side of the first pixel electrode, and extending to above the second pixel electrode; and an inclined surface extending from above the third pixel electrode, passing through the other side of the third pixel electrode, and extending to above the second pixel electrode.

[0013] A display device according to an embodiment of the present disclosure may further include an insulating layer, which is not disposed below the second pixel electrode but is disposed below the first pixel electrode and the third pixel electrode.

[0014] A display device according to an embodiment of the present disclosure may include: a substrate; a first protective layer on the substrate; a first insulating layer on the first protective layer; a second insulating layer on the first protective layer and laterally spaced apart from the first insulating layer; a first light-emitting device on the first insulating layer and included in a first sub-pixel; a second light-emitting device on the first protective layer, disposed in a lateral direction of the first insulating layer and the second insulating layer, and included in a second sub-pixel; and a third light-emitting device on the second insulating layer and included in a third sub-pixel. In this case, the second light-emitting device may be positioned closer to the substrate than the first light-emitting device and the third light-emitting device.

[0015] In a display device according to an embodiment of the present disclosure, if the emission brightness of the first sub-pixel, the emission brightness of the second sub-pixel, and the emission brightness of the third sub-pixel are the same, the data voltage supplied to the second sub-pixel may be higher than the data voltage supplied to each of the first sub-pixel and the third sub-pixel.

[0016] The display device according to an embodiment of the present disclosure may further include: a first pixel electrode located on the first insulating layer and included in the first light-emitting device; a second pixel electrode located on the first protective layer, disposed between one side of the first insulating layer and one side of the second insulating layer adjacent to the one side of the first insulating layer, and included in the second light-emitting device; and a third pixel electrode located on the second insulating layer and included in the third light-emitting device.

[0017] The display device according to an embodiment of the present disclosure may further include: an intermediate layer on the first pixel electrode, the second pixel electrode, and the third pixel electrode; and a common electrode on the intermediate layer.

[0018] In the display device according to an embodiment of the present disclosure, the second pixel electrode may be positioned closer to the substrate than the first pixel electrode and the third pixel electrode.

[0019] In the display device according to an embodiment of the present disclosure, the common electrode may include: an inclined surface extending from above the first pixel electrode, passing through one side of the first pixel electrode, and extending to above the second pixel electrode; and an inclined surface extending from above the third pixel electrode, passing through a side of the third pixel electrode adjacent to the one side of the first pixel electrode, and extending to above the second pixel electrode.

[0020] According to an embodiment of the present disclosure, a display device having a light extraction structure that allows a larger amount of light in the light generated by the light-emitting devices in the display panel to be emitted toward the viewing surface may be provided.

[0021] According to an embodiment of the present disclosure, a display device having a light extraction structure suitable for a high-resolution display panel may be provided.

[0022] According to an embodiment of the present disclosure, a display device having a compensation function that can reduce the brightness deviation of each sub-pixel according to the light extraction structure suitable for a high-resolution display panel may be provided.

[0023] According to an embodiment of the present disclosure, the light extraction efficiency of the light generated by the light-emitting devices in the display panel can be improved. Therefore, the power consumption of the display device can be reduced by improving the light extraction efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a system configuration diagram of a display device according to an embodiment of the present disclosure.

[0025] Figure 2 shows a display panel according to an embodiment of the present disclosure.

[0026] Figure 3 Shows sub-pixels of a display panel according to an embodiment of the present disclosure.

[0027] Figure 4 Is a plan view of a display panel according to an embodiment of the present disclosure.

[0028] Figure 5 Shows the area of sub-pixels of a display panel according to an embodiment of the present disclosure.

[0029] Figure 6 and Figure 7 Shows a light extraction structure of a display panel according to an embodiment of the present disclosure.

[0030] Figure 8 Is a plan view showing a light extraction structure of a display panel according to an embodiment of the present disclosure.

[0031] Figure 9 and Figure 10 Is a cross-sectional view showing a light extraction structure of a display panel according to an embodiment of the present disclosure.

[0032] Figure 11 Shows the number of mirrors of each sub-pixel of a display panel according to an embodiment of the present disclosure.

[0033] Figure 12 Shows the light extraction efficiency of each sub-pixel of a display panel according to an embodiment of the present disclosure.

[0034] Figure 13 Shows the light emission state of each sub-pixel of a display panel according to an embodiment of the present disclosure.

[0035] Figure 14 Shows a data compensation circuit considering the light extraction structure of a display device according to an embodiment of the present disclosure.

[0036] Figure 15 Shows the data compensation value of each sub-pixel considering the light extraction structure of a display panel according to an embodiment of the present disclosure.

[0037] Figure 16 Shows the light emission state of each sub-pixel after data compensation considering the light extraction structure of a display panel according to an embodiment of the present disclosure. Detailed Embodiments

[0038] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. When assigning reference numerals to components in each drawing, the same components may be assigned the same reference numerals even if they are shown in different drawings. When it is determined that the subject matter of the present disclosure is unclear, details of known technologies or functions may be skipped. As used herein, when a component "comprises", "has" another component or "consists of" another component, the component may add other components, unless the component "only" comprises, has another component or consists of another component. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0039] Designations such as "first", "second", "A", "B", "(a)" and "(b)" may be used to describe components of the present disclosure. These designations are provided merely to distinguish a component from another component, and the nature, order or number of the components is not limited by these designations.

[0040] When describing the positional relationship between components, when two or more components are described as "connected", "coupled" or "linked", the two or more components may be directly "connected", "coupled" or "linked", or another component may intervene. Here, the other component may be included in one or more of the two or more components that are "connected", "coupled" or "linked" to each other.

[0041] When terms such as "after", "immediately following" and "before" are used to describe the temporal flow relationship related to components, operation methods and manufacturing methods, a non - continuous relationship may be included unless the terms "immediately" or "directly" are used.

[0042] When a component is specified by a value or its corresponding information (e.g., level), the value or the corresponding information may be interpreted as including tolerances that may arise due to various factors (e.g., processing factors, internal or external influences or noise).

[0043] In the following, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0044] Figure 1 is a system configuration diagram of a display device 100 according to an embodiment of the present disclosure.

[0045] Referring to Figure 1 , according to an embodiment of the present disclosure, the display device 100 may include a display panel 110 and a display driving circuit as components for displaying an image. The display driving circuit is a circuit for driving the display panel 110, and may include a data driving circuit 120, a gate driving circuit 130, and a controller 140.

[0046] The display panel 110 may include a substrate 111 and a plurality of sub-pixels SP disposed on the substrate 111.

[0047] The substrate 111 of the display panel 110 may include a display area DA capable of displaying an image and a non-display area NDA located outside the display area DA.

[0048] The display area DA may also be referred to as an active area, and a plurality of sub-pixels SP for image display may be disposed in the display area DA. The non-display area NDA may also be referred to as a non-active area and may include a pad area.

[0049] In the display panel 110 according to an embodiment of the present disclosure, the non-display area NDA may be very small. In this specification, the non-display area NDA may also be referred to as a "border". For example, the non-display area NDA may include a first non-display area located outside the display area DA in a first direction, a second non-display area located outside the display area DA in a second direction different from the first direction, a third non-display area located outside the display area DA in a direction opposite to the first direction, and a fourth non-display area located outside the display area DA in a direction opposite to the second direction.

[0050] The first non-display area may include a pad area to which a driving circuit is connected or joined. The second to fourth non-display areas may have very small sizes.

[0051] For another example, a boundary area between the display area DA and the non-display area NDA may be curved such that the non-display area NDA may be located below the display area. In this case, when a user views the display device 100 from the front, the user may see little or no non-display area NDA. For example, the first non-display area may include a curved area. When the curved area is curved, the first non-display area may be invisible from the front.

[0052] Various types of signal lines for driving a plurality of sub-pixels SP may be disposed on the substrate 111 of the display panel 110.

[0053] The display device 100 according to an embodiment of the present disclosure may be a self-emitting display device in which the display panel 110 emits light itself. If the display device 100 according to an embodiment of the present disclosure is a self-emitting display device, each of the plurality of sub-pixels SP may include a light-emitting device.

[0054] For example, the display device 100 according to an embodiment of the present disclosure may be an organic light-emitting display device in which a light-emitting device is implemented as an organic light-emitting diode (OLED). For another example, the display device 100 according to an embodiment of the present disclosure may be an inorganic light-emitting display device in which a light-emitting device is implemented as an inorganic-based light-emitting diode. For another example, the display device 100 according to an embodiment of the present disclosure may be a quantum dot display device in which a light-emitting device is implemented with quantum dots, which are self-luminous semiconductor crystals.

[0055] The structure of each sub-pixel SP among the plurality of sub-pixels SP may vary according to the type of the display device 100. For example, if the display device 100 is a self-luminous display device in which the sub-pixel SP emits light by itself, each sub-pixel SP may include a self-luminous light-emitting device, one or more transistors, and one or more capacitors.

[0056] For example, various types of signal lines may include a plurality of data lines DL for supplying data signals (also referred to as data voltages or image signals) and a plurality of gate lines GL for transmitting gate signals (also referred to as scan signals).

[0057] For example, the plurality of data lines DL and the plurality of gate lines GL may cross each other. Each of the plurality of data lines DL may be arranged to extend in a first direction. Each of the plurality of gate lines GL may be arranged to extend in a second direction. Here, the first direction may be a column direction, and the second direction may be a row direction. Alternatively, the first direction may be a row direction, and the second direction may be a column direction. Hereinafter, for ease of explanation, a case where each of the plurality of data lines DL is arranged in the column direction and each of the plurality of gate lines GL is arranged in the row direction will be illustrated, but is not limited thereto.

[0058] The data driving circuit 120 is a circuit for driving the plurality of data lines DL, and may output data signals to the plurality of data lines DL.

[0059] The data driving circuit 120 may receive image data in digital form from the display controller 140, and convert the received image data into analog data signals to output to the plurality of data lines DL.

[0060] For example, the data driving circuit 120 may be connected to the display panel 110 using a tape automated bonding (TAB) method, or may be connected to bonding pads of the display panel 110 using a chip on glass (COG) or chip on panel (COP) method, or may be implemented and connected to the display panel 110 using a chip on film (COF) method, but is not limited thereto.

[0061] The data driving circuit 120 may be connected to one side (e.g., the upper side or the lower side) of the display panel 110. Depending on the driving method, the panel design method, etc., the data driving circuit 120 may be connected to both sides (e.g., the upper side and the lower side) of the display panel 110, or may be connected to two or more sides among the four sides of the display panel 110.

[0062] The data driving circuit 120 may be connected to the outside of the display area DA of the display panel 110, but alternatively, it may be provided in the display area DA of the display panel 110.

[0063] The gate driving circuit 130 is a circuit for driving a plurality of gate lines GL, and may output gate signals to the plurality of gate lines GL.

[0064] The gate driving circuit 130 may receive a first gate voltage corresponding to a conduction level voltage, a second gate voltage corresponding to a cutoff level voltage, and various gate driving control signals GCS, and may generate gate signals and supply the generated gate signals to the plurality of gate lines GL.

[0065] In the display device 100 according to an embodiment of the present disclosure, the gate driving circuit 130 may be built in the display panel 110 as a gate-in-panel (GIP) type. If the gate driving circuit 130 is a gate-in-panel type, the gate driving circuit 130 may be formed on the substrate of the display panel 110 during the manufacturing process of the display panel 110.

[0066] For example, in the display device 100 according to an embodiment of the present disclosure, the gate driving circuit 130 may be provided in the non-display area NDA of the display panel 110.

[0067] As another example, the gate driving circuit 130 may be provided in the display area DA of the display panel 110. In this case, the gate driving circuit 130 may be provided in a first partial area (e.g., the left area or the right area within the display area DA) within the display area DA. For another example, the gate driving circuit 130 may be provided in a first partial area (e.g., the left area or the right area within the display area DA) and a second partial area (e.g., the right area or the left area within the display area DA) within the display area DA.

[0068] In the present disclosure, the gate driving circuit 130 built in the display panel 110 as a gate-in-panel type may be referred to as a "gate-in-panel circuit".

[0069] The controller 140 may be a device for controlling the data driving circuit 120 and the gate driving circuit 130, and may control the driving timings of the plurality of data lines DL and the driving timings of the plurality of gate lines GL.

[0070] The controller 140 may supply a data driving control signal DCS to the data driving circuit 120 to control the data driving circuit 120, and may supply a gate driving control signal GCS to the gate driving circuit 130 to control the gate driving circuit 130.

[0071] The controller 140 may receive input image data from the main system 150 and supply image data DATA to the data driving circuit 120 based on the input image data.

[0072] The controller 140 may be implemented as a component separate from the data driving circuit 120, or may be integrated with the data driving circuit 120 and implemented as an integrated circuit.

[0073] The controller 140 may be a timing controller used in typical display technologies, or may be a control device capable of further performing other control functions including a timing controller, or may be a control device different from a timing controller, or may be a control device other than a timing controller, or may be a circuit within a control device. The controller 140 may be implemented using various circuits or electronic components such as an integrated circuit (IC), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a processor.

[0074] The controller 140 may be mounted on a printed circuit board, a flexible printed circuit, etc., and may be electrically connected to the data driving circuit 120 and the gate driving circuit 130 through the printed circuit board, the flexible printed circuit.

[0075] The controller 140 may transmit and receive signals to and from the data driving circuit 120 according to one or more predetermined interfaces. For example, the interface may include a low voltage differential signal (LVDS) interface, an embedded clock point-to-point interface (EPI), or a serial peripheral interface (SPI), among others.

[0076] In order to provide not only an image display function but also a touch sensing function, the display device 100 according to an embodiment of the present disclosure may include a touch sensor and a touch sensing circuit for detecting the occurrence of a touch of a touch object such as a finger or a pen or detecting a touch position by sensing the touch sensor.

[0077] The touch sensing circuit may include: a touch driving circuit for driving and sensing the touch sensor to generate and output touch sensing data; and a touch controller for using the touch sensing data to detect the occurrence of a touch or detect a touch position.

[0078] The touch sensor may include a plurality of touch electrodes. The touch sensor may further include a plurality of touch lines for electrically connecting the plurality of touch electrodes and the touch driving circuit.

[0079] The touch sensor may exist outside the display panel 110 in the form of a touch panel, or may exist inside the display panel 110. If the touch sensor exists outside the display panel 110 in the form of a touch panel, the touch sensor may be referred to as an external type. If the touch sensor is of the external type, the touch panel and the display panel 110 may be manufactured separately and combined during an assembly process. The external touch panel may include a touch panel substrate and a plurality of touch electrodes on the touch panel substrate.

[0080] If the touch sensor exists inside the display panel 110, the touch sensor may be formed on a substrate together with signal lines and electrodes related to display driving during a manufacturing process of the display panel 110.

[0081] The touch driving circuit may supply a touch driving signal to at least one of the plurality of touch electrodes and generate touch sensing data by sensing at least one of the plurality of touch electrodes.

[0082] The touch sensing circuit may perform touch sensing using a self - capacitance sensing method or a mutual - capacitance sensing method.

[0083] If the touch sensing circuit performs touch sensing using the self - capacitance sensing method, the touch sensing circuit may perform touch sensing based on the capacitance between each touch electrode and a touch object (e.g., a finger, a pen, etc.). According to the self - capacitance sensing method, each of the plurality of touch electrodes may be used as a driving touch electrode and a sensing touch electrode. The touch driving circuit may drive all or part of the plurality of touch electrodes and sense all or part of the plurality of touch electrodes.

[0084] If the touch sensing circuit performs touch sensing using the mutual - capacitance sensing method, the touch sensing circuit may perform touch sensing based on the capacitance between touch electrodes. According to the mutual - capacitance sensing method, the plurality of touch electrodes may be divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit may drive the driving touch electrodes and sense the sensing touch electrodes.

[0085] The touch driving circuit and the touch controller included in the touch sensing circuit may be implemented as separate devices or implemented as one device. In addition, the touch driving circuit and the data driving circuit may be implemented as separate devices or implemented as one device.

[0086] The display device 100 may further include a power supply circuit that supplies various types of power to the display driving circuit and / or the touch sensing circuit.

[0087] The display device 100 according to an embodiment of the present disclosure may be a mobile terminal such as a smart phone or a tablet computer, or monitors or televisions of various sizes, but is not limited thereto, and may be displays of various types and sizes capable of displaying information or images.

[0088] The display device 100 according to an embodiment of the present disclosure may further include electronic devices such as a camera device (e.g., an image sensor) and a detection sensor. For example, the detection sensor may be a sensor for detecting an object or a human body by receiving light such as infrared rays, ultrasonic waves, or ultraviolet rays.

[0089] Figure 2 A display panel 110 according to an embodiment of the present disclosure is shown.

[0090] Referring to Figure 2 , the display panel 110 may include a substrate 111 provided in a plurality of sub-pixels SP and an encapsulation layer 200 on the substrate 111. Here, the encapsulation layer 200 may also be referred to as an encapsulation substrate or an encapsulation portion.

[0091] Referring to Figure 2 , when the display device 100 according to an embodiment of the present disclosure is a self-emitting display device, each of the plurality of sub-pixels SP may include a light-emitting device ED and a sub-pixel circuit SPC for driving the light-emitting device ED.

[0092] Referring to Figure 2 , the sub-pixel circuit SPC may include a plurality of pixel driving transistors for driving the light-emitting device ED and at least one capacitor. In the present disclosure, the sub-pixel circuit SPC may drive the light-emitting device ED by supplying a driving current to the light-emitting device ED at a predetermined timing. The light-emitting device ED may be driven by the driving current and emit light.

[0093] The plurality of pixel driving transistors may include a driving transistor DRT for driving the light-emitting device ED and a scanning transistor SCT that is turned on or off according to a scanning signal SC.

[0094] The driving transistor DRT may supply a driving current to the light-emitting device ED.

[0095] The scanning transistor SCT may be configured to control the electrical state of a corresponding node (e.g., the second node N2) in the sub-pixel circuit SPC, or control the state or operation of the driving transistor DRT.

[0096] The at least one capacitor may include a storage capacitor Cst for maintaining a constant voltage during a frame.

[0097] To drive the sub-pixel SP, a data signal VDATA as an image signal and a scan signal SC as a gate signal may be applied to the sub-pixel SP. In addition, a common pixel driving voltage including a first common driving voltage VDD and a second common driving voltage VSS may be applied to the sub-pixel SP to drive the sub-pixel SP.

[0098] The light-emitting device ED may include a pixel electrode PE, an intermediate layer EL, and a common electrode CE. The intermediate layer EL may be located between the pixel electrode PE and the common electrode CE.

[0099] For example, the pixel electrode PE may be an anode AND, and the common electrode CE may be a cathode CAT. Alternatively, the pixel electrode PE may be a cathode CAT, and the common electrode CE may be an anode AND. Hereinafter, for the sake of convenience of description, the case where the pixel electrode PE is an anode AND and the common electrode CE is a cathode CAT is illustrated.

[0100] In the case where the light-emitting device ED is an organic light-emitting diode, the intermediate layer EL may include an emission layer EML, a first common intermediate layer COM1 between the anode AND and the emission layer EML, and a second common intermediate layer COM2 between the emission layer EML and the cathode CAT. The first common intermediate layer COM1 and the second common intermediate layer COM2 may be collectively referred to as the common intermediate layer EL_COM.

[0101] The emission layer EML may be provided in each sub-pixel SP. In contrast, the common intermediate layer EL_COM may be provided commonly across multiple sub-pixels SP.

[0102] The emission layer EML may be provided in each emission region, and the common intermediate layer EL_COM may be provided commonly across multiple emission regions and non-emission regions.

[0103] For example, the first common intermediate layer COM1 may include a hole injection layer HIL and a hole transport layer HTL. The second common intermediate layer COM2 may include an electron transport layer ETL and an electron injection layer EIL.

[0104] The hole injection layer may inject holes from the pixel electrode PE into the hole transport layer, the hole transport layer may transport the holes to the emission layer EML, the electron injection layer may inject electrons from the common electrode CE into the electron transport layer, and the electron transport layer may transport the electrons to the emission layer EML.

[0105] For example, the common electrode CE can be electrically connected to the second common driving voltage line VSSL. The second common driving voltage VSS, which is a common pixel driving voltage, can be applied to the common electrode CE through the second common driving voltage line VSSL. The pixel electrode PE can be directly or indirectly (via another transistor) electrically connected to the first node N1 of the driving transistor DRT of each sub-pixel SP. In the present disclosure, the second common driving voltage VSS can also be referred to as the base voltage VSS, and the second common driving voltage line VSSL can also be referred to as the base voltage line VSSL.

[0106] Each light-emitting device ED can be composed of an overlapping portion of the pixel electrode PE, the intermediate layer EL, and the common electrode CE. A predetermined emission region can be formed by each light-emitting device ED. For example, the emission region of each light-emitting device ED can include the region where the pixel electrode PE, the intermediate layer EL, and the common electrode CE overlap.

[0107] For example, the light-emitting device ED can be an organic light-emitting diode (OLED), an inorganic light-emitting diode, or a quantum dot light-emitting device. For example, when the light-emitting device ED is an organic light-emitting diode OLED, the intermediate layer EL in the light-emitting device ED can include an organic intermediate layer EL containing an organic material.

[0108] The driving transistor DRT can be a driving transistor for supplying a driving current to the light-emitting device ED. The driving transistor DRT can be connected between the first common driving voltage line VDDL and the light-emitting device ED.

[0109] The driving transistor DRT can include a first node N1, a second node N2, and a third node N3. The first node N1 can be electrically connected to the light-emitting device ED. A data signal VDATA can be applied to the second node N2. The first common driving voltage VDD can be applied from the first common driving voltage line VDDL to the third node N3.

[0110] In the driving transistor DRT, the second node N2 can be a gate node, the first node N1 can be a source node or a drain node, and the third node N3 can be a drain node or a source node. Hereinafter, for the sake of convenience of description, the case where the second node N2 is a gate node (or gate electrode), the first node N1 is a source node (or source electrode), and the third node N3 is a drain node (or drain electrode) in the driving transistor DRT will be described, however, the embodiments of the present disclosure are not limited thereto.

[0111] Figure 2 The scan transistor SCT included in the shown sub-pixel circuit SPC can be a switching transistor for sending a data signal VDATA, which is an image signal, to the second node N2, which is the gate node of the driving transistor DRT.

[0112] The scanning transistor SCT can be controlled to turn on and off by a scanning signal SC, which is a gate signal applied through a scanning line SCL serving as a gate line GL, and the scanning transistor SCT can control the electrical connection between the second node N2 of the driving transistor DRT and the data line DL. The drain electrode or source electrode of the scanning transistor SCT can be electrically connected to the data line DL, and the source electrode or drain electrode of the scanning transistor SCT can be electrically connected to the second node N2 of the driving transistor DRT. The gate electrode of the scanning transistor SCT can be electrically connected to the scanning line SCL.

[0113] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT. The storage capacitor Cst can include: a first capacitor electrode electrically connected to the first node N1 of the driving transistor DRT or corresponding to the first node N1 of the driving transistor DRT; and a second capacitor electrode electrically connected to the second node N2 of the driving transistor DRT or corresponding to the second node N2 of the driving transistor DRT.

[0114] The storage capacitor Cst can be an external capacitor intentionally designed outside the driving transistor DRT, rather than a parasitic capacitor (e.g., Cgs, Cgd) that can exist as an internal capacitor between the first node N1 and the second node N2 of the driving transistor DRT.

[0115] Each of the driving transistor DRT and the scanning transistor SCT can be an n-type transistor or a p-type transistor.

[0116] The display panel 110 can have a top emission structure that emits light in the forward direction or a bottom emission structure that emits light in the backward direction. Here, the forward direction can correspond to the direction from the substrate 111 toward the encapsulation layer 200, and the backward direction can correspond to the direction from the encapsulation layer 200 toward the substrate 111.

[0117] If the display panel 110 has a top emission structure, at least a part of the sub-pixel circuit SPC can overlap at least a part of the light-emitting device ED in the vertical direction. Therefore, the area of the emission region can be increased, and the aperture ratio can be increased.

[0118] If the display panel 110 has a bottom emission structure, the sub-pixel circuit SPC can not overlap the light-emitting device ED in the vertical direction.

[0119] If the display panel 110 has a top emission structure, the pixel electrode PE can be a reflective electrode, and the common electrode CE can be a transparent electrode. If the display panel 110 has a bottom emission structure, the pixel electrode PE can be a transparent electrode, and the common electrode CE can be a reflective electrode.

[0120] As Figure 2 shown, the sub-pixel circuit SPC can have a 2T-1C structure including two transistors T1 and T2 and one capacitor Cst. In some cases, the sub-pixel circuit SPC can further include one or more transistors or one or more capacitors.

[0121] For example, the sub-pixel circuit SPC can have an 8T-1C structure including eight transistors and a single capacitor. For another example, the sub-pixel circuit SPC can have a 6T-2C structure including six transistors and two capacitors. For another example, the sub-pixel circuit SPC can have a 7T-1C structure including seven transistors and one capacitor. These are only examples of the sub-pixel circuit SPC and are not limited thereto.

[0122] Depending on the structure of the sub-pixel circuit SPC, the type and number of gate signals and / or gate lines supplied to the sub-pixel SP can be changed. Additionally, depending on the structure of the sub-pixel circuit SPC, the type and number of common driving voltages supplied to the sub-pixel SP can be changed.

[0123] Since circuit elements (especially the light-emitting device ED implemented with an organic light-emitting diode (OLED) containing an organic material) within each sub-pixel SP are vulnerable to external moisture or oxygen, a encapsulation layer 200 can be provided on the display panel 110 to prevent oxygen from permeating into the circuit elements (especially the light-emitting device ED).

[0124] The encapsulation layer 200 can be configured in various shapes to prevent the light-emitting device ED from contacting moisture or oxygen. For example, the encapsulation layer 200 can be composed of two or more layers in which organic layers and inorganic layers are alternately stacked, but embodiments of the present disclosure are not limited thereto.

[0125] Referring to Figure 2 , to sense a user's touch, the display device 100 according to an embodiment of the present disclosure can include: a touch sensor layer including a plurality of sensor electrodes; a touch driving circuit configured to sense the plurality of sensor electrodes; and a touch controller configured to determine the presence or absence of a touch or touch coordinates using the sensing result (e.g., touch sensing data) of the touch driving circuit.

[0126] The touch sensor layer can be built-in or embedded in the display panel 110.

[0127] The display panel 110 may further include: a plurality of touch pads to which a touch sensing circuit is electrically connected; and a plurality of touch lines for electrically connecting a plurality of sensor electrodes included in the touch sensor layer and the plurality of touch pads to which the touch sensing circuit is connected.

[0128] Figure 3 The sub-pixel SP of the display panel 110 according to an embodiment of the present disclosure is shown.

[0129] Refer to Figure 3 , each of the plurality of sub-pixels SP provided on the display panel 110 according to an embodiment of the present disclosure may include a light-emitting device ED and a sub-pixel circuit SPC for driving the light-emitting device ED.

[0130] Compared with Figure 2 the sub-pixel SP shown, Figure 3 the sub-pixel circuit SPC of each sub-pixel SP shown may further include a sensing transistor SENT. That is, Figure 3 the sub-pixel circuit SPC of each sub-pixel SP shown may include a driving transistor DRT, a scanning transistor SCT, a sensing transistor SENT, and a storage capacitor Cst.

[0131] Refer to Figure 3 , the light-emitting device ED may include a pixel electrode PE, a common electrode CE, and an intermediate layer EL located between the pixel electrode PE and the common electrode CE. A first common driving voltage line VSSL may be electrically connected to the common electrode CE.

[0132] Refer to Figure 3 , the driving transistor DRT is a transistor for driving the light-emitting device ED, and may include a first node N1, a second node N2, and a third node N3.

[0133] The first node N1 of the driving transistor DRT may be a source node or a drain node of the driving transistor DRT, may be electrically connected to a source node or a drain node of the sensing transistor SENT, and may also be electrically connected to the pixel electrode PE of the light-emitting device ED.

[0134] The second node N2 of the driving transistor DRT may be a gate node of the driving transistor DRT, and may be electrically connected to a source node or a drain node of the scanning transistor SCT.

[0135] The third node N3 of the driving transistor DRT may be electrically connected to a first common driving voltage line VDDL for supplying a first common driving voltage VDD.

[0136] Refer to Figure 3, the scan transistor SCT can be controlled by a scan signal SC as a kind of gate signal, and can be connected between the second node N2 of the driving transistor DRT and the data line DL. That is to say, the scan transistor SCT can be turned on or off according to the scan signal SC supplied from the scan signal line as a kind of gate line GL, and can control the connection between the data line DL and the second node N2 of the driving transistor DRT.

[0137] The scan transistor SCT can be turned on by the scan signal SC having a conductive level voltage, and can apply the data voltage VDATA supplied from the data line DL to the second node N2 of the driving transistor DRT.

[0138] Here, if the scan transistor SCT is an n-type transistor, the conductive level voltage of the scan signal SC can be a high level voltage. If the scan transistor SCT is a p-type transistor, the conductive level voltage of the scan signal SC can be a low level voltage. Hereinafter, the scan transistor SCT is illustrated as an n-type transistor. Therefore, the conductive level voltage is illustrated as a high level voltage.

[0139] Refer to Figure 3 , the sense transistor SENT can be controlled by a sense signal SE as a kind of gate signal, and can be connected between the first node N1 of the driving transistor DRT and the reference voltage line VREFL. That is to say, the sense transistor SENT can be turned on or off according to the sense signal SE supplied from the sense signal line as another kind of gate line GL, and can control the connection between the reference voltage line VREFL and the first node N1 of the driving transistor DRT.

[0140] The sense transistor SENT can be turned on by the sense signal SE having a conductive level voltage, and can transmit the reference voltage Vref supplied from the reference voltage line VREFL to the first node N1 of the driving transistor DRT. Here, the sense signal SE can be regarded as a second scan signal different from the scan signal SC.

[0141] In addition, the sense transistor SENT can be turned on by the sense signal SE having a conductive level voltage, and can transmit the voltage of the first node N1 of the driving transistor DRT to the reference voltage line VREFL.

[0142] Here, when the sense transistor SENT is an n-type transistor, the conductive level voltage of the sense signal SE can be a high level voltage. When the sense transistor SENT is a p-type transistor, the conductive level voltage of the sense signal SE can be a low level voltage. Hereinafter, for example, it is illustrated that the sense transistor SENT is an n-type transistor, and therefore, the conductive level voltage is a high level voltage.

[0143] The function of the sensing transistor SENT for transmitting the voltage of the first node N1 of the driving transistor DRT to the reference voltage line VREFL can be used when driving to sense the characteristic value of the sub-pixel SP. In this case, the voltage transmitted to the reference voltage line VREFL can be the voltage used to calculate the characteristic value of the sub-pixel SP or the voltage reflecting the characteristic value of the sub-pixel SP.

[0144] In the present disclosure, the characteristic value of the sub-pixel SP can be the characteristic value of the driving transistor DRT or the light-emitting device ED. For example, the characteristic values of the driving transistor DRT can include the threshold voltage and mobility of the driving transistor DRT. The characteristic values of the light-emitting device ED can include the threshold voltage of the light-emitting device ED.

[0145] Refer to Figure 3 , the storage capacitor Cst can be connected between the second node N2 and the first node N1 of the driving transistor DRT. The storage capacitor Cst can be charged with the charge corresponding to the voltage difference between both ends, and can function to maintain the voltage difference between both ends within a set frame time. Therefore, the corresponding sub-pixel SP can emit light during the set frame time.

[0146] Refer to Figure 3 , for example, the gate node of the scan transistor SCT and the gate node of the sensing transistor SENT may not be connected. That is, the gate node of the scan transistor SCT and the gate node of the sensing transistor SENT can be connected to different gate lines GL. In this case, the on-off of the scan transistor SCT and the on-off of the sensing transistor SENT can be independently controlled.

[0147] As another example, the gate node of the scan transistor SCT and the gate node of the sensing transistor SENT can be electrically connected to each other. That is, the gate node of the scan transistor SCT and the gate node of the sensing transistor SENT can be commonly connected to one gate line GL. In this case, the on-off of the scan transistor SCT and the on-off of the sensing transistor SENT can be simultaneously controlled.

[0148] Refer to Figure 3 , the driving transistor DRT, the scan transistor SCT, and the sensing transistor SENT can each be an n-type transistor or a p-type transistor. In the present disclosure, for ease of explanation, it is illustrated that the driving transistor DRT, the scan transistor SCT, and the sensing transistor SENT are each n-type.

[0149] Figure 3 The illustrated sub-pixel SP is only an example, and can be modified in various ways by including one or more transistors or one or more capacitors.

[0150] Figure 4 is a plan view of the display panel 110 according to an embodiment of the present disclosure.

[0151] Referring to Figure 4 , a plurality of sub-pixels SP provided on the display panel 110 according to an embodiment of the present disclosure may be arranged in a matrix form. For example, the plurality of sub-pixels SP provided on the display panel 110 according to an embodiment of the present disclosure may include 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 arranged in three rows and nine columns. The 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may constitute the first sub-pixel row SPR1 to the third sub-pixel row SPR3. The 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may constitute the first sub-pixel column SPC1 to the ninth sub-pixel column SPC9.

[0152] As an example, the plurality of sub-pixels SP provided on the display panel 110 may include a red sub-pixel that emits red light, a green sub-pixel that emits green light, and a blue sub-pixel that emits blue light.

[0153] For example, in this case, the sub-pixels arranged in the first sub-pixel column SPC1, the fourth sub-pixel column SPC4, and the seventh sub-pixel column SPC7 may be red sub-pixels. The sub-pixels arranged in the second sub-pixel column SPC2, the fifth sub-pixel column SPC5, and the eighth sub-pixel column SPC8 may be green sub-pixels. The sub-pixels arranged in the third sub-pixel column SPC3, the sixth sub-pixel column SPC6, and the ninth sub-pixel column SPC9 may be blue sub-pixels.

[0154] As an example, the plurality of sub-pixels SP provided on the display panel 110 may include a red sub-pixel that emits red light, a green sub-pixel that emits green light, a blue sub-pixel that emits blue light, and a white sub-pixel that emits white light.

[0155] Referring to Figure 4 , the display panel 110 according to an embodiment of the present disclosure may include vertical lines extending in the column direction and horizontal lines extending in the row direction. The horizontal lines and the vertical lines may vary according to the structure of the sub-pixel SP.

[0156] The horizontal lines may include gate lines GL, and the vertical lines may include data lines DL.

[0157] For example, in the case where the sub-pixel SP has the Figure 2 shown structure, the horizontal lines may include scan signal lines as the gate lines GL, and the vertical lines may include data lines DL and at least one first common driving voltage line VDDL.

[0158] As another example, if the sub-pixel SP is configured as Figure 3 the structure shown, the horizontal lines may include a gate line GL, a scan signal line, and a sense signal line, and the vertical lines may include a data line DL, at least one first common driving voltage line VDDL, and at least one reference voltage line VREFL.

[0159] Figure 4 illustrates a signal line layout structure for a case where the sub-pixel SP has the same structure as Figure 3 the structure shown. Figure 4 The layout positions and numbers of the gate line GL, data line DL, at least one first common driving voltage line VDDL, and at least one reference voltage line VREFL shown can be modified in various ways.

[0160] Figure 5 illustrates a region of a sub-pixel of the display panel 110 according to an embodiment of the present disclosure.

[0161] Referring to Figure 5 , in the case where the display panel 110 according to an embodiment of the present disclosure emits light in the rear direction, the region of each sub-pixel SP may include a circuit region CA in which a sub-pixel circuit SPC is provided and an emission region EA in which light is emitted by a light-emitting device ED.

[0162] In the case where the display panel 110 emits light in the rear direction, the circuit region CA and the emission region EA may not overlap with each other. The emission region EA may also be referred to as an opening or aperture region.

[0163] Meanwhile, light generated from the emission layer EML of the light-emitting device ED of the display panel 110 may pass through various components within the display panel 110 and exit the display panel 110. However, among the light generated in the emission layer EML of the light-emitting device ED, there may be light that does not exit the display panel 110 and is trapped inside the display panel 110.

[0164] Among the light generated in the emission layer EML of the light-emitting device ED, the more light that does not exit the display panel 110 and is trapped inside the display panel 110, the lower the brightness of the corresponding sub-pixel SP will be. Therefore, the quality of the image displayed on the display panel 110 will deteriorate.

[0165] Therefore, the display panel 110 according to an embodiment of the present disclosure may include a light extraction structure that allows a larger amount of the light generated by the light-emitting device ED to be emitted toward the viewing surface.

[0166] The light extraction structure according to an embodiment of the present disclosure may be a structure included in the display panel 110, and may reduce the amount of light trapped inside the display panel 110 in the amount of light generated from the emission layer EML of the light emitting device ED in the display panel 110, and increase the amount of light emitted to the outside of the display panel 110. "Light extraction" in an embodiment of the present disclosure may mean that a part of the light emitted from the emission layer EML of the light emitting device ED in the display panel 110 is emitted to the outside of the display panel 110.

[0167] Hereinafter, the light extraction structure according to an embodiment of the present disclosure will be described in detail. In the following description, a case where the display panel 110 according to an embodiment of the present disclosure has a bottom emission structure is illustrated.

[0168] Figure 6 and Figure 7 The light extraction structure of the display panel 110 according to an embodiment of the present disclosure is shown.

[0169] Figure 6 The light extraction structure in the display panel 110 including the bank BNK is shown, and Figure 7 The light extraction structure in the display panel 110 not having the bank BNK is shown.

[0170] Referring to Figure 6 and Figure 7 , the display panel 110 may include a first sub-pixel SP1, a second sub-pixel SP2 on one side of the first sub-pixel SP1, and a third sub-pixel SP3 on the other side of the first sub-pixel SP1.

[0171] Referring to Figure 6 and Figure 7 , the display panel 110 according to an embodiment of the present disclosure may include: a substrate 111; a passivation layer 600 on the substrate 111; first to third color filters CF1, CF2, and CF3 on the passivation layer 600; a first protective layer 610 on the first to third color filters CF1, CF2, and CF3; a second protective layer 620 on the first protective layer 610; first to third pixel electrodes PE1, PE2, and PE3 on the second protective layer 620; an intermediate layer EL on the first to third pixel electrodes PE1, PE2, and PE3; and a common electrode CE on the intermediate layer EL.

[0172] Referring to Figure 6 and Figure 7 , the first to third pixel electrodes PE1, PE2, and PE3 may be transparent electrodes, and the common electrode CE may be a reflective electrode.

[0173] Referring toFigure 6 and Figure 7 As shown in FIGS. and , the display panel 110 according to an embodiment of the present disclosure may include signal lines SL1, SL2, and SL3 located between the substrate 111 and the passivation layer 600. For example, the signal lines SL1, SL2, and SL3 may be vertical lines. For example, the vertical lines may include data lines DL, at least one first common driving voltage line VDDL, and at least one reference voltage line VREFL.

[0174] Referring to Figure 6 and Figure 7 As shown in FIGS. and , holes H1 and H2 may be formed between two adjacent sub-pixels (or two adjacent pixel electrodes) in the second protective layer 620. That is, the second protective layer 620 may include a first hole H1 formed between the first sub-pixel SP1 and the second sub-pixel SP2, and a second hole H2 formed between the second sub-pixel SP2 and the third sub-pixel SP3.

[0175] Therefore, the intermediate layer EL and the common electrode CE may be disposed inside the holes H1 and H2 along the sides of the holes H1 and H2 of the second protective layer 620. Therefore, a part of the common electrode CE disposed inside the holes H1 and H2 of the second protective layer 620 may be positioned closer to the substrate 111 than the pixel electrodes PE1, PE2, and PE3.

[0176] Therefore, the light emitted from the emission layer EML of the first light-emitting device ED1 in the first sub-pixel SP1 may be reflected at the common electrode CE and may travel toward the viewing surface. Here, the emission layer EML of the first light-emitting device ED1 may be a layer included in the intermediate layer EL and may be present between the first pixel electrode PE1 and the common electrode CE (see Figure 2 ).

[0177] Referring to Figure 6 As shown in FIGS. and , a bank BNK may be provided between the pixel electrodes PE1, PE2, and PE3 and the intermediate layer EL. The bank BNK may be provided to cover the ends of the pixel electrodes PE1, PE2, and PE3. In addition, the bank BNK may have grooves or holes formed inside the holes H1 and H2 of the second protective layer 620. Therefore, a part of the common electrode CE disposed inside the holes H1 and H2 of the second protective layer 620 may be positioned closer to the substrate 111 than the pixel electrodes PE1, PE2, and PE3.

[0178] Referring to Figure 6 As shown in FIGS. and , if the bank BNK exists, the sides of both ends of each pixel electrode PE1, PE2, and PE3 may have various shapes, such as an inverted conical shape, a regular conical shape, or a vertical shape.

[0179] As Figure 7 shown, the bank BNK may not exist.

[0180] Refer to Figure 7 When the bank BNK does not exist, the side surfaces at both ends of each pixel electrode PE1, PE2, and PE3 can have a regular conical shape. As a result, charge concentration on both ends of each pixel electrode PE1, PE2, and PE3 can be prevented.

[0181] In the case where the bank BNK does not exist, if the side surfaces at both ends of each pixel electrode PE1, PE2, and PE3 have an inverted conical shape or a vertical shape that may have sharp points, charge may concentrate on both ends of each pixel electrode PE1, PE2, and PE3. If charge concentrates on both ends (e.g., edges) of each pixel electrode PE1, PE2, and PE3, more severe degradation may occur in the portions adjacent to both ends of each pixel electrode PE1, PE2, and PE3 in the intermediate layer EL. As a result, the brightness of the outer portions of the emission regions of each sub-pixel SP1, SP2, and SP3 may become abnormally low.

[0182] Therefore, in the case where the bank BNK does not exist, the side surfaces at both ends of each pixel electrode PE1, PE2, and PE3 can have a regular conical shape, so that the phenomenon of charge concentration can be prevented. As a result, the phenomenon that the brightness of the outer portions of the emission regions of each sub-pixel SP1, SP2, and SP3 becomes abnormally low or dark can be prevented.

[0183] As described above, the light extraction structure of the display panel 110 according to an embodiment of the present disclosure can have the following characteristics.

[0184] The insulating layer (e.g., Figure 6 and Figure 7 the second protective layer 620 therein) located under the pixel electrode PE can have a stepped structure (e.g., holes or grooves in the insulating layer). The stepped structure of the insulating layer can be located between two adjacent pixel electrodes PE. That is, the stepped structure of the insulating layer does not overlap with the pixel electrode PE. In addition, the common electrode CE can also be disposed inside the hole or groove that is the stepped structure of the insulating layer, so that the common electrode CE located inside the hole or groove of the insulating layer can be positioned lower than the emission layer EML or the pixel electrode PE.

[0185] According to the light extraction structure of the display panel 110 according to an embodiment of the present disclosure, the light emitted from the emission layer EML of the light emitting device ED can be reflected by the common electrode CE located on the side surface of the pixel electrode PE and travel toward the viewing surface.

[0186] Therefore, the ratio of the light emitted from the emission layer EML of the light emitting device ED to the outside of the display panel 110 can be increased. That is, the light extraction performance can be improved.

[0187] The display panel 110 according to an embodiment of the present disclosure may have a light extraction structure to improve light extraction efficiency. The light extraction efficiency may indicate the degree of increase in the amount of light emitted to the outside of the display panel 110 when the light extraction structure is provided compared to the amount of light emitted to the outside of the display panel 110 when there is no light extraction structure.

[0188] A light extraction structure may be formed by forming a stepped structure of the second protection layer 620 between two adjacent emission regions (ie, adjacent sub-pixels).

[0189] When the display panel 110 is designed as a high-resolution product, the gap between two adjacent emission areas (i.e., two adjacent sub-pixels) may be significantly narrowed. Therefore, there may not be enough space for forming a light extraction structure between the two adjacent emission areas (i.e., two adjacent sub-pixels).

[0190] Therefore, the display device 100 according to an embodiment of the present disclosure may include a light extraction structure suitable for the high-resolution display panel 110. Hereinafter, the light extraction structure suitable for the high-resolution display panel 110 according to an embodiment of the present disclosure will be described in detail. Hereinafter, "a light extraction structure suitable for the high-resolution display panel 110" is described as "a light extraction structure for high resolution".

[0191] Figure 8 、 Figure 9 and Figure 10 A light extraction structure for high resolution of the display panel 110 according to an embodiment of the present disclosure is shown.

[0192] Figure 8 is a plan view showing a light extraction structure of the display panel 110 suitable for high resolution according to an embodiment of the present disclosure, and Figure 9 and Figure 10 is a cross-sectional view of a light extraction structure of the display panel 110 suitable for high resolution according to an embodiment of the present disclosure. Figure 9 It is along Figure 8 A cross-sectional view along line X1-X1' in a plan view of Figure 10 It is along Figure 8 A cross-sectional view along line X2-X2' in a plan view of .

[0193] Reference Figure 8, a display panel 110 having a light extraction structure suitable for high resolution according to an embodiment of the present disclosure may include 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 arranged in three rows and nine columns. The 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may form a first sub-pixel row SPR1 to a third sub-pixel row SPR3. The 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may form a first sub-pixel column SPC1 to a ninth sub-pixel column SPC9. In Figure 8 , each of the 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may refer to a sub-pixel region.

[0194] In Figure 8 , for ease of illustration, various signal lines (e.g., DL, VDDL, REFL, GL) for driving the 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 are not shown. In Figure 8 , a rectangle representing the 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may represent the emission region of the 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39. In Figure 8 , the circuit regions of the 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 are omitted.

[0195] In Figure 9 and Figure 10 , color filters provided between the passivation layer 600 and the first protective layer 610 are omitted. Each color filter may be arranged to overlap with a corresponding pixel electrode (see Figure 6 and Figure 7 ).

[0196] In addition, the display panel 110 according to an embodiment of the present disclosure may have a structure having a bank BNK as shown in Figure 6 , or may have a structure without a bank BNK as shown in Figure 7 . Referring to Figure 9 and Figure 10 , when there is a bank BNK as shown in Figure 6 , the bank BNK may be arranged to partially cover both ends of each pixel electrode.

[0197] Referring to Figure 8, the light extraction structure for high resolution included in the display panel 110 according to an embodiment of the present disclosure may include a mirror MR. The light extraction structure for high resolution included in the display panel 110 according to an embodiment of the present disclosure may not only include a structure called a mirror MR, but may also include the number n(MR) of mirrors and the mirror arrangement structure.

[0198] The mirror MR for forming the light extraction structure for high resolution according to an embodiment of the present disclosure may be formed by an inclined surface SLP or a ramp of a common electrode CE. In an embodiment of the present disclosure, the inclined surface SLP of the common electrode CE may correspond to a stepped portion of the common electrode CE, and the inclined surface SLP of the common electrode CE may also be referred to as a mirror MR or a mirror surface.

[0199] In the light extraction structure for high resolution according to an embodiment of the present disclosure, the common electrode CE may have a plurality of inclined surfaces SLP. The inclined surface SLP of the common electrode CE may exist only in or around the regions of some sub-pixels, and the inclined surface SLP of the common electrode CE may not exist in or around the regions of other sub-pixels.

[0200] According Figure 8 to an example, the inclined surface SLP of the common electrode CE corresponding to the mirror MR may exist only in some of the 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39, such as SP11, SP12, SP14, SP15, SP16, SP18, SP19, SP22, SP23, SP25, SP26, SP27, SP29, SP31, SP33, SP34, SP36, SP37, and SP38.

[0201] According Figure 8 to an example, the inclined surface SLP of the common electrode CE corresponding to the mirror MR may not exist in the other sub-pixels SP13, SP17, SP21, SP24, SP28, SP32, SP35, and SP39 among the 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39.

[0202] For example, in the light extraction structure for high resolution according to an embodiment of the present disclosure, the number of inclined surfaces SLP of the common electrode CE existing in or around the regions of some sub-pixels may be different from the number of inclined surfaces SLP of the common electrode CE existing in or around the regions of some other sub-pixels.

[0203] As another example, in a light extraction structure for high resolution according to an embodiment of the present disclosure, the position of the inclined surface SLP of the common electrode CE existing in or around the region of some sub-pixels may be different from the position of the inclined surface SLP of the common electrode CE existing in or around the region of some other sub-pixels.

[0204] Reference will be made to Figure 8 for a more detailed description of a light extraction structure applicable to high resolution according to an embodiment of the present disclosure.

[0205] Referring to Figure 8 , each of the first to third sub-pixel rows SPR1, SPR2, and SPR3 may include: a first sub-pixel group 1-SPG including K sub-pixels; a second sub-pixel group 2-SPG including N sub-pixels; and a third sub-pixel group 3-SPG including M sub-pixels.

[0206] K may be a natural number greater than 1, N may be a natural number greater than 2, and M may be a natural number greater than 2. In Figure 8 example, K is 1, N is 2, and M is 3.

[0207] Hereinafter, based on the case where K is 1, N is 2, and M is 3, the number n(MR) of mirrors and the mirror arrangement structure included in the display panel 110 as a light extraction structure for high resolution according to an embodiment of the present disclosure will be described.

[0208] Referring to Figure 8 and Figure 9 , in the first sub-pixel row SPR1, the light emitted from one sub-pixel SP13 and SP17 included in the first sub-pixel group 1-SPG may be directly emitted to the outside of the display panel 110 without being reflected by the mirror MR. That is, the number n(MR) of mirrors MR around the light emitting devices of one sub-pixel SP13 and SP17 included in the first sub-pixel group 1-SPG may be 0.

[0209] Referring to Figure 8 and Figure 9 , in the first sub-pixel row SPR1, the light emitted from each of the two sub-pixels SP11 / SP12 and SP18 / SP19 included in the second sub-pixel group 2-SPG may be reflected by three mirrors MR and emitted to the outside of the display panel 110. That is, the number n(MR) of mirrors MR around the light emitting devices of each of the two sub-pixels SP11 / SP12 and SP18 / SP19 included in the second sub-pixel group 2-SPG may be three.

[0210] Referring to Figure 8 and Figure 9, in the first sub-pixel row SPR1, the light emitted from the sub-pixel SP15 located in the middle of the three sub-pixels SP14 / SP15 / SP16 included in the third sub-pixel group 3-SPG can be reflected by two mirrors MR and emitted outside the display panel 110. That is, the number n(MR) of the mirrors MR around the light-emitting device of the middle sub-pixel SP15 among the three sub-pixels SP14 / SP15 / SP16 included in the third sub-pixel group 3-SPG can be two.

[0211] Referring to Figure 8 and Figure 9 , in the first sub-pixel row SPR1, the light emitted from each of the two sub-pixels SP14 / SP16 located on the left and right among the three sub-pixels SP14 / SP15 / SP16 included in the third sub-pixel group 3-SPG can be reflected by three mirrors MR and emitted outside the display panel 110. That is, the number n(MR) of the mirrors MR around the light-emitting device of each of the two sub-pixels SP14 / SP16 located on the left and right among the three sub-pixels SP14 / SP15 / SP16 included in the third sub-pixel group 3-SPG can be three.

[0212] Referring to Figure 8 and Figure 10 , in the second sub-pixel row SPR2, the light emitted from one sub-pixel SP21, SP24 or SP28 included in the first sub-pixel group 1-SPG can be directly emitted outside the display panel 110 without being reflected by the mirror MR. That is, the number n(MR) of the mirrors MR around the light-emitting device of one sub-pixel SP21, SP24 or SP28 included in the first sub-pixel group 1-SPG can be zero.

[0213] Referring to Figure 8 and Figure 10 , in the second sub-pixel row SPR2, the light emitted from each of the two sub-pixels SP22 / SP23 included in the second sub-pixel group 2-SPG can be reflected by three mirrors MR and emitted outside the display panel 110. That is, the number n(MR) of the mirrors MR around the light-emitting device of each of the two sub-pixels SP22 / SP23 included in the second sub-pixel group 2-SPG can be three.

[0214] Referring to Figure 8 and Figure 10, in the second sub-pixel row SPR2, the light emitted from the sub-pixel SP26 located in the middle of the three sub-pixels SP25 / SP26 / SP27 included in the third sub-pixel group 3-SPG can be reflected by two mirrors MR and emitted outside the display panel 110. That is, the number n(MR) of mirrors MR around the light-emitting device of the middle sub-pixel SP26 among the three sub-pixels SP25 / SP26 / SP27 can be two.

[0215] Refer to Figure 8 and Figure 10 , in the second sub-pixel row SPR2, the light emitted from each of the two sub-pixels SP25 / SP27 located on the left and right among the three sub-pixels SP25 / SP26 / SP27 included in the third sub-pixel group 3-SPG can be reflected by three mirrors MR and emitted outside the display panel 110. That is, the number n(MR) of mirrors MR around the light-emitting device of each of the two sub-pixels SP25 / SP27 located on the left and right among the three sub-pixels SP25 / SP26 / SP27 included in the third sub-pixel group 3-SPG can be three.

[0216] Refer to Figure 8 , in the third sub-pixel row SPR3, the light emitted from one sub-pixel SP32, SP35 or SP39 included in the first sub-pixel group 1-SPG can be directly emitted outside the display panel 110 without being reflected by the mirror MR. That is, the number n(MR) of mirrors MR around the light-emitting device of one sub-pixel SP32, SP35 or SP39 included in the first sub-pixel group 1-SPG can be zero.

[0217] Refer to Figure 8 , in the third sub-pixel row SPR3, the light emitted from each of the two sub-pixels SP33 / SP34 included in the second sub-pixel group 2-SPG can be reflected from three mirrors MR and emitted outside the display panel 110. That is, the number n(MR) of mirrors MR around the light-emitting device of each of the two sub-pixels SP33 / SP34 included in the second sub-pixel group 2-SPG can be three.

[0218] Refer to Figure 8 , in the third sub-pixel row SPR3, the light emitted from the middle sub-pixel SP37 among the three sub-pixels SP36 / SP37 / SP38 included in the third sub-pixel group 3-SPG can be reflected by two mirrors MR and emitted outside the display panel 110. That is, the number n(MR) of mirrors MR around the light-emitting device of the middle sub-pixel SP37 among the three sub-pixels SP36 / SP37 / SP38 included in the third sub-pixel group 3-SPG can be two.

[0219] Reference Figure 8 , in the third subpixel row SPR3, light emitted from each of the two subpixels SP36 / SP38 located on the left and right sides of the three subpixels SP36 / SP37 / SP38 included in the third subpixel group 3-SPG may be reflected by three mirrors MR and emitted to the outside of the display panel 110. That is, the number n(MR) of the mirrors MR located around the light emitting device of each of the two subpixels SP36 / SP38 located on the left and right sides of the three subpixels SP36 / SP37 / SP38 included in the third subpixel group 3-SPG may be three.

[0220] Reference Figure 9 and Figure 10 , a display panel 110 according to an embodiment of the present disclosure may include: a substrate 111; a first protective layer 610 located on the substrate 111; insulating layers 620A, 620B, 620C, 620D, 620E and 620F on the first protective layer 610; light-emitting devices ED11, ED12, ED14, ED15, ED16, ED18, ED19, ED22, ED23, ED25, ED26, ED27 and ED29 on the insulating layers 620A, 620B, 620C, 620D, 620E and 620F; and light-emitting devices ED13, ED17, ED21, ED24 and ED28 on the first protective layer 610.

[0221] Reference Figure 8 、 Figure 9 and Figure 10 In the display panel 110 according to an embodiment of the present disclosure, in order to form a light extraction structure for high resolution, the common electrode CE may have an inclined surface SLP corresponding to the mirror MR on each side of the insulating layers 620A, 620B, 620C, 620D, 620E, and 620F.

[0222] For example, the common electrode CE may have the inclined surfaces SLP at four sides of each of the insulating layers 620A, 620B, 620C, 620D, 620E, and 620F.

[0223] As an example, the common electrode CE may have four inclined surfaces SLP on four sides of the first insulating layer 620A. Therefore, among the two first light-emitting devices ED11 and ED12 on the first insulating layer 620A, three first inclined surfaces SLP1 of the common electrode CE may be formed at three sides (e.g., the upper side, the lower side, and the left side) among the four sides of the first light-emitting device ED11 located on the left, and three second inclined surfaces SLP2 of the common electrode CE may be present at three sides (e.g., the upper side, the lower side, and the right side) among the four sides of the first light-emitting device ED12 located on the right.

[0224] In this case, it may be meant that among the two first light-emitting devices ED11 and ED12 on the first insulating layer 620A, the first sub-pixel SP11 including the first light-emitting device ED11 located on the left has three mirrors MR, and the first sub-pixel SP12 including the first light-emitting device ED12 located on the right has three mirrors MR.

[0225] As another example, the common electrode CE may have four inclined surfaces SLP on four sides of the second insulating layer 620B. Therefore, among the three third light-emitting devices ED14, ED15, and ED16 on the second insulating layer 620B, three third inclined surfaces SLP3 of the common electrode CE may be present at three sides (e.g., the upper side, the lower side, and the left side) among the four sides of the third light-emitting device ED14 located on the left, two fourth inclined surfaces SLP4 of the common electrode CE may be present at two sides (e.g., the upper side and the lower side) among the four sides of the third light-emitting device ED15 located in the middle, and three fifth inclined surfaces SLP5 of the common electrode CE may be present at three sides (e.g., the upper side, the lower side, and the right side) among the four sides of the third light-emitting device ED16 located on the right.

[0226] In this case, it may be meant that among the three third light-emitting devices ED14, ED15, and ED16 on the second insulating layer 620B, the third sub-pixel SP14 including the third light-emitting device ED14 located on the left has three mirrors MR, the third sub-pixel SP15 including the third light-emitting device ED15 located in the middle has two mirrors MR, and the third sub-pixel SP16 including the third light-emitting device ED16 located on the right has three mirrors MR.

[0227] Referring to Figure 9 , the common electrode CE may include: an inclined surface SLP2 extending from the top of the first pixel electrode PE12, passing through one side of the first pixel electrode PE12, and extending to the top of the second pixel electrode PE13; and an inclined surface SLP3 extending from the top of the third pixel electrode PE14, passing through the other side of the third pixel electrode PE14, and extending to the top of the second pixel electrode PE13.

[0228] Reference Figure 9 , the vertical structure of the light extraction structure for high resolution according to an embodiment of the present disclosure will be studied in more detail.

[0229] The display panel 110 according to an embodiment of the present disclosure may include: a substrate 111; a first protective layer 610 on the substrate 111; insulating layers 620A, 620B, and 620C on the first protective layer 610; light emitting devices ED11, ED12, ED14, ED1,5, ED16, ED18, and ED19 located on the insulating layers 620A, 620B, and 620C and arranged in the first sub-pixel row SPR1; and light emitting devices ED13 and ED17 located on the first protective layer 610 and arranged in the first sub-pixel row SPR1.

[0230] Reference Figure 9 , the insulating layers 620A, 620B, and 620C on the first protective layer 610 may include a first insulating layer 620A, a second insulating layer 620B, and a third insulating layer 620C.

[0231] The first insulating layer 620A, the second insulating layer 620B, and the third insulating layer 620C may be insulating layers in which Figure 6 and Figure 7 the second protective layer 620 is patterned. The first insulating layer 620A, the second insulating layer 620B, and the third insulating layer 620C may be made of the same insulating material forming Figure 6 and Figure 7 the second protective layer 620 therein.

[0232] Each of the first insulating layer 620A, the second insulating layer 620B, and the third insulating layer 620C may be an organic layer containing an organic material. Each of the first insulating layer 620A, the second insulating layer 620B, and the third insulating layer 620C may have a flat top surface. The first insulating layer 620A, the second insulating layer 620B, and the third insulating layer 620C may be insulating layers formed together during the process. The first insulating layer 620A, the second insulating layer 620B, and the third insulating layer 620C may be layers of the same insulating material and may be separated from each other in an island shape. That is, the first insulating layer 620A, the second insulating layer 620B, and the third insulating layer 620C may be spaced apart from each other.

[0233] Reference Figure 9, the light-emitting devices ED11, ED12, ED14, ED15, ED16, ED18, and ED19 on the insulating layers 620A, 620B, and 620C may include: the light-emitting devices ED11 and ED12 on the first insulating layer 620A; the light-emitting devices ED14, ED15, and ED16 on the second insulating layer 620B; and the light-emitting devices ED18 and ED19 on the third insulating layer 620C.

[0234] Referring to Figure 9 , the light-emitting devices ED13 and ED17 on the first protective layer 610 may include: the light-emitting device ED13 located on the first protective layer 610 and between the first insulating layer 620A and the second insulating layer 620B; and the light-emitting device ED17 located on the first protective layer 610 and between the second insulating layer 620B and the third insulating layer 620C.

[0235] Figure 9 The light-emitting devices ED11, ED12, ED13, ED14, ED15, ED16, ED17, ED18, and ED19 shown may be included in the sub-pixels SP11, SP12, SP13, SP14, SP15, SP16, SP17, SP18, and SP19 arranged in Figure 8 the first sub-pixel row SPR1.

[0236] Referring to Figure 8 and Figure 9 , the sub-pixels SP11, SP12, SP13, SP14, SP15, SP16, SP17, SP18, and SP19 arranged in the first sub-pixel row SPR1 may include N first sub-pixels (e.g., SP11 / SP12, SP18 / SP19 when N = 2), K second sub-pixels (e.g., SP13, SP17 when K = 1), and M third sub-pixels (e.g., SP14 / SP15 / SP16 when M = 3).

[0237] In a light extraction structure for high resolution according to an embodiment of the present disclosure, N may be a natural number of 2 or greater, K may be a natural number of 1 or greater, and M may be a natural number of 2 or greater. According to Figure 8 and Figure 9 's example, N may be 2, K may be 1, and M may be 3.

[0238] Referring to Figure 9 , the N first sub-pixels SP11 and SP12 may include N first pixel electrodes PE11 and PE12 provided on the first insulating layer 620A.

[0239] The K second sub-pixels SP13 may include K second pixel electrodes PE13 disposed on a first protective layer 610 under a first insulating layer 620A.

[0240] The M third sub-pixels SP14, SP15, and SP16 may include M third pixel electrodes PE14, PE15, and PE16 disposed on a second insulating layer 620B.

[0241] Refer to Figure 9 , the first insulating layer 620A may be located on the first protective layer 610 and may be disposed in regions of the N first sub-pixels SP11 and SP12.

[0242] The second insulating layer 620B may be located on the first protective layer 610 and may be disposed in regions of the M third sub-pixels SP14, SP15, and SP16.

[0243] Refer to Figure 9 , the N first pixel electrodes PE11 and PE12 may be located on the first insulating layer 620A and may be included in the N first sub-pixels SP11 and SP12.

[0244] The K second pixel electrodes PE13 may be located on the first protective layer 610, may be disposed between one side of the first insulating layer 620A and the other side of the second insulating layer 620B, and may be included in the K second sub-pixels SP13.

[0245] The M third pixel electrodes PE14, PE15, and PE16 may be located on the second insulating layer 620B and may be included in the M third sub-pixels SP14, SP15, and SP16.

[0246] Refer to Figure 9 , an intermediate layer EL may be disposed on the N first pixel electrodes PE11 and PE12, the K second pixel electrodes PE13, and the M third pixel electrodes PE14, PE15, and PE16. A common electrode CE may be located on the intermediate layer EL. As an example, the common electrode CE may be a reflective electrode. That is, the common electrode CE may include a reflective electrode material.

[0247] The intermediate EL layer may include a light-emitting layer EML and a common intermediate EL_COM layer. The emission layer EML may be arranged to overlap with each of N first pixel electrodes PE11 and PE12, K second pixel electrodes PE13, and M third pixel electrodes PE14, PE15, and PE16. The common intermediate EL_COM layer may include a first common intermediate layer COM1 and a second common intermediate layer COM2. The first common intermediate layer COM1 may be commonly disposed between N first pixel electrodes PE11 and PE12, K second pixel electrodes PE13, and M third pixel electrodes PE14, PE15, and PE16. The second common intermediate layer COM2 may be commonly disposed between (N + K + M) emission layers EML and a common electrode CE.

[0248] Referring to Figure 9 , the K second pixel electrodes PE13 may be positioned closer to the substrate 111 than the N first pixel electrodes PE11 and PE1 and the M third pixel electrodes PE14, PE15, and PE16. That is, the N first pixel electrodes PE11 and PE12 and the M third pixel electrodes PE14, PE15, and PE16 may be positioned higher from the substrate 111 than the K second pixel electrodes PE13.

[0249] Referring to Figure 9 , the common electrode CE may include: a first common electrode portion CE1 located on the first insulating layer 620A; a second common electrode portion CE2 disposed between one side of the first insulating layer 620A and the other side of the second insulating layer 620B and located on the first protective layer 610; and a third common electrode portion CE3 located on the second insulating layer 620B.

[0250] The second common electrode portion CE2 may be positioned closer to the substrate 111 than the first common electrode portion CE1 and the third common electrode portion CE3. The second common electrode portion CE2 may be positioned farther from the substrate 111 than the K second pixel electrodes PE13. The second common electrode portion CE2 may be positioned closer to the substrate 111 than the N first pixel electrodes PE11 and PE12 and the M third pixel electrodes PE14, PE15, and PE16.

[0251] Referring to Figure 9 , the common electrode CE may include: a first connection portion CE12 connecting the first common electrode portion CE1 and the second common electrode portion CE2; and a second connection portion CE13 connecting the second common electrode portion CE2 and the third common electrode portion CE3.

[0252] Referring to Figure 9, the first connection portion CE12 and the second connection portion CE13 of the common electrode CE may be formed to be inclined. The first connection portion CE12 may have an inclined surface SLP2, and the second connection portion CE13 may have an inclined surface SLP3.

[0253] Refer to Figure 8 and Figure 9 , the first connection portion CE12 and the second connection portion CE13 of the common electrode CE may be a mirror MR to improve the light extraction efficiency. The light emitted from the light-emitting device ED12 on the first insulating layer 620A and the light emitted from the light-emitting device ED14 on the second insulating layer 620B may be reflected by the first connection portion CE12 and the second connection portion CE13 of the common electrode CE and travel toward the viewing surface (e.g., the back or rear surface of the substrate 111).

[0254] Reference will be made to Figure 10 to describe the light extraction structure in the second sub-pixel row SPR2. The light extraction structure in the second sub-pixel row SPR2 may be substantially the same as the light extraction structure in the first sub-pixel row SPR1.

[0255] Refer to Figure 10 , the second sub-pixel row SPR2 may include nine sub-pixels SP21, SP22, SP23, SP24, SP25, SP26, SP27, SP28, and SP29.

[0256] The second sub-pixel row SPR2 may include N fourth sub-pixels SP22 and SP23, K fifth sub-pixels SP24, and M sixth sub-pixels SP25, SP26, and SP27. N may be a natural number of 2 or greater, K may be a natural number of 1 or greater, and M may be a natural number of 2 or greater. In Figure 8 and Figure 9 example, N may be 2, K may be 1, and M may be 3.

[0257] Refer to Figure 10 , insulating layers 620D, 620E, and 620F spaced apart from each other may be provided in the region of the second sub-pixel row SPR2.

[0258] The insulating layers 620D, 620E, and 620F provided in the region of the second sub-pixel row SPR2 may include: a fourth insulating layer 620D located on the first protective layer 610 and provided in the region of N fourth sub-pixels SP22 and SP23; and a fifth insulating layer 620E located on the first protective layer 610 and provided in the region of M sixth sub-pixels SP25, SP26, and SP27.

[0259] Refer to Figure 10, the second sub-pixel row SPR2 may include nine pixel electrodes PE21, PE22, PE23, PE24, PE25, PE26, PE27, PE8, and PE29 included in nine sub-pixels SP21, SP22, SP23, SP24, SP25, SP26, SP27, SP28, and SP29.

[0260] Refer to Figure 10 , the nine pixel electrodes PE21, PE22, PE23, PE24, PE25, PE26, PE27, PE8, and PE29 included in the second sub-pixel row SPR2 may include: N fourth pixel electrodes PE22 and PE23 located on the fourth insulating layer 620D and included in N fourth sub-pixels SP22 and SP23; K fifth pixel electrodes PE24 located on the first protective layer 610, between one side of the fourth insulating layer 620D and the other side of the fifth insulating layer 620E and included in K fifth sub-pixels SP24; and M sixth pixel electrodes PE25, PE26, and PE27 located on the fifth insulating layer 620E and included in M sixth sub-pixels SP25, SP26, and SP27.

[0261] Refer to Figure 8 , Figure 9 and Figure 10 , N first sub-pixels SP11 and SP12 may be respectively arranged in the first sub-pixel column to the Nth sub-pixel column (for example, SPC1, SPC2 when N = 2). N fourth sub-pixels SP22, SP23 may be respectively arranged in the second sub-pixel column to the (N + 1)th sub-pixel column shifted by one sub-pixel width (for example, SPC2, SPC3 when N = 2).

[0262] Refer to Figure 10 , the fourth insulating layer 620D and the fifth insulating layer 620E may be layers of the same insulating material and may be separated from each other in an island shape.

[0263] Refer to Figure 8 , Figure 9 and Figure 10 , insulating layers 620A, 620B, and 620C may be provided in the first sub-pixel row SPR1, and insulating layers 620D, 620E, and 620F may be provided in the second sub-pixel row SPR2.

[0264] According to Figure 8 and Figure 9 's example, N may be 2, K may be 1, and M may be 3.

[0265] Refer to Figure 8 and Figure 9, the first sub-pixel row SPR1 may include two first sub-pixels SP11 and SP12, one second sub-pixel SP13, and three third sub-pixels SP14, SP15, and SP16.

[0266] Referring to Figure 8 and Figure 9 , the two first sub-pixels SP11 and SP12 may respectively include two first pixel electrodes PE11 and PE12 on the first insulating layer 620A. One second sub-pixel SP13 may include one second pixel electrode PE13 on the first protective layer 610. The three third sub-pixels SP14, SP15, and SP16 may each include three third pixel electrodes PE14, PE15, and PE16 on the second insulating layer 620B.

[0267] Referring to Figure 8 and Figure 9 , the common electrode CE may include: three first inclined surfaces SLP1 on three sides of four sides of the left first sub-pixel SP11 among the two first sub-pixels SP11 and SP12; three second inclined surfaces SLP2 on three sides of four sides of the right first sub-pixel SP12 among the two first sub-pixels SP11 and SP12; three third inclined surfaces SLP3 on three sides of four sides of the left third sub-pixel SP14 among the three third sub-pixels SP14, SP15, and SP16; two fourth inclined surfaces SLP4 on two sides of four sides of the middle third sub-pixel SP15 among the three third sub-pixels SP14, SP15, and SP16; and three fifth inclined surfaces SLP5 on three sides of four sides of the right third sub-pixel SP16 among the three third sub-pixels SP14, SP15, and SP16.

[0268] Referring to Figure 8 and Figure 9 , the three first inclined surfaces SLP1 and the three second inclined surfaces SLP2 may be formed on the side surfaces of the first insulating layer 620A. The three third inclined surfaces SLP3, the two fourth inclined surfaces SLP4, and the three fifth inclined surfaces SLP5 may be formed on the side surfaces of the second insulating layer 620B.

[0269] Referring to Figure 8 and Figure 9 , the three first inclined surfaces SLP1, the three second inclined surfaces SLP2, the three third inclined surfaces SLP3, the two fourth inclined surfaces SLP4, and the three fifth inclined surfaces SLP5 may be mirrors MR to improve the light extraction efficiency.

[0270] Referring to Figure 8 and Figure 9The number of inclined surfaces formed around a sub-pixel can be defined as the number of mirrors n(MR) of a sub-pixel.

[0271] Light emitted from the first sub-pixel SP11 located on the left side of the two first sub-pixels SP11 and SP12 can be reflected by three first inclined surfaces SLP1.

[0272] Light emitted from the first sub-pixel SP12 located on the right side of the two first sub-pixels SP11, SP12 can be reflected by three second inclined surfaces SLP2.

[0273] Light emitted from the third sub-pixel SP14 located on the left side among the three third sub-pixels SP14, SP15 and SP16 can be reflected by three third inclined surfaces SLP3.

[0274] Light emitted from the third sub-pixel SP15 located in the middle among the three third sub-pixels SP14, SP15 and SP16 can be reflected by two fourth inclined surfaces SLP4.

[0275] Light emitted from the third sub-pixel SP16 located on the right side among the three third sub-pixels SP14, SP15 and SP16 can be reflected by three fifth inclined surfaces SLP5.

[0276] Refer to Figure 8 and Figure 9 According to the light extraction structure for high resolution according to an embodiment of the present disclosure, the insulating layers 620A, 620B, and 620C provided on the first protective layer 610 can be spaced apart from each other. In addition, in the regions where the insulating layers 620A, 620B, and 620C are spaced apart, the common electrode CE may include connection portions CE12 and CE13 that connect the flat common electrode portions CE1, CE2, and CE3 and have inclined surfaces SLP2 and SLP3. The connection portions CE12 and CE13 of the common electrode CE may correspond to the mirrors MR that reflect light. Therefore, the light extraction efficiency can be improved.

[0277] The light extraction efficiency may vary according to the number of mirrors n(MR) existing around the light-emitting device. The number of mirrors n(MR) may be the number of connection portions of the common electrode CE existing around a sub-pixel (i.e., the light-emitting device in a sub-pixel), and may be the number of inclined surfaces SLP (i.e., the inclined surfaces of the connection portion) of the common electrode CE existing around a sub-pixel (i.e., the light-emitting device in a sub-pixel).

[0278] According to the light extraction structure for high resolution according to an embodiment of the present disclosure, one or more mirrors MR exist around a sub-pixel, so that the light extraction efficiency of the corresponding sub-pixel can be improved.

[0279] In addition, in the light extraction structure for high resolution according to an embodiment of the present disclosure, the mirror MR included in the light extraction structure may be formed in units of N or M sub-pixels, rather than forming the mirror MR included in the light extraction structure between two adjacent light-emitting devices. Therefore, the space for forming the light extraction structure can be reduced, which can contribute to implementing the high-resolution display panel 110.

[0280] Meanwhile, if the number n(MR) of mirrors around the light-emitting device of one sub-pixel increases, the light extraction efficiency of one sub-pixel can be improved. For example, if the number n(MR) of mirrors around the light-emitting device of the first sub-pixel is 0, the light extraction efficiency of the first sub-pixel can be a reference efficiency value (e.g., 0(%)). If the number n(MR) of mirrors around the light-emitting device of the first sub-pixel is 2, the light extraction efficiency of the first sub-pixel can be a first efficiency value (e.g., 10(%)). If the number n(MR) of mirrors around the light-emitting device of the first sub-pixel is 3, the light extraction efficiency of the first sub-pixel can be a second efficiency value (e.g., 15(%)). Hereinafter, for ease of explanation, an example will be illustrated in which the reference efficiency value is 0(%), the first efficiency value is 10(%), and the second efficiency value is 20(%).

[0281] Hereinafter, for example, in the case where N = 2, K = 1, and M = 3, refer to Figures 11 to 13 Exemplarily shown is a light extraction structure for high resolution according to an embodiment of the present disclosure. Explain. However, in the following description, reference will also be made together to Figure 8 、 Figure 9 and Figure 10 .

[0282] Figure 11 Shows the number n(MR) of mirrors of each sub-pixel of the display panel 110 according to an embodiment of the present disclosure.

[0283] Refer to Figure 11 , the number n(MR) of mirrors of each sub-pixel in two sub-pixels SP11 / SP12, SP18 / SP19 and SP22 / SP23, SP33 / SP34 included in each second sub-pixel group 2-SPG is three.

[0284] Among the three sub-pixels SP14 / SP15 / SP16, SP25 / SP26 / SP27, and SP36 / SP37 / SP38 included in each third sub-pixel group 3-SPG, the number of mirrors n(MR) of the central sub-pixel SP15, SP26, and SP37 can be two, and the number of mirrors n(MR) of each of the two sub-pixels SP14 / SP16, SP25 / SP27, and SP36 / SP38 located on the left and right can be three.

[0285] The number of mirrors n(MR) of each of the sub-pixels SP13, SP17, SP21, SP24, SP28, SP32, SP35, and SP39 included in each first sub-pixel group 1-SPG can be zero.

[0286] Referring to Figure 11 , the number of mirrors n(MR) of each of the nine sub-pixels SP11 to SP19 arranged in the first sub-pixel row SPR1 can be 3, 3, 0, 3, 2, 3, 0, 3, 3. The number of mirrors n(MR) of each of the nine sub-pixels SP21 to SP29 arranged in the second sub-pixel row SPR2 can be 0, 3, 3, 0, 3, 2, 3, 0, 3. The number of mirrors n(MR) of each of the nine sub-pixels SP31 to SP39 arranged in the third sub-pixel row SPR3 can be 3, 0, 3, 3, 0, 3, 2, 3, 0.

[0287] Figure 12 The light extraction efficiency of each sub-pixel of the display panel 110 according to an embodiment of the present disclosure is shown.

[0288] Referring to Figure 12 , if the number of mirrors n(MR) around the light-emitting device is 0, the light extraction efficiency of the corresponding sub-pixels SP13, SP17, SP21, SP24, SP28, SP32, SP35, and SP39 can be 0%. If the number of mirrors n(MR) around the light-emitting device is 2, the light extraction efficiency of the corresponding sub-pixels SP15, SP26, and SP37 can be 10%. If the number of mirrors n(MR) around the light-emitting device is 3, the light extraction efficiency of the corresponding sub-pixels SP11, SP12, SP14, SP16, SP18, SP19, SP22, SP23, SP25, SP27, SP29, SP31, SP33, SP34, SP36, and SP38 can be 15%.

[0289] For a light extraction structure for high resolution according to an embodiment of the present disclosure, the light extraction efficiency may indicate the degree of increase in the amount of light emitted to the outside of the display panel 110 in the case of having a mirror MR with a corresponding number of mirrors n(MR) compared to the amount of light emitted to the outside of the display panel 110 without the mirror MR.

[0290] Referring to Figure 12 , the light extraction efficiency of each of the nine sub-pixels SP11 to SP19 arranged in the first sub-pixel row SPR1 may be 15%, 15%, 0%, 15%, 10%, 15%, 0%, 15%, 15%. The light extraction efficiency of each of the nine sub-pixels SP21 to SP29 arranged in the second sub-pixel row SPR2 may be 0%, 15%, 15%, 0%, 15%, 10%, 15%, 0%, 15%. The light extraction efficiency of each of the nine sub-pixels SP31 to SP39 arranged in the third sub-pixel row SPR3 may be 15%, 0%, 15%, 15%, 0%, 15%, 10%, 15%, 0%.

[0291] Figure 13 Shows the light emission state of each sub-pixel of a display panel according to an embodiment of the present disclosure.

[0292] Referring to Figure 12 and Figure 13 , even when the same data voltage VDATA is supplied to the 29 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39, the larger the number of mirrors n(MR) in the sub-pixel and the higher the light extraction efficiency, the brighter the sub-pixel may be.

[0293] Referring to Figure 12 and Figure 13 , even when the same data voltage VDATA is supplied to the 29 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39, the emission brightness of the sub-pixel with a light extraction efficiency of 15%, the emission brightness of the sub-pixel with a light extraction efficiency of 10%, and the emission brightness of the sub-pixel with a light extraction efficiency of 0% may also be different from each other due to differences in the light extraction structure (e.g., the number of mirrors, light extraction efficiency).

[0294] Referring to Figure 12 and Figure 13, even if the same data voltage VDATA is supplied to the 29 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39, the emission luminance of the sub-pixel with a light extraction efficiency of 15% may be the brightest, and the emission luminance of the sub-pixel with a light extraction efficiency of 0% may be the darkest. The emission luminance of the sub-pixel with a light extraction efficiency of 10% can be between the emission luminance of the sub-pixel with a light extraction efficiency of 0% and the emission luminance of the sub-pixel with a light extraction efficiency of 15%.

[0295] The light extraction structure for high resolution according to an embodiment of the present disclosure may have no mirror MR around the light-emitting devices of some sub-pixels, and the number of mirrors n(MR) of each sub-pixel may be different from each other.

[0296] Therefore, even if the same data voltage VDATA is supplied to the plurality of sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39, the emission luminance of some of the plurality of sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may be different from the emission luminance of other sub-pixels. This luminance deviation may cause spots on the display screen.

[0297] The light extraction structure for high resolution according to an embodiment of the present disclosure can effectively improve the light extraction efficiency while reducing the area for forming the light extraction structure in the display panel 110. However, in the case of the light extraction structure for high resolution according to an embodiment of the present disclosure, a deviation in emission luminance may occur between sub-pixels.

[0298] Therefore, the display device 100 according to an embodiment of the present disclosure can perform data compensation processing to reduce or eliminate the luminance deviation caused by the deviation in light extraction efficiency between sub-pixels.

[0299] Hereinafter, reference will be made to Figure 14 and Figure 15 to describe a compensation function capable of reducing or eliminating the difference in emission luminance between sub-pixels caused by the light extraction structure for high resolution.

[0300] Figure 14 A data compensation circuit 1400 considering the light extraction structure of the display device 100 according to an embodiment of the present disclosure is shown.

[0301] Reference is made to Figure 14, a data compensation circuit 1400 for the light extraction structure of the display device 100 according to an embodiment of the present disclosure may include: a lookup table 1410 including correction control information for each sub-pixel considering the light extraction structure; a data input unit 1420 that receives data for each sub-pixel; and a data correction unit 1430 that generates corrected data for each sub-pixel by correcting the data for each sub-pixel based on the correction control information for each sub-pixel.

[0302] For example, the correction control information for each sub-pixel may include at least one of the number of mirrors for each sub-pixel, the light extraction efficiency for each sub-pixel, and the data compensation value for each sub-pixel. The number of mirrors for each sub-pixel may correspond to or be proportional to the number of inclined surfaces of the common electrode around the light-emitting device of the corresponding sub-pixel. The light extraction efficiency for each sub-pixel may be proportional to the number of mirrors for each sub-pixel. The data compensation value for each sub-pixel may be inversely proportional to the number of mirrors for each sub-pixel or the light extraction efficiency for each sub-pixel.

[0303] The number of mirrors for each sub-pixel and the light extraction efficiency for each sub-pixel may correspond to or be similar to each other. For example, the number of mirrors for each sub-pixel and the light extraction efficiency for each sub-pixel may be proportional. The fewer the number of mirrors for each sub-pixel, the lower the light extraction efficiency for each sub-pixel, and the more the number of mirrors for each sub-pixel, the higher the light extraction efficiency for each sub-pixel.

[0304] The data compensation value for each sub-pixel may be a value corresponding to the number of mirrors for each sub-pixel or the light extraction efficiency value for each sub-pixel. For example, as the number of mirrors decreases, the data compensation value for the corresponding sub-pixel may increase. The larger the number of mirrors, the smaller the data compensation value for the corresponding sub-pixel. As another example, the lower the light extraction efficiency value, the larger the data compensation value for the corresponding sub-pixel. The higher the light extraction efficiency value, the smaller the data compensation value for the corresponding sub-pixel.

[0305] As an example, the data compensation circuit 1400 may be included in the controller 140. As another example, the data compensation circuit 1400 may be included in the data driving circuit 120. As another example, the data compensation circuit 1400 may be provided outside the controller 140 and the data driving circuit 120.

[0306] In the case of using the above data compensation circuit 1400, even if there are differences in light extraction efficiency between sub-pixels due to the light extraction structure for high resolution according to an embodiment of the present disclosure, the light-emitting states of sub-pixels with different light extraction efficiencies can all become the same. Therefore, image spots caused by brightness deviation can be prevented.

[0307] In the following, the data compensation of the data compensation circuit 1400 will be described in more detail.

[0308] Figure 15 The data compensation values of each sub-pixel considering the light extraction structure of the display panel 110 according to an embodiment of the present disclosure are shown. Figure 16 The light emission states of each sub-pixel after data compensation considering the light extraction structure of the display panel 110 according to an embodiment of the present disclosure are shown.

[0309] The data compensation value of each sub-pixel may be a value considering the light extraction structure. That is, the data compensation value of each sub-pixel may be a value corresponding to the light extraction efficiency value of each sub-pixel.

[0310] The lower the light extraction efficiency value, the greater the data compensation value of the corresponding sub-pixel may be. The higher the light extraction efficiency value, the smaller the data compensation value of the corresponding sub-pixel may be.

[0311] A low light extraction efficiency value means that the amount of light emitted to the outside of the display panel 110 is small, resulting in low brightness. Therefore, for a sub-pixel having a low light extraction efficiency value, data compensation processing may be required to supply data that can further increase the emission brightness.

[0312] A high light extraction efficiency value means that the amount of light emitted to the outside of the display panel 110 is large, resulting in high brightness. Therefore, for a sub-pixel having a high light extraction efficiency value, data compensation processing may be required to supply data that does not increase the brightness of the light or only slightly increases the brightness.

[0313] The data compensation value of each sub-pixel is a value added to the original data. [[ID=~]]

[0314] As the data compensation value increases, the brightness of the corresponding sub-pixel may become brighter compared to before the data compensation processing.

[0315] As the data compensation value becomes smaller, the brightness of the corresponding sub-pixel may become slightly brighter compared to before the data compensation processing.

[0316] If the data compensation value is zero, the data supplied to the corresponding sub-pixel is not compensated, so the brightness of the sub-pixel does not change.

[0317] [[ID=~]]For example, when the light extraction efficiency value is 15%, the data compensation value of the corresponding sub-pixel may be the reference compensation value COMP_REF. If the light extraction efficiency value is 10%, the data compensation value of the corresponding sub-pixel may be the first compensation value COMP1. If the light extraction efficiency value is 0%, the data compensation value of the corresponding sub-pixel may be the second compensation value COMP2.

[0318] Note: There seems to be a duplicate tag in the original text ( and are likely duplicates). I've left them as they are in the translation according to the instructions. If this is an error, it might need to be corrected in the original text source.For example, the second compensation value COMP2 can be greater than the first compensation value COMP1, and the first compensation value COMP can be greater than the reference compensation value COMP_REF. For example, the reference compensation value COMP_REF can be zero.

[0319] Since the mirror number is determined for each sub-pixel, the light extraction efficiency value of each sub-pixel and the data compensation value of each sub-pixel can be determined in advance. Therefore, at least one of the mirror number of each sub-pixel, the light extraction efficiency value of each sub-pixel, and the data compensation value of each sub-pixel can be stored in the look-up table 1410 in advance.

[0320] The data correction unit 1430 of the data compensation circuit 1400 considering the light extraction structure can correct the original data of each sub-pixel by using at least one of the mirror number of each sub-pixel, the light extraction efficiency value of each sub-pixel, and the data compensation value of each sub-pixel and generate the corrected data of each sub-pixel.

[0321] The data driving circuit 120 can convert the corrected data of each sub-pixel into a data voltage as an analog voltage and supply the data voltage to the corresponding sub-pixel.

[0322] Each of the N first sub-pixels (e.g., SP11, SP12) included in each second sub-pixel group 2-SPG can be supplied with a first data voltage for emitting light of a first luminance.

[0323] A second data voltage for emitting light of a second luminance can be supplied to each of the K second sub-pixels (e.g., SP13) included in each first sub-pixel group 1-SPG.

[0324] Each of the M third sub-pixels (e.g., SP14, SP15, SP16) included in each third sub-pixel group 3-SPG can be supplied with a third data voltage for emitting light of a third luminance.

[0325] If as Figure 15 shown, the first luminance, the second luminance, and the third luminance are all the same, the second data voltage can be different from the first data voltage and the third data voltage. For example, if the first luminance, the second luminance, and the third luminance are the same, the second data voltage can be higher than the first data voltage and the third data voltage.

[0326] Since the mirror number of the K second sub-pixels (e.g., SP13) included in each first sub-pixel group 1-SPG is 0, the light extraction efficiency value may be the lowest. Therefore, if the data compensation process is not performed on the K second sub-pixels (e.g., SP13) included in each first sub-pixel group 1-SPG, the emission luminance may also be the lowest.

[0327] Therefore, the data compensation value for the K second sub-pixels (e.g., SP13) included in each first sub-pixel group 1-SPG can be the highest data compensation value (e.g., the second compensation value COMP2). Therefore, the second data voltage supplied to the K second sub-pixels (e.g., SP13) included in each first sub-pixel group 1-SPG can be the highest.

[0328] The case of N = 2, K = 1, and M = 3 will be described as an example as follows.

[0329] Among the two first sub-pixels SP11 and SP12 included in each second sub-pixel group 2-SPG, the first sub-pixel SP11 on the left can be supplied with a first data voltage for emitting light of a first luminance.

[0330] Among the two first sub-pixels SP11 and SP12 included in each second sub-pixel group 2-SPG, the first sub-pixel SP12 on the right can be supplied with a second data voltage for emitting light of a second luminance.

[0331] One second sub-pixel SP13 included in each first sub-pixel group 1-SPG can be supplied with a third data voltage for emitting light of a third luminance.

[0332] Among the three third sub-pixels SP14, SP15, and SP16 included in each third sub-pixel group 3-SPG, the third sub-pixel SP14 on the left can be supplied with a fourth data voltage for emitting light of a fourth luminance.

[0333] Among the three third sub-pixels SP14, SP15, and SP16 included in each third sub-pixel group 3-SPG, the third sub-pixel SP15 in the middle can be supplied with a fifth data voltage for emitting light of a fifth luminance.

[0334] Among the three third sub-pixels SP14, SP15, and SP16 included in each third sub-pixel group 3-SPG, the third sub-pixel SP16 on the right can be supplied with a sixth data voltage for emitting light of a sixth luminance.

[0335] If as Figure 15 shown, the first luminance to the sixth luminance are all the same, then at least one of the first data voltage to the sixth data voltage can be different from the other data voltages. More specifically, if as Figure 15 shown, the first luminance to the sixth luminance are all the same, then the third data voltage can be higher than the first data voltage, the second data voltage, the fourth data voltage, the fifth data voltage, and the sixth data voltage, and the fifth data voltage can be higher than the first data voltage, the second data voltage, the fourth data voltage, and the sixth data voltage.

[0336] Reference Figure 16 After data compensation of the light extraction structure in consideration of an embodiment according to the present disclosure, according to the difference in the light extraction structure, the emission states of sub-pixels with different light extraction efficiencies can all become the same. Therefore, image blotches due to brightness deviation can be prevented.

[0337] The display device 100 according to an embodiment of the present disclosure as described above may include: a substrate 111; a first protective layer 610 on the substrate 111; a first insulating layer 620A on the first protective layer 610; a second insulating layer 620B on the first protective layer 610 and laterally spaced apart from the first insulating layer 620A; first light-emitting devices ED11 and ED12 on the first insulating layer 620A and included in first sub-pixels SP11 and SP12; a second light-emitting device ED13 on the first protective layer 610, disposed on side directions of the first insulating layer 620A and the second insulating layer 620B and included in a second sub-pixel SP13; and third light-emitting devices ED14, ED15, and ED16 on the second insulating layer 620B and included in third sub-pixels SP14, SP15, and SP16.

[0338] The second light-emitting device ED13 may be positioned closer to the substrate 111 than the first light-emitting devices ED11 and ED12 and the third light-emitting devices ED14, ED15, and ED16.

[0339] If the emission brightness of the first sub-pixels SP11 and SP12, the emission brightness of the second sub-pixel SP13, and the emission brightness of the third sub-pixels SP14, SP15, and SP16 are the same, the data voltage supplied to the second sub-pixel SP13 may be higher than the data voltage supplied to each of the first sub-pixels SP11 and SP12 and the third sub-pixels SP14, SP15, and SP16.

[0340] The display device 100 according to an embodiment of the present disclosure may further include: first pixel electrodes PE11 and PE12 on the first insulating layer 620A; a second pixel electrode PE13 on the first protective layer 610 and disposed between one side of the first insulating layer 620A and the other side of the second insulating layer 620B; third pixel electrodes PE14, PE15, and PE16 on the second insulating layer 620B; an intermediate layer EL on the first pixel electrodes PE11 and PE12, the second pixel electrode PE13, and the third pixel electrodes PE14, PE15, and PE16; and a common electrode CE on the intermediate layer EL.

[0341] The first pixel electrodes PE11 and PE12, the intermediate layer EL, and the common electrode CE can form the first light-emitting devices ED11 and ED12. The second pixel electrode PE13, the intermediate layer EL, and the common electrode CE can form the second light-emitting device ED13. The third pixel electrodes E14, PE15, and PE16, the intermediate layer EL, and the common electrode CE can form the third light-emitting devices ED14, ED15, and ED16.

[0342] The second pixel electrode PE13 can be positioned closer to the substrate 111 than the first pixel electrodes PE11 and PE12 and the third pixel electrodes PE14, PE15, and PE16.

[0343] The common electrode CE can include a reflective electrode material.

[0344] The first insulating layer 620A and the second insulating layer 620B can include the same insulating material and can be separated from each other in an island form.

[0345] The embodiments of the present disclosure are briefly described as follows.

[0346] A display device according to an embodiment of the present disclosure can include: a substrate; a first protective layer located on the substrate; a first insulating layer located on the first protective layer; a second insulating layer located on the first protective layer and disposed on one side of the first insulating layer; N first pixel electrodes located on the first insulating layer; K second pixel electrodes located on the first protective layer and disposed between one side of the first insulating layer and the other side of the second insulating layer; and M third pixel electrodes located on the second insulating layer. N can be a natural number greater than or equal to 2, K can be a natural number greater than or equal to 1, and M can be a natural number greater than or equal to 2.

[0347] A display device according to an embodiment of the present disclosure can further include: an intermediate layer located on the N first pixel electrodes, the K second pixel electrodes, and the M third pixel electrodes; and a common electrode located on the intermediate layer.

[0348] In the display device according to an embodiment of the present disclosure, the K second pixel electrodes can be positioned closer to the substrate than the N first pixel electrodes and the M third pixel electrodes.

[0349] In the display device according to an embodiment of the present disclosure, the common electrode can include a reflective electrode material.

[0350] In a display device according to an embodiment of the present disclosure, the common electrode may have an inclined surface on a side surface of the first insulating layer and may have an inclined surface on a side surface of the second insulating layer. For example, the common electrode may have inclined surfaces on four sides of the first insulating layer and may have inclined surfaces on four sides of the second insulating layer. For example, the common electrode may have an inclined surface in each of one side of the first insulating layer and the other side of the second insulating layer.

[0351] In a display device according to an embodiment of the present disclosure, the common electrode may include: a first common electrode portion located on the first insulating layer; a second common electrode portion disposed between one side of the first insulating layer and the other side of the second insulating layer and located on the first protective layer; a third common electrode portion located on the second insulating layer; a first connection portion connecting the first common electrode portion and the second common electrode portion; and a second connection portion connecting the second common electrode portion and the third common electrode portion.

[0352] The second common electrode portion may be positioned closer to the substrate than the first common electrode portion and the third common electrode portion.

[0353] The first connection portion and the second connection portion may be formed to be inclined. That is, each of the first connection portion and the second connection portion may have an inclined surface.

[0354] According to a display device according to an embodiment of the present disclosure, the second common electrode portion may be positioned farther from the substrate than K second pixel electrodes and may be positioned closer to the substrate than N first pixel electrodes and M third pixel electrodes.

[0355] According to a display device according to an embodiment of the present disclosure, the first insulating layer and the second insulating layer may include the same insulating material and may be separated from each other in an island shape.

[0356] According to a display device according to an embodiment of the present disclosure, a first data voltage for emitting light of a first luminance may be supplied to each of N first sub-pixels including N first pixel electrodes, a second data voltage for emitting light of a second luminance may be supplied to each of K second sub-pixels including K second pixel electrodes, and a third data voltage for emitting light of a third luminance may be supplied to each of M third sub-pixels including M third pixel electrodes. If the first luminance, the second luminance, and the third luminance are the same, the second data voltage may be different from the first data voltage and the third data voltage.

[0357] According to a display device according to an embodiment of the present disclosure, if the first luminance, the second luminance, and the third luminance are the same, the second data voltage may be higher than the first data voltage and the third data voltage.

[0358] The display device according to an embodiment of the present disclosure further includes: a third insulating layer located on the first protective layer; a fourth insulating layer located on the first protective layer; N fourth pixel electrodes located on the third insulating layer; a fifth insulating layer located on the first protective layer; K fifth pixel electrodes located on the first protective layer and disposed between one side of the fourth insulating layer and the other side of the fifth insulating layer adjacent to the one side of the fourth insulating layer; and M fifth pixel electrodes located on the fourth insulating layer.

[0359] For the display device according to an embodiment of the present disclosure, the fourth insulating layer and the fifth insulating layer may include the same insulating material and may be separated from each other in an island shape.

[0360] For the display device according to an embodiment of the present disclosure, the first insulating layer, the second insulating layer, and the third insulating layer may be disposed in the first sub-pixel row, and the fourth insulating layer and the fifth insulating layer may be disposed in a second sub-pixel row different from the first sub-pixel row.

[0361] For the display device according to an embodiment of the present disclosure, N first sub-pixels including N first pixel electrodes, K second sub-pixels including K second pixel electrodes, and M third sub-pixels including M third pixel electrodes may be arranged in the first sub-pixel row, and N fourth sub-pixels including N fourth pixel electrodes, K fifth sub-pixels including K fifth pixel electrodes, and M sixth sub-pixels including M sixth pixel electrodes may be arranged in the second sub-pixel row.

[0362] For the display device according to an embodiment of the present disclosure, the N first sub-pixels may be respectively arranged in the first sub-pixel column to the Nth sub-pixel column. The N fourth sub-pixels may be respectively arranged in the second sub-pixel column to the (N + 1)th sub-pixel column shifted by one sub-pixel width.

[0363] For the display device according to an embodiment of the present disclosure, if N first sub-pixels including N first pixel electrodes, K second sub-pixels including K second pixel electrodes, and M third sub-pixels including M third pixel electrodes are arranged in the first sub-pixel row, then N may be 2, K may be 1, and M may be 3. In this case, the first sub-pixel row may include two first sub-pixels, one second sub-pixel, and three third sub-pixels. The two first sub-pixels may respectively include two first pixel electrodes on the first insulating layer. One second sub-pixel may include one second pixel electrode on the first protective layer. And the three third sub-pixels may respectively include three third pixel electrodes on the second insulating layer.

[0364] According to an embodiment of the present disclosure, in a display device, if M is greater than N, the second insulating layer may be set to be longer than the first insulating layer.

[0365] According to an embodiment of the present disclosure, in a display device, a common electrode may include: three first inclined surfaces on three sides of the left first sub-pixel among two first sub-pixels; three second inclined surfaces on three sides of the right first sub-pixel among two first sub-pixels; three third inclined surfaces on three sides of the left third sub-pixel among three third sub-pixels; two fourth inclined surfaces on two sides of the middle third sub-pixel among three third sub-pixels; and three fifth inclined surfaces on three sides of the right third sub-pixel among three third sub-pixels.

[0366] According to an embodiment of the present disclosure, in a display device, the three first inclined surfaces and the three second inclined surfaces may be formed on a side surface of the first insulating layer, and the three third inclined surfaces, the two fourth inclined surfaces, and the three fifth inclined surfaces may be formed on a side surface of the second insulating layer.

[0367] According to an embodiment of the present disclosure, in a display device, light emitted from the left first sub-pixel may be reflected from the three first inclined surfaces, light emitted from the right first sub-pixel may be reflected from the three second inclined surfaces, light emitted from the left third sub-pixel may be reflected from the three third inclined surfaces, light emitted from the middle third sub-pixel may be reflected from the two fourth inclined surfaces, and light emitted from the right third sub-pixel may be reflected from the three fifth inclined surfaces. The first to fifth inclined surfaces may correspond to mirrors.

[0368] According to an embodiment of the present disclosure, in a display device, the left first sub-pixel may be supplied with a first data voltage for emitting light of a first luminance, the right first sub-pixel may be supplied with a second data voltage for emitting light of a second luminance, one second sub-pixel may be supplied with a third data voltage for emitting light of a third luminance, the left third sub-pixel may be supplied with a fourth data voltage for emitting light of a fourth luminance, the middle third sub-pixel may be supplied with a fifth data voltage for emitting light of a fifth luminance, and the right third sub-pixel may be supplied with a sixth data voltage for emitting light of a sixth luminance. If the first to sixth luminances are all the same, the third data voltage may be higher than the first data voltage, the second data voltage, the fourth data voltage, and the fifth data voltage, and the fifth data voltage may be higher than the first data voltage, the second data voltage, and the fourth data voltage.

[0369] A display device according to an embodiment of the present disclosure may include: a substrate; a first pixel electrode, a second pixel electrode, and a third pixel electrode on the substrate; an intermediate layer on the first pixel electrode, the second pixel electrode, and the third pixel electrode; and a common electrode on the intermediate layer. The first pixel electrode and the third pixel electrode may be positioned higher from the substrate than the second pixel electrode.

[0370] According to the display device according to an embodiment of the present disclosure, the common electrode may include: an inclined surface extending from above the first pixel electrode, passing through one side of the first pixel electrode, and extending to above the second pixel electrode; and an inclined surface extending from above the third pixel electrode, passing through the other side of the third pixel electrode, and extending to above the second pixel electrode.

[0371] The display device according to an embodiment of the present disclosure may further include an insulating layer, which is provided not under the second pixel electrode but under the first pixel electrode and the third pixel electrode.

[0372] A display device according to an embodiment of the present disclosure may include: a substrate; a first protective layer on the substrate; a first insulating layer on the first protective layer; a second insulating layer on the first protective layer and laterally spaced apart from the first insulating layer; a first light-emitting device on the first insulating layer and included in a first sub-pixel; a second light-emitting device on the first protective layer, provided in a lateral direction of the first insulating layer and the second insulating layer, and included in a second sub-pixel; and a third light-emitting device on the second insulating layer and included in a third sub-pixel.

[0373] According to the display device according to an embodiment of the present disclosure, the second light-emitting device may be positioned closer to the substrate than the first light-emitting device and the third light-emitting device.

[0374] According to the display device according to an embodiment of the present disclosure, if the emission brightness of the first sub-pixel, the emission brightness of the second sub-pixel, and the emission brightness of the third sub-pixel are the same, the data voltage supplied to the second sub-pixel may be higher than the data voltage supplied to each of the first sub-pixel and the third sub-pixel.

[0375] The display device according to an embodiment of the present disclosure may further include: a first pixel electrode on the first insulating layer and included in the first light-emitting device; a second pixel electrode on the first protective layer, provided between one side of the first insulating layer and the other side of the second insulating layer, and included in the second light-emitting device; and a third pixel electrode on the second insulating layer and included in the third light-emitting device.

[0376] A display device according to an embodiment of the present disclosure may further include: an intermediate layer on the first pixel electrode, the second pixel electrode, and the third pixel electrode; and a common electrode on the intermediate layer.

[0377] In the display device according to an embodiment of the present disclosure, the second pixel electrode may be positioned closer to the substrate than the first pixel electrode and the third pixel electrode.

[0378] In the display device according to an embodiment of the present disclosure, the common electrode may include: an inclined surface extending from above the first pixel electrode, passing through one side of the first pixel electrode, and extending to above the second pixel electrode; and an inclined surface extending from above the third pixel electrode, passing through the other side of the third pixel electrode, and extending to above the second pixel electrode.

[0379] In the display device according to an embodiment of the present disclosure, the second pixel electrode may be positioned closer to the substrate than the first pixel electrode and the third pixel electrode.

[0380] In the display device according to an embodiment of the present disclosure, the common electrode may include a reflective electrode material.

[0381] In the display device according to an embodiment of the present disclosure, the common electrode may have inclined surfaces on one side of the first insulating layer and the other side of the second insulating layer, respectively.

[0382] In the display device according to an embodiment of the present disclosure, the first insulating layer and the second insulating layer may include the same insulating material and may be separated from each other in an island shape.

[0383] According to the above embodiments of the present disclosure, a display device having a light extraction structure can be provided, and the light extraction structure allows a larger amount of light in the light generated by the light-emitting devices in the display panel to be emitted toward the viewing surface.

[0384] According to an embodiment of the present disclosure, a display device having a light extraction structure applicable to a high-resolution display panel can be provided.

[0385] According to an embodiment of the present disclosure, a display device having a compensation function can be provided, and the compensation function can reduce the brightness deviation of each sub-pixel according to the light extraction structure applicable to the high-resolution display panel.

[0386] According to an embodiment of the present disclosure, the light extraction efficiency of the light generated by the light-emitting devices in the display panel can be improved. Therefore, the power consumption of the display device can be reduced by improving the light extraction efficiency.

[0387] The above description and the accompanying drawings provide examples of the technical concept of the present disclosure for illustrative purposes only. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art without departing from the spirit and scope of the present disclosure. Additionally, the disclosed embodiments are intended to illustrate the scope of the technical concept of the present disclosure. Therefore, the scope of the present disclosure is not limited to the embodiments shown.

Claims

1. A display device, comprising: substrate; a first protective layer located on the substrate; a first insulating layer located on the first protective layer; a second insulating layer located on the first protective layer and disposed on one side of the first insulating layer; N first pixel electrodes located on the first insulating layer; K second pixel electrodes located on the first protective layer and disposed between one side of the first insulating layer and one side of the second insulating layer adjacent to the one side of the first insulating layer; as well as M third pixel electrodes located on the second insulating layer, Wherein, N is a natural number greater than or equal to 2, K is a natural number greater than or equal to 1, and M is a natural number greater than or equal to 2.

2. The display device according to claim 1, wherein The K second pixel electrodes are positioned closer to the substrate than the N first pixel electrodes and the M third pixel electrodes.

3. The display device according to claim 1, further comprising: an intermediate layer located on the N first pixel electrodes, the K second pixel electrodes, and the M third pixel electrodes; as well as a common electrode located on the intermediate layer, The common electrode has an inclined surface on a side of the first insulating layer and an inclined surface on a side of the second insulating layer.

4. The display device according to claim 3 further includes a dam arranged between any one of the N first pixel electrodes, the K second pixel electrodes and the M third pixel electrodes and the intermediate layer, wherein the dam covers the end portion of any one of the N first pixel electrodes, the K second pixel electrodes and the M third pixel electrodes.

5. The display device according to claim 3, wherein In the case where there is no embankment between any one of the N first pixel electrodes, the K second pixel electrodes and the M third pixel electrodes and the intermediate layer, the side surfaces at both ends of any one of the N first pixel electrodes, the K second pixel electrodes and the M third pixel electrodes have a regular conical shape. The display device according to claim 1 , wherein: The first insulating layer and the second insulating layer are layers of the same insulating material and are separated from each other in an island shape.

7. The display device according to claim 1, wherein If M is greater than N, the second insulating layer is configured to be longer than the first insulating layer.

8. The display device according to claim 1, further comprising: an intermediate layer located on the N first pixel electrodes, the K second pixel electrodes, and the M third pixel electrodes; as well as a common electrode located on the intermediate layer, Wherein, the common electrode comprises: a first common electrode portion located on the first insulating layer; a second common electrode portion disposed between one side of the first insulating layer and one side of the second insulating layer adjacent to the one side of the first insulating layer and located on the first protective layer; a third common electrode portion located on the second insulating layer; a first connection portion connecting the first common electrode portion and the second common electrode portion; and a second connecting portion connecting the second common electrode portion and the third common electrode portion, Wherein, each of the first connection portion and the second connection portion has an inclined surface.

9. The display device according to claim 8, wherein The second common electrode portion is positioned closer to the substrate than the N first pixel electrodes and the M third pixel electrodes.

10. The display device according to claim 1, wherein A first data voltage for emitting light of a first brightness is supplied to each of the N first sub-pixels including the N first pixel electrodes, wherein a second data voltage for emitting light of a second brightness is supplied to each of the K second sub-pixels including the K second pixel electrodes, wherein a third data voltage for emitting light of a third brightness is supplied to each of the M third sub-pixels including the M third pixel electrodes, If the first brightness, the second brightness, and the third brightness are the same, the second data voltage is higher than the first data voltage and the third data voltage.

11. The display device according to claim 1 , further comprising: a third insulating layer located on the first protective layer; a fourth insulating layer located on the first protective layer; a fifth insulating layer located on the first protective layer; N fourth pixel electrodes located on the fourth insulating layer; K fifth pixel electrodes located on the first protective layer and disposed between one side of the fourth insulating layer and one side of the fifth insulating layer adjacent to the one side of the fourth insulating layer; as well as M sixth pixel electrodes are located on the fifth insulating layer.

12. The display device according to claim 11, wherein The fourth insulating layer and the fifth insulating layer are layers of the same insulating material and are separated from each other in an island shape, The first insulating layer, the second insulating layer and the third insulating layer are arranged in a first sub-pixel row. The fourth insulating layer and the fifth insulating layer are arranged in a second sub-pixel row different from the first sub-pixel row.

13. The display device according to claim 11, wherein N first sub-pixels including the N first pixel electrodes, K second sub-pixels including the K second pixel electrodes, and M third sub-pixels including the M third pixel electrodes are arranged in a first sub-pixel row, The N fourth sub-pixels including the N fourth pixel electrodes, the K fifth sub-pixels including the K fifth pixel electrodes, and the M sixth sub-pixels including the M sixth pixel electrodes are arranged in a second sub-pixel row. The N first sub-pixels are respectively arranged in the first sub-pixel column to the Nth sub-pixel column. The N fourth sub-pixels are respectively arranged in the second sub-pixel column to the (N+1)th sub-pixel column which are shifted by one sub-pixel width.

14. The display device according to claim 1, wherein N first sub-pixels including the N first pixel electrodes, K second sub-pixels including the K second pixel electrodes, and M third sub-pixels including the M third pixel electrodes are arranged in a first sub-pixel row, Where N is 2, K is 1, and M is 3, The first sub-pixel row includes two first sub-pixels, one second sub-pixel, and three third sub-pixels. The two first sub-pixels respectively include two first pixel electrodes on the first insulating layer, the one second sub-pixel includes a second pixel electrode on the first protective layer, and the three third sub-pixels respectively include three third pixel electrodes on the second insulating layer.

15. The display device according to claim 14, further comprising: an intermediate layer located on the N first pixel electrodes, the K second pixel electrodes, and the M third pixel electrodes; as well as The common electrode on the intermediate layer, Wherein, the common electrode comprises: three first inclined surfaces located on three of four sides of the first sub-pixel located on the left side among the two first sub-pixels; three second inclined surfaces located on three of four sides of the first sub-pixel located on the right side among the two first sub-pixels; three third inclined surfaces located on three of four sides of a third sub-pixel located on the left side among the three third sub-pixels; two fourth inclined surfaces located on two of four sides of a third sub-pixel located in the middle among the three third sub-pixels; and Three fifth inclined surfaces are located on three sides of four sides of a third sub-pixel located on the right side among the three third sub-pixels.

16. The display device according to claim 15, wherein The three first inclined surfaces and the three second inclined surfaces are formed on the side surface of the first insulating layer, The three third inclined surfaces, the two fourth inclined surfaces, and the three fifth inclined surfaces are formed on the side surface of the second insulating layer.

17. The display device according to claim 15, wherein: light emitted from the first sub-pixel located on the left side is reflected from the three first inclined surfaces, and light emitted from the first sub-pixel located on the right side is reflected from the three second inclined surfaces, In which, light emitted from the third sub-pixel located on the left is reflected from the three third inclined surfaces, light emitted from the third sub-pixel located in the middle is reflected from the two fourth inclined surfaces, and light emitted from the third sub-pixel located on the right is reflected from the three fifth inclined surfaces.

18. The display device according to claim 15, wherein The first sub-pixel located on the left is supplied with a first data voltage for emitting light of a first brightness, and the first sub-pixel located on the right is supplied with a second data voltage for emitting light of a second brightness, wherein the one second sub-pixel is supplied with a third data voltage for emitting light of a third brightness, The third sub-pixel on the left is supplied with a fourth data voltage for emitting light of a fourth brightness, the third sub-pixel in the middle is supplied with a fifth data voltage for emitting light of a fifth brightness, and the third sub-pixel on the right is supplied with a sixth data voltage for emitting light of a sixth brightness. Among them, if the first brightness to the sixth brightness are all the same, the third data voltage is higher than the first data voltage, the second data voltage, the fourth data voltage, the fifth data voltage and the sixth data voltage, and the fifth data voltage is higher than the first data voltage, the second data voltage, the fourth data voltage and the sixth data voltage.

19. A display device comprising: substrate; a first pixel electrode, a second pixel electrode, and a third pixel electrode on the substrate; an intermediate layer on the first pixel electrode, the second pixel electrode, and the third pixel electrode; as well as The common electrode on the intermediate layer, wherein the first pixel electrode and the third pixel electrode are positioned higher from the substrate than the second pixel electrode, Wherein, the common electrode comprises: an inclined surface extending from an upper portion of the first pixel electrode, passing through a side of the first pixel electrode, and extending to an upper portion of the second pixel electrode; and An inclined surface extending from an upper portion of the third pixel electrode, passing through a side of the third pixel electrode adjacent to the side of the first pixel electrode, and extending to an upper portion of the second pixel electrode. 20 . The display device according to claim 19 , further comprising an insulating layer, the insulating layer not being disposed under the second pixel electrode but being disposed under the first pixel electrode and the third pixel electrode.

21. A display device comprising: substrate; a first protective layer on the substrate; a first insulating layer located on the first protective layer; a second insulating layer located on the first protective layer and laterally spaced apart from the first insulating layer; a first light emitting device located on the first insulating layer and included in a first sub-pixel; a second light emitting device located on the first protective layer, disposed in a lateral direction of the first insulating layer and the second insulating layer, and included in a second sub-pixel; as well as a third light emitting device located on the second insulating layer and included in a third sub-pixel, wherein the second light emitting device is positioned closer to the substrate than the first light emitting device and the third light emitting device, Herein, if the emission brightness of the first subpixel, the emission brightness of the second subpixel, and the emission brightness of the third subpixel are the same, the data voltage supplied to the second subpixel is higher than the data voltage supplied to each of the first subpixel and the third subpixel.

22. The display device according to claim 21, further comprising: a first pixel electrode located on the first insulating layer and included in the first light emitting device; a second pixel electrode located on the first protective layer, disposed between one side of the first insulating layer and one side of the second insulating layer adjacent to the one side of the first insulating layer, and included in the second light emitting device; a third pixel electrode located on the second insulating layer and included in the third light emitting device; an intermediate layer on the first pixel electrode, the second pixel electrode, and the third pixel electrode; as well as The common electrode on the intermediate layer, wherein the second pixel electrode is positioned closer to the substrate than the first pixel electrode and the third pixel electrode, Wherein, the common electrode comprises: an inclined surface extending from an upper portion of the first pixel electrode, passing through a side of the first pixel electrode, and extending to an upper portion of the second pixel electrode; and An inclined surface extending from an upper portion of the third pixel electrode, passing through a side of the third pixel electrode adjacent to the side of the first pixel electrode, and extending to an upper portion of the second pixel electrode.

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