Display device

Abstract

A display device according to an exemplary embodiment of the present disclosure may include: a substrate; a first protective layer on the substrate; a lower insulating layer on the first protective layer; a first upper insulating layer on the lower insulating layer; a second upper insulating layer on the lower insulating layer and spaced apart from the first upper insulating layer in the first direction; a first pixel electrode on the first upper insulating layer; a second pixel electrode on the lower insulating layer and disposed between one side of the first upper insulating layer and the other side of the second upper insulating layer; and a third pixel electrode on the second upper insulating layer.

Description

Technical Field

[0001] Exemplary embodiments of the present disclosure relate to a display device. Background Art

[0002] Among display devices, there are self-luminous display devices in which a display panel itself emits light. In the case of a self-luminous display device, the display panel may include a light-emitting device for each sub-pixel.

[0003] Meanwhile, light generated from the light emitting device of the display panel may pass through various components within the display panel and be emitted from the display panel.

[0004] The descriptions provided in the Background section should not be admitted to be prior art merely by virtue of being mentioned in or related to the Background section.The Background section may include information describing one or more aspects of the subject technology. Summary of the Invention

[0005] However, among the light generated from the light emitting device, there may be light that is not emitted from the display panel but is trapped inside the display panel.

[0006] The more light generated by the light emitting device is trapped inside the display panel without exiting the display panel, the lower the brightness of the corresponding sub-pixel may be. As a result, the quality of the image displayed on the display panel may be degraded.

[0007] Embodiments of the present disclosure may provide a display device having a light extraction structure that allows a greater amount of light generated by a light emitting device in a display panel to be emitted toward a viewing surface.

[0008] Embodiments of the present disclosure may provide a display device having a light extraction structure suitable for a high-resolution display panel.

[0009] Embodiments of the present disclosure may provide a display device having a compensation function capable of reducing luminance deviation for each sub-pixel according to a light extraction structure applicable to a high-resolution display panel.

[0010] A display device according to an exemplary embodiment of the present disclosure may include: a substrate; a first protective layer located on the substrate; a lower insulating layer located on the first protective layer; a first upper insulating layer located on the lower insulating layer; a second upper insulating layer located on the lower insulating layer and spaced apart from the first upper insulating layer in a first direction; a first pixel electrode located on the first upper insulating layer; a second pixel electrode located on the lower insulating layer and disposed between one side of the first upper insulating layer and the other side of the second upper insulating layer; and a third pixel electrode located on the second upper insulating layer.

[0011] The display device according to an exemplary embodiment of the present disclosure may further include: a fourth pixel electrode located on the lower insulating layer and disposed on one side of the second upper insulating layer; a third upper insulating layer located on the lower insulating layer and disposed on one side of the second pixel electrode in a second direction different from the first direction; and a fifth pixel electrode located on the third upper insulating layer. The first pixel electrode, the second pixel electrode, the third pixel electrode, the fourth pixel electrode, and the fifth pixel electrode may be included in the first sub-pixel, the second sub-pixel, the third sub-pixel, the fourth sub-pixel, and the fifth sub-pixel, respectively.

[0012] In the display device according to an exemplary embodiment of the present disclosure, the second pixel electrode and the fourth pixel electrode may be positioned closer to the substrate than the first pixel electrode, the third pixel electrode, and the fifth pixel electrode.

[0013] The display device according to an exemplary embodiment of the present disclosure may further include: an intermediate layer located on the first pixel electrode, the second pixel electrode, the third pixel electrode, the fourth pixel electrode, and the fifth pixel electrode; and a common electrode located on the intermediate layer and including a reflective electrode material.

[0014] In the display device according to an exemplary embodiment of the present disclosure, the common electrode may include a plurality of inclined surfaces.

[0015] In the display device according to an exemplary embodiment of the present disclosure, the common electrode may have inclined surfaces on each side surface of the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer, and may have inclined surfaces on the side surface of the lower insulating layer.

[0016] In the display device according to an exemplary embodiment of the present disclosure, the common electrode may have inclined surfaces on each side surface of each of the four side surfaces of the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer, and may have inclined surfaces on each of the two side surfaces of the four side surfaces of the lower insulating layer.

[0017] A display device according to an exemplary embodiment of the present disclosure may include: a substrate; a first pixel electrode, a second pixel electrode, and a third pixel electrode, the first pixel electrode, the second pixel electrode, and the third pixel electrode being located on the substrate; an intermediate layer located on the first pixel electrode, the second pixel electrode, and the third pixel electrode; and a common electrode located on the intermediate layer. The first pixel electrode and the third pixel electrode may be positioned higher from the substrate than the second pixel electrode.

[0018] In a display device according to an exemplary embodiment of the present disclosure, the common electrode may include an inclined surface extending from above the first pixel electrode, passing through one side of the first pixel electrode, and extending to above the second pixel electrode; and an inclined surface extending from above the third pixel electrode, passing through the other side of the third pixel electrode, and extending to above the second pixel electrode.

[0019] The display device according to an exemplary embodiment of the present disclosure may further include an insulating layer, which is provided in an island shape below each of the first pixel electrode and the third pixel electrode instead of below the second pixel electrode.

[0020] A display device according to an exemplary embodiment of the present disclosure may include: a substrate; a first sub-pixel including a first light-emitting device; a second sub-pixel adjacent to the first sub-pixel in a first direction and including a second light-emitting device; a first data line supplying a first data voltage to the first sub-pixel; and a second data line supplying a second data voltage to the second sub-pixel.

[0021] In a display device according to an exemplary embodiment of the present disclosure, the first light-emitting device may be located at a first height from the substrate, and the second light-emitting device may be located at a second height lower than the first height from the substrate.

[0022] In a display device according to an exemplary embodiment of the present disclosure, if the emission brightness of the first sub-pixel, the emission brightness of the second sub-pixel, and the emission brightness of the third sub-pixel are the same, the second data voltage may be higher than the first data voltage.

[0023] The display device according to an exemplary embodiment of the present disclosure may further include: a first protective layer located on the substrate; a lower insulating layer located on the first protective layer; a first upper insulating layer located on the lower insulating layer; a first pixel electrode located on the first upper insulating layer; a second pixel electrode located on the lower insulating layer and provided on one side of the first upper insulating layer; an intermediate layer located on the first pixel electrode and the second pixel electrode; and a common electrode located on the intermediate layer.

[0024] In a display device according to an exemplary embodiment of the present disclosure, the first light-emitting device may include the first pixel electrode, the intermediate layer, and the common electrode, and the second light-emitting device may include the second pixel electrode, the intermediate layer, and the common electrode.

[0025] In a display device according to an exemplary embodiment of the present disclosure, the common electrode may include four inclined surfaces located on four side surfaces of the first upper insulating layer, and two inclined surfaces located on two of the four side surfaces of the lower insulating layer.

[0026] According to an exemplary embodiment of the present disclosure, a display device can be provided that has a light extraction structure that allows a greater amount of light in the light generated by the light-emitting devices in the display panel to be emitted toward the viewing surface.

[0027] According to an exemplary embodiment of the present disclosure, a display device can be provided that has a light extraction structure suitable for a high-resolution display panel.

[0028] According to an exemplary embodiment of the present disclosure, a display device can be provided that has a compensation function capable of reducing the luminance deviation for each subpixel according to a light extraction structure suitable for a high-resolution display panel.

[0029] According to an exemplary embodiment of the present disclosure, the light extraction efficiency of the light generated by the light-emitting devices in the display panel can be increased. Therefore, the power consumption of the display device can be reduced by improving the light extraction efficiency.

[0030] It should be understood that the foregoing general description and the following detailed description are both exemplary and explanatory and are intended to provide further explanation of the claimed inventive concept. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure. In the drawings:

[0032] Figure 1 is a system configuration diagram of a display device according to an exemplary embodiment of the present disclosure.

[0033] Figure 2 shows a display panel according to an exemplary embodiment of the present disclosure.

[0034] Figure 3 shows subpixels of a display panel according to an exemplary embodiment of the present disclosure.

[0035] Figure 4 is a plan view of a display panel according to an exemplary embodiment of the present disclosure.

[0036] Figure 5 shows regions of subpixels of a display panel according to an exemplary embodiment of the present disclosure.

[0037] Figure 6 and Figure 7 show a light extraction structure of a display panel according to an exemplary embodiment of the present disclosure.

[0038] Figure 8 is a plan view showing a light extraction structure of a display panel according to an exemplary embodiment of the present disclosure.

[0039] Figures 9 to 12 is a cross-sectional view showing a light extraction structure of a display panel according to an exemplary embodiment of the present disclosure.

[0040] Figure 13 Shows the number of mirror portions of each sub-pixel of a display panel according to an exemplary embodiment of the present disclosure.

[0041] Figure 14 Shows the light extraction efficiency for each sub-pixel of a display panel according to an exemplary embodiment of the present disclosure.

[0042] Figure 15 Shows the light emission state for each sub-pixel of a display panel according to an exemplary embodiment of the present disclosure.

[0043] Figure 16 Shows a data compensation circuit considering the light extraction structure of a display device according to an exemplary embodiment of the present disclosure.

[0044] Figure 17 Shows the data compensation value for each sub-pixel considering the light extraction structure of a display panel according to an exemplary embodiment of the present disclosure.

[0045] Figure 18 Shows the light emission state for each sub-pixel after data compensation considering the light extraction structure of a display panel according to an exemplary embodiment of the present disclosure.

[0046] Throughout the drawings and the detailed description, unless otherwise specified, the same reference numerals should be understood to represent the same elements, features, and structures. For clarity, illustration, and convenience, the relative sizes of these elements may be exaggerated and the description may be elaborated. Detailed Description of the Embodiment

[0047] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. When assigning reference numerals to components in each drawing, the same reference numerals may be assigned to the same components even if they are shown in different drawings. When the detailed description of known technologies or functions makes the subject matter of the present disclosure unclear, the detailed description of known technologies or functions may be omitted. As used herein, when a component "comprises" or "has" another component or "consists of" another component, other components may be added to the component unless the component "only" comprises or "only" has another component or "only" consists of another component. As used herein, unless the context clearly indicates otherwise, the singular forms "a," "an," and "the" are also intended to include the plural forms.

[0048] Advantages and features of the present disclosure and methods for realizing the same will become clear by referring to the exemplary embodiments described below in conjunction with the accompanying drawings. However, the present disclosure may be implemented in different forms and should not be construed as limited to the exemplary embodiments set forth herein. On the contrary, these exemplary embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. In addition, the present disclosure is defined only by the scope of the claims.

[0049] The term "exemplary" is used to mean an example or illustration. Each aspect is an exemplary aspect. "Embodiment", "example", "aspect", etc. should not be construed as being preferred or advantageous over other implementations. Unless otherwise stated, an embodiment, an example, an exemplary embodiment, an aspect, etc. may refer to one or more embodiments, one or more examples, one or more exemplary embodiments, one or more aspects, etc. In addition, the term "may" encompasses all meanings of the term "can".

[0050] The shapes (e.g., sizes, lengths, widths, heights, thicknesses, positions, radii, diameters, and areas), ratios, angles, quantities, etc. shown in the accompanying drawings for describing various exemplary embodiments of the present disclosure are given only by way of example. Therefore, the present disclosure is not limited to the illustrations in the accompanying drawings. Any implementation described herein as an "example" is not necessarily to be construed as being preferred or advantageous over other implementations.

[0051] Labels such as "first", "second", "A", "B", "(a)", and "(b)" may be used to describe components of the present disclosure. These labels are provided only to distinguish one component from another, and the nature, order, or quantity of these components is not limited by these labels.

[0052] When describing the positional relationship between components, when two or more components are described as "connected", "coupled", or "linked", the two or more components may be directly "connected", "coupled", or "linked", or another component may be inserted therebetween. Here, the other component may be included in one or more of the two or more components that are "connected", "coupled", or "linked" to each other.

[0053] In the description of various embodiments of the present disclosure, in the case of describing the positional relationship, for example, in the case of using terms such as "above", "over", "below", "next to", etc. to describe the positional relationship between two components, unless more restrictive terms such as "exactly" or "directly" are used, one or more other components may be located between the two components. For example, in the case where one element or layer is disposed "above" another element or layer, a third layer or element may be interposed therebetween.

[0054] Terms such as "lower", "bottom", "upper", "top", etc. may be used herein to describe the relationship between elements as shown in the accompanying drawings. It should be understood that these terms are spatially relative and are based on the orientation depicted in the drawings.

[0055] When terms such as "after", "subsequent", and "before" are used to describe the temporal flow relationship related to components, operation methods, and manufacturing methods, unless the term "immediately" or "directly" is used, it may include a non - continuous relationship.

[0056] The term "at least one" should be understood to include any and all combinations of one or more of the associated listed items. For example, the meaning of "at least one of the first element, the second element, and the third element" encompasses the combination of all three listed elements, the combination of any two of the three elements, and each individual element (the first element, the second element, or the third element).

[0057] When a numerical value or its corresponding information (e.g., level) is specified for a component, the numerical value or corresponding information may be interpreted to include tolerances resulting from various factors (e.g., process factors, internal or external influences, or noise).

[0058] As can be fully understood by those skilled in the art, the features of various embodiments of the present disclosure may be partially or fully coupled or combined with each other, and may interoperate with each other in various ways and be technically driven. The embodiments of the present disclosure may be implemented independently of each other, or may be implemented together in a mutually dependent relationship.

[0059] Hereinafter, various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0060] Figure 1 is a system configuration diagram of a display device 100 according to an exemplary embodiment of the present disclosure.

[0061] Referring to Figure 1 , a display device 100 according to an exemplary embodiment of the present disclosure may include a display panel 110 and a display driving circuit as components for displaying an image. The display driving circuit is a circuit for driving the display panel 110, and may include a data driving circuit 120, a gate driving circuit 130, a controller 140, etc.

[0062] The display panel 110 may include a substrate 111 and a plurality of sub - pixels SP provided on the substrate 111.

[0063] The substrate 111 of the display panel 110 may include a display area DA capable of displaying an image and a non - display area NDA located outside the display area DA.

[0064] The display area DA may also be referred to as an active area, and a plurality of sub-pixels SP for image display may be provided in the display area DA. The non-display area NDA may also be referred to as an inactive area and may include a pad area.

[0065] In the display panel 110 according to an exemplary embodiment of the present disclosure, the non-display area NDA may be very small. In the present specification, the non-display area NDA may also be referred to as a "border". For example, the non-display area NDA may include a first non-display area located outside the display area DA in a first direction, a second non-display area located outside the display area DA in a second direction different from the first direction, a third non-display area located outside the display area DA in a direction opposite to the first direction, and a fourth non-display area located outside the display area DA in a direction opposite to the second direction. The embodiment is not limited thereto. As an example, the non-display area NDA may entirely or partially surround the display area DA. As an example, at least one of the first non-display area to the fourth non-display area may be omitted. As an example, at least a part of the non-display area NDA may be invisible from the front side of the display panel 110 by being bent to the rear side of the display panel 110, but it is not limited thereto.

[0066] The first non-display area may include a pad area connected or joined to the driving circuit. The second non-display area to the fourth non-display area may have a very small size, but it is not limited thereto. As an example, at least one or all of the second non-display area to the fourth non-display area may have a smaller size than the first non-display area, but it is not limited thereto. As an example, at least one or all of the second non-display area to the fourth non-display area may also include a pad area connected or joined to the driving circuit, but it is not limited thereto.

[0067] As another example, the boundary area between the display area DA and the non-display area NDA may be curved such that the non-display area NDA may be located below the display area. In this case, when the user views the display device 100 from the front, the user may see little or no non-display area NDA. For example, the first non-display area may include a curved area. When the curved area is curved, the first non-display area (and / or any one of the second non-display area to the fourth non-display area) may be invisible from the front.

[0068] Various types of signal lines for driving the plurality of sub-pixels SP may be provided on the substrate 111 of the display panel 110.

[0069] The display device 100 according to an exemplary embodiment of the present disclosure may be a self-emissive display device in which the display panel 110 itself emits light. If the display device 100 according to an exemplary embodiment of the present disclosure is a self-emissive display device, each of the plurality of sub-pixels SP may include a light-emitting device.

[0070] For example, the display device 100 according to an exemplary embodiment of the present disclosure may be an organic light-emitting display device in which the light-emitting device is implemented as an organic light-emitting diode (OLED). As another example, the display device 100 according to an exemplary embodiment of the present disclosure may be an inorganic light-emitting display device in which the light-emitting device is implemented as an inorganic-based light-emitting diode (e.g., a light-emitting diode or a micro light-emitting diode). As another example, the display device 100 according to an exemplary embodiment of the present disclosure may be a quantum dot display device in which a light-emitting device is implemented using quantum dots that are semiconductor crystals that emit light by themselves.

[0071] The structure of each of the plurality of sub-pixels SP may vary according to the type of the display device 100. For example, if the display device 100 is a self-emissive display device having sub-pixels SP that emit light by themselves, each sub-pixel SP may include a self-emissive light-emitting device, one or more transistors, and one or more capacitors.

[0072] For example, various types of signal lines may include a plurality of data lines DL that provide data signals (also referred to as data voltages or image signals) and a plurality of gate lines GL that are used to transmit gate signals (also referred to as scan signals).

[0073] For example, the plurality of data lines DL and the plurality of gate lines GL may cross each other. Each of the plurality of data lines DL may be arranged to extend in a first direction. Each of the plurality of gate lines GL may be arranged to extend in a second direction. Here, the first direction may be a column direction, and the second direction may be a row direction. Alternatively, the first direction may be a row direction, and the second direction may be a column direction. Hereinafter, for ease of explanation, a case where each of the plurality of data lines DL is arranged in the column direction and each of the plurality of gate lines GL is arranged in the row direction will be illustrated. However, embodiments of the present disclosure are not limited thereto.

[0074] The data driving circuit 120 is a circuit for driving the plurality of data lines DL and may output data signals to the plurality of data lines DL.

[0075] The data driving circuit 120 may receive image data in digital form from the display controller 140 and convert the received image data into analog data signals to output them to the plurality of data lines DL.

[0076] For example, the data driving circuit 120 may be connected to the display panel 110 using a tape automated bonding (TAB) method, or may be connected to bonding pads of the display panel 110 using a chip on glass (COG) or chip on panel (COP) method, or may be implemented and connected to the display panel 110 using a chip on film (COF) method, but is not limited thereto.

[0077] The data driving circuit 120 may be connected to one side (e.g., the upper side or the lower side) of the display panel 110. Depending on the driving method, panel design method, etc., the data driving circuit 120 may be connected to both sides (e.g., the upper side and the lower side) of the display panel 110, or may be connected to two or more sides out of four sides of the display panel 110.

[0078] The data driving circuit 120 may be connected to the outside of the display area DA of the display panel 110, but alternatively, it may be disposed in the display area DA or the non-display area NDA of the display panel 110.

[0079] The gate driving circuit 130 is a circuit for driving a plurality of gate lines GL, and may output a gate signal to the plurality of gate lines GL.

[0080] The gate driving circuit 130 may receive a first gate voltage corresponding to a conductive level voltage, a second gate voltage corresponding to a cutoff level voltage, and various gate driving control signals GCS, and may generate a gate signal and provide the generated gate signal to the plurality of gate lines GL.

[0081] In the display device 100 according to an exemplary embodiment of the present disclosure, the gate driving circuit 130 may be built in the display panel 110 in a gate in panel (GIP) type. If the gate driving circuit 130 is a gate in panel type, the gate driving circuit 130 may be formed on the substrate of the display panel 110 during the manufacturing process of the display panel 110.

[0082] For example, in the display device 100 according to an exemplary embodiment of the present disclosure, the gate driving circuit 130 may be disposed in the non-display area NDA of the display panel 110.

[0083] As another example, the gate driving circuit 130 may be disposed in the display area DA of the display panel 110. In this case, the gate driving circuit 130 may be disposed in a first partial area (e.g., the left area or the right area within the display area DA) within the display area DA. As another example, the gate driving circuit 130 may be disposed in a first partial area (e.g., the left area or the right area within the display area DA) and a second partial area (e.g., the right area or the left area within the display area DA) within the display area DA.

[0084] In the present disclosure, the gate driving circuit 130 built in the display panel 110 as an in-panel gating type may be referred to as an "in-panel gate circuit". The implementation is not limited thereto. As an example, the gate driving circuit 130 may be connected to the display panel 110 using the tape automated bonding (TAB) method, or may be connected to the bonding pads of the display panel 110 using the chip on glass (COG) or chip on panel (COP) method, or may be implemented and connected to the display panel 110 using the chip on film (COF) method, but is not limited thereto.

[0085] The controller 140 may be a device for controlling the data driving circuit 120 and the gate driving circuit 130, and may control the driving timings for the plurality of data lines DL and the driving timings for the plurality of gate lines GL.

[0086] The controller 140 may provide a data driving control signal DCS to the data driving circuit 120 to control the data driving circuit 120, and may provide a gate driving control signal GCS to the gate driving circuit 130 to control the gate driving circuit 130.

[0087] The controller 140 may receive input image data from the host system 150, and provide image data DATA to the data driving circuit 120 based on the input image data.

[0088] The controller 140 may be implemented as a component separate from the data driving circuit 120, or may be integrated with the data driving circuit 120 and implemented as an integrated circuit.

[0089] The controller 140 may be a timing controller used in typical display technologies, or may be a control device capable of further performing other control functions including a timing controller, or may be a control device different from a timing controller, or may be a control device other than a timing controller, or may be a circuit within a control device. The controller 140 may be implemented using various circuits or electronic components such as an integrated circuit (IC), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a processor.

[0090] The controller 140 may be mounted on a printed circuit board, a flexible printed circuit, etc., and may be electrically connected to the data driving circuit 120 and the gate driving circuit 130 through a printed circuit board, a flexible printed circuit, etc., but is not limited thereto.

[0091] The controller 140 may send signals to and receive signals from the data driving circuit 120 according to one or more predetermined interfaces. For example, the interface may include a low voltage differential signal (LVDS) interface, an embedded clock point-to-point interface (EPI) interface, or a serial peripheral interface (SPI), but is not limited thereto.

[0092] As an example, in order to provide not only an image display function but also a touch sensing function, the display device 100 according to an exemplary embodiment of the present disclosure may include a touch sensor and a touch sensing circuit for detecting the occurrence of a touch by a touch object such as a finger or a pen, or for sensing a touch position by sensing the touch sensor, but is not limited thereto.

[0093] The touch sensing circuit may include a touch driving circuit for driving and sensing the touch sensor to generate and output touch sensing data, and a touch controller for detecting the occurrence of a touch or detecting a touch position using the touch sensing data.

[0094] The touch sensor may include a plurality of touch electrodes. The touch sensor may also include a plurality of touch lines for electrically connecting the plurality of touch electrodes and the touch driving circuit.

[0095] The touch sensor may exist in the form of a touch panel outside the display panel 110, or may exist inside the display panel 110. If the touch sensor exists in the form of a touch panel outside the display panel 110, the touch sensor may be referred to as an external type. If the touch sensor is of the external type, the touch panel and the display panel 110 may be manufactured separately and combined during an assembly process. The external touch panel may include a touch panel substrate and a plurality of touch electrodes located on the touch panel substrate, but is not limited thereto.

[0096] If the touch sensor exists inside the display panel 110, during the manufacturing process of the display panel 110, the touch sensor may be formed on the substrate together with signal lines and electrodes related to display driving.

[0097] The touch driving circuit may provide a touch driving signal to at least one of the plurality of touch electrodes and generate touch sensing data by sensing at least one of the plurality of touch electrodes.

[0098] The touch sensing circuit may perform touch sensing using a self-capacitance sensing method or a mutual-capacitance sensing method.

[0099] If the touch sensing circuit performs touch sensing using the self - capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between each touch electrode and a touch object (e.g., a finger, a pen, etc.). According to the self - capacitance sensing method, each of the plurality of touch electrodes can be used as a driving touch electrode and a sensing touch electrode. The touch driving circuit can drive all or part of the plurality of touch electrodes and sense all or part of the plurality of touch electrodes.

[0100] If the touch sensing circuit performs touch sensing using the mutual - capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between the touch electrodes. According to the mutual - capacitance sensing method, the plurality of touch electrodes can be divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit can drive the driving touch electrodes and sense the sensing touch electrodes. As an example, the touch driving circuit can drive at least some or all of the driving touch electrodes and sense at least some or all of the sensing touch electrodes.

[0101] The touch driving circuit and the touch controller included in the touch sensing circuit can be implemented as separate devices or one device. In addition, the touch driving circuit and the data driving circuit can be implemented as separate devices or one device. As an example, the touch sensing circuit and the touch sensor can be omitted according to the design.

[0102] The display device 100 may further include a power supply circuit that provides various types of power to the display driving circuit and / or the touch sensing circuit.

[0103] The display device 100 according to an exemplary embodiment of the present disclosure can be a mobile terminal such as a smart phone or a tablet computer, or monitors or televisions of various sizes, or displays for vehicles, buildings, or appliances, but is not limited thereto, and the display device 100 according to an exemplary embodiment of the present disclosure can be displays of various types and sizes capable of displaying information or images.

[0104] The display device 100 according to an exemplary embodiment of the present disclosure may further include electronic devices such as a camera (e.g., an image sensor) and / or a detection sensor. For example, the detection sensor can be a sensor for detecting an object or a human body by receiving light such as infrared rays, ultrasonic waves, or ultraviolet rays, a sensor for detecting the illuminance of the environment, a sensor for detecting sound, etc., but is not limited thereto.

[0105] Figure 2 Show a display panel 110 according to an exemplary embodiment of the present disclosure.

[0106] Refer to Figure 2, the display panel 110 may include a substrate 111 on which a plurality of sub-pixels SP are provided and a packaging layer 200 located on the substrate 111. Here, the packaging layer 200 may also be referred to as a packaging substrate or a packaging portion.

[0107] Referring Figure 2 , when the display device 100 according to an exemplary embodiment of the present disclosure is a self-emitting display device, each of the plurality of sub-pixels SP may include a light-emitting device ED and a sub-pixel circuit SPC for driving the light-emitting device ED.

[0108] Referring Figure 2 , the sub-pixel circuit SPC may include a plurality of pixel driving transistors for driving the light-emitting device ED and at least one capacitor. In the present disclosure, the sub-pixel circuit SPC may drive the light-emitting device ED by providing a driving current to the light-emitting device ED in a predetermined timing sequence. The light-emitting device ED may be driven by the driving current and emit light.

[0109] The plurality of pixel driving transistors may include a driving transistor DRT for driving the light-emitting device ED and a scanning transistor SCT that is turned on or off according to a scan signal SC.

[0110] The driving transistor DRT may provide a driving current to the light-emitting device ED.

[0111] The scanning transistor SCT may be configured to control the electrical state of a corresponding node (e.g., the second node N2) in the sub-pixel circuit SPC, or control the state or operation of the driving transistor DRT.

[0112] The at least one capacitor may include a storage capacitor Cst to maintain a constant voltage during a set period (e.g., one frame).

[0113] To drive the sub-pixel SP, a data signal VDATA as an image signal and a scan signal SC as a gate signal may be applied to the sub-pixel SP. In addition, a common pixel driving voltage including a first common driving voltage VDD and a second common driving voltage VSS may be applied to the sub-pixel SP to drive the sub-pixel SP.

[0114] The light-emitting device ED may include a pixel electrode PE, an intermediate layer EL, and a common electrode CE. The intermediate layer EL may be located between the pixel electrode PE and the common electrode CE.

[0115] For example, the pixel electrode PE may be an anode AND, and the common electrode CE may be a cathode CAT. Alternatively, the pixel electrode PE may be a cathode CAT, and the common electrode CE may be an anode AND. Hereinafter, for ease of explanation, the case where the pixel electrode PE is an anode AND and the common electrode CE is a cathode CAT is illustrated.

[0116] In the case where the light-emitting device ED is an organic light-emitting diode, the intermediate layer EL may include a light-emitting layer EML, a first common intermediate layer COM1 between the anode AND and the light-emitting layer EML, and a second common intermediate layer COM2 between the light-emitting layer EML and the cathode CAT. The first common intermediate layer COM1 and the second common intermediate layer COM2 may be collectively referred to as the common intermediate layer EL_COM. At least one of the first common intermediate layer COM1 and the second common intermediate layer COM2 may be omitted according to the design.

[0117] The light-emitting layer EML may be provided in each sub-pixel SP. In contrast, the common intermediate layer EL_COM may be provided commonly across multiple sub-pixels SP. The implementation is not limited thereto. As an example, the light-emitting layer EML may be provided commonly across multiple sub-pixels SP. As an example, the common intermediate layer EL_COM may be provided in each sub-pixel SP.

[0118] The light-emitting layer EML may be provided in each light-emitting region, and the common intermediate layer EL_COM may be provided commonly across multiple light-emitting regions and non-light-emitting regions.

[0119] For example, the first common intermediate layer COM1 may include a hole injection layer HIL and / or a hole transport layer HTL, but is not limited thereto. The second common intermediate layer COM2 may include an electron transport layer ETL and / or an electron injection layer EIL, but is not limited thereto.

[0120] The hole injection layer may inject holes from the pixel electrode PE into the hole transport layer, the hole transport layer may transport the holes to the light-emitting layer EML, the electron injection layer may inject electrons from the common electrode CE into the electron transport layer, and the electron transport layer may transport the electrons to the light-emitting layer EML.

[0121] For example, the common electrode CE may be electrically connected to the second common driving voltage line VSSL. The second common driving voltage VSS, which is a common pixel driving voltage, may be applied to the common electrode CE through the second common driving voltage line VSSL. The pixel electrode PE may be directly or indirectly (via another transistor) electrically connected to the first node N1 of the driving transistor DRT of each sub-pixel SP. In the present disclosure, the second common driving voltage VSS may also be referred to as the base voltage VSS, and the second common driving voltage line VSSL may also be referred to as the base voltage line VSSL.

[0122] Each light-emitting device ED may be composed of an overlapping portion of the pixel electrode PE, the intermediate layer EL, and the common electrode CE. Each light-emitting device ED may form a predetermined light-emitting region. For example, the light-emitting region of each light-emitting device ED may include the region where the pixel electrode PE, the intermediate layer EL, and the common electrode CE overlap.

[0123] For example, the light-emitting device ED may be an organic light-emitting diode (OLED), an inorganic light-emitting diode, a micro light-emitting diode, or a quantum dot light-emitting device. For example, when the light-emitting device ED is an organic light-emitting diode OLED, the intermediate layer EL in the light-emitting device ED may include an organic intermediate layer EL containing an organic material.

[0124] The driving transistor DRT may be a driving transistor for supplying a driving current to the light-emitting device ED. The driving transistor DRT may be connected between the first common driving voltage line VDDL and the light-emitting device ED.

[0125] The driving transistor DRT may include a first node N1, a second node N2, and a third node N3. The first node N1 may be electrically connected to the light-emitting device ED. A data signal VDATA may be applied to the second node N2. The first common driving voltage VDD may be applied from the first common driving voltage line VDDL to the third node N3, but is not limited thereto.

[0126] In the driving transistor DRT, the second node N2 may be a gate node, the first node N1 may be a source node or a drain node, and the third node N3 may be a drain node or a source node. Hereinafter, for the sake of convenience of description, the case where the second node N2 is a gate node (or gate electrode), the first node N1 is a source node (or source electrode), and the third node N3 is a drain node (or drain electrode) in the driving transistor DRT will be described. However, the embodiments of the present disclosure are not limited thereto.

[0127] Figure 2 The scanning transistor SCT included in the shown sub-pixel circuit SPC may be a switching transistor for transmitting a data signal VDATA as an image signal to the second node N2 serving as the gate node of the driving transistor DRT.

[0128] The scanning transistor SCT may be controlled to be turned on and off by a scanning signal SC, and may control the electrical connection between the second node N2 of the driving transistor DRT and the data line DL, where the scanning signal SC is a strobe signal applied through a scanning line SCL serving as a kind of gate line GL. The drain electrode or source electrode of the scanning transistor SCT may be electrically connected to the data line DL, and the source electrode or drain electrode of the scanning transistor SCT may be electrically connected to the second node N2 of the driving transistor DRT. The gate electrode of the scanning transistor SCT may be electrically connected to the scanning line SCL.

[0129] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT. The storage capacitor Cst can include a first capacitor electrode electrically connected to the first node N1 of the driving transistor DRT or corresponding to the first node N1 of the driving transistor DRT, and a second capacitor electrode electrically connected to the second node N2 of the driving transistor DRT or corresponding to the second node N2 of the driving transistor DRT.

[0130] The storage capacitor Cst can be an externally designed external capacitor outside the driving transistor DT, rather than a parasitic capacitor (e.g., Cgs, Cgd) that can exist as an internal capacitor between the first node N1 and the second node N2 of the driving transistor DRT.

[0131] Each of the driving transistor DRT and the scanning transistor SCT can be an n-type transistor or a p-type transistor.

[0132] The display panel 110 can have a top-emission structure that emits light in the forward direction, a bottom-emission structure that emits light in the backward direction, or a dual-emission structure that emits light in both the forward and backward directions. Here, the forward direction can correspond to the direction from the substrate 111 toward the encapsulation layer 200, and the backward direction can correspond to the direction from the encapsulation layer 200 toward the substrate 111.

[0133] If the display panel 110 has a top-emission structure, at least a part of the sub-pixel circuit SPC can overlap or not overlap at least a part of the light-emitting device ED in the vertical direction, but is not limited thereto. Accordingly, the area of the light-emitting region can be increased, and the aperture ratio can be increased.

[0134] If the display panel 110 has a bottom-emission structure, the sub-pixel circuit SPC can not overlap the light-emitting device ED in the vertical direction.

[0135] If the display panel 110 has a top-emission structure, the pixel electrode PE can be a reflective electrode, and the common electrode CE can be a transparent electrode, but is not limited thereto. As an example, the pixel electrode PE can be a non-reflective electrode, or can even be a transparent electrode. As an example, the common electrode CE can be a reflective electrode. If the display panel 110 has a bottom-emission structure, the pixel electrode PE can be a transparent electrode, and the common electrode CE can be a reflective electrode, but is not limited thereto.

[0136] As Figure 2 shown, the sub-pixel circuit SPC can have a 2T-1C structure including two transistors T1 and T2 and one capacitor Cst. In some cases, the sub-pixel circuit SPC can further include one or more transistors or one or more capacitors.

[0137] For example, the sub-pixel circuit SPC may have an 8T-1C structure including eight transistors and a single capacitor. As another example, the sub-pixel circuit SPC may have a 6T-2C structure including six transistors and two capacitors. As another example, the sub-pixel circuit SPC may have a 7T-1C structure including seven transistors and a single capacitor. These are merely examples of the sub-pixel circuit SPC, and embodiments of the present disclosure are not limited thereto.

[0138] According to the structure of the sub-pixel circuit SPC, the type and number of the gate signals provided to the sub-pixel SP and / or the gate lines may be changed. In addition, according to the structure of the sub-pixel circuit SPC, the type and number of the common driving voltages provided to the sub-pixel SP may be changed.

[0139] Since the circuit elements within each sub-pixel SP (particularly, the light-emitting device ED implemented with an organic light-emitting diode (OLED) containing an organic material) are vulnerable to external moisture or oxygen, the encapsulation layer 200 may be provided on the display panel 110 to reduce or prevent oxygen from penetrating into the circuit elements (particularly, the light-emitting device ED).

[0140] The encapsulation layer 200 may be configured in various shapes to reduce or prevent the light-emitting device ED from coming into contact with moisture or oxygen. For example, the encapsulation layer 200 may be composed of two or more layers formed by alternately laminating an organic layer and an inorganic layer, but embodiments of the present disclosure are not limited thereto.

[0141] Refer to Figure 2 , in order to sense a user's touch, the display device 100 according to an exemplary embodiment of the present disclosure may include: a touch sensor layer including a plurality of sensor electrodes; a touch driving circuit configured to sense the plurality of sensor electrodes; and a touch controller configured to determine the presence or absence of a touch or touch coordinates using the sensing result (e.g., touch sensing data) of the touch driving circuit.

[0142] The touch sensor layer may be built in or embedded in the display panel 110.

[0143] The display panel 110 may further include: a plurality of touch pads electrically connected to the touch sensing circuit; and a plurality of touch lines for electrically connecting the plurality of sensor electrodes included in the touch sensor layer and the plurality of touch pads connected to the touch sensing circuit.

[0144] Figure 3 Show the sub-pixel SP of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0145] Refer to Figure 3, each of the plurality of sub-pixels SP provided on the display panel 110 according to an exemplary embodiment of the present disclosure may include a light-emitting device ED and a sub-pixel circuit SPC for driving the light-emitting device ED.

[0146] Compared with Figure 2 the sub-pixel SP shown, Figure 3 the sub-pixel circuit SPC of each sub-pixel SP shown may further include a sensing transistor SENT. That is, Figure 3 the sub-pixel circuit SPC of each sub-pixel SP shown may include a driving transistor DRT, a scanning transistor SCT, a sensing transistor SENT, and a storage capacitor Cst.

[0147] Referring to Figure 2 and Figure 3 , the light-emitting device ED may include a pixel electrode PE, a common electrode CE, and an intermediate layer EL located between the pixel electrode PE and the common electrode CE. The first common driving voltage line VSSL may be electrically connected to the common electrode CE.

[0148] Referring to Figure 3 , the driving transistor DRT is a transistor for driving the light-emitting device ED, and may include a first node N1, a second node N2, and a third node N3.

[0149] The first node N1 of the driving transistor DRT may be a source node or a drain node of the driving transistor DRT, may be electrically connected to the source node or the drain node of the sensing transistor SENT, and may also be electrically connected to the pixel electrode PE of the light-emitting device ED.

[0150] The second node N2 of the driving transistor DRT may be a gate node of the driving transistor DRT, and may be electrically connected to the source node or the drain node of the scanning transistor SCT.

[0151] The third node N3 of the driving transistor DRT may be electrically connected to the first common driving voltage line VDDL that provides the first common driving voltage VDD.

[0152] Referring to Figure 3 , the scanning transistor SCT may be controlled by a scanning signal SC as a kind of gating signal, and may be connected between the second node N2 of the driving transistor DRT and the data line DL. That is, the scanning transistor SCT may be turned on or off according to the scanning signal SC provided by the scanning signal line as a kind of gating line GL, and may control the connection between the data line DL and the second node N2 of the driving transistor DRT.

[0153] The scan transistor SCT can be turned on by a scan signal SC having a conductive-level voltage, and can apply a data voltage VDATA provided from a data line DL to a second node N2 of a driving transistor DRT.

[0154] Here, if the scan transistor SCT is an n-type transistor, the conductive-level voltage of the scan signal SC can be a high-level voltage. If the scan transistor SCT is a p-type transistor, the conductive-level voltage of the scan signal SC can be a low-level voltage. Hereinafter, the scan transistor SCT is illustrated as an n-type transistor. Accordingly, the conductive-level voltage is illustrated as a high-level voltage. However, embodiments of the present disclosure are not limited thereto.

[0155] Referring to Figure 3 , a sense transistor SENT can be controlled by a sense signal SE which is a kind of gate signal, and can be connected between a first node N1 of the driving transistor DRT and a reference voltage line VREFL. That is, the sense transistor SENT can be turned on or off according to the sense signal SE provided from a sense signal line which is another kind of gate line GL, and can control the connection between the reference voltage line VREFL and the first node N1 of the driving transistor DRT.

[0156] The sense transistor SENT can be turned on by a sense signal SE having a conductive-level voltage, and can transfer a reference voltage VREF provided from the reference voltage line VREFL to the first node N1 of the driving transistor DRT. Here, it can be considered that the sense signal SE is a second scan signal different from the scan signal SC.

[0157] In addition, the sense transistor SENT can be turned on by a sense signal SE having a conductive-level voltage, and can transfer the voltage of the first node N1 of the driving transistor DRT to the reference voltage line VREFL.

[0158] Here, when the sense transistor SENT is an n-type transistor, the conductive-level voltage of the sense signal SE can be a high-level voltage. When the sense transistor SENT is a p-type transistor, the conductive-level voltage of the sense signal SE can be a low-level voltage. Hereinafter, for example, the sense transistor SENT is illustrated as an n-type transistor. Accordingly, the conductive-level voltage is a high-level voltage.

[0159] When driving to sense a characteristic value of a sub-pixel SP, the function of the sense transistor SENT of transferring the voltage of the first node N1 of the driving transistor DRT to the reference voltage line VREFL can be used. In this case, the voltage transferred to the reference voltage line VREFL can be a voltage for calculating a characteristic value of the sub-pixel SP or a voltage reflecting a characteristic value of the sub-pixel SP.

[0160] In the present disclosure, the eigenvalue of the sub-pixel SP may be an eigenvalue of the driving transistor DRT or the light-emitting device ED. For example, the eigenvalues of the driving transistor DRT may include the threshold voltage and mobility of the driving transistor DRT. The eigenvalues of the light-emitting device ED may include the threshold voltage of the light-emitting device ED.

[0161] Referring to Figure 3 , the storage capacitor Cst may be connected between the second node N2 and the first node N1 of the driving transistor DRT. The storage capacitor Cst may be charged with a charge corresponding to the voltage difference between both ends and may serve to maintain the voltage difference between both ends within a set frame time. Accordingly, the corresponding sub-pixel SP may emit light during the set frame time.

[0162] For example, referring to Figure 3 , the gate node of the scan transistor SCT and the gate node of the sense transistor SENT may not be connected. That is, the gate node of the scan transistor SCT and the gate node of the sense transistor SENT may be connected to different gate lines GL. In this case, the on-off of the scan transistor SCT and the on-off of the sense transistor SENT may be independently controlled.

[0163] As another example, the gate node of the scan transistor SCT and the gate node of the sense transistor SENT may be electrically connected to each other. That is, the gate node of the scan transistor SCT and the gate node of the sense transistor SENT may be commonly connected to one gate line GL. In this case, the on-off of the scan transistor SCT and the on-off of the sense transistor SENT may be simultaneously controlled.

[0164] Referring to Figure 3 , the driving transistor DRT, the scan transistor SCT, and the sense transistor SENT may each be an n-type transistor or a p-type transistor. In the present disclosure, for ease of explanation, it is illustrated that the driving transistor DRT, the scan transistor SCT, and the sense transistor SENT are all n-type.

[0165] Figure 3 The illustrated sub-pixel SP is only an example and may be modified in various ways by including one or more transistors or one or more capacitors.

[0166] Figure 4 is a plan view of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0167] Referring to Figure 4, the plurality of sub-pixels SP provided on the display panel 110 according to an exemplary embodiment of the present disclosure may be arranged in a matrix form. For example, the plurality of sub-pixels SP provided on the display panel 110 according to an exemplary embodiment of the present disclosure may include 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 arranged in three rows and nine columns. The 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may constitute the first sub-pixel row SPR1 to the third sub-pixel row SPR3. The 27 sub-pixels SP11 to SP19, SP21 to SP29, and SP31 to SP39 may constitute the first sub-pixel column SPC1 to the ninth sub-pixel column SPC9.

[0168] As an example, the plurality of sub-pixels SP provided on the display panel 110 may include red sub-pixels that emit red light, green sub-pixels that emit green light, and blue sub-pixels that emit blue light. The embodiment is not limited thereto. As an example, sub-pixels that emit light of other colors such as cyan, yellow, magenta, etc. may be alternatively or additionally included.

[0169] For example, in this case, the sub-pixels arranged in the first sub-pixel column SPC1, the fourth sub-pixel column SPC4, and the seventh sub-pixel column SPC7 may be red sub-pixels. The sub-pixels arranged in the second sub-pixel column SPC2, the fifth sub-pixel column SPC5, and the eighth sub-pixel column SPC8 may be green sub-pixels. The sub-pixels arranged in the third sub-pixel column SPC3, the sixth sub-pixel column SPC6, and the ninth sub-pixel column SPC9 may be green sub-pixels, but the embodiment is not limited thereto.

[0170] As an example, the plurality of sub-pixels SP provided on the display panel 110 may include red sub-pixels that emit red light, green sub-pixels that emit green light, blue sub-pixels that emit blue light, and white sub-pixels that emit white light.

[0171] Refer to Figure 4 , the display panel 110 according to an exemplary embodiment of the present disclosure may include vertical lines extending in the column direction and horizontal lines extending in the row direction. The horizontal lines and the vertical lines may vary according to the structure of the sub-pixels SP.

[0172] As an example, the horizontal lines may include gate lines GL, and the vertical lines may include data lines DL, but the embodiment is not limited thereto.

[0173] For example, in the case where the sub-pixels SP have Figure 2 the structure shown, the horizontal lines may include scan signal lines as gate lines GL, and the vertical lines may include data lines DL and at least one first common driving voltage line VDDL.

[0174] As another example, if the sub-pixel SP is configured as Figure 3 the structure shown, the horizontal lines may include scan signal lines and sense signal lines that serve as gate lines GL, and the vertical lines may include data lines DL, at least one first common driving voltage line VDDL, and at least one reference voltage line VREFL.

[0175] Figure 4 shows a signal line layout structure in the case where the sub-pixel SP has the same structure as Figure 3 the structure shown. Figure 4 The layout positions and numbers of the gate lines GL, data lines DL, at least one first common driving voltage line VDDL, and at least one reference voltage line VREFL shown can be modified in various ways.

[0176] Figure 5 shows the area of the sub-pixel of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0177] Referring to Figure 5 , in the case where the display panel 110 according to an exemplary embodiment of the present disclosure emits light in the backward direction, the area of each sub-pixel SP may include a circuit area where a sub-pixel circuit SPC is provided and a light-emitting area EA where a light-emitting device ED emits light.

[0178] In the case where the display panel 110 emits light in the backward direction, the circuit area CA and the light-emitting area EA may not overlap with each other. The light-emitting area EA may also be referred to as an opening or aperture area.

[0179] Meanwhile, the light generated from the light-emitting layer EML of the light-emitting device ED of the display panel 110 may pass through various components within the display panel 110 and exit the display panel 110. However, among the light generated in the light-emitting layer EML of the light-emitting device ED, there may be light that does not exit the display panel 110 and is trapped inside the display panel 110.

[0180] Among the light generated in the light-emitting layer EML of the light-emitting device ED, as more light does not exit the display panel 110 and is trapped inside the display panel 110, the brightness of the corresponding sub-pixel SP will decrease. Therefore, the quality of the image displayed on the display panel 110 may be reduced.

[0181] Therefore, the display panel 110 according to an exemplary embodiment of the present disclosure may include a light extraction structure that allows a larger amount of the light generated by the light-emitting device ED to be emitted toward the viewing surface.

[0182] The light extraction structure according to an exemplary embodiment of the present disclosure may be a structure included in the display panel 110, and may reduce the amount of light trapped inside the display panel 110 from the amount of light generated by the light emitting layer EML of the light emitting device ED in the display panel 110, and increase the amount of light emitted to the outside of the display panel 110. "Light extraction" in an exemplary embodiment of the present disclosure may mean that a part of the light emitted from the light emitting layer EML of the light emitting device ED in the display panel 110 is emitted to the outside of the display panel 110.

[0183] Hereinafter, the light extraction structure according to an exemplary embodiment of the present disclosure will be described in detail. In the following description, a case where the display panel 110 according to an exemplary embodiment of the present disclosure has a bottom emission structure is illustrated.

[0184] Figure 6 and Figure 7 FIG. shows the light extraction structure of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0185] Figure 6 FIG. shows the light extraction structure in the display panel 110 including the bank BNK, and Figure 7 FIG. shows the light extraction structure in the display panel 110 without the bank BNK.

[0186] Referring to Figure 6 and Figure 7 , the display panel 110 may include a first sub-pixel SP1, a second sub-pixel SP2 located on one side of the first sub-pixel SP1, and a third sub-pixel SP3 located on the other side of the first sub-pixel SP1.

[0187] Referring to Figure 6 and Figure 7 , the display panel 110 according to an exemplary embodiment of the present disclosure may include a substrate 111, a passivation layer 600 located on the substrate 111, first to third color filters CF1, CF2, and CF3 located on the passivation layer 600, a first protective layer 610 located on the first to third color filters CF1, CF2, and CF3, a second protective layer 620 located on the first protective layer 610, first to third pixel electrodes PE1, PE2, and PE3 located on the second protective layer 620, an intermediate layer EL located on the first to third pixel electrodes PE1, PE2, and PE3, and a common electrode CE located on the intermediate layer EL.

[0188] Referring to Figure 6 and Figure 7 , the first to third pixel electrodes PE1, PE2, and PE3 may be transparent electrodes, and the common electrode CE may be a reflective electrode.

[0189] Referring toFigure 6 and Figure 7 According to an exemplary embodiment of the present disclosure, the display panel 110 may include signal lines SL1, SL2, and SL3. As an example, at least one or all of the signal lines SL1, SL2, and SL3 may be located between the substrate 111 and the passivation layer 600. For example, the signal lines SL1, SL2, and SL3 may be vertical lines. For example, the vertical lines may include data lines DL, at least one first common driving voltage line VDDL, and at least one reference voltage line VREFL.

[0190] Referring to Figure 6 and Figure 7 In the second protective layer 620, holes H1 and H2 may be formed between two adjacent sub-pixels (or two adjacent pixel electrodes). That is, the second protective layer 620 may include a first hole H1 formed between the first sub-pixel SP1 and the second sub-pixel SP2, and a second hole H2 formed between the second sub-pixel SP2 and the third sub-pixel SP3.

[0191] Therefore, as an example, the intermediate layer EL and the common electrode CE may be disposed inside the holes H1 and H2 along the sides of the holes H1 and H2 of the second protective layer 620. Therefore, as an example, the portion of the common electrode CE disposed inside the holes H1 and H2 of the second protective layer 620 may be positioned closer to the substrate 111 than the pixel electrodes PE1, PE2, and PE3, but is not limited thereto.

[0192] Therefore, the light emitted from the light-emitting layer EML of the first light-emitting device ED1 in the first sub-pixel SP1 may be reflected at the common electrode CE and may propagate toward the viewing surface. Here, the light-emitting layer EML of the first light-emitting device ED1 may be a layer included in the intermediate layer EL and may be present between the first pixel electrode PE1 and the common electrode CE (see Figure 2 ).

[0193] Referring to Figure 6, as an example, the bank BNK can be disposed between the pixel electrodes PE1, PE2, and PE3 and the intermediate layer EL. As an example, the bank BNK can be disposed to cover the ends of the pixel electrodes PE1, PE2, and PE3, but is not limited thereto. As an example, the bank BNK can be disposed to contact the ends of the pixel electrodes PE1, PE2, and PE3 without covering the ends of the pixel electrodes PE1, PE2, and PE3. In addition, the bank BNK can have grooves or holes formed inside the holes H1 and H2 of the second protective layer 620. Thus, the portion of the common electrode CE disposed inside the holes H1 and H2 of the second protective layer 620 can be positioned closer to the substrate 111 than the pixel electrodes PE1, PE2, and PE3. As an example, the bank BNK can have grooves or holes formed inside the holes H1 and H2 of the second protective layer 620 to expose the second protective layer 620, or not expose the second protective layer 620. As an example, the bank BNK can have grooves or holes formed in the holes H1 and H2 of the second protective layer 620 to disconnect or not disconnect the bank BNK at the holes H1 and H2 of the second protective layer 620. As an example, the bank BNK can have grooves or holes formed inside the holes H1 and H2 of the second protective layer 620 such that the bottom surface of the groove or hole can be lower than the pixel electrodes PE1, PE2, and PE3, but is not limited thereto.

[0194] Referring to Figure 6 , if there is a bank BNK, the side surfaces at both ends of each pixel electrode PE1, PE2, and PE3 can have various shapes such as an inverted conical shape, a regular taper shape, or a vertical shape.

[0195] As Figure 7 shown, the bank BNK may not exist.

[0196] Referring to Figure 7 , when there is no bank BNK, the side surfaces at both ends of each pixel electrode PE1, PE2, and PE3 can have a regular taper shape. As a result, charge concentration at both ends of each pixel electrode (PE1, PE2, and PE3) can be reduced or prevented. The embodiments are not limited thereto. As an example, even when there is no bank BNK, the side surfaces at both ends of each pixel electrode PE1, PE2, and PE3 can have various shapes such as an inverted conical shape, a regular taper shape, or a vertical shape.

[0197] In the absence of the bank BNK, if the sides at both ends of each pixel electrode PE1, PE2, and PE3 have an inverted conical shape or a vertical shape where cusp points may exist, charges may concentrate at both ends of each pixel electrode PE1, PE2, and PE3. If charges concentrate at both ends (e.g., edges) of each pixel electrode PE1, PE2, and PE3, more severe degradation may occur in the portions of the intermediate layer EL adjacent to both ends of each pixel electrode PE1, PE2, and PE3. As a result, the brightness outside the light-emitting regions of each sub-pixel SP1, SP2, and SP3 may become abnormally low.

[0198] Therefore, in the absence of the bank BNK, the sides at both ends of each pixel electrode PE1, PE2, and PE3 can have a standard conical shape, thereby reducing or preventing the phenomenon of charge concentration. As a result, it is possible to reduce or prevent the phenomenon that the brightness outside the light-emitting regions of each sub-pixel SP1, SP2, and SP3 becomes abnormally low or dark.

[0199] As described above, the light extraction structure of the display panel 110 according to an exemplary embodiment of the present disclosure may have the following characteristics.

[0200] The insulating layer (e.g., Figure 6 and Figure 7 the second protective layer 620 therein) located under the pixel electrode PE may have a stepped structure (e.g., holes or grooves in the insulating layer). The stepped structure of the insulating layer may be located between two adjacent pixel electrodes PE. That is, the stepped structure of the insulating layer may not overlap with the pixel electrode PE. In addition, the common electrode CE may also be provided inside the holes or grooves that are the stepped structure of the insulating layer, such that the common electrode CE located inside the holes or grooves of the insulating layer may be positioned lower than the light-emitting layer EML or the pixel electrode PE.

[0201] According to the light extraction structure of the display panel 110 according to an exemplary embodiment of the present disclosure, the light emitted from the light-emitting layer EML of the light-emitting device ED can be reflected by the common electrode CE located on the side of the pixel electrode PE and propagate toward the viewing surface.

[0202] Therefore, the ratio of the light emitted from the light-emitting layer EML of the light-emitting device ED that is emitted to the outside of the display panel 110 can be increased. That is, the light extraction performance can be improved.

[0203] The display panel 110 according to an exemplary embodiment of the present disclosure may have a light extraction structure to increase the light extraction efficiency. The light extraction efficiency may indicate the degree of increase in the amount of light emitted to the outside of the display panel 110 in the case of having a light extraction structure compared to the amount of light emitted to the outside of the display panel 110 in the case of not having a light extraction structure.

[0204] The light extraction structure can be formed by forming a stepped structure of the second protective layer 620 between two adjacent light-emitting regions (i.e., adjacent sub-pixels).

[0205] In the case where the display panel 110 needs to be designed as a high-resolution product, the gap between two adjacent light-emitting regions (i.e., two adjacent sub-pixels) is significantly narrowed. Therefore, there may not be enough space to form the light extraction structure between two adjacent light-emitting regions (i.e., two adjacent sub-pixels).

[0206] Therefore, the display device 100 according to an exemplary embodiment of the present disclosure may include a light extraction structure suitable for the high-resolution display panel 110. Hereinafter, the light extraction structure suitable for the high-resolution display panel 110 according to an exemplary embodiment of the present disclosure will be described in detail. Hereinafter, the "light extraction structure suitable for the high-resolution display panel 110" is described as the "light extraction structure for high resolution".

[0207] Figure 8 and Figures 9 to 12 FIG. shows the light extraction structure for high resolution of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0208] Referring to Figure 8 , the display panel 110 having the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure may include eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24.

[0209] The eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24 may constitute a first sub-pixel row SPR1 and a second sub-pixel row SPR2. The eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24 may constitute first to fourth sub-pixel columns SPC1 to SPC4. In Figure 8 each of the eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24 may represent a sub-pixel region.

[0210] In Figure 8 for ease of illustration, various signal lines (e.g., DL, VDDL, REFL, GL) for driving the eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24 are not shown. In Figure 8Among them, the rectangles representing the eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24 may represent the light-emitting regions of the eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24. However, the light-emitting regions of the eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24 may have various shapes such as circular shape, oval shape, diamond shape, polygon shape, etc. other than the rectangular shape, but are not limited thereto. In Figure 8 Among them, the circuit regions of the eight sub-pixels SP11, SP12, SP13, SP14, SP21, SP22, SP23, and SP24 are omitted.

[0211] In Figures 9 to 12 Among them, the color filters provided between the passivation layer 600 and the first protective layer 610 are omitted. Each color filter may be arranged to overlap with the corresponding pixel electrode (see Figure 6 and Figure 7 ).

[0212] In addition, the display panel 110 according to an exemplary embodiment of the present disclosure may have a structure with a bank BNK as shown in Figure 6 , or may have a structure without a bank BNK as shown in Figure 7 . Referring to [[ID=e19]] Figure 9 and Figure 10 , when there is a bank BNK as shown in Figure 6 , the bank BNK may be arranged to partially cover both ends of each pixel electrode.

[0213] Referring to Figure 8 , the light extraction structure for high resolution included in the display panel 110 according to an exemplary embodiment of the present disclosure may include a mirror part MR (for example, a reflector). The light extraction structure for high resolution included in the display panel 110 according to an exemplary embodiment of the present disclosure may not only include a structure called the mirror part MR, but may also include the number n(MR) of mirror parts and the mirror part arrangement structure.

[0214] The mirror part MR for forming the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure may be formed by the inclined surface SLP or ramp of the common electrode CE. In an exemplary embodiment of the present disclosure, the inclined surface SLP of the common electrode CE may correspond to the stepped part of the common electrode CE, and the inclined surface SLP of the common electrode CE may also be referred to as the mirror part MR or the mirror surface.

[0215] In the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the common electrode CE may have a plurality of inclined surfaces SLP.

[0216] For example, in a light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the number of inclined surfaces SLP of a common electrode CE present in or around the regions of some sub-pixels may be different from the number of inclined surfaces SLP of the common electrode CE present in or around the regions of some other sub-pixels.

[0217] As another example, in a light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the positions of the inclined surfaces SLP of the common electrode CE present in or around the regions of some sub-pixels may be different from the positions of the inclined surfaces SLP of the common electrode CE present in or around the regions of some other sub-pixels.

[0218] Reference will be made to Figure 8 A light extraction structure suitable for high resolution according to an exemplary embodiment of the present disclosure will be described in more detail.

[0219] Referring to Figure 8 , a plurality of sub-pixels SP11 to SP14 and SP21 to SP24 may be arranged in a matrix form.

[0220] The plurality of sub-pixels SP11 to SP14, SP21 to SP24 may form a first sub-pixel row SPR1 and a second sub-pixel row SPR2, and may form a first sub-pixel column SPC1, a second sub-pixel column SPC2, a third sub-pixel column SPC3, and a fourth sub-pixel column SPC4.

[0221] The first sub-pixel row SPR1 may include a plurality of sub-pixels SP11, SP12, SP13, and SP14 arranged in a first direction (e.g., the row direction). The second sub-pixel row SPR2 may include a plurality of sub-pixels SP21, SP22, SP23, and SP24 arranged in the first direction (e.g., the row direction). The second sub-pixel row SPR2 may be disposed adjacent to the first sub-pixel row SPR1 in a second direction (e.g., the column direction).

[0222] As an example, in each of the first sub-pixel row SPR1 and the second sub-pixel row SPR2, the number n(MR) of mirror portions of each sub-pixel may repeat with 4 and 2. That is, in each of the first sub-pixel row SPR1 and the second sub-pixel row SPR2, sub-pixels with the number n(MR) of mirror portions being 2 (e.g., SP12) may exist between sub-pixels with the number n(MR) of mirror portions being 4 (e.g., SP11, SP13).

[0223] Among the four sub-pixels SP11, SP12, SP13, and SP14 arranged in the first sub-pixel row SPR1, the number n(MR) of mirror parts of the sub-pixels SP11 and SP13 arranged in the odd sub-pixel columns SPC1 and SPC3 can be different from the number n(MR) of mirror parts of the sub-pixels SP12 and SP14 arranged in the even sub-pixel columns SPC2 and SPC4.

[0224] For example, among the four sub-pixels SP11, SP12, SP13, and SP14 arranged in the first sub-pixel row SPR1, the number n(MR) of mirror parts of the sub-pixels SP11 and SP13 arranged in the odd sub-pixel columns SPC1 and SPC3 can be 4, and the number n(MR) of mirror parts of the sub-pixels SP12 and SP14 arranged in the even sub-pixel columns SPC2 and SPC4 can be 2.

[0225] Among the four sub-pixels SP21, SP22, SP23, and SP24 arranged in the second sub-pixel row SPR2, the number n(MR) of mirror parts of the sub-pixels SP21 and SP23 arranged in the odd sub-pixel columns SPC1 and SPC3 and the number n(MR) of mirror parts of the sub-pixels SP22 and SP24 arranged in the even sub-pixel columns SPC2 and SPC4 can be different from each other.

[0226] For example, among the four sub-pixels SP21, SP22, SP23, and SP24 arranged in the second sub-pixel row SPR2, the number n(MR) of mirror parts of the sub-pixels SP21 and SP23 arranged in the odd sub-pixel columns SPC1 and SPC3 can be 2, and the number n(MR) of mirror parts of the sub-pixels SP22 and SP24 arranged in the even sub-pixel columns SPC2 and SPC4 can be 4.

[0227] According to the above, in the first sub-pixel row SPR1, the number n(MR) of mirror parts of the sub-pixel SP11 located in the first sub-pixel column SPC1 can be 4, the number n(MR) of mirror parts of the sub-pixel SP12 located in the second sub-pixel column SPC2 can be 2, the number n(MR) of mirror parts of the sub-pixel SP13 located in the third sub-pixel column SPC3 can be 4, and the number n(MR) of mirror parts of the sub-pixel SP14 located in the fourth sub-pixel column SPC4 can be 2.

[0228] In addition, in the second sub-pixel row SPR2, the number n(MR) of mirror portions of the sub-pixel SP21 located in the first sub-pixel column SPC1 may be 2, the number n(MR) of mirror portions of the sub-pixel SP22 located in the second sub-pixel column SPC2 may be 4, the number n(MR) of mirror portions of the sub-pixel SP23 located in the third sub-pixel column SPC3 may be 2, and the number n(MR) of mirror portions of the sub-pixel SP24 located in the fourth sub-pixel column SPC4 may be 4.

[0229] The mirror portion MR may be present on each of the four sides of each of the sub-pixels SP11, SP13, SP22, and SP24 where the number n(MR) of mirror portions is 4.

[0230] Two mirror portions MR may be present on two sides facing each other in the first direction (e.g., the column direction) of the four sides of each of the sub-pixels SP12, SP14, SP21, and SP23 where the number n(MR) of mirror portions is 2.

[0231] The mirror portion MR is a surface on which the light emitted from the light-emitting device ED is reflected, and may correspond to the inclined surface SLP of the common electrode CE.

[0232] For example, the four mirror portions MR of the sub-pixel SP11 in the first row and the first column may correspond to each of the four inclined surfaces SLP1a, SLP1b, SLP1c, and SLP1d of the common electrode CE around the area or the surrounding area of the sub-pixel SP11 in the first row and the first column. The two mirror portions MR of the sub-pixel SP12 in the first row and the second column may correspond to each of the two inclined surfaces SLP2a and SLP2b facing each other in the first direction of the area of the common electrode CE facing the sub-pixel SP12 in the first row and the second column or its surrounding area. The four mirror portions MR of the sub-pixel SP13 in the first row and the third column may correspond to each of the four inclined surfaces SLP3a, SLP3b, SLP3c, and SLP3d of the common electrode CE around the area or the surrounding area of the sub-pixel SP13 in the first row and the third column. The two mirror portions MR of the sub-pixel SP14 in the first row and the fourth column may correspond to each of the two inclined surfaces SLP4a and SLP4b facing each other in the first direction of the area of the common electrode CE facing the sub-pixel SP14 in the first row and the fourth column or its surrounding area. The four mirror portions MR of the sub-pixel SP22 in the second row and the second column may correspond to each of the four inclined surfaces SLP5a, SLP5b, SLP5c, and SLP5d of the common electrode CE around the area or the surrounding area of the sub-pixel SP22 in the second row and the second column. The embodiments are not limited thereto. As an example, the number of mirror portions MR of one sub-pixel is not limited to 2 or 4. As an example, the number of mirror portions MR of one sub-pixel may be 0, 1, 2, 3, or more than 4. As an example, the number of mirror portions MR of one sub-pixel may depend on the shape of the light-emitting area of the one sub-pixel, but is not limited thereto.

[0233] Reference will be made to Figures 9 to 12 to describe in more detail the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure. First, reference will be made to Figure 9 and Figure 10 for description. Figure 11 and Figure 12 may respectively correspond to Figure 9 and Figure 10 .

[0234] Figure 9 is a cross-sectional view of the area X-X' of the first sub-pixel to the fourth sub-pixel SP11, SP12, SP13, and SP14 of the first sub-pixel row SPR1 provided in Figure 8 . Figure 10 is a cross-sectional view of the area Y-Y' of the second sub-pixel SP12 and the fifth sub-pixel SP22 of the second sub-pixel column SPC2 provided in Figure 8 .

[0235] Reference Figure 9and Figure 10 The first sub-pixel SP11 may include a first light-emitting device ED11, the second sub-pixel SP12 may include a second light-emitting device ED12, the third sub-pixel SP13 may include a third light-emitting device ED13, the fourth sub-pixel SP14 may include a fourth light-emitting device ED14, and the fifth sub-pixel SP22 may include a fifth light-emitting device ED22.

[0236] Referring to Figure 9 a display panel 110 according to an exemplary embodiment of the present disclosure may include a first protective layer 610 on a substrate 111, a lower insulating layer 910 on the first protective layer 610, a first upper insulating layer 920A on the lower insulating layer 910, and a second upper insulating layer 920B on the lower insulating layer 910 and spaced apart from the first upper insulating layer 920A in a first direction, as insulating layers for forming a light extraction structure for high resolution.

[0237] Referring to Figure 9 a display panel 110 according to an exemplary embodiment of the present disclosure may include a first pixel electrode PE11 on the first upper insulating layer 920A, a second pixel electrode PE12 on the lower insulating layer 910 and disposed between one side of the first upper insulating layer 920A and the other side of the second upper insulating layer 920B, a third pixel electrode PE13 on the second upper insulating layer 920B, and a fourth pixel electrode PE14 on the lower insulating layer 910 and disposed on one side of the second upper insulating layer 920B.

[0238] Referring to Figure 10 a display panel 110 according to an exemplary embodiment of the present disclosure may further include a third upper insulating layer 920C as an insulating layer for forming a light extraction structure for high resolution, which is on the lower insulating layer 910 and disposed on one side of the second pixel electrode PE12 in a second direction different from the first direction.

[0239] Referring to Figure 9 and Figure 10 a display panel 110 according to an exemplary embodiment of the present disclosure may further include a fourth pixel electrode PE14 on the lower insulating layer 910 and disposed on one side of the second upper insulating layer 920B, and a fifth pixel electrode PE22 on the third upper insulating layer 920C.

[0240] Referring to Figure 9 and Figure 10, the first pixel electrode PE11, the second pixel electrode PE12, the third pixel electrode PE13, the fourth pixel electrode PE14, and the fifth pixel electrode PE22 may be respectively included in the first sub-pixel SP11, the second sub-pixel SP12, the third sub-pixel SP13, the fourth sub-pixel SP14, and the fifth sub-pixel SP22.

[0241] Referring to Figure 8 , Figure 9 and Figure 10 , the first sub-pixel SP11, the second sub-pixel SP12, the third sub-pixel SP13, and the fourth sub-pixel SP14 may be arranged in the first sub-pixel row SPR1. The fifth sub-pixel SP22 may be arranged in the second sub-pixel row SPR2 adjacent to the first sub-pixel row SPR1 in the second direction, and the second sub-pixel SP12 and the fifth sub-pixel SP22 may be arranged in the second sub-pixel column SPC2.

[0242] Referring to Figure 8 , Figure 9 and Figure 10 , the first upper insulating layer 920A and the second upper insulating layer 920B may be provided in the first sub-pixel row SPR1, and the third upper insulating layer 920C may be provided in the second sub-pixel row SPR2.

[0243] At least two or each of the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C may be layers of the same insulating material, but is not limited thereto. The first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C may be provided to be spaced apart from each other in an island shape.

[0244] Each of the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C may have a size corresponding to the light-emitting region EA of the sub-pixel SP. As an example, at least two or all of the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C may have the same size, but is not limited thereto. As an example, at least two or all of the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C may have the same height, but is not limited thereto.

[0245] Referring to Figure 9 and Figure 10 , the display panel 110 according to an exemplary embodiment of the present disclosure may include an intermediate layer EL located on the first pixel electrode PE11, the second pixel electrode PE12, the third pixel electrode PE13, the fourth pixel electrode PE14, and the fifth pixel electrode PE22, and a common electrode CE located on the intermediate layer EL.

[0246] The intermediate EL layer may include a first light-emitting layer to a fifth light-emitting layer (EML) and a common intermediate EL_COM layer. The first light-emitting layer to the fifth light-emitting layer EML may be arranged to overlap with the first pixel electrode to the fifth pixel electrode PE11, PE12, PE13, PE14, and PE15, respectively. The common intermediate EL_COM layer may include a first common intermediate layer COM1 and / or a second common intermediate layer COM2. The first common intermediate layer COM1 may be commonly disposed between the first pixel electrode to the fifth pixel electrode PE11, PE12, PE13, PE14, and PE15 and the first light-emitting layer to the fifth light-emitting layer EML. The second common intermediate layer COM2 may be commonly disposed between the first light-emitting layer to the fourth light-emitting layer EML and the common electrode CE.

[0247] The display panel 110 according to an exemplary embodiment of the present disclosure may have a bottom emission structure. Thus, as an example, the common electrode CE may be a reflective electrode. That is, the common electrode CE may include a reflective electrode material.

[0248] Referring to Figure 9 and Figure 10 , the second light-emitting device ED12 and the fourth light-emitting device ED14 may be positioned closer to the substrate 111 than the first light-emitting device ED11, the third light-emitting device ED13, and the fifth light-emitting device ED22.

[0249] The first light-emitting device ED11, the third light-emitting device ED13, and the fifth light-emitting device ED22 may be located at a first height L1 from the substrate 111. The second light-emitting device ED12 and the fourth light-emitting device ED14 may be located at a second height L2 lower than the first height L1 from the substrate 111.

[0250] Referring to Figure 9 and 10 , the second pixel electrode PE12 and the fourth pixel electrode PE14 may be positioned closer to the substrate 111 than the first pixel electrode PE11, the third pixel electrode PE13, and the fifth pixel electrode PE22.

[0251] Referring to Figure 8 , Figure 9 and Figure 10 , the common electrode CE may have a plurality of inclined surfaces SLP.

[0252] Referring to Figure 8 , Figure 9 and Figure 10 , the common electrode CE may have inclined surfaces SLP on each side of the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C. As an example, the common electrode CE may also have an inclined surface SLP on one side of the lower insulating layer 910, but is not limited thereto.

[0253] Reference Figure 8 、 Figure 9 and Figure 10 , the common electrode CE may have inclined surfaces (SLP1a / SLP1b / SLP1c / SLP1d, SLP3a / SLP3b / SLP3c / SLP3d, SLP5a / SLP5b / SLP5c / SLP5d) SLP on each of the four side surfaces of each of the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C.

[0254] Reference Figure 8 、 Figure 9 and Figure 10 , the common electrode CE may have inclined surfaces (SLP2a / SLP2b, SLP4a / SLP4b) on each of two side surfaces of the four side surfaces of the lower insulating layer 910. As an example, similar to Figure 6 and Figure 7As shown, holes can be formed between two sub-pixels (e.g., the second sub-pixel SP12 and the fifth sub-pixel SP22) adjacent in the second direction in the lower insulating layer 910. Thus, as an example, the intermediate layer EL and the common electrode CE can be disposed inside the holes along the side surfaces of the holes in the lower insulating layer 910. Thus, as an example, the portion of the common electrode CE disposed inside the holes in the lower insulating layer 910 can be positioned closer to the substrate 111 than the pixel electrodes PE12 and PE22, but is not limited thereto. As an example, the portion of the common electrode CE disposed inside the holes in the lower insulating layer 910 can be positioned closer to the substrate 111 than the pixel electrode PE22, but can be positioned farther from the substrate 111 than the pixel electrode PE12, but is not limited thereto. As an example, the inclined surface SLP2b can be located on the side surface of the hole in the lower insulating layer 910. As an example, the inclined surface SL5a can include a first portion located on the side surface of the third upper insulating layer 920C and a second portion located on the side surface of the lower insulating layer 910. As an example, the depth of the hole in the lower insulating layer 910 can be less than, equal to, or greater than the height of the third upper insulating layer 920C. As an example, the first portion of the inclined surface SL5a can be longer than, equal to, or shorter than the second portion of the inclined surface SL5a. As an example, the second portion of the inclined surface SL5a can have the same length as the inclined surface SLP2b, but is not limited thereto. As an example, the inclined surface SL5a can further include a flat portion connecting the first portion and the second portion. As an example, the flat portion can be located on the portion of the lower insulating layer 910 between the hole and the third upper insulating layer 920C. As an example, the hole in the lower insulating layer 910 can expose or can not expose the first protective layer 610. As an example, holes can be additionally or alternatively formed between two sub-pixels adjacent in the first direction in the lower insulating layer 910, so that the inclined surfaces SLP1d and SLP1c can also be disposed on the side surfaces of the holes in the lower insulating layer 910. As an example, the inclined surfaces in the first direction (e.g., the inclined surfaces SLP1d and SLP1c, SLP3c and SLP3d, SLP5c and SLP5d) can have the same or substantially the same structure, but is not limited thereto. As an example, the inclined surfaces in the second direction can have the same or substantially the same structure as the inclined surface SL5a or the inclined surface SLP2a, but is not limited thereto. As an example, the inclined surfaces SLP1a and SLP1b can have the same or substantially the same structure as the inclined surface SL5a, but is not limited thereto.

[0255] As described above, the first light-emitting device ED11 of the first sub-pixel SP11 can be formed by the first pixel electrode PE11, the intermediate layer EL, and the common electrode CE. The second light-emitting device ED12 of the second sub-pixel SP12 can be formed by the second pixel electrode PE12, the intermediate layer EL, and the common electrode CE. The third light-emitting device ED13 of the third sub-pixel SP13 can be formed by the third pixel electrode PE13, the intermediate layer EL, and the common electrode CE. The fourth light-emitting device ED14 of the fourth sub-pixel SP14 can be formed by the fourth pixel electrode PE14, the intermediate layer EL, and the common electrode CE. And the fifth light-emitting device ED22 of the fifth sub-pixel SP22 can be formed by the fifth pixel electrode PE22, the intermediate layer EL, and the common electrode CE.

[0256] Referring to Figure 8 、 Figure 9 and Figure 10 , the common electrode CE can have four first inclined surfaces SLP1a, SLP1b, SLP1c, and SLP1d located on four side surfaces of the first light-emitting device ED11, two second inclined surfaces SLP2a and SLP¬2b located on two of the four side surfaces of the second light-emitting device ED12, four third inclined surfaces SLP3a, SLP3b, SLP3c, and SLP3d located on four side surfaces of the third light-emitting device ED13, two fourth inclined surfaces SLP4a and SLP4b located on two of the four side surfaces of the fourth light-emitting device ED14, and four fifth inclined surfaces SLP5a, SLP5b, SLP5c, and SLP5d located on four side surfaces of the fifth light-emitting device ED22.

[0257] The number of the second inclined surfaces SLP2a and SLP2b of the common electrode CE around the second light-emitting device ED12 of the second sub-pixel SP12 and the number of the fourth inclined surfaces SLP4a and SLP4b of the common electrode CE around the fourth light-emitting device ED14 of the fourth sub-pixel SP14 can each be less than each of the number of the first inclined surfaces SLP1a, SLP1b, SLP1c, and SLP1d of the common electrode CE around the first light-emitting device ED11 of the first sub-pixel SP11, the number of the third inclined surfaces SLP3a, SLP3b, SLP3c, and SLP3d of the common electrode CE around the third light-emitting device ED13 of the third sub-pixel SP13, and the number of the fifth inclined surfaces SLP5a, SLP5b, SLP5c, and SLP5d of the common electrode CE around the fifth light-emitting device ED22 of the fifth sub-pixel SP22.

[0258] The first light emitted from the first light-emitting device ED11 can be reflected from the four first inclined surfaces SLP1a, SLP1b, SLP1c, and SLP1d, and can propagate toward the substrate 111 to be emitted from the display panel 110.

[0259] The second light emitted from the second light-emitting device ED12 can be reflected from the two second inclined surfaces SLP2a and SLP2b, and can propagate toward the substrate 111 to be emitted from the display panel 110.

[0260] The third light emitted from the third light-emitting device ED13 can be reflected from the four third inclined surfaces SLP3a, SLP3b, SLP3c, and SLP3d, and can propagate toward the substrate 111 to be emitted from the display panel 110.

[0261] The fourth light emitted from the fourth light-emitting device ED14 can be reflected from the two fourth inclined surfaces SLP4a and SLP4b, and can propagate toward the substrate 111 to be emitted from the display panel 110.

[0262] The fifth light emitted from the fifth light-emitting device ED22 can be reflected from the four fifth inclined surfaces SLP5a, SLP5b, SLP5c, and SLP5d, and can propagate toward the substrate 111 to be emitted from the display panel 110.

[0263] Meanwhile, Figure 11 and Figure 12 can respectively correspond to Figure 9 and Figure 10 .

[0264] Referring to Figure 9 and Figure 10 , the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C can be insulating layers different from the lower insulating layer 910. As an example, at least one or each of the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C can be formed separately from the lower insulating layer 910. As an example, at least one or each of the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C can be formed of a material different from or the same as that of the lower insulating layer 910.

[0265] Alternatively, the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C can be integrally formed with the lower insulating layer 910.

[0266] In Figure 11 and Figure 12In this case, the insulating layer 1100 may be an insulating layer in which the first upper insulating layer 920A, the second upper insulating layer 920B, the third upper insulating layer 920C, and the lower insulating layer 910 are integrally formed.

[0267] Referring to Figure 11 and Figure 12 , the insulating layer 1100 having a stepped portion may be formed, for example, by a halftone mask process. That is, the insulating layer 1100 including the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C may be formed by a halftone mask process. As an example, the stepped portion with a greater height of the insulating layer 1100 may correspond to the first upper insulating layer 920A, the second upper insulating layer 920B, and the third upper insulating layer 920C, while the stepped portion with a smaller height of the insulating layer 1100 may correspond to the lower insulating layer 910.

[0268] As described above, according to the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, a mirror portion MR is formed around a sub-pixel, thereby increasing the light extraction efficiency of the corresponding sub-pixel.

[0269] According to the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, in the case of a specific sub-pixel (for example, SP12), the mirror portion MR may be formed only in a part of the surrounding area. For example, in the case of the second sub-pixel SP12, the mirror portion MR may be formed only on two of the four sides surrounding the second sub-pixel, and the mirror portion MR may not be formed on the remaining two sides. Therefore, the space for forming the light extraction structure can be reduced, which can contribute to realizing the high-resolution display panel 110.

[0270] Depending on the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the number of mirror portions MR present around each sub-pixel may be different. Therefore, there may be a difference in light extraction efficiency between sub-pixels having different numbers n(MR) of mirror portions. The deviation in light extraction efficiency between sub-pixels may cause a brightness deviation, resulting in image blotches.

[0271] Therefore, the display device 100 according to an exemplary embodiment of the present disclosure may perform data compensation processing to reduce or eliminate the brightness deviation caused by the deviation in light extraction efficiency between sub-pixels.

[0272] In the display device 100 according to an exemplary embodiment of the present disclosure, a first data voltage for emitting light of a first luminance may be provided to the first sub-pixel SP11, a second data voltage for emitting light of a second luminance may be provided to the second sub-pixel SP12, a third data voltage for emitting light of a third luminance may be provided to the third sub-pixel SP13, a fourth data voltage for emitting light of a fourth luminance may be provided to the fourth sub-pixel SP1, and a fifth data voltage for emitting light of a fifth luminance may be provided to the fifth sub-pixel SP22.

[0273] According to the data compensation process of the display device 100 according to an exemplary embodiment of the present disclosure, when the first to fifth luminances are the same, the second data voltage and the fourth data voltage may be higher than the first data voltage, the third data voltage, and the fifth data voltage.

[0274] Hereinafter, reference will be made to Figures 13 to 15 Exemplarily describe an optical extraction structure for high resolution according to an exemplary embodiment of the present disclosure. However, reference is also made in the following description to Figures 8 to 12 . In the following description, the first sub-pixel row SRR1 and the second sub-pixel row SPR2 may be referred to as the first row and the second row, respectively, and the first sub-pixel column SPC1 and the second sub-pixel column SPC2, the third sub-pixel column SPC3 and the fourth sub-pixel column SPC4 may be referred to as the first column, the second column, the third column, and the fourth column, respectively.

[0275] Figure 13 Show the number n(MR) of mirror portions of each sub-pixel of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0276] Reference Figure 13 , among the four sub-pixels SP11, SP12, SP13, and SP14 arranged in the first sub-pixel row SPR1, the number n(MR) of mirror portions of the sub-pixels SP11 and SP13 arranged in the odd sub-pixel columns SPC1 and SPC3 and the number n(MR) of mirror portions of the sub-pixels SP12 and SP14 arranged in the even sub-pixel columns SPC2 and SPC4 may be different from each other.

[0277] For example, among the four sub-pixels SP11, SP12, SP13, and SP14 arranged in the first sub-pixel row SPR1, the number n(MR) of mirror portions of the sub-pixels SP11 and SP13 arranged in the odd sub-pixel columns SPC1 and SPC3 may be 4, while the number n(MR) of mirror portions of the sub-pixels SP12 and SP14 arranged in the even sub-pixel columns SPC2 and SPC4 may be 2.

[0278] Reference Figure 13, among the four sub-pixels SP21, SP22, SP23, and SP24 arranged in the second sub-pixel row SPR2, the number n(MR) of mirror parts of the sub-pixels SP21 and SP23 arranged in the odd sub-pixel columns SPC1 and SPC3 and the number n(MR) of mirror parts of the sub-pixels SP22 and SP24 arranged in the even sub-pixel columns SPC2 and SPC4 can be different from each other.

[0279] For example, among the four sub-pixels SP21, SP22, SP23, and SP24 arranged in the second sub-pixel row SPR2, the number n(MR) of mirror parts of the sub-pixels SP21 and SP23 arranged in the odd sub-pixel columns SPC1 and SPC3 can be 2, while the number n(MR) of mirror parts of the sub-pixels SP22 and SP24 arranged in the even sub-pixel columns SPC2 and SPC4 can be 4.

[0280] According to the above, the number n(MR) of mirror parts of each of the four sub-pixels SP11, SP12, SP13, and SP14 arranged in the first sub-pixel row SPR1 can be 4, 2, 4, and 2 in sequence. The number n(MR) of mirror parts of each of the four sub-pixels SP21, SP22, SP23, and SP24 arranged in the second sub-pixel row SPR2 can be 2, 4, 2, and 4 in sequence.

[0281] Figure 14 Shows the light extraction efficiency of each sub-pixel of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0282] Refer to Figure 14 , among the four sub-pixels SP11, SP12, SP13, and SP14 arranged in the first sub-pixel row SPR1, the sub-pixels SP11 and SP13 arranged in the odd sub-pixel columns SPC1 and SPC3 and the sub-pixels SP12 and SP14 arranged in the even sub-pixel columns SPC2 and SPC4 may have different light extraction efficiencies due to the difference in the number n(MR) of mirror parts.

[0283] Among the four sub-pixels SP21, SP22, SP23, and SP24 arranged in the second sub-pixel row SPR2, the sub-pixels SP21 and SP23 arranged in the odd sub-pixel columns SPC1 and SPC3 and the sub-pixels SP22 and SP24 arranged in the even sub-pixel columns SPC2 and SPC4 may have different light extraction efficiencies due to the difference in the number n(MR) of mirror parts.

[0284] Refer to Figure 14 , the light extraction efficiencies of the sub-pixels SP12, SP14, SP21, and SP23 with the number n(MR) of mirror parts being 2 can have a first efficiency value (for example, 5%, 10%, 15%, etc.).

[0285] The light extraction efficiencies of sub-pixels SP11, SP13, SP22, and SP24, for which the number n(MR) of mirror portions is 4, can have a second efficiency value (e.g., 15%, 20%, 25%, etc.) that is higher than the first efficiency value (e.g., 5%, 10%, 15%, etc.).

[0286] According to the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the light extraction efficiency can indicate the degree of increase in the amount of light emitted to the outside of the display panel 110 in the case of the mirror portion MR having the corresponding number n(MR) of mirror portions compared to the amount of light emitted to the outside of the display panel 110 in the case where there is no mirror portion MR.

[0287] Refer to Figure 14 , the light extraction efficiency of each of the four sub-pixels SP11 to SP14 arranged in the first sub-pixel row SPR1 can be 20%, 10%, 20%, and 10%. The light extraction efficiency of each of the four sub-pixels SP21 to SP24 arranged in the second sub-pixel row SPR2 can be 10%, 20%, 10%, and 20%.

[0288] As described above, according to the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, a mirror portion MR is formed around the sub-pixel, thereby increasing the light extraction efficiency of the corresponding sub-pixel.

[0289] According to the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, in the case of a specific sub-pixel (e.g., SP12), the mirror portion MR can be formed only in a part of the surrounding area. For example, in the case of the second sub-pixel SP12, the mirror portion MR can be formed only on two of the four sides surrounding the second sub-pixel, and the mirror portion MR is not formed on the remaining two sides. Therefore, the space for forming the light extraction structure can be reduced, which helps to implement the high resolution display panel 110.

[0290] Depending on the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the number of mirror portions MR present around each sub-pixel can be different. Therefore, there may be a difference in light extraction efficiency between sub-pixels having different numbers of mirror portions.

[0291] According to the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the number (e.g., 2) of mirror portions MR of a specific sub-pixel (e.g., SP12) can be less than the number (e.g., 4) of mirror portions MR of another sub-pixel (e.g., SP11).

[0292] As the number of mirror portions MR around the light emitting device of the sub-pixel increases, the light extraction efficiency of the sub-pixel can increase.

[0293] For example, in the case of the second sub-pixel SP12 and the fourth sub-pixel SP14, the number of mirror portions around the corresponding light-emitting devices ED12 and ED14 is 2. In the case of the first sub-pixel SP11, the third sub-pixel SP13, and the fifth sub-pixel SP22, the number of mirror portions around the corresponding light-emitting devices ED11, ED13, and ED22 is 4. For example, the light extraction efficiency of the second sub-pixel SP12 and the fourth sub-pixel SP14 may be approximately the first efficiency value (e.g., 10 (%)). The light extraction efficiency of the fifth sub-pixel SP22 may be a second efficiency value (e.g., 20 (%)) higher than the first efficiency value (e.g., 10 (%)).

[0294] Figure 15 Shows the light-emitting state of each sub-pixel of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0295] Refer to Figure 14 and Figure 15 When eight sub-pixels SP11 to SP14 and SP21 to SP24 are arranged in the first sub-pixel row SPR1 and the second sub-pixel row SPR2, due to the presence of the mirror portion MR, it may have a light extraction efficiency higher than the efficiency value (e.g., 0 (%)) that is the light extraction efficiency in the case where there is no mirror portion MR. Therefore, the brightness may increase compared to the case where there is no mirror portion MR.

[0296] Refer to Figure 14 and Figure 15 Among the eight sub-pixels SP11 to SP14 and SP21 to SP24 arranged in the first sub-pixel row SPR1 and the second sub-pixel row SPR2, the number n(MR) of mirror portions and the light extraction efficiency of some sub-pixels may be different from those of other sub-pixels.

[0297] Refer to Figure 14 and Figure 15 Even when the same data voltage VDATA is applied to the eight sub-pixels SP11 to SP14 and SP21 to SP24 arranged in the first sub-pixel row SPR1 and the second sub-pixel row SPR2, the more the number n(MR) of mirror portions in the sub-pixel, the higher the light extraction efficiency, and the brighter the brightness of the sub-pixel.

[0298] Refer to Figure 14 and Figure 15, even when the same data voltage VDATA is applied to the eight sub-pixels SP11 to SP14 and SP21 to SP24 arranged in the first sub-pixel row SPR1 and the second sub-pixel row SPR2, the emission brightness of the sub-pixels SP12, SP14, SP21, and SP23 with a light extraction efficiency of the first efficiency value (e.g., 10%) and the emission brightness of the sub-pixels SP11, SP13, S22, and SP24 with a light extraction efficiency of a second efficiency value (e.g., 20%) higher than the first efficiency value (e.g., 10%) may be different from each other due to differences in the light extraction structure (e.g., the number of mirror portions, light extraction efficiency).

[0299] Referring to Figure 14 and Figure 15 , even when the same data voltage VDATA is applied to the eight sub-pixels SP11 to SP14 and SP21 to SP24 arranged in the first sub-pixel row SPR1 and the second sub-pixel row SPR2, the brightness of the sub-pixels SP11, SP13, SP22, and SP24 with a light extraction efficiency of the second efficiency value (e.g., 20%) may be brighter, and the emission brightness of the sub-pixels SP12, SP14, SP21, and SP23 with a light extraction efficiency of the first efficiency value (e.g., 10%) may be darker.

[0300] According to the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the number n(MR) of mirror portions of each sub-pixel may be different. Therefore, even when the same data voltage VDATA is provided to the plurality of sub-pixels SP11 to SP14 and SP21 to SP24, the emission brightness of some of the plurality of sub-pixels SP11 to SP14 and SP21 to SP24 may be different from that of the remaining sub-pixels. The deviation in brightness may cause spots to appear on the display screen.

[0301] The light extraction structure for high resolution according to an exemplary embodiment of the present disclosure can effectively increase the light extraction efficiency while reducing the area in the display panel 110 where the light extraction structure is formed. However, in the case of the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, a deviation in emission brightness may occur between sub-pixels.

[0302] Therefore, the display device 100 according to an exemplary embodiment of the present disclosure can provide a compensation function that can reduce or eliminate the difference in emission brightness between sub-pixels caused by the light extraction structure for high resolution.

[0303] Hereinafter, referring to Figure 16 and Figure 17 a compensation function that can reduce or eliminate the difference in emission brightness between sub-pixels caused by the light extraction structure for high resolution will be described.

[0304] Figure 16 A data compensation circuit 1600 that considers the light extraction structure of the display device 100 according to an exemplary embodiment of the present disclosure is shown.

[0305] Referring to Figure 16 , the data compensation circuit 1600 that considers the light extraction structure of the display device 100 according to an exemplary embodiment of the present disclosure may include: a lookup table 1610 that includes correction control information for each sub-pixel considering the light extraction structure; a data input unit 1620 that receives data for each sub-pixel; and a data correction unit 1630 that generates corrected data for each sub-pixel by correcting the data for each sub-pixel based on the correction control information for each sub-pixel.

[0306] The correction control information for each sub-pixel considering the light extraction structure may vary according to the number of inclined surfaces of the common electrode CE around the light-emitting device of the corresponding sub-pixel.

[0307] For example, the correction control information for each sub-pixel may include at least one of the number of mirror portions for each sub-pixel, the light extraction efficiency for each sub-pixel, and the data compensation value for each sub-pixel. The number of mirror portions for each sub-pixel may correspond to or be proportional to the number of inclined surfaces of the common electrode around the light-emitting device of the corresponding sub-pixel. The light extraction efficiency for each sub-pixel may be proportional to the number of mirror portions for each sub-pixel. The data compensation value for each sub-pixel may be inversely proportional to the number of mirror portions for each sub-pixel or the light extraction efficiency for each sub-pixel, but is not limited thereto.

[0308] The number of mirror portions for each sub-pixel and the light extraction efficiency for each sub-pixel may correspond to or be similar to each other. For example, the number of mirror portions for each sub-pixel and the light extraction efficiency for each sub-pixel may be proportional to each other. The fewer the number of mirror portions for each sub-pixel, the lower the light extraction efficiency for each sub-pixel, and the more the number of mirror portions for each sub-pixel, the higher the light extraction efficiency for each sub-pixel.

[0309] The data compensation value for each sub-pixel may be a value corresponding to the number of mirror portions for each sub-pixel or the light extraction efficiency value for each sub-pixel. For example, as the number of mirror portions decreases, the data compensation value of the corresponding sub-pixel may increase. The larger the number of mirror portions, the smaller the data compensation value of the corresponding sub-pixel. As another example, the lower the light extraction efficiency value, the larger the data compensation value of the corresponding sub-pixel. The higher the light extraction efficiency value, the smaller the data compensation value of the corresponding sub-pixel.

[0310] As an example, the data compensation circuit 1600 may be included in the controller 140. As another example, the data compensation circuit 1600 may be included in the data driving circuit 120. As another example, the data compensation circuit 1600 may be provided outside the controller 140 and the data driving circuit 120.

[0311] In the case of using the above data compensation circuit 1600, even if there are differences in light extraction efficiency between sub-pixels due to the light extraction structure for high resolution according to an exemplary embodiment of the present disclosure, the light emission states of sub-pixels having different light extraction efficiencies can all become the same or substantially the same. Accordingly, image blotches caused by luminance deviation can be reduced or prevented.

[0312] Hereinafter, the data compensation of the data compensation circuit 1600 will be described in more detail.

[0313] Figure 17 Shows data compensation values for each sub-pixel in consideration of the light extraction structure of the display panel 110 according to an exemplary embodiment of the present disclosure. Figure 18 Shows the light emission states of each sub-pixel after data compensation in consideration of the light extraction structure of the display panel 110 according to an exemplary embodiment of the present disclosure.

[0314] The data compensation value for each sub-pixel may be a value considering the light extraction structure. That is, the data compensation value for each sub-pixel may be a value corresponding to the light extraction efficiency value for each sub-pixel.

[0315] The lower the light extraction efficiency value, the greater the data compensation value for the corresponding sub-pixel may be. The higher the light extraction efficiency value, the smaller the data compensation value for the corresponding sub-pixel may be.

[0316] A low light extraction efficiency value indicates a small amount of light emitted to the outside of the display panel 110, resulting in low luminance. Accordingly, for a sub-pixel having a low light extraction efficiency value, a data compensation process may be required to provide data that can further increase the light emission luminance.

[0317] A high light extraction efficiency value indicates a large amount of light emitted to the outside of the display panel 110, resulting in high luminance. Accordingly, for a sub-pixel having a high light extraction efficiency value, a data compensation process may be required to provide data that does not increase the light luminance, only slightly increases the luminance, increases the light luminance to a lower degree compared to a sub-pixel having a low light extraction efficiency value, or even reduces the luminance.

[0318] As an example, the data compensation value for each sub-pixel may be a value that changes (e.g., increases, adds to, or multiplies to, etc.) the original data value.

[0319] As the data compensation value increases, the brightness of the corresponding sub-pixel can become brighter compared to before the data compensation process.

[0320] As the data compensation value decreases, the brightness of the corresponding sub-pixel can become slightly brighter than before the data compensation process.

[0321] If the data compensation value is zero, the data supplied to the corresponding sub-pixel is not compensated, so the brightness of the sub-pixel remains unchanged. If the data compensation value is negative, the brightness of the corresponding sub-pixel can become darker compared to before the data compensation process, but is not limited thereto.

[0322] For example, when the light extraction efficiency value is the second efficiency value (e.g., 20%), the data compensation values for the corresponding sub-pixels SP11, SP13, SP22, and SP24 can be the first compensation value COMP1. If the light extraction efficiency value is the first efficiency value (e.g., 10%), the data compensation values for the corresponding sub-pixels SP12, SP14, SP21, and SP23 can be the second compensation value COMP2. Although the description and illustration show that there are two data compensation values including the first compensation value COMP1 and the second compensation value COMP2, the embodiments are not limited thereto. As an example, the number of data compensation values can depend on the number of mirror portions MR of each sub-pixel, and other factors (e.g., the position of the corresponding sub-pixel, the color of the corresponding sub-pixel, the data supplied to the corresponding sub-pixel, and / or the data of surrounding sub-pixels, etc.), but is not limited thereto.

[0323] For example, the second compensation value COMP2 can be greater than the first compensation value COMP1. As an example, the first compensation value COMP1 can be zero or even negative, but is not limited thereto.

[0324] Since the number of mirror portions is determined for each sub-pixel, the light extraction efficiency value for each sub-pixel and the data compensation value for each sub-pixel can be determined in advance. Therefore, at least one of the number of mirror portions for each sub-pixel, the light extraction efficiency value for each sub-pixel, and the data compensation value for each sub-pixel can be stored in the look-up table 1610 in advance.

[0325] The data correction unit 1630 of the data compensation circuit 1600 considering the light extraction structure can correct the original data for each sub-pixel and generate corrected data for each sub-pixel by using at least one of the number of mirror portions for each sub-pixel, the light extraction efficiency value for each sub-pixel, and the data compensation value for each sub-pixel for the sub-pixel.

[0326] The data driving circuit 120 can convert the corrected data for each sub-pixel into a data voltage as an analog voltage and supply it to the corresponding sub-pixel.

[0327] The data driving circuit 120 of the display device 100 according to an exemplary embodiment of the present disclosure may supply a first data voltage for emitting light of a first luminance to sub-pixels SP12, SP14, SP21, and SP23 in which the number n(MR) of mirror portions is 2 and the light extraction efficiency is a first efficiency value (e.g., 10%), and may supply a second data voltage for emitting light of a second luminance to sub-pixels SP11, SP13, SP22, and SP24 in which the number n(MR) of mirror portions is 4 and the light extraction efficiency is a second efficiency value (e.g., 20%).

[0328] If the first luminance and the second luminance are the same, the first data voltage may be a voltage value for corrected data obtained by adding data corresponding to the luminance and a second compensation value COMP2, and the second data voltage may be a voltage value for corrected data obtained by adding data corresponding to the corresponding luminance and a first compensation value COMP1.

[0329] Since the second compensation value COMP2 is higher than the first compensation value COMP1, the first data voltage may be higher than the second data voltage.

[0330] Referring to Figure 18 , after data compensation considering the light extraction structure according to an exemplary embodiment of the present disclosure, the light emission states of sub-pixels having different light extraction efficiencies according to differences in the light extraction structure may all become the same or substantially the same. As an example, after data compensation considering the light extraction structure according to an exemplary embodiment of the present disclosure, the difference between the light emission states of sub-pixels having different light extraction efficiencies according to differences in the light extraction structure may be smaller than before data compensation. Accordingly, image blotches caused by luminance deviation may be reduced or prevented.

[0331] The display device 100 according to the above exemplary embodiment of the present disclosure will be briefly described again in terms of the disposition of the inclined surface of the common electrode CE.

[0332] The display device 100 according to an exemplary embodiment of the present disclosure may include: a substrate 111; a first pixel electrode PE11, a second pixel electrode PE12, and a third pixel electrode PE13; an intermediate layer EL disposed on the first pixel electrode PE11, the second pixel electrode PE12, and the third pixel electrode PE13; and a common electrode CE disposed on the intermediate layer EL.

[0333] The first pixel electrode PE11 and the third pixel electrode PE13 may be positioned higher from the substrate 111 than the second pixel electrode PE12.

[0334] The common electrode CE may include: an inclined surface SLP1d that extends from the top of the first pixel electrode PE11, passes through one side of the first pixel electrode PE11, and extends to the top of the second pixel electrode PE12; and an inclined surface SLP3c that extends from the top of the third pixel electrode PE13, passes through the other side of the third pixel electrode PE13, and extends to the top of the second pixel electrode PE12.

[0335] The display device 100 according to an exemplary embodiment of the present disclosure may further include: insulating layers 920A and 920B that are not disposed under the second pixel electrode PE12 but are disposed under the first pixel electrode PE11 and the third pixel electrode PE13.

[0336] From the perspective of data compensation for reducing or eliminating the luminance deviation caused by the deviation of the light extraction efficiency for each sub-pixel of the display device 100 according to the above exemplary embodiment of the present disclosure, it will be briefly described again as follows.

[0337] The display device 100 according to an exemplary embodiment of the present disclosure may include: a substrate 111; a first sub-pixel SP11 that includes a first light-emitting device ED11; a second sub-pixel SP12 that is adjacent to the first sub-pixel SP11 in a first direction and includes a second light-emitting device ED12; a first data line DL that provides a first data voltage to the first sub-pixel SP11; and a second data line DL that provides a second data voltage to the second sub-pixel SP12.

[0338] The first light-emitting device ED11 may be located at a first height L1 from the substrate 111. The second light-emitting device ED12 may be located at a second height L2 lower than the first height L1 from the substrate 111.

[0339] When the light-emitting luminance of the first sub-pixel SP11, the light-emitting luminance of the second sub-pixel SP12, and the light-emitting luminance of the third sub-pixel SP13 are the same, the second data voltage may be higher than the first data voltage. As an example, the data compensation value for the second data voltage may be greater than the data compensation value for the first data voltage, but is not limited thereto.

[0340] The display device 100 according to an exemplary embodiment of the present disclosure may include: a first protective layer 610 disposed on a substrate 111; a lower insulating layer 910 disposed on the first protective layer 610; a first upper insulating layer 920A disposed on the lower insulating layer 910; a first pixel electrode PE11 disposed on the first upper insulating layer 920A; a second pixel electrode PE12 disposed on the lower insulating layer 910 and provided on one side of the first upper insulating layer 920A; an intermediate layer EL disposed on the first pixel electrode PE11 and the second pixel electrode PE12; and a common electrode CE disposed on the intermediate layer EL.

[0341] The first light-emitting device ED11 may include the first pixel electrode PE11, the intermediate layer EL, and the common electrode CE, and the second light-emitting device ED12 may include the second pixel electrode PE12, the intermediate layer EL, and the common electrode CE.

[0342] The common electrode CE may have four inclined surfaces SLP1a, SLP1b, SLP1c, and SLP1d located on four side surfaces of the first upper insulating layer 920A, and two inclined surfaces SLP2a and SLP2b located on two side surfaces of the four side surfaces of the lower insulating layer 910.

[0343] The display device 100 according to the above exemplary embodiment of the present disclosure will be briefly described again as follows in terms of the configuration of the inclined surfaces (i.e., mirror portion configuration) of the common electrode CE.

[0344] The display device 100 according to an exemplary embodiment of the present disclosure may include: a substrate 111; a first pixel electrode PE11, a second pixel electrode PE12, and a third pixel electrode PE13; an intermediate layer EL disposed on the first pixel electrode PE11, the second pixel electrode PE12, and the third pixel electrode PE13; and a common electrode CE disposed on the intermediate layer EL.

[0345] The first pixel electrode PE11 and the third pixel electrode PE13 may be positioned higher from the substrate 111 than the second pixel electrode PE12.

[0346] The common electrode CE may include: an inclined surface SLP1d that extends from the top of the first pixel electrode PE11, passes through one side of the first pixel electrode PE11, and extends to the top of the second pixel electrode PE12; and an inclined surface SLP3c that extends from the top of the third pixel electrode PE13, passes through the other side of the third pixel electrode PE13, and extends to the top of the second pixel electrode PE12.

[0347] The display device 100 according to an exemplary embodiment of the present disclosure may further include insulating layers 920A and 920B, which are not provided under the second pixel electrode PE12 but under the first pixel electrode PE11 and the third pixel electrode PE13.

[0348] From the perspective of data compensation for reducing or eliminating brightness deviation caused by deviation in light extraction efficiency for each sub-pixel in the display device 100 according to the above exemplary embodiment of the present disclosure, it will be briefly described again as follows.

[0349] The display device 100 according to an exemplary embodiment of the present disclosure may include: a substrate 111; a first sub-pixel SP11 including a first light-emitting device ED11; a second sub-pixel SP12 adjacent to the first sub-pixel SP11 in a first direction and including a second light-emitting device ED12; a first data line DL for providing a first data voltage to the first sub-pixel SP11; and a second data line DL for providing a second data voltage to the second sub-pixel SP12.

[0350] The first light-emitting device ED11 may be located at a first height L1 from the substrate 111. The second light-emitting device ED12 may be located at a second height L2 lower than the first height L1 from the substrate 111.

[0351] If the emission brightness of the first sub-pixel SP11, the emission brightness of the second sub-pixel SP12, and the emission brightness of the third sub-pixel SP13 are the same, the second data voltage may be higher than the first data voltage.

[0352] The display device 100 according to an exemplary embodiment of the present disclosure may include: a first protective layer 610 located on the substrate 111; a lower insulating layer 910 located on the first protective layer 610; a first upper insulating layer 920A located on the lower insulating layer 910; a first pixel electrode PE11 located on the first upper insulating layer 920A; a second pixel electrode PE12 located on the lower insulating layer 910 and provided on one side of the first upper insulating layer 920A; an intermediate layer EL located on the first pixel electrode PE11 and the second pixel electrode PE12; and a common electrode CE located on the intermediate layer EL.

[0353] The first light-emitting device ED11 may include the first pixel electrode PE11, the intermediate layer EL, and the common electrode CE, and the second light-emitting device ED12 may include the second pixel electrode PE12, the intermediate layer EL, and the common electrode CE.

[0354] The common electrode CE may include four inclined surfaces SLP1a, SLP1b, SLP1c, and SLP1d located on four side surfaces of the first upper insulating layer 920A, and two inclined surfaces SLP2a and SLP2b located on two of the four side surfaces of the lower insulating layer 910.

[0355] The exemplary embodiments of the present disclosure are briefly described as follows.

[0356] A display device according to an exemplary embodiment of the present disclosure may include: a substrate; a first protective layer located on the substrate; a lower insulating layer located on the first protective layer; a first upper insulating layer located on the lower insulating layer; a second upper insulating layer located on the lower insulating layer and spaced apart from the first upper insulating layer in a first direction; a first pixel electrode located on the first upper insulating layer; a second pixel electrode located on the lower insulating layer and disposed between one side of the first upper insulating layer and the other side of the second upper insulating layer; and a third pixel electrode located on the second upper insulating layer.

[0357] The display device according to an exemplary embodiment of the present disclosure may further include: a fourth pixel electrode located on the lower insulating layer and disposed on one side of the second upper insulating layer; a third upper insulating layer located on the lower insulating layer and disposed on one side of the second pixel electrode in a second direction different from the first direction; and a fifth pixel electrode located on the third upper insulating layer. The first pixel electrode, the second pixel electrode, the third pixel electrode, the fourth pixel electrode, and the fifth pixel electrode may be respectively included in a first sub-pixel, a second sub-pixel, a third sub-pixel, a fourth sub-pixel, and a fifth sub-pixel.

[0358] In the display device according to an exemplary embodiment of the present disclosure, the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel may be arranged in a first sub-pixel row, and the fifth sub-pixel may be arranged in a second sub-pixel row adjacent to the first sub-pixel row in the second direction. The second sub-pixel and the fifth sub-pixel may be arranged in a second sub-pixel column.

[0359] In the display device according to an exemplary embodiment of the present disclosure, the first upper insulating layer and the second upper insulating layer may be provided in the first sub-pixel row, and the third upper insulating layer may be provided in the second sub-pixel row.

[0360] In the display device according to an exemplary embodiment of the present disclosure, the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer may be provided to be spaced apart from each other in an island shape.

[0361] In the display device according to an exemplary embodiment of the present disclosure, each of the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer may have a size corresponding to the light-emitting region of the sub-pixel.

[0362] In the display device according to an exemplary embodiment of the present disclosure, the second pixel electrode and the fourth pixel electrode may be positioned closer to the substrate than the first pixel electrode, the third pixel electrode, and the fifth pixel electrode.

[0363] The display device according to an exemplary embodiment of the present disclosure may further include: an intermediate layer positioned over the first pixel electrode, the second pixel electrode, the third pixel electrode, the fourth pixel electrode, and the fifth pixel electrode; and a common electrode positioned over the intermediate layer and including a reflective electrode material.

[0364] In the display device according to an exemplary embodiment of the present disclosure, the common electrode may include a plurality of inclined surfaces.

[0365] In the display device according to an exemplary embodiment of the present disclosure, the common electrode may have inclined surfaces on each side surface of the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer, and may have inclined surfaces on the side surface of the lower insulating layer.

[0366] In the display device according to an exemplary embodiment of the present disclosure, the common electrode may have inclined surfaces on each of the four side surfaces of each of the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer, and may have inclined surfaces on each of the two side surfaces of the four side surfaces of the lower insulating layer.

[0367] In the display device according to an exemplary embodiment of the present disclosure, the first light-emitting device of the first sub-pixel may be formed by the first pixel electrode, the intermediate layer, and the common electrode, the second light-emitting device of the second sub-pixel may be formed by the second pixel electrode, the intermediate layer, and the common electrode, the third light-emitting device of the third sub-pixel may be formed by the third pixel electrode, the intermediate layer, and the common electrode, the fourth light-emitting device of the fourth sub-pixel may be formed by the fourth pixel electrode, the intermediate layer, and the common electrode, and the fifth light-emitting device of the fifth sub-pixel may be formed by the fifth pixel electrode, the intermediate layer, and the common electrode.

[0368] In the display device according to an exemplary embodiment of the present disclosure, the common electrode may include: four first inclined surfaces positioned on the four side surfaces of the first light-emitting device; two second inclined surfaces positioned on two of the four side surfaces of the second light-emitting device; four third inclined surfaces positioned on the four side surfaces of the third light-emitting device; two fourth inclined surfaces positioned on two of the four side surfaces of the fourth light-emitting device; and four fifth inclined surfaces positioned on the four side surfaces of the fifth light-emitting device.

[0369] In a display device according to an exemplary embodiment of the present disclosure, the first light emitted from the first light-emitting device may be reflected from four first inclined surfaces and propagate toward the substrate, the second light emitted from the second light-emitting device may be reflected from two second inclined surfaces and propagate toward the substrate, the third light emitted from the third light-emitting device may be reflected from four third inclined surfaces and propagate toward the substrate, the fourth light emitted from the fourth light-emitting device may be reflected from two fourth inclined surfaces and propagate toward the substrate, and the fifth light emitted from the fifth light-emitting device may be reflected from four fifth inclined surfaces and propagate toward the substrate.

[0370] In a display device according to an exemplary embodiment of the present disclosure, a first data voltage for emitting light of a first luminance may be provided to a first sub-pixel, a second data voltage for emitting light of a second luminance may be provided to a second sub-pixel, a third data voltage for emitting light of a third luminance may be provided to a third sub-pixel, a fourth data voltage for emitting light of a fourth luminance may be provided to a fourth sub-pixel, and a fifth data voltage for emitting light of a fifth luminance may be provided to a fifth sub-pixel. If the first luminance to the fifth luminance are the same, the second data voltage and the fourth data voltage may be higher than the first data voltage, the third data voltage, and the fifth data voltage.

[0371] A display device according to an exemplary embodiment of the present disclosure may further include: a data correction circuit configured to generate correction data for each sub-pixel by correcting the data for each sub-pixel based on correction control information for each sub-pixel, and the correction control information for each sub-pixel varies according to the number of inclined surfaces of the common electrode around the light-emitting device of the corresponding sub-pixel.

[0372] In a display device according to an exemplary embodiment of the present disclosure, the correction control information for each sub-pixel may include at least one of the number of mirror portions for each sub-pixel, the light extraction efficiency for each sub-pixel, and the data compensation value for each sub-pixel.

[0373] In a display device according to an exemplary embodiment of the present disclosure, the number of mirror portions for each sub-pixel may correspond to or be proportional to the number of inclined surfaces of the common electrode around the light-emitting device of the corresponding sub-pixel, the light extraction efficiency for each sub-pixel may be in a ratio with the number of mirror portions for each sub-pixel, and the data compensation value for each sub-pixel may be inversely proportional to the number of mirror portions for each sub-pixel or the light extraction efficiency for each sub-pixel.

[0374] In a display device according to an exemplary embodiment of the present disclosure, the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer may be insulating layers different from the lower insulating layer.

[0375] In a display device according to an exemplary embodiment of the present disclosure, the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer may be integrally formed with the lower insulating layer.

[0376] A display device according to an exemplary embodiment of the present disclosure may include: a substrate; a first pixel electrode, a second pixel electrode, and a third pixel electrode, which are located on the substrate; an intermediate layer, which is located on the first pixel electrode, the second pixel electrode, and the third pixel electrode; and a common electrode, which is located on the intermediate layer. The first pixel electrode and the third pixel electrode may be positioned higher from the substrate than the second pixel electrode.

[0377] In a display device according to an exemplary embodiment of the present disclosure, the common electrode may include an inclined surface that extends from above the first pixel electrode, passes through one side of the first pixel electrode, and extends to above the second pixel electrode, and an inclined surface that extends from above the third pixel electrode, passes through the other side of the third pixel electrode, and extends to above the second pixel electrode.

[0378] A display device according to an exemplary embodiment of the present disclosure may further include an insulating layer, which is provided in an island shape below each of the first pixel electrode and the third pixel electrode instead of below the second pixel electrode.

[0379] A display device according to an exemplary embodiment of the present disclosure may include: a substrate; a first sub-pixel, which includes a first light-emitting device; a second sub-pixel, which is adjacent to the first sub-pixel in a first direction and includes a second light-emitting device; a first data line, which provides a first data voltage to the first sub-pixel; and a second data line, which provides a second data voltage to the second sub-pixel.

[0380] In a display device according to an exemplary embodiment of the present disclosure, the first light-emitting device may be located at a first height from the substrate, and the second light-emitting device may be located at a second height lower than the first height from the substrate.

[0381] In a display device according to an exemplary embodiment of the present disclosure, if the emission brightness of the first sub-pixel, the emission brightness of the second sub-pixel, and the emission brightness of the third sub-pixel are the same, the second data voltage may be higher than the first data voltage.

[0382] A display device according to an exemplary embodiment of the present disclosure may further include: a first protective layer, which is located on the substrate; a lower insulating layer, which is located on the first protective layer; a first upper insulating layer, which is located on the lower insulating layer; a first pixel electrode, which is located on the first upper insulating layer; a second pixel electrode, which is located on the lower insulating layer and provided on one side of the first upper insulating layer; an intermediate layer, which is located on the first pixel electrode and the second pixel electrode; and a common electrode, which is located on the intermediate layer.

[0383] In a display device according to an exemplary embodiment of the present disclosure, the first light-emitting device may include a first pixel electrode, an intermediate layer, and a common electrode, and the second light-emitting device may include a second pixel electrode, an intermediate layer, and a common electrode.

[0384] In a display device according to an exemplary embodiment of the present disclosure, the common electrode may include four inclined surfaces located on four side surfaces of the first upper insulating layer; and two inclined surfaces located on two of the four side surfaces of the lower insulating layer.

[0385] According to the above exemplary embodiment of the present disclosure, a display device can be provided that has a light extraction structure that allows a greater amount of light in the light generated by the light-emitting devices in the display panel to be emitted toward the viewing surface.

[0386] According to an exemplary embodiment of the present disclosure, a display device can be provided that has a light extraction structure suitable for a high-resolution display panel.

[0387] According to an exemplary embodiment of the present disclosure, a display device can be provided that has a compensation function capable of reducing the luminance deviation for each sub-pixel according to a light extraction structure suitable for a high-resolution display panel.

[0388] According to an exemplary embodiment of the present disclosure, the light extraction efficiency for the light generated by the light-emitting devices in the display panel can be increased. Accordingly, the power consumption of the display device can be reduced by improving the light extraction efficiency.

[0389] The above description and the drawings are provided only for illustrative purposes to exemplify the technical concept of the present disclosure. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art without departing from the spirit and scope of the present disclosure. In addition, the disclosed embodiments are intended to illustrate the scope of the technical concept of the present disclosure. Therefore, the scope of the present disclosure is not limited to the illustrated embodiments.

[0390] Cross-reference to related applications

[0391] This application claims the priority and benefit of Korean Patent Application No. 10-2024-0016855, filed on February 2, 2024, the entire contents of which are incorporated herein by reference for all purposes as if fully set forth herein.

Claims

1. A display device, comprising: substrate; a lower insulating layer, the lower insulating layer being located on the substrate; a first upper insulating layer, the first upper insulating layer being located on the lower insulating layer; a first pixel electrode, wherein the first pixel electrode is located on the first upper insulating layer; as well as A second pixel electrode is located on the lower insulating layer and is disposed on one side of the first upper insulating layer in the first direction.

2. The display device according to claim 1, further comprising: a second upper insulating layer on the lower insulating layer and spaced apart from the first upper insulating layer in the first direction, with the second pixel electrode interposed between the second upper insulating layer and the first upper insulating layer; as well as A third pixel electrode is located on the second upper insulating layer.

3. The display device according to claim 2, further comprising: a fourth pixel electrode, the fourth pixel electrode being located on the lower insulating layer and disposed on one side of the second upper insulating layer in the first direction; a third upper insulating layer, the third upper insulating layer being located on the lower insulating layer and disposed on one side of the second pixel electrode in a second direction different from the first direction; as well as a fifth pixel electrode, the fifth pixel electrode being located on the third upper insulating layer, The first pixel electrode, the second pixel electrode, the third pixel electrode, the fourth pixel electrode and the fifth pixel electrode are respectively included in the first sub-pixel, the second sub-pixel, the third sub-pixel, the fourth sub-pixel and the fifth sub-pixel.

4. The display device according to claim 3, wherein The first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel are arranged in a first sub-pixel row, and the fifth sub-pixel is arranged in a second sub-pixel row adjacent to the first sub-pixel row along the second direction, The second sub-pixel and the fifth sub-pixel are arranged in a second sub-pixel column. Wherein, the first upper insulating layer and the second upper insulating layer are arranged in the first sub-pixel row, Wherein, the third upper insulating layer is provided in the second sub-pixel row, and The first upper insulating layer, the second upper insulating layer, and the third upper insulating layer are provided to be spaced apart from each other in an island shape.

5. The display device according to claim 3, wherein Each of the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer has a size corresponding to a light emitting area of a sub-pixel. The display device according to claim 3 , wherein: The second pixel electrode and the fourth pixel electrode are positioned closer to the substrate than the first pixel electrode, the third pixel electrode, and the fifth pixel electrode.

7. The display device according to claim 3, further comprising: an intermediate layer, the intermediate layer being located on the first pixel electrode, the second pixel electrode, the third pixel electrode, the fourth pixel electrode, and the fifth pixel electrode; as well as a common electrode, the common electrode being located on the intermediate layer and comprising a reflective electrode material, Wherein, the common electrode includes a plurality of inclined surfaces.

8. The display device according to claim 7, wherein: The common electrode has an inclined surface on each side of the first, second, and third upper insulating layers, and has an inclined surface on sides of the second and fourth sub-pixels.

9. The display device according to claim 8, wherein The common electrode has an inclined surface on each of the four side surfaces of each of the first upper insulating layer, the second upper insulating layer, and the third upper insulating layer, and has an inclined surface on each of two side surfaces of the four side surfaces of each of the second sub-pixel and the fourth sub-pixel.

10. The display device according to claim 7, wherein: The common electrode has an inclined surface on each of two side surfaces in the second direction among four side surfaces of each of the second sub-pixel and the fourth sub-pixel.

11. The display device according to claim 7, wherein: The first light emitting device of the first sub-pixel includes the first pixel electrode, the intermediate layer and the common electrode, The second light emitting device of the second sub-pixel includes the second pixel electrode, the intermediate layer and the common electrode. The third light emitting device of the third sub-pixel includes the third pixel electrode, the intermediate layer and the common electrode. The fourth light emitting device of the fourth sub-pixel includes the fourth pixel electrode, the intermediate layer and the common electrode. The fifth light emitting device of the fifth sub-pixel includes the fifth pixel electrode, the intermediate layer and the common electrode, and Wherein, the common electrode comprises: four first inclined surfaces, the four first inclined surfaces being located on four side surfaces of the first light emitting device; two second inclined surfaces, the two second inclined surfaces being located on two side surfaces among the four side surfaces of the second light emitting device; four third inclined surfaces, the four third inclined surfaces being located on four side surfaces of the third light emitting device; two fourth inclined surfaces, the two fourth inclined surfaces being located on two side surfaces among the four side surfaces of the fourth light emitting device; and Four fifth inclined surfaces are located on four side surfaces of the fifth light emitting device.

12. The display device according to claim 11, wherein First light emitted from the first light emitting device is reflected from the four first inclined surfaces and propagates toward the substrate, wherein the second light emitted from the second light emitting device is reflected from the two second inclined surfaces and propagates toward the substrate, wherein the third light emitted from the third light emitting device is reflected from the four third inclined surfaces and propagates toward the substrate, wherein the fourth light emitted from the fourth light emitting device is reflected from the two fourth inclined surfaces and propagates toward the substrate, and The fifth light emitted from the fifth light emitting device is reflected from the four fifth inclined surfaces and propagates toward the substrate.

13. The display device according to claim 7, wherein: supplying a first data voltage for emitting light of a first brightness to the first sub-pixel, wherein a second data voltage for emitting light of a second brightness is supplied to the second sub-pixel, wherein a third data voltage for emitting light of a third brightness is supplied to the third sub-pixel, wherein a fourth data voltage for emitting light of a fourth brightness is supplied to the fourth sub-pixel, wherein a fifth data voltage for emitting light of a fifth brightness is supplied to the fifth sub-pixel, and If the first to fifth brightnesses are the same, the second data voltage and the fourth data voltage are higher than the first data voltage, the third data voltage, and the fifth data voltage.

14. The display device according to claim 13 further includes a data correction circuit, which is configured to generate correction data for each sub-pixel by correcting the data for each sub-pixel based on correction control information for each sub-pixel, and the correction control information for each sub-pixel varies according to the number of inclined surfaces of the common electrode around the light-emitting device of the corresponding sub-pixel.

15. The display device according to claim 14, wherein The correction control information for each sub-pixel includes at least one of the number of mirror portions for each sub-pixel, light extraction efficiency for each sub-pixel, and a data compensation value for each sub-pixel, The number of the mirror portions for each sub-pixel corresponds to or is proportional to the number of inclined surfaces of the common electrode around the light emitting device of the corresponding sub-pixel. wherein the light extraction efficiency for each sub-pixel is proportional to the number of mirror portions for each sub-pixel, and The data compensation value for each sub-pixel is inversely proportional to the number of mirror portions for each sub-pixel or the light extraction efficiency for each sub-pixel.

16. The display device according to claim 3, wherein: The first upper insulating layer, the second upper insulating layer, and the third upper insulating layer are insulating layers different from the lower insulating layer, or are formed integrally with the lower insulating layer.

17. The display device according to claim 16, wherein: The first upper insulating layer, the second upper insulating layer, and the third upper insulating layer are integrally formed with the lower insulating layer through a half-tone mask process.

18. The display device according to claim 1, further comprising: an intermediate layer, the intermediate layer being located on the first pixel electrode and the second pixel electrode; as well as a common electrode, the common electrode being located on the intermediate layer and comprising a reflective electrode material, The common electrode includes an inclined surface located on a side wall of the first upper insulating layer facing the second pixel electrode.

19. The display device according to claim 18, wherein The common electrode includes an inclined surface on each of four sidewalls of the first upper insulating layer.

20. The display device according to claim 18, wherein A portion of the common electrode located on top of the second pixel electrode is lower than the first pixel electrode.

21. The display device according to claim 18, further comprising: a second upper insulating layer located on the lower insulating layer and disposed on one side of the second pixel electrode in a second direction different from the first direction; as well as a third pixel electrode, the third pixel electrode being located on the second upper insulating layer; Wherein, the intermediate layer and the common electrode are also located on the third pixel electrode, and The common electrode further includes a first inclined surface located on a side wall of the second upper insulating layer facing the second pixel electrode.

22. The display device according to claim 21, wherein The lower insulating layer includes a hole between the second pixel electrode and the second upper insulating layer, and The intermediate layer and the common electrode are arranged inside the hole along the sidewall of the hole of the lower insulating layer.

23. The display device according to claim 22, wherein: The common electrode further includes an inclined surface on one sidewall of the hole facing the second upper insulating layer.

24. The display device according to claim 23, wherein A portion of the common electrode inside the hole is lower than the second pixel electrode.

25. The display device according to claim 22, wherein: The common electrode further includes a second inclined surface located on one side wall of the hole facing the second pixel electrode. Herein, light emitted from the intermediate layer on the third pixel electrode is reflected from the first inclined surface and the second inclined surface and propagates toward the substrate.

26. The display device according to claim 1, wherein A data compensation value for the second data voltage supplied to the second pixel electrode is greater than a data compensation value for the first data voltage supplied to the first pixel electrode.

27. A display device, comprising: substrate; a first pixel electrode, a second pixel electrode, and a third pixel electrode, wherein the first pixel electrode, the second pixel electrode, and the third pixel electrode are located on the substrate; an intermediate layer, the intermediate layer being located on the first pixel electrode, the second pixel electrode and the third pixel electrode; as well as a common electrode, the common electrode being located on the intermediate layer, wherein the first pixel electrode and the third pixel electrode are positioned higher from the substrate than the second pixel electrode, Wherein, the common electrode comprises: an inclined surface extending from an upper portion of the first pixel electrode, passing through a side of the first pixel electrode, and extending to an upper portion of the second pixel electrode; and An inclined surface extending from an upper portion of the third pixel electrode, passing through the other side of the third pixel electrode, and extending to an upper portion of the second pixel electrode. 28 . The display device according to claim 27 , further comprising an insulating layer that is not provided under the second pixel electrode but is provided under each of the first pixel electrode and the third pixel electrode in an island shape.

29. A display device, comprising: substrate; a first sub-pixel, the first sub-pixel comprising a first light-emitting device; a second sub-pixel, the second sub-pixel being adjacent to the first sub-pixel in the first direction and including a second light emitting device; a first data line, the first data line providing a first data voltage to the first sub-pixel; as well as a second data line, the second data line providing a second data voltage to the second sub-pixel, wherein the first light emitting device is located at a first height from the substrate, wherein the second light emitting device is located at a second height from the substrate that is lower than the first height, and The data compensation value for the second data voltage is greater than the data compensation value for the first data voltage.

30. The display device according to claim 29, wherein If the light emitting luminance of the first sub-pixel and the light emitting luminance of the second sub-pixel are the same, the second data voltage is higher than the first data voltage.

31. The display device according to claim 29, further comprising: a lower insulating layer, the lower insulating layer being located on the substrate; a first upper insulating layer, the first upper insulating layer being located on the lower insulating layer; a first pixel electrode, wherein the first pixel electrode is located on the first upper insulating layer; a second pixel electrode, the second pixel electrode being located on the lower insulating layer and disposed on one side of the first upper insulating layer; an intermediate layer, the intermediate layer being located on the first pixel electrode and the second pixel electrode; as well as a common electrode, the common electrode being located on the intermediate layer, The first light emitting device includes the first pixel electrode, the intermediate layer and the common electrode, and the second light emitting device includes the second pixel electrode, the intermediate layer and the common electrode.

32. The display device according to claim 31, wherein The common electrode includes four inclined surfaces on four side surfaces of the first upper insulating layer and two inclined surfaces on two side surfaces among four side surfaces of the second light emitting device.

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