Information technology system, vehicle and method for introducing updates into target system
By introducing a data transmission acceleration module between the source system and the target system of the vehicle computer system, cache and asynchronously transmit data blocks, the problem of the vehicle computer system being updated for too long is solved, and a faster update process is achieved and security is improved.
Patent Information
- Application Number
- CN202480006787.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-02-20
- Filing Date
- 2024-02-02
- Publication Date
- 2025-08-05
AI Technical Summary
The prior art has a long update time during the vehicle computer system update process, resulting in an increase in user waiting time, especially when security updates are updated, it is necessary to quickly install to prevent attacks. The existing communication methods have not effectively shortened the update time.
The data transmission acceleration module is introduced between the source system and the target system. By arranging data transmission block buffers between the data line and the system interface module, the data block cache and asynchronous transmission are realized, and the delay time is reduced, ensuring that the source system remains active during the operation of the target system.
The transmission time of information from the source system to the target system is significantly shortened, and the waiting time is reduced, especially during the operation of the target system, improving the efficiency and security of the update process.
Smart Images

Figure CN120435841A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to an information technology system of the type defined in more detail in the preamble of claim 1 , a vehicle and a method for introducing updates into a target system of the type defined in more detail in the preamble of claim 8 . Background Art
[0002] With increasing digitalization, the use of computer systems in vehicles is becoming increasingly important. Modern vehicles are equipped with a large number of different control devices, such as those controlling the combustion process in internal combustion engines, those controlling the chassis with active suspension, and those providing driver assistance systems such as adaptive cruise control and high-beam assist. With the increasing degree of automation, the corresponding control devices must process more data in a shorter time. Consequently, the demand for computing power is increasing. Specifically, to provide fully automated or even autonomous driving functions, state-of-the-art graphics processors that can perform large numbers of matrix operations in a short period of time are required to be integrated into vehicles.
[0003] Throughout the lifecycle of a vehicle, the programs executed by the corresponding control units may need to be updated several times. This can involve both the firmware of the control units and the applications running on them. In addition to exchanging individual code sections and introducing completely new ones, parameter sets can also be exchanged. For example, the parameters of a humidity sensor can be changed so that the windshield wipers, which are automatically activated, are only activated during heavy rainfall. Similarly, characteristic curves can be adjusted, such as the speed characteristic curve of the fuel supply pump depending on the oil temperature. By introducing corresponding updates to the aforementioned computer systems in the vehicle, new functions can be implemented and security vulnerabilities can be closed.
[0004] It is desirable to install corresponding updates on the computer system as quickly as possible. During the installation of an update, the computer system may be unavailable, making its functions unusable. Consequently, vehicle users must wait, which reduces their comfort. Furthermore, updates that are particularly critical for safety must be installed quickly to prevent attackers (e.g., hackers) from compromising the computer system. The larger the update, meaning the more data must be imported, the more urgent the need for acceleration.
[0005] Communication with the vehicle's computer systems can be achieved in a variety of ways and methods. Vehicles typically have an onboard diagnostic interface (OID) through which external vehicle computer systems communicate with the vehicle's internal computer systems. This utilizes specialized communication protocols, such as the Unified Diagnostic Services (UDS) protocol described in ISO 14229. External vehicle computer systems (e.g., desktop computers, laptops, or tablets) can be connected to the corresponding internal vehicle computer systems either wiredly, for example, via USB or Ethernet, or wirelessly, for example, via Bluetooth or Wi-Fi. To enhance user convenience, updates can also be introduced to the vehicle via mobile communication. This means that vehicle users no longer need to visit a repair shop or manually download updates via the internet on a desktop computer, transfer them to a USB drive, and then insert the drive into the corresponding port in the vehicle to install the updates. Instead, vehicles equipped with telematics units access the vehicle manufacturer's corresponding servers via mobile communication and download the updates.
[0006] The interaction between a vehicle's internal and external computer systems presents an innovative environment. For example, DE 10 2012 110 559 A1 describes a method for securely downloading firmware using a diagnostic link connector and the OnStar system. To enhance network security, the firmware to be implemented on the vehicle's internal computer system is signed by two different actors, thus achieving dual signing.
[0007] Furthermore, DE 10 2019 216 841 A1 describes a vehicle diagnostic communication device and a system comprising the vehicle diagnostic communication device. The vehicle diagnostic communication device is adapted to estimate the time for a diagnosis to be performed.
[0008] US Pat. No. 7,787,481 B1 discloses a network interface system that connects a central computer to a network for data exchange. The network interface system includes a storage system and a media access control system having at least one local cache configured to read a second data structure from the storage system while simultaneously transmitting the first data structure to the network. This is intended to improve access to the storage system by multiple terminal devices connected to the network.
[0009] US 2014 / 0019571 A1 describes a method for processing data packets from a data packet receiving queue in a device for memory access. Based on the usage of the receiving queue when a program accesses data packets, it is proposed to use another queue that is set up for heuristic prediction caching of data packets. Summary of the Invention
[0010] The object of the present invention is to provide an improved information technology system with the aid of which the process of introducing updates into a computer system can be accelerated.
[0011] According to the invention, this object is achieved by an information technology system having the features of claim 1. Advantageous embodiments and developments, as well as a vehicle comprising a part of the information technology system, and a method for introducing an update into a target system, are derived from the dependent claims.
[0012] An information technology system falling within the aforementioned categories, the information technology system comprising:
[0013] - a source system, which in turn has a source information storage as well as a file reading module and a system interface module; and
[0014] - a target system, which in turn has a target information memory as well as a system interface module, a payload buffer module and a memory access module, wherein
[0015] - the source system and the target system are communicatively coupled to each other via a bidirectional data line,
[0016] The source system is adapted to, after receiving a response message from the target system, read the source information memory by means of the file reading module, package the information read from the source information memory into a data transmission block, and send the data transmission block to the target system via the data line, wherein
[0017] - the source system requires a first delay time to read the source information memory and package the data transfer blocks,
[0018] The target system is adapted to receive the data transmission block, extract the information contained therein and write said information to the payload buffer module, then generate a response message and transfer the information from the payload buffer module to the target information memory by means of the memory access module, wherein
[0019] - the target system requires a second delay time to extract and write the information and generate the reply message,
[0020] According to the present invention, the invention is improved in the following manner:
[0021] - The source system and / or the target system further include a data transmission acceleration module, which in turn has a data transmission block buffer, wherein
[0022] - a data transmission acceleration module in the source system is arranged between the data line and the system interface module and is adapted to receive and send a first data transmission block via the data line, output a response message to the system interface module after receiving the data transmission block, so as to cause the packaging of at least one further data transmission block, cache / temporarily store the further data transmission block in a data transmission block buffer, and send another data transmission block cached in the data transmission block buffer to the target system after receiving the response message from the target system, wherein
[0023] -The data transmission acceleration module in the target system is arranged between the data line and the system interface module, and is adapted to receive a first data transmission block and forward it to the system interface module, output a response message itself after receiving the data transmission block and send it via the data line to cause at least one additional data transmission block to be sent from the source system to the target system, cache at least one additional data transmission block in a data transmission block buffer, and forward another data transmission block to the system interface module after receiving a response message from the system interface module, or send a negative response message via the data line and delete all additional data transmission blocks from the data transmission block buffer after receiving a negative response message from the system interface module.
[0024] The information technology system according to the present invention can reduce the time required to transmit information from a source system to a target system. This assumes that during the target system's operation, i.e., during the second delay time, the source system is idle or in an idling state. However, the source system requires the first delay time to read the source information memory and package the corresponding data transfer blocks therefrom using the file reading module. The information technology system according to the present invention is implemented so that the source system is also active during the target system's operation, i.e., during the second delay time. This shortens the waiting time between the target system sending a response message and receiving another corresponding data transfer block from the source system. The first delay time can be on the order of 100 ms, and the second delay time can be on the order of 600 ms. For each data transfer block to be transmitted, the corresponding waiting time can be reduced, for example, to between 200 and 300 ms. This, combined with the total number of data transfer blocks to be transmitted from the source system to the target system, can significantly reduce the time required to transfer the corresponding data or information to the target system.
[0025] Depending on the implementation of the source system and the target system, the first delay time may also be greater than the second delay time.
[0026] The data transfer acceleration module can be implemented in the source system only, the target system only, or both systems. Since it is located between the data lines and the corresponding system interface modules, the data transfer acceleration module can be easily integrated into the corresponding system. The architecture of the source or target system does not need to be adjusted, as the data transfer acceleration module is located upstream of the source or target system in the corresponding data flow direction.
[0027] An information technology system is typically a cluster of computer systems. Accordingly, the source and target systems form a computer system. The corresponding computer system includes hardware and / or software components. This can be any computing device, such as a desktop computer, laptop, tablet, smartphone, embedded system (e.g., implemented as a system-on-chip), server, edge computing device, and so on.
[0028] The information to be transferred from the source system to the target system can be anything imaginable, including files and their corresponding file formats. It can be program code used to form an executable program (such as firmware or an application), or it can be information to be processed by the corresponding executable program, such as parameters and constants.
[0029] The source information storage and the target information storage are both computer-readable physical storage media. All conceivable embodiments can be adopted here.
[0030] The file reading module, the corresponding system interface module, the payload buffer module, and the memory access module are implemented by hardware and / or software. Particularly preferably, they are purely software modules. The file reading module enables the source system to access the source information memory, at least in read-only mode. The file reading module can also be referred to as a file reader. The system interface module serves as a connection interface and, on the source system side, can also be referred to as a dialog sequencer. In the target system, the system interface module can also be referred to as a diagnostic module. This is particularly true when the target system is a vehicle diagnostic communication module. The payload buffer module is used to buffer information to be written to the target information memory. The target information memory can have a different clock frequency than the rest of the target system. To accommodate this requirement, the memory access module can operate at the target information memory's clock frequency, asynchronously reading information from the payload buffer module. The memory access module can also be referred to as a flash access module.
[0031] The source system and the target system may each include other hardware modules and / or software modules, which will not be discussed in detail here.
[0032] A corresponding data transmission acceleration module can also be formed here solely by hardware, solely by software, or by a combination of hardware and software.
[0033] The bidirectional data link can be a wired or wireless data link. A wired data link can be formed, for example, via an Ethernet cable or a USB cable. The corresponding communication protocol is used. The data link can also be a direct access to a bus system, such as a CAN bus. A wireless data link can be formed, for example, by an NFC link, a Bluetooth link, a Wi-Fi link, etc. Mobile communication links can also be used as wireless data links.
[0034] The response message output by the target system informs the source system that the target system is now ready to receive another data transmission block.
[0035] A data transfer block can also be described as a message. This message or data transfer block includes one or more headers, which contain information about how the corresponding data transfer block should be further processed on the target system. Furthermore, the so-called payload is part of the message (i.e., data transfer block). The payload is the actual information to be written to the target information memory. As the data transfer block traverses the individual modules on the target system, each module gradually removes a portion of the message header until the payload finally reaches the payload buffer module and then enters the memory access module and / or the target information memory.
[0036] The size of the data transfer block buffer can be arbitrarily designed. The size of the data transfer block buffer of the data transfer acceleration module in the source system and the size of the data transfer block buffer of the data transfer acceleration module in the target system can be the same or different. For example, the size of the data transfer block buffer can be designed so that at least ten data transfer blocks can be written thereto.
[0037] The target system can generate a negative response message and send it to the source system, using this negative response message to inform the source system that the target system can no longer accept any data transfer blocks. Accordingly, the data transfer acceleration module implemented in the source system can process this negative response message. In this case, the data transfer block buffer of the data transfer acceleration module in the source system can also be cleared. The file reading module and system interface module in the source system then receive instructions from the data transfer acceleration module to stop generating additional data transfer blocks until a response message is received from the target system.
[0038] An advantageous refinement of the information technology system provides that the data transmission acceleration module in the source system and / or the target system is further configured to continue outputting a response message until the corresponding data transmission block buffer is full. This can further reduce the time required to transmit information from the source system to the target system. In other words, regardless of the operating mode of the target system, the corresponding data transmission acceleration module can continue to operate until the corresponding data transmission block buffer is full.
[0039] According to another advantageous design of the information technology system, the source system and the target system are adapted to use a unified diagnostic service as a communication protocol. This enables the use of the information technology system in the automotive field. The target system can then, for example, be the computer architecture in the vehicle, or a portion of the computer architecture constitutes the target system. In layman's terms, the source system can access the target system or communicate with the target system through vehicle diagnostics. In this case, the source system is the corresponding development computer or the software executed on such a development computer. In this context, the source system is also called a tester. The target system is also called a target in this context. For example, the source system is implemented as a DTS9 development tester.
[0040] Another advantageous embodiment of the information technology system according to the present invention further provides that the source information memory and / or the target information memory comprises flash memory. Flash memory enables particularly fast access and does not include any moving parts that could be difficult to access under vibration (e.g., when the corresponding vehicle is driving over an uneven road surface). Therefore, flash memory is particularly suitable for forming the source information memory and / or the target information memory. The flash memory may be permanently installed in the source system and / or the target system, or it may be a removable memory module, such as an M.2 SSD, SD card, etc.
[0041] According to another advantageous embodiment of the information technology system, the target system is implemented as an embedded system. The target system may include one or more computing units. For example, such a computing unit is a system-on-a-chip (also known as SoC). The target system may be embedded in a vehicle, for example. The target system or the computing unit forming the target system may be formed by a control unit of the vehicle.
[0042] Preferably, the source system is implemented as a server or server cluster, and at least a portion of the data connection is via the Internet. The target system can be connected to the Internet, for example, via mobile communication. This enables the target system to receive information from the server or server cluster. The server can be operated or used by the vehicle manufacturer. This allows information to be distributed from the vehicle manufacturer to vehicles in its fleet. Because the Internet, and in particular the vehicle's mobile connection to the Internet, is used, the vehicle does not need to visit a repair shop to receive this information.
[0043] In the vehicle according to the present invention, the aforementioned target system is part of the vehicle or is implemented in the vehicle. Specifically, the vehicle includes at least one data transmission acceleration module. The vehicle can be any vehicle, such as a car, truck, van, bus, etc. Instead of a road vehicle, it can also be a rail vehicle, water vehicle, or aircraft.
[0044] The invention also describes a method for introducing an update into a target system using the above-described information technology system. According to the invention, the method is configured to adapt parameter data sets, applications and / or firmware in the target system by means of an update or to introduce them newly into the target system.
[0045] The method according to the invention can reduce the time required to introduce the update into the target system. This is achieved by the functionality of the data transmission acceleration module contained in the information technology system used. BRIEF DESCRIPTION OF THE DRAWINGS
[0046] Further advantageous embodiments of the information technology system according to the invention and of the method for introducing an update into a target system also emerge from the exemplary embodiments which are described in more detail below with reference to the drawings.
[0047] in:
[0048] Figure 1 A schematic diagram showing an information technology system known in the prior art is shown;
[0049] Figure 2 A schematic diagram of an information technology system according to the present invention is shown, the information technology system having a data transmission acceleration module implemented on a source system;
[0050] Figure 3 A schematic diagram of an information technology system according to the present invention is shown, the information technology system having a data transmission acceleration module implemented on a target system;
[0051] Figure 4 A schematic diagram of an information technology system according to the present invention is shown, which has a data transmission acceleration module implemented on a source system and a target system; and
[0052] Figure 5 Shown Figure 4 Schematic diagram of an information technology system shown in , in which the data transmission block buffers of two data transmission acceleration modules are full. DETAILED DESCRIPTION
[0053] Figure 1An information technology system 1 known from the prior art is shown. The information technology system includes a source system 2, which is connected to a target system 5 for bidirectional communication via a data line 9. The source system 2 further includes a file reading module 3 and a system interface module 4. The target system 5 also includes a system interface module 6, a payload buffer module 7, and a memory access module 8. The corresponding modules are implemented as hardware and / or software. Both the source system 2 and the target system 5 can also be implemented as hardware and / or software components. In the exemplary embodiment shown in the figure, the corresponding modules are implemented as software modules 14. As shown for the target system 5 by way of example, the source system 2 and the target system 5 can also include additional software modules 14.
[0054] Each of these figures shows a partial diagram of the data transmission process between source system 2 and target system 5. Specifically, information needs to be transferred from a source information storage included in source system 2 to a target information storage in target system 5 via data line 9. Here, file access module 3 has at least read access rights, and memory access module 8 has at least write access rights to the corresponding information storage. Both file access module 3 and memory access module 8 may also have both read and write access rights.
[0055] Once the target system 5 is ready to receive the information, it sends a response message 10 to the system interface module 4 of the source system 2 via the system interface module 6. The data transmission is not instantaneous, but has a certain delay time, so Figure 1 The corresponding arrow 101 representing the response message 10 in the figure points not only to the left but also downward. The source system 2 requires a first delay time t1 to process the corresponding query or request from the target system 5. The system interface module 4 then notifies the file reader module 3, which accesses the source information storage. The information read from the source information storage is then packaged into data transmission blocks. The corresponding processing times of the file reader module 3 and the system interface module 4 are represented by vertical lines. The file transmission between the file reader module 3 and the system interface module 4 also involves a certain delay, so the arrows here are also tilted vertically.
[0056] The source system 2 sends the corresponding data transmission blocks to the target system 5 by means of an information message 15 .
[0057] The target system 5 requires a second delay time t2 to process the information message 15, i.e., the data transfer block. The second delay time t2 is measured between the receipt of the information message 15 by the system interface module 6 and the output of the response message 10 by the system interface module 6. The information message 15 comprises a header and a payload, wherein the header contains information describing how the information message 15 should be processed on the target system 5. The payload is the information read from the source information memory. The data transfer block or information message 15 traverses the individual software modules 14 of the target system 5 in sequence, wherein each software module 14 processes or removes a portion of the header. The remaining payload is then written to the payload buffer module 7. After successful writing, the target system 5 outputs the response message 10. The memory access module 8 asynchronously accesses the payload buffer module 7 to write the corresponding information to the target information memory. Then, the aforementioned cycle begins again.
[0058] The target system 5 also has a first time difference Δt between the output of the response message 10 and the receipt of the next data transmission block by means of the information message 15 .
[0059] Figure 2 The information technology system 1 according to the invention is shown, in which a data transmission acceleration module 11 is integrated into the source system 2. Here, the system interface module 6 also transmits a response message 10 to the source system 2, which is forwarded from the data transmission acceleration module 11 to the system interface module 4.
[0060] Correspondingly, the source system 2 packages the data transmission block and passes it to the data transmission acceleration module 11 , as indicated by arrow 201 .
[0061] The data transmission acceleration module 11 transmits the corresponding data transmission block to the system interface module 6 of the target system 5 in the form of an information message 15. However, the data transmission acceleration module 11 prevents the source system 2 from waiting idle until it receives a response message 10 from the target system 5. Specifically, the data transmission acceleration module 11 outputs a response message 12, after which the system interface module 4 and the file reading module 3 become active again and generate a new data transmission block. This additional data transmission block is then written to the data transmission block buffer included in the data transmission acceleration module 11 for caching. This process continues until the data transmission block buffer is full, or until there is no longer any need to read information from the source information storage.
[0062] The process on target system 5 is similar to Figure 1However, once the target system 5 transmits the response message 10 to the source system 2 again, the benefit of implementing the data transmission acceleration module 11 in the source system 2 becomes apparent. That is, after the source system 2 receives the response message 10, the source system 2 transmits the information message 15 back to the target system 5 without waiting for the first delay time t1. That is, the data transmission acceleration module 11 reads the additional data transmission block from the data transmission block buffer and transmits it immediately or as follows: Figure 2 After a relatively short time, as indicated by the relatively short vertical line 202 , the information is forwarded to the system interface module 6 of the target system 5 by means of an information message 15 (indicated by an arrow 203 ).
[0063] Figure 1 and Figure 2 The comparison shows that in this case, the first time difference Δt is greater than Figure 1 The illustrated information technology system 1 known from the prior art is shorter. This time saving is cumulative over all data transmission blocks to be exchanged between source system 2 and target system 5 via data line 9, significantly shortening the time required for information transmission. This allows, for example, parameter data sets, firmware, or applications to be updated or newly introduced into target system 5 more quickly.
[0064] Figure 3 Another possible embodiment of the information technology system 1 according to the present invention is shown. Here, the data transmission acceleration module 11 is implemented in the target system 5. The system interface module 6 outputs the response message 10, which is passed by the data transmission acceleration module 11 to the source system 2. Accordingly, the source system 2 now generates a data transmission block and transmits it to the target system 5 in an information message 15 (see arrow 301).
[0065] The data transmission acceleration module 11 passes the data transmission block included in the information message 15 to the system interface module 6. The subsequent process on the target system 5 is similar to Figure 1 and Figure 2 implementation plan in .
[0066] However, to speed up data transmission, data transmission acceleration module 11 now sends its own response message 13 to source system 2 (see arrow 302). Source system 2 then generates another data transmission block and transmits it back to data transmission acceleration module 11 of target system 5 via data line 9. Data transmission acceleration module 11 also includes a data transmission block buffer, in which data transmission blocks received in this manner are buffered. This process can be repeated multiple times until the data transmission block buffer is completely full or no more information needs to be transmitted between source system 2 and target system 5.
[0067] After writing the payload to the payload buffer module 7, the system interface module 6 now passes the response message 10 to the data transmission acceleration module 11, as indicated by arrow 303. The data transmission acceleration module 11 then accesses the data transmission block buffer and can immediately transmit another data transmission block buffered therein back to the system interface module 6, as indicated by arrow 304. This not only eliminates the latency associated with the first delay time t1, but also eliminates the latency introduced by the data transmission via the data line 9. Correspondingly, the first time difference Δt is also reduced.
[0068] If the corresponding data transmission method is to be continued, data transmission acceleration module 11 passes response message 10 to system interface module 4 of source system 2 (indicated by arrow 305), thereby generating another data transmission block. Depending on the temporal overlap between the transmission of response messages 10 and 13, data transmission acceleration module 11 may also wait and transmit response message 10 (not shown) instead of response message 13.
[0069] Conversely, if data transmission acceleration module 11 receives a negative response message (not shown) from system interface module 6, indicating that target system 5 will no longer accept any further information, data transmission acceleration module 11 may forward the negative response message to system interface module 4 of source system 2, thereby causing source system 2 to stop or at least pause generating data transmission blocks until it receives another response message 10 from target system 5. Simultaneously, data transmission acceleration module 11 clears the data transmission block buffer.
[0070] Figure 4 Another embodiment of the information technology system 1 according to the invention is shown, in which the source system 2 and the target system 5 each have a data transmission acceleration module 11. Figure 2 and Figure 3 The advantages described in with respect to the time required to transfer information from the source system 2 to the target system 5 are combined.
[0071] It is generally possible that the data transmission block buffer of the data transmission acceleration module 11 in the target system 5 can be filled more quickly by providing a combined arrangement of one data transmission acceleration module 11 in the source system 2 and one data transmission acceleration module 11 in the target system 5. However, this depends on whether the data transmission block buffer of the data transmission acceleration module 11 in the source system 2 already contains data transmission blocks, as well as on the first delay time t1 and the delay time when transmitting data via the data line 9. Figure 4In the embodiment shown in , the data transmission block buffer of the data transmission acceleration module 11 in the source system 2 is originally empty. In addition, the first delay time t1 is greater than the delay time for data transmission via the data line 9. Therefore, only after the system interface module 4 has transferred such a data transmission block can the data transmission acceleration module 11 in the source system 2 transmit another data transmission block to the data transmission acceleration module 11 in the target system 5. Conversely, if the first delay time t1 is less than the delay time for data transmission via the data line 9, then when the data transmission acceleration module 11 in the source system 2 receives the response message 13, a data transmission block may already exist in the data transmission block buffer, and this data transmission block may then be directly transmitted to the target system 5 via the data line 9.
[0072] Figure 5 An embodiment is shown in which two data transmission block buffers are partially filled and will be completely filled in the subsequent process. Arrow 501 represents writing another data transmission block to the data transmission block buffer of the data transmission acceleration module 11 in the source system 2.
[0073] Target system 5 informs source system 2 that it is ready to receive information by transmitting a response message 10. Since the data transmission block buffer of data transmission acceleration module 11 of source system 2 already contains the corresponding data transmission block, such a data transmission block can be directly transmitted to target system 5, as shown by arrow 502.
[0074] The data transmission block is then transmitted to the system interface module 6 by the data transmission acceleration module 11 in the target system 5, as shown by arrow 503. Correspondingly, the data transmission acceleration module 11 in the target system 5 sends a response message 13 to the source system 2, as shown by arrow 504.
[0075] Since the data transmission block buffer in source system 2 already contains a data transmission block as described above, the data transmission acceleration module 11 of source system 2 can directly transmit another data transmission block to target system 5, as indicated by arrow 505. In the embodiment shown here, the data transmission block buffer of the data transmission acceleration module 11 in target system 5 is now full, so no further reply message 13 is transmitted to source system 2. However, since the data transmission block buffer in source system 2 is not yet full, it will continue to be filled.
[0076] As indicated by arrow 506, system interface module 6 outputs a response message 10, which is received by data transmission acceleration module 11 of target system 5. Data transmission acceleration module 11 of target system 5 can then immediately read another data transmission block from its data transmission block buffer and transmit it to system interface module 6, as indicated by arrow 507. This frees up a space in the data transmission block buffer of data transmission acceleration module 11 of target system 5. Therefore, data transmission acceleration module 11 of target system 5 passes response message 10 to source system 2, prompting the transmission of another data transmission block, as it can now receive another data transmission block. This data transmission block is transmitted via a corresponding information message 15 (indicated by arrow 508). The data transmission block buffer in target system 5 is then full again, so no further response messages 13 are sent.
[0077] As indicated by arrow 509, the data transmission block buffer of data transmission acceleration module 11 of source system 2 is also full. Only after data transmission acceleration module 11 of source system 2 receives another response message 10 (as indicated by arrow 510) can it transmit another data transmission block to target system 5 and make room in the data transmission block buffer of source system 2, as indicated by arrow 511.
[0078] Figure 5 On the one hand, arrows 501 to 505 show how the data transmission block buffer of the data transmission acceleration module 11 in the target system 5 can be accelerated by setting the data transmission acceleration module 11 in the source system 2 and the target system 5. On the other hand, Figure 5 It is shown that, although the data transmission block buffers of both data transmission acceleration modules 11 are full, it is still possible to save time in data transmission because, as indicated by arrow 511 , a data transmission block can be transmitted to the target system 5 more quickly.
Claims
1. An information technology system (1), comprising: - a source system (2), which in turn has a source information memory, a file reading module (3) and a system interface module (4); and a target system (5), which in turn has a target information memory as well as a system interface module (6), a payload buffer module (7) and a memory access module (8), The source system (2) and the target system (5) are communicatively coupled to one another via a bidirectional data line (9), - the source system (2) is adapted to: after receiving a response message (10) from the target system (5), read the source information memory with the aid of the file reading module (3); pack the information read from the source information memory into data transmission blocks; and send the data transmission blocks to the target system (5) via the data line (9), - the source system (2) requires a first delay time (t1) to read the source information memory and pack the data transmission blocks, - the target system (5) is adapted to: receive the data transmission block; extract the information contained in the data transmission block and write the information to the payload buffer module (7); then generate a response message (10) and transfer the information from the payload buffer module (7) to the target information memory by means of the memory access module (8), - the target system (5) requires a second delay time (t2) to extract and write information and to generate the reply message (10), It is characterized by: The source system (2) and / or the target system (5) further each include a data transmission acceleration module (11), wherein the data transmission acceleration module has a data transmission block buffer. - a data transmission acceleration module (11) in the source system (2) is arranged between the data line (9) and the system interface module (4) and is adapted to: receive a first data transmission block and send the first data transmission block via the data line (9); after receiving the data transmission block, output a response message (12) to the system interface module (4) to cause the packaging of at least one further data transmission block; and buffer the further data transmission block in the data transmission block buffer; and sending another data transmission block cached in the data transmission block buffer to the target system after receiving a response message (10) from the target system (5), - The data transmission acceleration module (11) in the target system (5) is arranged between the data line (9) and the system interface module (6) and is adapted to: receive a first data transmission block and forward the first data transmission block to the system interface module (6); output a response message (13) itself after receiving the data transmission block and send the response message via the data line (9) to cause at least one further data transmission block to be sent from the source system (2) to the target system (5); cache at least one further data transmission block in the data transmission block buffer; and forward another data transmission block to the system interface module (6) after receiving a response message (10) from the system interface module (6), or send the negative response message via the data line (9) after receiving a negative response message from the system interface module (6) and delete all further data transmission blocks from the data transmission block buffer.
2. The information technology system (1) according to claim 1, It is characterized by: The data transmission acceleration module (11) in the source system (2) and / or in the target system (5) is further adapted to output a response message (12, 13) until the corresponding data transmission block buffer is full.
3. The information technology system (1) according to claim 1 or 2, It is characterized by: The source system (2) and the target system (5) are adapted to use a unified diagnostic service as a communication protocol.
4. The information technology system (1) according to any one of claims 1 to 3, It is characterized by: The source information storage and / or the target information storage includes a flash memory.
5. The information technology system (1) according to any one of claims 1 to 4, It is characterized by: The target system (5) is implemented as an embedded system.
6. The information technology system (1) according to any one of claims 1 to 5, It is characterized by: The source system (2) is implemented as a server or a server cluster, and at least part of the data line (9) is implemented via the Internet.
7. A vehicle, It is characterized by: A target system (5) having an information technology system (1) according to any one of claims 1 to 6.
8. A method for introducing updates into a target system (5) using an information technology system (1) according to any one of claims 1 to 6, It is characterized by: By means of the update, a parameter data set, an application program and / or firmware in the target system (5) is adapted or a parameter data set, an application program and / or firmware is newly introduced into the target system (5).
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