Test device and test method

Abstract

The invention provides a test device and a test method, which are used for carrying out high-temperature reverse bias test on a normally-open transistor and comprise a first voltage source, a second voltage source, an analog element and a controller. The analog element is electrically connected between the second voltage source and the source terminal of the normally open transistor. When the controller is operated in a test mode to perform a high-temperature reverse bias test, the controller controls the first voltage source to provide a first voltage to the drain terminal of the normally-open transistor and controls the second voltage source to provide a second voltage to the gate terminal of the normally-open transistor. The first voltage exceeds the second voltage. When the normally-open transistor is subjected to a high-temperature reverse bias test, the analog element is used for generating a test voltage at the source terminal of the normally-open transistor and / or generating a leakage current flowing through the normally-open transistor. According to the test device and the test method provided by the invention, the limit of the normally-open transistor is known through the parameters of the simulation element, and then the configuration for prolonging the service life of the normally-open transistor is found.

Description

Technical Field

[0001] The present invention relates to a testing device and a testing method, and in particular to a testing device and a testing method for performing a high-temperature reverse bias test on a normally-on transistor. Background Art

[0002] Gallium nitride (GaN) transistors have been widely used in high-frequency power conversion systems due to their low power loss and fast switching transitions. Compared to silicon metal-oxide-semiconductor field-effect transistors (MOSFETs), gallium nitride high-electron-mobility transistors (GaN HEMTs) offer better quality factors and more promising performance in high-power and high-frequency applications.

[0003] High-temperature reverse bias (HTRB) testing is a key reliability test for power components. It is designed to accelerate thermally initiated failure mechanisms by using biased operating conditions. During typical HTRB testing, components are subjected to a reverse breakdown voltage equal to or slightly less than their maximum rated temperature for an extended period of time at an ambient temperature close to their maximum rated temperature. HTRB testing provides invaluable information on long-term stability and aids research and development, as well as product testing. Summary of the Invention

[0004] The present invention proposes a test device and method for performing high-temperature reverse bias testing on normally-on transistors. By incorporating analog components, the state of the normally-on transistor in a cascode configuration is simulated. The parameters of the analog components are used to determine the normally-on transistor's limits, thereby identifying a configuration that extends the normally-on transistor's lifespan. Furthermore, the test device and method proposed by the present invention allow direct measurement of the test sample during the high-temperature reverse bias test without the need for deliberately increasing or decreasing the temperature, thereby increasing test and measurement efficiency.

[0005] In view of this, the present invention proposes a test device for performing a high-temperature reverse bias test on a normally-on transistor. The test device includes a first voltage source, a second voltage source, an analog component and a controller. The analog component is electrically connected between the second voltage source and the source terminal of the normally-on transistor. When the controller operates in a test mode to perform the high-temperature reverse bias test, the controller controls the first voltage source to provide a first voltage to the drain terminal of the normally-on transistor, and controls the second voltage source to provide a second voltage to the gate terminal of the normally-on transistor. The first voltage exceeds the second voltage. When the normally-on transistor performs the high-temperature reverse bias test, the analog component is used to generate a test voltage at the source terminal of the normally-on transistor and / or generate a leakage current flowing through the normally-on transistor.

[0006] According to one embodiment of the present invention, the analog component includes a Zener diode. The Zener diode includes an anode terminal, a cathode terminal, and a reverse breakdown voltage. The anode terminal is electrically connected to the second voltage, the cathode terminal is electrically connected to the source terminal of the normally-on transistor, and the reverse breakdown voltage is greater than the absolute value of the threshold voltage of the normally-on transistor.

[0007] According to another embodiment of the present invention, the analog component includes a resistor. The resistor has a resistance value and is electrically connected to the second voltage and the source terminal of the normally-on transistor. The test voltage and the resistance value are used to determine the leakage current flowing through the normally-on transistor.

[0008] According to one embodiment of the present invention, the test device further includes a third voltage source. When the controller operates in a measurement mode, the controller controls the first voltage source to provide a third voltage to the drain terminal of the normally-on transistor, controls the second voltage source to provide a fourth voltage to the gate terminal of the normally-on transistor, and controls the third voltage source to provide the second voltage to the source terminal of the normally-on transistor. The third voltage is not less than the second voltage, the second voltage is not less than the fourth voltage, and the first voltage is greater than the third voltage.

[0009] According to one embodiment of the present invention, when the controller operates in the test mode, the normally-on transistor operates at a first temperature, and when the controller operates in the measurement mode, the normally-on transistor operates at a second temperature, wherein the first temperature is equal to the second temperature.

[0010] The present invention also provides a testing method, comprising: selecting to operate a normally-on transistor in a test mode or a measurement mode; when operating the normally-on transistor in the test mode, operating the normally-on transistor at a first temperature; and providing a first voltage to the drain terminal of the normally-on transistor, providing a second voltage to the gate terminal of the normally-on transistor, and electrically connecting an analog component between the second voltage and the source terminal of the normally-on transistor. The first voltage exceeds the second voltage. The analog component is used to generate a test voltage at the source terminal of the normally-on transistor and / or generate a leakage current flowing through the normally-on transistor.

[0011] According to an embodiment of the present invention, when the normally-on transistor is operated in the test mode, a high-temperature reverse bias test is performed on the normally-on transistor.

[0012] According to one embodiment of the present invention, the analog component includes a Zener diode. The Zener diode includes an anode terminal, a cathode terminal, and a reverse breakdown voltage. The anode terminal is electrically connected to the second voltage, and the cathode terminal is electrically connected to the source terminal of the normally-on transistor. The reverse breakdown voltage is greater than the absolute value of the threshold voltage of the normally-on transistor.

[0013] According to another embodiment of the present invention, the analog component includes a resistor having a resistance value and electrically connected to the second voltage and a source terminal of the normally-on transistor, wherein the test voltage and the resistance value are used to determine the leakage current flowing through the normally-on transistor.

[0014] According to one embodiment of the present invention, the test method further includes: when operating in the measurement mode, operating the normally-on transistor at a second temperature; and providing a third voltage to the drain terminal of the normally-on transistor, providing a fourth voltage to the gate terminal of the normally-on transistor, and providing the second voltage to the source terminal of the normally-on transistor. The first temperature is equal to the second temperature. The third voltage is not less than the second voltage, and the second voltage is not less than the fourth voltage, wherein the first voltage is greater than the third voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a schematic diagram showing a test circuit according to an embodiment of the present invention;

[0016] Figure 2 is a schematic diagram showing a testing device according to an embodiment of the present invention operating in a testing mode;

[0017] Figure 3is a schematic diagram showing a testing device according to another embodiment of the present invention operating in a testing mode;

[0018] Figures 4A-4C is a schematic diagram showing a test circuit according to some embodiments of the present invention;

[0019] Figure 5 is a schematic diagram showing a power circuit according to an embodiment of the present invention;

[0020] Figure 6 is a flow chart showing a testing method according to an embodiment of the present invention.

[0021] Description of reference numerals:

[0022] 100, 200, 300: test device

[0023] 110: Test circuit

[0024] 111: Normally-on transistor

[0025] 112:Analog components

[0026] 120: first voltage source

[0027] 130: Second voltage source

[0028] 140: third voltage source

[0029] 150:Controller

[0030] 500: Power circuit

[0031] 501: first transistor

[0032] 502: second transistor

[0033] 600:Test Method

[0034] D: Drain terminal

[0035] G: Gate terminal

[0036] S: Source terminal

[0037] W1: First signal

[0038] W2: Second signal

[0039] W3: Third Signal

[0040] V1: first voltage

[0041] V2: second voltage

[0042] V3: third voltage

[0043] V4: fourth voltage

[0044] T1: first temperature

[0045] T2: Second temperature

[0046] VTST: test voltage

[0047] ZD: Zener diode

[0048] VD: Reverse breakdown voltage

[0049] NA: Anode end

[0050] NC: cathode terminal

[0051] R: resistance

[0052] IL: Leakage current

[0053] D1: First drain terminal

[0054] G1: first gate terminal

[0055] S1: First source terminal

[0056] D2: Second drain terminal

[0057] G2: second gate terminal

[0058] S2: Second source terminal

[0059] S610~S690: Step Flow DETAILED DESCRIPTION

[0060] The following description is of embodiments of the present application. Its purpose is to illustrate the general principles of the present application and should not be regarded as limiting the scope of the present application, which shall be determined by the claims.

[0061] It is worth noting that the following disclosure may provide multiple embodiments or examples for practicing different features of the present application. The specific component examples and arrangements described below are merely intended to briefly illustrate the spirit of the present application and are not intended to limit the scope of the present application. In addition, the following description may reuse the same component symbols or characters in multiple examples. However, the purpose of repetition is only to provide a simplified and clear description and is not intended to limit the relationship between the multiple embodiments and / or configurations discussed below.

[0062] In addition, the description below of a feature being connected to, coupled to, and / or formed on another feature may actually include multiple different embodiments, including direct contact between the features, or including other additional features formed between the features, so that the features are not in direct contact.

[0063] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used in the embodiments to describe the relative relationship of one element to another element in the drawings. It is understood that if the device in the drawings is turned upside down, the element described as being on the "lower" side will become the element on the "upper" side.

[0064] It is understood that although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms, and these terms are merely used to distinguish different elements, components, regions, layers, and / or parts. Thus, a first element, component, region, layer, and / or part discussed below may be referred to as a second element, component, region, layer, and / or part without departing from the teachings of some embodiments of the present application.

[0065] Some embodiments of the present application can be understood in conjunction with the drawings, and the drawings of the embodiments of the present application are also considered part of the description of the embodiments of the present application. It should be understood that the drawings of the embodiments of the present application are not drawn to the scale of actual devices and components. The shapes and thicknesses of the embodiments may be exaggerated in the drawings to clearly illustrate the features of the embodiments of the present application. In addition, the structures and devices in the drawings are illustrated in a schematic manner to clearly illustrate the features of the embodiments of the present application.

[0066] Here, the terms "about," "approximately," and "substantially" generally mean within 20%, preferably within 10%, and more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. The quantities given herein are approximate quantities, that is, even if "about," "approximately," or "substantially" is not specifically stated, the meaning of "about," "approximately," or "substantially" may still be implied.

[0067] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meanings as commonly understood by those skilled in the art to which this disclosure pertains. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant art and this application, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the examples of this application.

[0068] In some embodiments of the present application, terms such as "connect," "connect," and "interconnect," unless otherwise specified, may refer to two structures being in direct contact, or may refer to two structures not being in direct contact, with another structure positioned between them. Furthermore, such terms may include situations where both structures are movable or both structures are fixed.

[0069] In the drawings, similar elements and / or features may have the same reference numerals. Various elements of the same type may be distinguished by adding a letter or number after the reference numeral to distinguish similar elements and / or similar features.

[0070] Figure 1 FIG. 1 is a schematic diagram showing a test circuit according to an embodiment of the present invention. Figure 1 As shown, the test device 100 includes a test circuit 110, a first voltage source 120, a second voltage source 130, a third voltage source 140, and a controller 150. The test circuit 110 includes a normally-on transistor 111 and an analog component 112. The normally-on transistor 111 includes a drain terminal D, a gate terminal G, and a source terminal S. The analog component 112 is electrically connected between the gate terminal G and the source terminal S of the normally-on transistor 111 to simulate the operating conditions of the normally-on transistor 111 for testing. According to one embodiment of the present invention, the normally-on transistor 111 is a gallium nitride high electron mobility transistor. According to other embodiments of the present invention, the normally-on transistor 111 may also be other types of normally-on transistors.

[0071] The first voltage source 120 is electrically connected to the drain terminal D of the normally-on transistor 111, the second voltage source 130 is electrically connected to the gate terminal G of the normally-on transistor 111, and the third voltage source 140 is electrically connected to the source terminal S of the normally-on transistor 111. The controller 150 operates in one of a test mode and a measurement mode, and utilizes a first signal W1, a second signal W2, and a third signal W3 to control the first voltage source 120, the second voltage source 130, and the third voltage source 140, respectively, to test the normally-on transistor 111.

[0072] According to one embodiment of the present invention, when the controller 150 operates in the test mode, the test apparatus 100 is used to perform a high-temperature reverse bias test on the normally-on transistor 111. According to another embodiment of the present invention, when the controller 150 operates in the measurement mode, the test apparatus 100 is used to measure the characteristics of the normally-on transistor 111. In other words, the controller 150 can repeatedly operate in the test mode and the measurement mode to confirm the characteristic changes of the normally-on transistor 111 caused by the test.

[0073] Figure 2 FIG. 1 is a schematic diagram showing a test device according to an embodiment of the present invention operating in a test mode. Figure 2As shown, when the test apparatus 200 operates in the test mode (that is, the controller 150 operates in the test mode), the test circuit 110 operates at a first temperature T1. The controller 150 controls the first voltage source 120 to generate a first voltage V1 using a first signal W1, controls the second voltage source 130 to generate a second voltage V2 using a second signal W2, and controls the third voltage source 140 to not generate a voltage using a third signal W3. The first voltage V1 exceeds the second voltage V2. According to some embodiments of the present invention, the first temperature T1 is close to the rated maximum temperature of the normally-on transistor 111.

[0074] According to some embodiments of the present invention, when the controller 150 operates in test mode, the first voltage V1 is 80% of the breakdown voltage of the normally-on transistor 111, the second voltage V2 is at ground level, and the source terminal S is in a floating state (i.e., the third voltage source 140 generates no voltage). According to one embodiment of the present invention, the breakdown voltage of the normally-on transistor 111 is 650V, the first voltage V1 is 520V, the second voltage V2 is 0V, and the first temperature T1 is 125 degrees Celsius. According to one embodiment of the present invention, when the testing apparatus 200 operates in test mode (i.e., the controller 150 operates in test mode), a high-temperature reverse bias test is performed on the normally-on transistor 111.

[0075] Figure 3 FIG. 1 is a schematic diagram showing a test device according to another embodiment of the present invention operating in a test mode. Figure 3 As shown, when the test device 300 operates in the measurement mode (that is, the controller 150 operates in the measurement mode), the test circuit 110 operates at the second temperature T2, and the controller 150 uses the first signal W1 to control the first voltage source 120 to generate the third voltage V3, and uses the second signal W2 to control the second voltage source 130 to generate the second voltage V2, and uses the third signal W3 to control the third voltage source 140 to generate the fourth voltage V4.

[0076] According to one embodiment of the present invention, when the controller 150 operates in the measurement mode, the third voltage V3 is 0.1V to 20V, the second voltage V2 is 0V, and the fourth voltage V4 is 0V to -20V. According to another embodiment of the present invention, when the controller 150 operates in the measurement mode, the controller 150 controls the third voltage V3 of the first voltage source 120 to sweep from 0.1V to 20V, and controls the fourth voltage V4 of the third voltage source 140 to sweep from 0V to -20V. According to some embodiments of the present invention, the first voltage V1 is greater than the third voltage V3, the third voltage V3 is not less than the second voltage V2, and the second voltage V2 is not less than the fourth voltage V4. According to some embodiments of the present invention, the first voltage V1 is greater than the third voltage V3.

[0077] According to some embodiments of the present invention, the first temperature T1 is equal to the second temperature T2. According to other embodiments of the present invention, the first temperature T1 is equal to the second temperature T2. In other words, after the normally-on transistor 111 is subjected to a high-temperature reverse bias test for a period of time, the normally-on transistor 111 can be directly measured as needed (i.e., the controller 150 operates in the measurement mode) without the need for deliberate cooling. Therefore, when a sample needs to be measured during the high-temperature reverse bias test, a bias can be directly provided to the sample to observe changes in its characteristics, without having to wait until the high-temperature reverse bias test is completed before measuring the sample, thereby increasing the flexibility of testing and measurement.

[0078] Figures 4A-4C Schematic diagram showing a test circuit according to some embodiments of the present invention. Figure 4A As shown, the analog component 112 of the test circuit 110 includes a Zener diode ZD. The Zener diode ZD includes an anode terminal NA electrically connected to the gate terminal G of the normally-on transistor 111 and a cathode terminal NC electrically connected to the source terminal S of the normally-on transistor 111.

[0079] like Figure 4A As shown, Zener diode ZD also has a reverse breakdown voltage VD, where the reverse breakdown voltage VD is greater than the threshold voltage of normally-on transistor 111. For example, assuming the threshold voltage of normally-on transistor 111 is -20V, the reverse breakdown voltage VD exceeds 20V. That is, when the voltage at source terminal S exceeds the voltage at gate terminal G by more than 20V, normally-on transistor 111 is non-conductive. In other words, when performing a high-temperature reverse bias test on normally-on transistor 111, Zener diode ZD is used to generate test voltage VTST at source terminal S, and the reverse breakdown voltage VD is used to limit the maximum value of test voltage VTST.

[0080] like Figure 4B As shown, the analog component 112 includes a resistor R, wherein the resistor R is electrically connected between a source terminal S and a gate terminal G. According to one embodiment of the present invention, when the normally-on transistor 111 is subjected to a high-temperature reverse bias test, the source terminal S generates a test voltage VTST due to the resistor R. The test voltage VTST, combined with the resistance value of the resistor R, generates a leakage current IL flowing through the normally-on transistor 111. In other words, when the normally-on transistor 111 is subjected to a high-temperature reverse bias test, the resistor R is used to determine the leakage current IL flowing through the normally-on transistor 111.

[0081] like Figure 4CAs shown, the simulation element 112 includes a Zener diode ZD and a resistor R, which are used to generate a test voltage VTST at the source terminal S and determine the leakage current IL flowing through the normally-on transistor 111. According to some embodiments of the present invention, when performing a high-temperature reverse bias test on the normally-on transistor 111, the simulation element 112 is used to operate the normally-on transistor 111 in a semi-conductive state, thereby testing the capability of the normally-on transistor 111.

[0082] Figure 5 FIG. 1 is a schematic diagram showing a power circuit according to an embodiment of the present invention. Figure 5 As shown, the power circuit 500 includes a first transistor 501 and a second transistor 502. According to some embodiments of the present invention, the first transistor 501 is a normally-on transistor, and the second transistor 502 is a normally-off transistor. The first transistor 501 includes a first drain terminal D1, a first gate terminal G1, and a first source terminal S1. The second transistor 502 includes a second drain terminal D2, a second gate terminal G2, and a second source terminal S2. The first gate terminal G1 is electrically connected to the second source terminal S2, and the first source terminal S1 is electrically connected to the second drain terminal D2.

[0083] According to some embodiments of the present invention, Figure 1-Figure 3 The test circuit 110 is used to test the characteristics of the normally-on transistor 111 electrically connected to the power circuit 500, and the simulation element 112 is used to simulate the effect of the second transistor 502 on the first transistor 501. In other words, when Figure 1-Figure 3 When the normally-on transistor 111 is subjected to a high-temperature reverse bias test, Figures 4A-4C The Zener diode ZD and the resistor R are used to simulate the effect of the second transistor 502 on the first transistor 501 .

[0084] According to some embodiments of the present invention, Figures 4A-4C The reverse breakdown voltage VD and the resistance value of the resistor R are used to determine the voltage at the source terminal S and the magnitude of the leakage current IL that extend the life of the normally-on transistor 111. For example, the magnitude of the maximum allowable leakage current IL can be used to select a second transistor 502 with an appropriate leakage current to be used with the normally-on transistor 111. Alternatively, the relationship between the voltage at the source terminal S and the life of the normally-on transistor 111 can be used to select an appropriate component electrically connected to the source terminal S to limit the voltage at the source terminal S and improve the durability of the normally-on transistor 111.

[0085] Figure 6 600 is a flowchart showing a test method according to an embodiment of the present invention. Figure 2-Figure 3 Eli explained in detail.

[0086] First, the normally-on transistor 111 is selected to operate in a test mode or a measurement mode (step S610). According to one embodiment of the present invention, when the normally-on transistor 111 is operated in the test mode, a high-temperature reverse bias test is performed on the normally-on transistor 111. When the normally-on transistor 111 is operated in the timing mode, the normally-on transistor 111 is operated at a first temperature T1 (step S620). According to some embodiments of the present invention, the first temperature T1 is close to the rated maximum temperature of the normally-on transistor 111.

[0087] In addition, if Figure 2 As shown, a first voltage V1 is provided to the drain terminal D of the normally-on transistor 111 (step S630), a second voltage V2 is provided to the gate terminal G of the normally-on transistor 111 (step S640), and the analog component 112 is electrically connected between the gate terminal G and the source terminal S of the normally-on transistor (step S650). According to one embodiment of the present invention, the first voltage V1 exceeds the second voltage V2.

[0088] Returning to step S610, when the normally-on transistor 111 is operated in the measurement mode, the normally-on transistor 111 is operated at the second temperature T2 (step S660). According to some embodiments of the present invention, the first temperature T1 is equal to the second temperature T2. In other words, when the normally-on transistor 111 switches from the test mode to the measurement mode, the normally-on transistor 111 can be measured without intentionally increasing or decreasing its temperature.

[0089] Next, a third voltage V3 is provided to the drain terminal D of the normally-on transistor 111 (step S670), a second voltage V2 is provided to the gate terminal G of the normally-on transistor 111 (step S680), and a fourth voltage V4 is provided to the source terminal S of the normally-on transistor (step S690). According to some embodiments of the present invention, the first voltage V1 is greater than the third voltage V3, the third voltage V3 is not less than the second voltage V2, and the second voltage V2 is not less than the fourth voltage V4. According to some embodiments of the present invention, the second voltage V2 is 0V.

[0090] According to some embodiments of the present invention, the third voltage V3 may be scanned from 0V toward a positive voltage, and the fourth voltage V4 may be scanned from 0V toward a negative voltage. By recording the current-voltage waveform of the normally-on transistor 111, the state of the normally-on transistor 111 can be determined. For example, based on the magnitude of the leakage current of the normally-on transistor 111, it can be determined whether the epitaxial layer of the normally-on transistor 111 has broken down after the high-temperature reverse bias test.

[0091] The present invention proposes a test device and method for performing high-temperature reverse bias testing on normally-on transistors. By incorporating analog components, the state of the normally-on transistor in a cascode configuration is simulated. The parameters of the analog components are used to determine the normally-on transistor's limits, thereby identifying a configuration that extends the normally-on transistor's lifespan. Furthermore, the test device and method proposed by the present invention allow direct measurement of the test sample during the high-temperature reverse bias test without the need for deliberately increasing or decreasing the temperature, thereby increasing test and measurement efficiency.

[0092] Although the embodiments of the present application and their advantages have been disclosed as above, it should be understood that any person skilled in the art may make changes, substitutions and modifications without departing from the spirit and scope of the present application. In addition, the scope of protection of the present application is not limited to the processes, computers, manufacturing, material compositions, devices, methods and steps in the specific embodiments described in the specification. Any person skilled in the art can understand the current or future developed processes, computers, manufacturing, material compositions, devices, methods and steps from the disclosure of some embodiments of the present application. As long as they can implement substantially the same functions or obtain substantially the same results in the embodiments described herein, they can all be used according to some embodiments of the present application. Therefore, the scope of protection of the present application includes the above-mentioned processes, computers, manufacturing, material compositions, devices, methods and steps. In addition, each claim constitutes a separate embodiment, and the scope of protection of the present application also includes the combination of each claim and embodiment.

Claims

1. A testing device, characterized in that: Used to perform a high temperature reverse bias test on a normally-on transistor, including: a first voltage source; a second voltage source; an analog element electrically connected between the second voltage source and the source terminal of the normally-on transistor; and a controller, wherein when the controller operates in a test mode to perform the high-temperature reverse bias test, the controller controls the first voltage source to provide a first voltage to the drain terminal of the normally-on transistor, and controls the second voltage source to provide a second voltage to the gate terminal of the normally-on transistor; wherein the first voltage exceeds the second voltage; When the normally-on transistor is subjected to the high-temperature reverse bias test, the analog component is used to generate a test voltage at the source terminal of the normally-on transistor and / or generate a leakage current flowing through the normally-on transistor.

2. The testing device according to claim 1, wherein: The simulation components include: a Zener diode comprising an anode terminal, a cathode terminal, and a reverse breakdown voltage; wherein the anode terminal is electrically connected to the second voltage, and the cathode terminal is electrically connected to the source terminal of the normally-on transistor; The reverse breakdown voltage is greater than the absolute value of the threshold voltage of the normally-on transistor.

3. The testing device according to claim 1, wherein: The simulation components include: a resistor having a resistance value and electrically connected to the second voltage and the source terminal of the normally-on transistor; The test voltage and the resistance value are used to determine the leakage current flowing through the normally-on transistor.

4. The testing device according to claim 1, wherein: Also includes: a third voltage source; wherein when the controller operates in a measurement mode, the controller controls the first voltage source to provide a third voltage to the drain terminal of the normally-on transistor, controls the second voltage source to provide a fourth voltage to the gate terminal of the normally-on transistor, and controls the third voltage source to provide the second voltage to the source terminal of the normally-on transistor; wherein the third voltage is not less than the second voltage, and the second voltage is not less than the fourth voltage; The first voltage is greater than the third voltage.

5. The testing device according to claim 4, wherein: When the controller operates in the test mode, the normally-on transistor operates at a first temperature; wherein when the controller operates in the measurement mode, the normally-on transistor operates at a second temperature; Wherein the first temperature is equal to the second temperature.

6. A testing method, characterized in that: include: Selecting to operate a normally-on transistor in a test mode or a measurement mode; When the normally-on transistor is operated in the test mode, the normally-on transistor is operated at a first temperature; as well as Providing a first voltage to the drain terminal of the normally-on transistor, providing a second voltage to the gate terminal of the normally-on transistor, and electrically connecting an analog element between the second voltage and the source terminal of the normally-on transistor; wherein the first voltage exceeds the second voltage; The analog component is used to generate a test voltage at the source terminal of the normally-on transistor and / or generate a leakage current flowing through the normally-on transistor.

7. The testing method according to claim 6, wherein: When the normally-on transistor is operated in the test mode, a high-temperature reverse bias test is performed on the normally-on transistor.

8. The testing method according to claim 6, wherein: The simulation components include: a Zener diode comprising an anode terminal, a cathode terminal, and a reverse breakdown voltage; wherein the anode terminal is electrically connected to the second voltage, and the cathode terminal is electrically connected to the source terminal of the normally-on transistor; The reverse breakdown voltage is greater than the absolute value of the threshold voltage of the normally-on transistor.

9. The testing method according to claim 6, wherein: The simulation components include: a resistor having a resistance value and electrically connected to the second voltage and the source terminal of the normally-on transistor; The test voltage and the resistance value are used to determine the leakage current flowing through the normally-on transistor.

10. The testing method according to claim 6, wherein: Also includes: When operating in the measurement mode, operating the normally-on transistor at a second temperature; as well as providing a third voltage to the drain terminal of the normally-on transistor, providing a fourth voltage to the gate terminal of the normally-on transistor, and providing the second voltage to the source terminal of the normally-on transistor; wherein the first temperature is equal to the second temperature; wherein the third voltage is not less than the second voltage, and the second voltage is not less than the fourth voltage; The first voltage is greater than the third voltage.

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